INTER-LOGO

JESD204C Intel FPGA IP na ADI AD9081 MxFE ADC Interoperability Report

JESD204C-Intel-FPGA-IP-na-ADI-AD9081-MxF- ADC-Interoperability-Akụkọ-Mkpụrụ Ahịa-Onyinyo.

Ozi ngwaahịa

Ngwaahịa e zoro aka na ya na ntuziaka onye ọrụ bụ JESD204C Intel FPGA IP. Ọ bụ akụrụngwa akụrụngwa nke ejiri ya na Intel Agilex I-Series F-Tile Demo Board na ADI AD9081-FMCA-EBZ EVM. A na-etinye IP ozugbo na ọnọdụ Duplex mana ọ bụ naanị ụzọ nnabata ka a na-eji. Ọ na-ewepụta elekere njikọ 375 MHz yana elekere etiti 375 MHz. E gosipụtara nhazi ngwaike maka ule mmekọrịta mmekọrịta ADC na eserese 1. IP chọrọ ka SYSREF nye ya site na igwe na-emepụta elekere nke na-ebute elekere ngwaọrụ JESD204C Intel FPGA IP.

Ntuziaka ojiji ngwaahịa

Ntọala ngwaike
Ka ịtọlite ​​ngwaike maka iji JESD204C Intel FPGA IP, soro usoro ndị a:

  1. Jikọọ ADI AD9081-FMCA-EBZ EVM na njikọ FMC + nke Intel Agilex I-Series F-Tile Demo Board.
  2. Gbaa mbọ hụ na ọ bụ igwe nrụpụta elekere na-ebute akara SYSREF nke na-ebute elekere ngwaọrụ JESD204C Intel FPGA IP.

Nkọwa sistemu
Eserese-ọkwa nke usoro na-egosi ka ejikọrọ modul dị iche iche na nhazi a. Ọ na-agụnye Intel Agilex-I F-tile Demo Board, Intel Agilex F-tile Device, Top-Level RTL, Platform Designer System, Pattern Generator, Pattern Checker, F-Tile JESD204C Duplex IP Core, na clocks na interfaces dị iche iche.

Usoro mmekọrịta
Layer Data Link Nnata
Mpaghara ule a na-ekpuchi ikpe ule maka nhazi nkụnye eji isi mee mmekọrịta (SHA) yana alignment multiblock (EMBA). JESD204C Intel FPGA IP na-agụ ndekọ sitere na oyi akwa njikọ data n'oge ule, na-ede ha n'ime log. files, ma na-enyocha ha maka ịgafe njirisi site na edemede TCL.

JESD204C Intel® FPGA IP na ADI AD9081 MxFE* ADC Interoperability Report maka Intel® Agilex™ F-tile Devices

JESD204C Intel® FPGA IP bụ ihe ọgụgụ isi nwere ọgụgụ isi na-agba ọsọ-na-atụ.
JESD204C Intel FPGA IP ejirila ọtụtụ ngwaọrụ JESD204C kwekọrọ analọgụ-na-dijitalụ mgbanwe (ADC) ahọrọla ngwaike.
Akụkọ a na-egosipụta mmekọrịta nke JESD204C Intel FPGA IP na AD9081 Mixed Signal Front End (MxFE *) evaluation module (EVM) sitere na Analog Devices Inc. (ADI). Akụkụ ndị a na-akọwa usoro nlele ngwaike yana nsonaazụ ule.

Ozi metụtara
F-tile JESD204C Intel FPGA IP ntuziaka onye ọrụ

Achọrọ ngwaike na ngwanrọ
Nnwale mmekọrịta na-achọ ngwaike na ngwa ngwa ndị a: Akụrụngwa

  • Intel Agilex™ I-Series F-tile Demo Board (AGIB027R29A1E2VR0) nwere ihe nkwụnye ọkụ 12V
  • Ngwa Analog (ADI) AD9081 MxFE* EVM (AD9081-FMCA-EBZ, Rev C)
  • Skywork Si5345-D Evaluation Board (Si5345-D-EVB)
  • SMA nwoke ka SMP nwoke
  • SMP nwoke ka eriri SMP

Ngwa ngwa

  • Ngwa ngwanrọ Intel Quartus Prime Pro Edition 21.4
  • AD9081_API ụdị 1.1.0 ma ọ bụ nke ọhụrụ (ngwa Linux, achọrọ maka nhazi AD9081 EVM)

Ozi metụtara

  • AD9081/AD9082 ntuziaka onye ọrụ mmepe sistemụ
  • Skyworks Si5345-D Ntuziaka onye ọrụ Board

Ntọala ngwaike
A na-enweta JESD204C Intel FPGA IP ozugbo na ọnọdụ Duplex mana ọ bụ naanị ụzọ nnabata ka a na-eji. Maka FCLK_MULP = 1, WIDTH_MULP = 8, S = 1, isi PLL na-ewepụta elekere njikọ 375 MHz na elekere etiti 375 MHz.
A na-eji Intel Agilex I-Series F-Tile Demo Board na ADI AD9081-FMCA-EBZ EVM jikọọ na njikọ FMC + nke bọọdụ mmepe. E gosipụtara nhazi ngwaike maka ule interoperability ADC na ọnụ ọgụgụ Ntọala Hardware - • AD9081-FMCA-EBZ EVM na-enweta ike site na Intel Agilex I-Series F-Tile Demo Board site na njikọ FMC +.

  • F-tile transceiver na JESD204C Intel FPGA IP core PLL ntụaka clocks bụ Si5345-D-EVB na-enye site na SMA na eriri SMP. Tọọ MUX_DIP_SW0 elu na Agilex-I F-Tile Demo Board iji hụ na U22 na-ewere CLKIN1 nke ejikọrọ na eriri SMP.
  • Si5345-D-EVB na-enye elekere ntụaka maka igwe elekere elekere mmemme HMC7044 dị na AD9081 EVM site na SMP na eriri SMP.
  • Elekere njikwa maka JESD204C Intel FPGA IP core bụ nke Silicon Labs Si5332 na-emepụta elekere mmemme dị na Intel Agilex I-Series F-tile Demo Board.
  • Onye nrụpụta elekere mmemme nke HMC7044 na-enye elekere ntụaka ngwaọrụ AD9081. Oge akpọchi akpọchi (PLL) dị na ngwaọrụ AD9081 na-ewepụta ADC s achọrọ.ampelekere site na elekere ntụaka ngwaọrụ.
  • Maka Subclass 1, onye nrụpụta elekere HMC7044 na-ewepụta akara SYSREF maka ngwaọrụ AD9081 yana maka JESD204C Intel FPGA IP site na njikọ FMC+.

Mbate: Intel na-akwado SYSREF ka ọ bụrụ onye na-emepụta elekere na-ebute elekere ngwaọrụ JESD204C Intel FPGA IP.

JESD204C-Intel-FPGA-IP-na-ADI-AD9081-MxF- ADC-Interoperability-Akụkọ-01

Nkọwa sistemu

Eserese-ọkwa sistemụ na-egosi ka ejikọrọ modul dị iche iche na nhazi a.

Onyonyo 2. Eserese sistemu JESD204C-Intel-FPGA-IP-na-ADI-AD9081-MxF- ADC-Interoperability-Akụkọ-02

Ihe ndetu:

  1. M bụ ọnụọgụ ndị ntụgharị.
  2. S bụ ọnụọgụ nke s bufereamples kwa onye ntụgharị kwa etiti.
  3. WIDTH_MULP bụ ọnụọgụ data n'etiti oyi akwa ngwa na oyi akwa njem.
  4. N bụ ọnụọgụ ntụgharị ngbanwe kwa onye ntụgharị.
  5. CS bụ ọnụọgụ njikwa n'otu ngbanwe samples.

Na nhazi a, maka example L = 8, M = 4, na F = 1, ọnụọgụ data nke ụzọ transceiver bụ 24.75 Gbps.
Si5332 OUT1 na-ewepụta elekere 100 MHz na mgmt_clk. Si5345-D-EVB na-ewepụta ugboro abụọ elekere, 375 MHz na 100 MHz. A na-enye 375 MHz na multiplexer agbakwunyere na Intel Agilex I-Series F-tile Demo Board site na ọdụ ụgbọ mmiri J19 SMA. Elekere mmepụta nke multiplexer agbakwunyere na-eme ka elekere ntụgharị F-tile transceiver (refclk_xcvr) na JESD204C Intel FPGA IP core PLL reference clock (refclk_core). 100 MHz sitere na Si5345-D-EVB ejikọrọ na HMC7044 mmemme elekere elekere dị na AD9081 EVM dị ka ntinye elekere.
(EXT_HMCREF).

HCM7044 na-ewepụta akara SYSREF oge nke 11.71875 MHz site na Njikọ FMC.
A na-enweta JESD204C Intel FPGA IP ozugbo na ọnọdụ Duplex mana ọ bụ naanị ụzọ nnabata ka a na-eji.

Usoro mmekọrịta
Akụkụ na-esonụ na-akọwa ebumnuche ule, usoro, na njirisi ngafe. Nnwale a na-ekpuchi mpaghara ndị a:

  • oyi akwa njikọ data nnata
  • oyi akwa njem nnata

Layer Data Link Nnata
Mpaghara ule a na-ekpuchi ikpe ule maka nhazi nkụnye eji isi mee mmekọrịta (SHA) yana alignment multiblock (EMBA).
Na njikọ na-amalite, mgbe nrụpụta ihe nnata, JESD204C Intel FPGA IP na-amalite ịchọ iyi isi okwu mmekọrịta nke ngwaọrụ na-ebufe. A na-agụ ndekọ ndị na-esonụ site na oyi akwa njikọ data n'oge ule, edere n'ime log files, ma kwenye maka ịgafe njirisi site na edemede TCL.

Ozi metụtara
F-tile JESD204C Intel FPGA IP ntuziaka onye ọrụ

Nkwanye nkụnye eji isi mee mmekọrịta (SHA)
Tebụl 1. Mmekọrịta nkụnye eji isi mee Nlele ule

Nyocha ikpe Ebumnuche Nkọwa Usoro ngafe
SHA.1 Lelee ma ekwenyere mkpọchi nkụnye eji isi mee mmekọrịta ka emechara usoro nrụpụta. A na-agụ akara ndị a site na ndekọ:
  • A na-agụ CDR_Lock site na ndebanye aha rx_status3 (0x8C).
  • A na-agụ SH_Locked site na ndebanye aha rx_status4 (0x90).
  • A na-agụ jrx_sh_err_status site na ndebanye aha rx_err_status (0x60).
  • Ekwesịrị ikwupụta CDR_Lock na SH_LOCK n'ogo dị elu dabara na ọnụọgụ nke ụzọ.
  • jrx_sh_err_status kwesịrị ịbụ
  •  Ebe ntakịrị dị na jrx_sh_err_status na-enyocha sh_unlock_err, rx_gb_overflow_err, rx_gb_underflow_err, invalid_sync_header, src_rx_alarm, syspll_lock_err, na cdr_locked_err.
SHA.2 Lelee ọnọdụ mkpọchi nkụnye eji isi mee mmekọrịta mgbe emechara mkpọchi nkụnye eji isi mee mmekọrịta (ma ọ bụ n'oge Mgbatị Multi-Block alignment) wee kwụsie ike. A na-agụ invalid_sync_header maka ọnọdụ mkpọchi nkụnye eji isi mee mmekọrịta site na ndebanye aha (0x60[8]). Ọnọdụ invalid_sync_header kwesịrị ịbụ 0.

Mgbatị Multiblock agbatị (EMBA)

Tebụl 2. Usoro Nlebaanya Multiblock agbatịkwuru

Nyocha ikpe Ebumnuche Nkọwa Usoro ngafe  
EMBA.1 Lelee ma ọ bụrụ na agbanyere Mkpọchi Multiblock naanị ka nkwenye nke mkpọchi nkụnye eji isi mee mmekọrịta. A na-agụ akara ndị a site na ndekọ:
  • Uru EMB_Locked_1 kwesịrị nhata na 1 dabara na uzo ọ bụla. EMB_Lock_err kwesịrị ịbụ 0.
 
 
  Nyocha ikpe Ebumnuche Nkọwa Usoro ngafe
     
  • A na-agụ EMB_Locked_1 site na ndebanye aha rx_status5 (0x94).
  • A na-agụ EMB_Lock_err site na ndebanye aha rx_err_status (0x60[19]).
 
  EMBA.2 Lelee ma ọ bụrụ na ọnọdụ mkpọchi Multiblock gbatịrị agbatị (mgbe mkpọchi multiblock agbatịchara ma ọ bụ ruo mgbe ewepụtara ihe nchekwa na-agbanwe) yana enweghị multiblock na-ezighi ezi. A na-agụ invalid_eomb_eoemb site na ndebanye aha rx_err_status (0x60[10:9]). invalid_eomb_eoemb kwesịrị ịbụ "00".
  EMBA.3 Lelee nzizi uzo. A na-agụ ụkpụrụ ndị a site na ndekọ:
  • A na-agụ elastic_buf_over_flow site na ndebanye aha rx_err_status (0x60[20]).
  • A na-agụ elastic_buf_full site na ndebanye aha rx_status6 (0x98).
  • elastic_buf_over_flow kwesịrị ịbụ 0.
  • Uru elastic_buf_full kwesịrị nhata na 1 dabara na uzo ọ bụla.

Ụgbọ njem nnata (TL)
Iji lelee iguzosi ike n'ezi ihe data nke iyi data ịkwụ ụgwọ site na nnata (RX) JESD204C Intel FPGA IP na oyi akwa ụgbọ njem, a na-ahazi ADC ka ọ bụrụ r.amp/ PRBS ụkpụrụ ule. Adokwara ADC ka ọ rụọ ọrụ n'otu nhazi ahụ dị na JESD204C Intel FPGA IP. Ihe ramp/PRBS checker na akwa FPGA na-enyocha ramp/ PRBS data iguzosi ike n'ezi ihe maka otu nkeji. A na-enyocha RX JESD204C Intel FPGA IP ndekọ rx_err na-aga n'ihu maka uru efu maka otu nkeji.
Ọnụọgụ dị n'okpuru na-egosi nhazi nyocha echiche maka ịlele iguzosi ike n'ezi ihe data.

Ọgụgụ 3. Nyochaa Iguzosi Ike n'ezi data Iji Ramp/PRBS15 Checker

JESD204C-Intel-FPGA-IP-na-ADI-AD9081-MxF- ADC-Interoperability-Akụkọ-03

Isiokwu 3. Ụgbọ njem Layer ule ikpe

Nyocha ikpe Ebumnuche Nkọwa Usoro ngafe
TL.1 Lelee maapụ oyi akwa njem nke ọwa data site na iji ramp ụkpụrụ ule. Data_mode ka atọrọ ka Ramp_modu.

A na-agụ akara ndị a site na ndekọ:

  • A na-agụ crc_err site na rx_err_status (0x60[14]).
  •  A na-agụ jrx_patchk_data_error site na ndekọ tst_err0.
  • crc_err kwesịrị ịdị obere ka ịgafe.
  • jrx_patchk_data_error kwesịrị ịdị ala.
TL.2 Lelee maapụ oyi akwa njem nke ọwa data site na iji ụkpụrụ nnwale PRBS15. Adobere data_mode ka ọ bụrụ prbs_mode.

A na-agụ ụkpụrụ ndị a site na ndekọ:

  • A na-agụ crc_err site na rx_err_status (0x60[14]).
  • A na-agụ jrx_patchk_data_error site na ndekọ tst_err0.
  • crc_err kwesịrị ịdị obere ka ịgafe.
  • jrx_patchk_data_error kwesịrị ịdị ala.

JESD204C Intel FPGA IP na nhazi ADC
Ngwa AD204 na-akwado JESD9081C Intel FPGA IP (L, M, na F) na nlele ngwaike a. Ọnụego data transceiver, sampling clock, na paramita JESD204C ndị ọzọ na-agbaso ụkpụrụ AD908D1.
Nnwale nlele ngwaike na-arụ ọrụ JESD204C Intel FPGA IP yana nhazi oke ndị a.

Ntọala zuru ụwa ọnụ maka nhazi niile:

  • E = 1
  • CF = 0
  • CS = 0
  • Subclass = 1
  • FCLK_MULP = 1
  • WIDTH_MULP = 8
  • SH_CONFIG = CRC-12
  • Elekere njikwa FPGA (MHz) = 100

Nsonaazụ ule
Tebụl na-esote nwere nsonaazụ enwere ike yana nkọwa ha.

Tebụl 4. Nkọwapụta nsonaazụ

Nsonaazụ Nkọwa
gafere Ahụrụ ngwaọrụ n'okpuru ule (DUT) ka ọ gosipụtara omume kwekọrọ.
PASS nwere nkọwa Ahụrụ DUT ka ọ na-egosipụta omume kwekọrọ. Agbanyeghị, agbakwunyere nkọwa nke ọnọdụ ahụ (dịka ọmụmaatụample: n'ihi oke oge, ọ bụ naanị akụkụ nke ule ka emere).
Nsonaazụ Nkọwa
EGWU A hụrụ DUT ka ọ gosipụta omume na-adịghị mma.
Ịdọ aka ná ntị Ahụrụ DUT ka ọ gosipụta omume akwadoghị.
Tụtụ aka na nkwupụta Site na nyocha ndị ahụ, enweghị ike ikpebi ngafe ma ọ bụ ọdịda dị irè. Agụnyere nkọwa ọzọ nke ọnọdụ ahụ.

Tebụl na-esonụ na-egosi nsonaazụ maka ule SHA.1, SHA.2, EMBA.1, EMBA.2, EMBA.3, TL.1, na TL.2 na ụkpụrụ nke L, M, F, data ọnụego, sampElekere ling, elekere njikọ, na ugboro ugboro SYSREF.

Tebụl 5. Nsonaazụ maka ikpe ule SHA.1, SHA.2, EMBA.1, EMBA.2, EMBA.3, TL.1, na TL.2

Mba. L M F S HD E N NP ADC

SampElekere elekere (MHz)

Elekere ngwaọrụ FPGA (MHz) FPGA

Oge etiti (MHz)

FPGA

Elekere njikọ (MHz)

Ọnụ ụzọ (Gbps) Nsonaazụ
1 8 4 1 1 0 1 16 16 3000.00 375.00 375.00 375.00 24.75 Gafe

Ntụle nsonaazụ ule
N'okwu ule nke ọ bụla, RX JESD204C Intel FPGA IP na-arụ ọrụ nke ọma n'usoro nhazi nkụnye eji isi mee, agbatị multiblock, na ruo oge data onye ọrụ.
Enweghị nsogbu data iguzosi ike n'ezi ihe nke Ramp na PRBS checker maka nhazi JESD na-ekpuchi ụzọ anụ ahụ niile, ọ nweghịkwa nlele redundancy cyclic (CRC) na njehie nrụkọ iwu ka ahụghị.
N'oge ụfọdụ okirikiri ọkụ, njehie deskew nwere ike ịpụta site na nhazi oke. Iji zere njehie a, ekwesịrị ịhazi ụkpụrụ nkwụghachi ụgwọ LEMC ma ọ bụ ị nwere ike megharịa nke a site na iji usoro mkpochapụ. Maka ozi ndị ọzọ gbasara ụkpụrụ iwu nke akwụ ụgwọ LEMC, rụtụ aka na RBD Tuning Mechanism na F-tile JESD204C Ntuziaka onye ọrụ IP.

Ozi metụtara
RBD Tuning Mechanism

Nchịkọta
Akụkọ a na-egosi nkwado nke JESD204C Intel FPGA IP na interface eletrọnịkị PHY nwere ngwaọrụ AD9081/9082 (R2 Silicon) ruo 24.75 Gbps maka ADC. E gosipụtara nhazi zuru oke na nhazi ngwaike iji nye ntụkwasị obi na mmekọrịta na arụmọrụ nke ngwaọrụ abụọ ahụ.

Akụkọ ngbanwe akwụkwọ maka AN 927: JESD204C Intel FPGA IP na ADI AD9081 MxFE* ADC Interoperability Report maka Intel Agilex F-Tile Devices

Ụdị akwụkwọ Mgbanwe
2022.04.25 Ntọhapụ mbụ.

AN 876: JESD204C Intel® FPGA IP na ADI AD9081 MxFE* ADC Interoperability Report maka Intel® Agilex® F-Tile Devices

Akwụkwọ / akụrụngwa

intel JESD204C Intel FPGA IP na ADI AD9081 MxFE ADC Interoperability Report [pdf] Ntuziaka onye ọrụ
JESD204C Intel FPGA IP na ADI AD9081 MxFE ADC Interoperability Report, JESD204C, Intel FPGA IP na ADI AD9081 MxFE ADC Interoperability Report

Ntụaka

Hapụ ikwu

Agaghị ebipụta adreesị ozi-e gị. Akara mpaghara achọrọ akara *