Intel HDMI PHY FPGA IP Design Example Isikhokelo somsebenzisi

HDMI Uyilo lwePHY Example Isikhokelo sokuQala esiKhawulezayo se-Intel® Arria® 10 izixhobo

I HDMI PHY Intel® FPGA IP uyilo exampI-le ye-Intel Arria® ye-10 yezixhobo ibonisa i-HDMI 2.0 RX-TX yokubuyisela uyilo oluxhasa ukuhlanganisa kunye novavanyo lwe-hardware.
Xa uvelisa i-ex yoyiloampLe, umhleli weparameter yenza ngokuzenzekelayo i files iyimfuneko ukulinganisa, ukuqulunqa, kunye nokuvavanya uyilo kwihardware.

Umzobo 1. Amanyathelo oPhuhliso

Ulwazi olunxulumeneyo
HDMI PHY Intel FPGA IP User Guide

Ukuvelisa uYilo

Sebenzisa i HDMI PHY Intel FPGA IP parameter umhleli kwi Intel Quartus® Prime software ukuvelisa uyilo ex.amples.

Umzobo 2. Ukuvelisa i-Design Flow

1. Yenza iprojekthi ekujoliswe kuyo Intel Arria 10 isixhobo usapho kwaye ukhethe isixhobo esifunwayo.
2. KwiKhathalogi ye-IP, fumana kwaye ucofe kabini IiProtocol zeNdibaniselwano ➤ Isandi neVidiyo ➤ HDMI TX PHY Intel FPGA IP (okanye HDMI RX PHY Intel FPGA IP). Ukwahluka kwe-IP eNtsha okanye iwindow entsha yoKwahluka kwe-IP ibonakala.
3. Chaza igama elikwinqanaba eliphezulu lokwahluka kwe-IP yakho. Umhleli weparameter ugcina useto loguqulo lwe IP kwi file igama .ip okanye .qsys.
4. Cofa u-Kulungile. Umhleli weparameter uyavela.
   Intel Corporation. Onke Amalungelo Agciniwe. I-Intel, i-logo ye-Intel, kunye nezinye iimpawu ze-Intel ziimpawu zorhwebo ze-Intel
   Iqumrhu okanye iinkampani eziphantsi kwayo. I-Intel iqinisekisa ukusebenza kweFPGA yayo kunye neemveliso zesemiconductor kwiinkcukacha zangoku ngokuhambelana newaranti esemgangathweni ye-Intel, kodwa inelungelo lokwenza utshintsho kuzo naziphi na iimveliso kunye neenkonzo nangaliphi na ixesha ngaphandle kwesaziso. I-Intel ayithathi xanduva okanye ityala elivela kwisicelo okanye ukusetyenziswa kwalo naluphi na ulwazi, imveliso, okanye inkonzo echazwe apha ngaphandle kokuba kuvunyelwene ngokubhaliweyo yi-Intel. Abathengi be-Intel bayacetyiswa ukuba bafumane inguqulelo yamva nje yeenkcazo zesixhobo ngaphambi kokuba baxhomekeke kulo naluphi na ulwazi olupapashiweyo naphambi kokubeka iiodolo zeemveliso okanye iinkonzo.
   Amanye amagama kunye neempawu zingabangwa njengempahla yabanye.
5. Kuyilo Eksampkwi tab, khetha Arria 10 HDMI RX-TX Retransmit.
6. Khetha Ukulinganisa ukuvelisa ibhentshi yovavanyo, kwaye ukhethe uHlaziyo ukuvelisa uyilo lwehardware example.
   Kufuneka ukhethe enye kwezi iinketho ukuvelisa uyilo example files.
   Ukuba ukhetha zombini, ixesha lesizukulwana lide.
7. Yenzela File Ukufomatha, khetha i-Verilog okanye i-VHDL.
8. KwiKhiti yoPhuhliso ekujoliswe kuyo, khetha i-Intel Arria 10 GX FPGA Development
   Ikhithi. Ukuba ukhetha ikiti yophuhliso, ke isixhobo ekujoliswe kuso siyatshintsha ukuze sitshatise isixhobo esikwibhodi ekujoliswe kuyo. Kwi-Intel Arria 10 GX FPGA Development Kit, isixhobo esingagqibekanga yi-10AX115S2F4I1SG.
9. Cofa uVelisa Example Design.

Ukuqulunqa kunye noVavanyo loYilo

Ukuqokelela kunye nokuqhuba uvavanyo lokubonisa kwi-hardware exampkuyilo, landela la manyathelo:

1. Qinisekisa i-hardware example mveliso yoyilo igqityiwe.
2. Qalisa i-Intel Quartus Prime software kwaye uvule i .qpf file: /quartus/a10_hdmi2_demo.qpf
3. Cofa Ukusetyenzwa ➤ Qalisa Ukuhlanganisa.
4. Emva kokuhlanganiswa ngempumelelo, i.sof file yenziwe kwiquartus/ imveliso_files ulawulo.
5. Qhagamshela i-Bitec HDMI 2.0 FMC Daughter Card Rev 11 kwi-board ye-FMC port B (J2).
6. Xhuma i-TX (P1) yekhadi lentombi le-Bitec FMC kumthombo wevidiyo wangaphandle.
7. Qhagamshela i-RX (P2) yekhadi lentombi le-Bitec FMC kwi-sink yevidiyo yangaphandle okanye i-analyzer yevidiyo.
8. Qinisekisa ukuba zonke iiswitshi kwibhodi yophuhliso zikwimeko emiselweyo.
9. Qwalasela isixhobo esikhethiweyo se-Intel Arria 10 kwibhodi yophuhliso usebenzisa eyenziwe .sof file (Izixhobo ➤ uMcwangcisi).
10. Umhlalutyi kufuneka abonise ividiyo eyenziwe kumthombo. Ukuqulunqa kunye noVavanyo loYilo

Ulwazi olunxulumeneyo
Intel Arria 10 FPGA Development Kit Isikhokelo somsebenzisi

HDMI PHY Intel FPGA IP Design Example Parameters

Itheyibhile 1. HDMI PHY Intel FPGA IP Design Example Parameters for Intel Arria 10
Izixhobo

Ezi zikhetho ziyafumaneka kwi-Intel Arria izixhobo ezili-10 kuphela.

Ipharamitha	Ixabiso	Inkcazo
Uyilo olukhoyo Eksample
Khetha uyilo	Arria 10 HDMI RX-TX Retransmit	Khetha uyilo example izakwenziwa.

Uyilo Eksample Files
Ukulinganisa	Layita icima	Layita olu khetho ukwenza okuyimfuneko files yokulinganisa testbench.
Ukudibanisa	Layita icima	Layita olu khetho ukwenza okuyimfuneko files for Intel Quartus Prime ukuhlanganiswa kunye nomboniso hardware.

Yenziwe ifomathi yeHDL
Veza File Ifomathi	Verilog, VHDL	Khetha ifomathi oyikhethayo yeHDL yoyilo olwenziweyo example fileiseti. Phawula: Olu khetho lumisela kuphela ifomathi yomgangatho ophezulu we IP ovelisiweyo files. Zonke ezinye files (umzekelo, umzample testbenches kunye nenqanaba eliphezulu files yomboniso wehardware) zikwifomati yeVerilog HDL.

Ikhithi yoPhuhliso ekujoliswe kuyo
Khetha iBhodi	Akukho Khithi yoPhuhliso,	Khetha ibhodi yoyilo ekujoliswe kulo example.
	Arria 10 GX FPGA Ikhithi yoPhuhliso, Ikhithi yoPhuhliso lweSiko	Akukho Khithi yoPhuhliso: Olu khetho alubandakanyi yonke imiba yehardware yoyilo example. Undoqo we-IP umisela zonke izabelo ze-pin kwizikhonkwane zenyani. Arria 10 GX FPGA Development Kit: Olu khetho lukhetha ngokuzenzekelayo isixhobo ekujoliswe kuyo kwiprojekthi ukutshatisa isixhobo kule khithi yophuhliso. Ungatshintsha isixhobo ekujoliswe kuso usebenzisa i Guqula isixhobo ekuJoliswe kuso iparameter ukuba uhlaziyo lwebhodi yakho inomahluko wesixhobo esahlukileyo. I-IP engundoqo ibeka zonke izabelo ze-pin ngokwekhithi yophuhliso.
		Custom Development Kit: Olu khetho luvumela uyilo example iya kuvavanywa kwiqela lesithathu lekhithi yophuhliso kunye ne-Intel FPGA. Kusenokufuneka usete izabelo zepin uwedwa.

Isixhobo ekujoliswe kuso
Guqula isixhobo ekuJoliswe kuso	Layita icima	Layita olu khetho kwaye ukhethe uhlobo olukhethiweyo lwesixhobo sophuhliso lwekhithi.

HDMI 2.0 PHY Design Example

I HDMI PHY Intel FPGA IP uyilo example ibonisa i-HDMI enye i-loopback ehambelanayo equka iziteshi ezintathu ze-RX kunye neziteshi ezine ze-TX, ezisebenza kumazinga edatha ukuya kwi-6 Gbps.

Eveliswe HDMI PHY Intel FPGA IP uyilo example iyafana uyilo example iveliswe kwi-HDMI Intel FPGA IP core. Noko ke, olu yilo example isebenzisa entsha TX PHY, RX PHY, kunye PHY Arbiter endaweni yesiko RTL kwi HDMI Intel FPGA IP core uyilo ex.ample.

Umzobo 3. HDMI 2.0 PHY Design Example

Imodyuli	Inkcazo
RX PHY	I-RX PHY ifumana idatha yothotho lwe-HDMI kwaye ithumele oku kwi-HDMI RX engundoqo kwifomathi ehambelanayo kwimimandla yewotshi efunyenweyo (rx_clk[2:0]). Idata iguqulwa ibe yividiyo

Imodyuli	Inkcazo
	idatha kufuneka ikhutshwe ngevidiyo ye-AXI4-stream. I-RX PHY iphinda ithumele i-vid_clk kunye ne-ls_clk iimpawu kwi-HDMI i-RX engundoqo nge-interface ye-PHY.
I-HDMI TX Core	I-HDMI TX ingundoqo ifumana idatha yevidiyo ye-AXI4-stream kwaye ifake le khowudi kwi-HDMI idatha ehambelanayo. I-HDMI TX core ithumela le datha kwi-TX PHY.
I-HDMI RX Core	I-IP ifumana idatha ye-serial evela kwi-RX PHY kwaye yenza ulungelelwaniso lwedatha, i-channel deskew, i-TMDS decoding, i-decoding yedatha encedisayo, i-decoding yedatha yevidiyo, i-audio data decoding, kunye ne-descrambling.
TX PHY	Ifumana kwaye ilandelelanise idatha ehambelanayo kwi-HDMI TX core kunye neziphumo ze-HDMI imijelo ye-TMDS. I-TX PHY ivelisa i-tx_clk ye-HDMI TX engundoqo. I-TX PHY iphinda ivelise i-vid_clk kunye ne-ls_clk kwaye ithumele le miqondiso kwi-HDMI TX core nge-interface ye-PHY.
IOPLL	Ivelisa i-300 MHz i-AXI yekloko yothotho lwewotshi ye-AXI4- ujongano lomsinga.
I2C Master	Ukuqwalasela amacandelo ahlukeneyo ePCB.

IiMfuno zeHardware kunye neSoftware

I-Intel isebenzisa i-hardware elandelayo kunye nesofthiwe yokuvavanya i-design example.

Hardware

• Intel Arria 10 GX FPGA Development Kit
• Umthombo weHDMI (Iyunithi yeProsesa yeMizobo (GPU)
• ISinki yeHDMI (iMonitor)
• Bitec HDMI FMC 2.0 intombi ikhadi (Uhlaziyo 11)
• Iintambo ze-HDMI

Isoftware

• Ushicilelo lwe-Intel Quartus Prime Pro (yovavanyo lwehardware)
• ImodeliSim*-Intel FPGA Edition, ModelSim-Intel FPGA Starter Edition, NCSim,
  Riviera-PRO*, VCS* (Verilog HDL kuphela)/VCS MX, okanye Xcelium* Isifanisi esifanayo

Ulwakhiwo lukavimba weefayili

Izalathisi ziqulathe ezenziweyo file kuba HDMI Intel FPGA IP uyilo example.

Umzobo 4. Ulwakhiwo lukavimba weefayili kuYilo Example

Uqwalaselo ngokutsha lokuQuquzelo lolandelelwano

Umzobo 5. Ukulandelelana koLungiselelo lweMininzi yokuSetyenziswa kwakhona 

Umzobo ubonisa ukuhamba kolandelelwano lwe-multi-rate reconfiguration yomlawuli xa efumana igalelo lomjelo wedatha kunye ne-reference clock frequency, okanye xa i-transceiver ivuliwe.

Iimpawu zokunxibelelana

Iitheyibhile dwelisa imiqondiso ye HDMI PHY Intel FPGA IP uyilo example.

Itheyibhile 3. Iimpawu zomgangatho ophezulu

Umqondiso	Isalathiso	Ububanzi	Inkcazo
Umqondiso weOscillator okwibhodi
clk_fpga_b3_p	Igalelo	1	100 MHz iwotshi esebenzayo yasimahla yewotshi yereferensi engundoqo
refclk_fmcb_p	Igalelo	1	Iwotshi yereferensi esisigxina yokulinganisa amandla kwi-transceiver. Yi-625 MHz ngokungagqibekanga kodwa inokuba yeyiphi na frequency

Amaqhosha oTyhulo oMsebenzisi kunye nee-LED
cpu_resetn	Igalelo	1	Ukusetwa ngokutsha kwehlabathi
umsebenzisi_ukhokela_g	Isiphumo	2	Umboniso we-LED eluhlaza

Izikhonkwane zekhadi leNtombazana yeHDMI yeFMC kwiFMC Port B
fmcb_gbtclk_m2c_p_0	Igalelo	1	Iwotshi ye-HDMI RX TMDS
fmcb_dp_m2c_p	Igalelo	3	I-HDMI RX ebomvu, eluhlaza, kunye nemijelo yedatha eluhlaza • Uhlaziyo lwekhadi lentombi le-Bitec 11 — [0]: Ijelo le-RX TMDS 1 (Luhlaza) — [1]: Ijelo le-RX TMDS 2 (Bomvu) — [2]: Ijelo le-RX TMDS 0 (eBlue)
fmcb_dp_c2m_p	Isiphumo	4	Iwashi ye-HDMI TX, ebomvu, eluhlaza, kunye namajelo edatha eblue • Uhlaziyo lwekhadi lentombi le-Bitec 11 — [0]: Ijelo le-TX TMDS 2 (Bomvu) — [1]: TX TMDS Channel 1 (Green) — [2]: TX TMDS Channel 0 (Blue) — [3]: TX TMDS Clock Channel
fmcb_la_rx_p_9	Igalelo	1	I-HDMI RX +5V yokubona amandla
fmcb_la_rx_p_8	Igalelo	1	I-HDMI RX iplagi eshushu yokubona
fmcb_la_rx_n_8	Igalelo	1	I-HDMI RX I2C SDA ye-DDC kunye ne-SCDC
fmcb_la_tx_p_10	Igalelo	1	I-HDMI RX I2C SCL ye-DDC kunye ne-SCDC
fmcb_la_tx_p_12	Igalelo	1	I-HDMI TX iplagi eshushu yokubona
fmcb_la_tx_n_12	Igalelo	1	I-HDMI I2C SDA ye-DDC kunye ne-SCDC
fmcb_la_rx_p_10	Igalelo	1	I-HDMI I2C SCL ye-DDC kunye ne-SCDC
fmcb_la_tx_p_11	Igalelo	1	I-HDMI I2C SDA yokulawula umqhubi kwakhona
fmcb_la_rx_n_9	Igalelo	1	I-HDMI I2C SCL yokulawula umqhubi kwakhona

iClock Scheme

Oku kulandelayo yinkqubo yokuvala i-HDMI PHY Intel FPGA IP yoyilo example:

• clk_fpga_b3_p yi 100 MHz izinga elimisiweyo iwotshi yokusebenza iprosesa yeNIOS kunye nemisebenzi yolawulo. Ukuba i-frequency enikeziweyo ichanekile, umsebenzisi_led_g[1] uguqulela umzuzwana ngamnye.
• I-refclk_fmcb_p yiwotshi yereferensi yomlinganiselo osisigxina yokulinganisa amandla e-transceivers. Yi-625 MHz ngokungagqibekanga kodwa inokuba yeyiphi na frequency.
• fmcb_gbtclk_m2c_p_0 yiwotshi ye-TMDS ye-HDMI RX. Le wotshi ikwasetyenziselwa ukuqhuba i-HDMI TX transceivers. Ukuba i-frequency enikeziweyo yi-148.5 MHz, umsebenzisi_led_g[0] uguqula isekhondi nganye.

Ukuseta i-Hardware

I HDMI PHY Intel FPGA IP uyilo exampI-HDMI 2.0b iyakwazi kwaye yenza umboniso we-loop-through kwividiyo ye-HDMI esemgangathweni.

Ukuqhuba uvavanyo lwe-hardware, qhagamshela isixhobo esinikwe amandla i-HDMI njengekhadi lemizobo kunye ne-HDMI ujongano kwi-HDMI RX isinxibelelanisi kwi-Bitec HDMI 2.0 yekhadi lentombi, ehambisa idatha kwi-transceiver RX block kunye ne-HDMI RX.

1. I-HDMI isinki ichaza i-port kwi-stream yevidiyo eqhelekileyo kwaye iyithumele kwi-clock recovery core.
2. Undoqo we-HDMI RX ucacisa ividiyo, i-axiliary, kunye nedatha yeaudio ukuba iphinde ijikwe nge-AXI4-stream interface ukuya kwi-HDMI TX core.
3. Umthombo we-HDMI we-port yekhadi lentombi ye-FMC idlulisela umfanekiso kwi-monitor.
4. Cofa iqhosha le cpu_resetn kube kanye ukwenza ukusetha kwakhona inkqubo.
   Phawula: Ukuba ufuna ukusebenzisa enye ibhodi yophuhliso ye-Intel FPGA, kufuneka utshintshe izabelo zesixhobo kunye nezabelo ze-pin. Isetingi ye-analog ye-transceiver ivavanywa kwi-Intel Arria 10 ye-FPGA yekiti yophuhliso kunye ne-Bitec HDMI 2.0 ikhadi lentombi. Unokutshintsha iisetingi zebhodi yakho.

Imbali yoHlaziyo yoXwebhu ye-HDMI PHY Intel
FPGA IP Design Example Isikhokelo somsebenzisi

Inguqulelo yoXwebhu	Intel Quartus Prime Version	IP Version	Iinguqu
2022.07.20	22.2	1.0.0	Ukukhutshwa kokuqala.

Amaxwebhu / Izibonelelo

Intel HDMI PHY FPGA IP Design Example [pdf] Isikhokelo somsebenzisi HDMI PHY FPGA IP Design Example, HDMI PHY, FPGA IP Design Example, HDMI PHY IP Design Example, FPGA IP Design Example, IP Design Exampnjalo, 732781

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