intel HDMI PHY FPGA IP Tsim Example User Guide
HDMI PHY Design Example Quick Start Guide rau Intel® Arria® 10 Devices
Lub HDMI PHY Intel® FPGA IP tsim example rau Intel Arria® 10 pab kiag li lawm nta HDMI 2.0 RX-TX retransmit tsim uas txhawb kev muab tso ua ke thiab kev sim kho vajtse.
Thaum koj tsim ib tug tsim example, parameter editor cia li tsim cov files yuav tsum simulate, compile, thiab sim tus tsim nyob rau hauv hardware.
Daim duab 1. Cov kauj ruam txhim kho
Cov ntaub ntawv ntsig txog
HDMI PHY Intel FPGA IP Tus Neeg Siv Phau Ntawv Qhia
Tsim tus Tsim
Siv lub HDMI PHY Intel FPGA IP parameter editor nyob rau hauv Intel Quartus® Prime software los tsim tus tsim examples.
Daim duab 2. Tsim cov qauv tsim
- Tsim ib qhov project tsom rau Intel Arria 10 ntaus ntawv tsev neeg thiab xaiv cov khoom xav tau.
- Hauv IP Catalog, nrhiav thiab nyem ob npaug rau Interface Protocols ➤ Suab & Video ➤ HDMI TX PHY Intel FPGA IP (los yog HDMI RX PHY Intel FPGA IP). Qhov tshiab IP Variant lossis New IP Variation window tshwm.
- Qhia meej lub npe saum toj kawg nkaus rau koj qhov kev hloov pauv IP. Tus parameter editor txuag tus IP variation nqis hauv a file npe .ip or .qsys.
- Nyem OK. Cov parameter editor tshwm.
Intel Corporation. Txhua txoj cai. Intel, Intel logo, thiab lwm yam Intel cov cim yog cov cim lag luam ntawm Intel
Corporation los yog nws cov koom haum. Intel lav kev ua tau zoo ntawm nws cov FPGA thiab cov khoom lag luam semiconductor rau cov kev qhia tshwj xeeb tam sim no raws li Intel tus qauv kev lees paub, tab sis muaj txoj cai los hloov cov khoom thiab cov kev pabcuam txhua lub sijhawm yam tsis muaj ntawv ceeb toom. Intel xav tias tsis muaj lub luag haujlwm lossis kev lav phib xaub uas tshwm sim los ntawm daim ntawv thov lossis siv cov ntaub ntawv, cov khoom lag luam, lossis cov kev pabcuam uas tau piav qhia hauv no tshwj tsis yog raws li tau pom zoo hauv kev sau ntawv los ntawm Intel. Intel cov neeg siv khoom tau qhia kom tau txais cov khoom siv tshwj xeeb tshaj tawm ua ntej tso siab rau cov ntaub ntawv tshaj tawm thiab ua ntej muab xaj rau cov khoom lossis cov kev pabcuam.
Lwm lub npe thiab cov npe yuav raug lees paub tias yog cov cuab yeej ntawm lwm tus. - Hauv Design Exampnyob rau hauv tab, xaiv Arria 10 HDMI RX-TX Retransmit.
- Xaiv Simulation los tsim cov testbench, thiab xaiv Synthesis los tsim kho vajtse tsim example.
Koj yuav tsum xaiv yam tsawg kawg ib qho ntawm cov kev xaiv no los tsim cov qauv tsim example files.
Yog tias koj xaiv ob qho tib si, lub sijhawm tiam yuav ntev dua. - Rau Tsim File Hom ntawv, xaiv Verilog lossis VHDL.
- Rau Cov Khoom Siv Lub Hom Phiaj, xaiv Intel Arria 10 GX FPGA Development
Kit. Yog tias koj xaiv cov khoom siv txhim kho, ces lub hom phiaj ntaus ntawv hloov pauv kom phim cov cuab yeej ntawm lub hom phiaj board. Rau Intel Arria 10 GX FPGA Kev Txhim Kho Cov Khoom Siv, lub cuab yeej ua ntej yog 10AX115S2F4I1SG. - Nyem Tsim Example Design.
Compiling thiab Kuaj Cov Qauv
Txhawm rau sau thiab khiav qhov kev sim ua qauv qhia ntawm lub hardware example design, ua raws li cov kauj ruam no:
- Xyuas kom hardware example tsim tiam ua tiav.
- Tua tawm Intel Quartus Prime software thiab qhib lub .qpf ua file: /quartus/a10_hdmi2_demo.qpf
- Nyem Ua Haujlwm ➤ Pib Sau.
- Tom qab kev ua tiav tiav, a .sof file yog generated nyob rau hauv lub quartus / output_files cov directory.
- Txuas Bitec HDMI 2.0 FMC Daughter Card Rev 11 mus rau on-board FMC chaw nres nkoj B (J2).
- Txuas TX (P1) ntawm Bitec FMC tus ntxhais daim npav mus rau lwm qhov video.
- Txuas RX (P2) ntawm Bitec FMC tus ntxhais daim npav mus rau lub dab dej sab nraud lossis lub tshuab ntsuas video.
- Xyuas kom tag nrho cov keyboards ntawm lub rooj tsavxwm txhim kho nyob rau hauv qhov chaw ua haujlwm.
- Configure tus xaiv Intel Arria 10 ntaus ntawv ntawm pawg thawj coj loj hlob siv cov generated .sof file (Tools ➤ Programmer).
- Lub analyzer yuav tsum tso saib cov yees duab generated los ntawm qhov chaw. Compiling and Testing the Design
Cov ntaub ntawv ntsig txog
Intel Arria 10 FPGA Cov Khoom Siv Txhim Kho Cov Neeg Siv Khoom
HDMI PHY Intel FPGA IP Tsim Example Parameters
Table 1. HDMI PHY Intel FPGA IP Tsim Example Parameters rau Intel Arria 10
Cov khoom siv
Cov kev xaiv no muaj rau Intel Arria 10 cov khoom siv nkaus xwb.
| Parameter | Tus nqi | Kev piav qhia |
| Muaj Tsim Example | ||
| Xaiv Tsim | Arria 10 HDMI RX-TX Retransmit | Xaiv tus tsim example yuav generated. |
| Tsim Example Files | ||
| Kev simulation | Rau, Tawm | Qhib qhov kev xaiv no los tsim qhov tsim nyog files rau lub simulation testbench. |
| Synthesis | Rau, Tawm | Qhib qhov kev xaiv no los tsim qhov tsim nyog files rau Intel Quartus Prime muab tso ua ke thiab kho vajtse ua qauv qhia. |
| Tsim HDL hom ntawv | ||
| Tsim File Hom ntawv | Verilog, VHDL | Xaiv qhov koj nyiam HDL hom rau cov tsim tsim example fileteeb.
Nco tseg: Qhov kev xaiv no tsuas yog txiav txim siab hom ntawv rau qhov tsim tawm sab saum toj IP files. Tag nrho lwm yam files (eg, npample testbenches thiab sab saum toj theem files rau hardware demonstration) yog nyob rau hauv Verilog HDL hom. |
| Target Development Kit | ||
| Xaiv Board | Tsis muaj cov khoom siv txhim kho, | Xaiv lub rooj tsavxwm rau lub hom phiaj tsim example. |
| Arria 10 GX FPGA Development Kit,
Custom Development Kit |
|
|
|
||
| Lub Hom Phiaj | ||
| Hloov Lub Hom Phiaj Ntaus | Rau, Tawm | Qhib qhov kev xaiv no thiab xaiv cov khoom siv uas nyiam tshaj plaws rau cov khoom siv txhim kho. |
HDMI 2.0 PHY Design Example
Lub HDMI PHY Intel FPGA IP tsim example ua qauv qhia ib qho piv txwv HDMI piv rau lub voj voog rov qab muaj peb RX raws thiab plaub TX channel, ua haujlwm ntawm cov ntaub ntawv tus nqi txog 6 Gbps.
Lub generated HDMI PHY Intel FPGA IP tsim example yog tib yam li tus tsim example generated hauv HDMI Intel FPGA IP core. Txawm li cas los xij, qhov kev tsim no example siv TX PHY, RX PHY, thiab PHY arbiter hloov kev cai RTL hauv HDMI Intel FPGA IP core tsim example.
Daim duab 3. HDMI 2.0 PHY Design Example
| Module | Kev piav qhia |
| RX PHY | RX PHY rov qab tau cov ntaub ntawv HDMI serial thiab xa qhov no mus rau HDMI RX core nyob rau hauv cov ntaub ntawv sib npaug ntawm lub moos rov qab (rx_clk[2: 0]). Cov ntaub ntawv yog decoded rau hauv video |
| Module | Kev piav qhia |
| cov ntaub ntawv yuav tsum tau tso tawm ntawm AXI4-kwj video. RX PHY kuj xa vid_clk thiab ls_clk cov cim qhia rau HDMI RX core ntawm PHY interface. | |
| HDMI TXC Core | Lub HDMI TX core tau txais AXI4-kwj video cov ntaub ntawv thiab encodes qhov no rau hauv HDMI cov ntaub ntawv sib luag. HDMI TX core xa cov ntaub ntawv no mus rau TX PHY. |
| HDMI RX tub ntxhais | IP tau txais cov ntaub ntawv serial los ntawm RX PHY thiab ua cov ntaub ntawv sib dhos, channel deskew, TMDS decoding, auxiliary data decoding, video data decoding, audio data decoding, and descrambling. |
| TX PHY | Txais thiab serializes cov ntaub ntawv thaum uas tig mus los ntawm HDMI TX core thiab outputs HDMI TMDS ntws. TX PHY tsim tx_clk rau HDMI TX core. TX PHY kuj tsim vid_clk thiab ls_clk thiab xa cov teeb liab mus rau HDMI TX core ntawm PHY interface. |
| IOPLL | Tsim 300 MHz AXI serial kwj moos rau AXI4-kwj interface. |
| I2C Master | Txhawm rau teeb tsa ntau yam khoom siv PCB. |
Hardware thiab Software Requirements
Intel siv cov cuab yeej thiab software hauv qab no los kuaj tus qauv tsim example.
Kho vajtse
- Intel Arria 10 GX FPGA Development Kit
- HDMI Qhov Chaw (Graphics Processor Unit (GPU)
- HDMI dab dej (Monitor)
- Bitec HDMI FMC 2.0 tus ntxhais daim npav (Kev Kho 11)
- HDMI cables
Software
- Intel Quartus Prime Pro Edition (rau kev kuaj kho vajtse)
- ModelSim* – Intel FPGA Edition, ModelSim – Intel FPGA Starter Edition, NCSim,
Riviera-PRO*, VCS* (Verilog HDL nkaus xwb)/VCS MX, los yog Xcelium* Parallel simulator
Directory Structure
Cov directory muaj cov generated file rau HDMI Intel FPGA IP tsim example.
Daim duab 4. Directory Structure for the Design Example
Reconfiguration Sequence Flow
Daim duab 5. Multi-rate Reconfiguration Sequence Flow
Daim duab qhia txog ntau tus nqi reconfiguration sequence ntws ntawm tus maub los thaum nws tau txais cov ntaub ntawv nkag thiab siv moos zaus, lossis thaum lub transceiver tau xauv.
Interface Signals
Cov ntxhuav teev cov teeb liab rau HDMI PHY Intel FPGA IP tsim example.
Table 3. Top-Level Signals
| Teeb liab | Kev taw qhia | Dav | Kev piav qhia |
| On-board Oscillator Signal | |||
| clk_fpga_b3_p | Tswv yim | 1 | 100 MHz dawb khiav moos rau core siv moos |
| refclk_fmcb_p | Tswv yim | 1 | Tsau tus nqi siv moos rau lub zog-up calibration ntawm lub transceiver. Nws yog 625 MHz los ntawm lub neej ntawd tab sis tuaj yeem yog txhua zaus |
| Tus neeg siv khawm khawm thiab LEDs | |||
| cpu_resetn | Tswv yim | 1 | Rov pib dua thoob ntiaj teb |
| user_led_g | Tso zis | 2 | Ntsuab LED zaub |
| HDMI FMC Daughter Card Pins ntawm FMC Chaw nres nkoj B | |||
| fmcb_gbtclk_m2c_p_0 | Tswv yim | 1 | HDMI RX TMDS moos |
| fmcb_dp_m2c_p | Tswv yim | 3 | HDMI RX liab, ntsuab, thiab xiav cov ntaub ntawv raws
• Bitec tus ntxhais hloov kho daim npav 11 — [0]: RX TMDS Channel 1 (ntsuab) — [1]: RX TMDS Channel 2 (Liab) — [2]: RX TMDS Channel 0 (Blue) |
| fmcb_dp_c2m_p | Tso zis | 4 | HDMI TX moos, liab, ntsuab, thiab xiav cov ntaub ntawv raws
• Bitec tus ntxhais hloov kho daim npav 11 — [0]: TX TMDS Channel 2 (Red) — [1]: TX TMDS Channel 1 (Green) — [2]: TX TMDS Channel 0 (Blue) — [3]: TX TMDS Clock Channel |
| fmcb_la_rx_p_9 | Tswv yim | 1 | HDMI RX + 5V fais fab tuag |
| fmcb_la_rx_p_8 | Tswv yim | 1 | HDMI RX kub plug ntes |
| fmcb_la_rx_n_8 | Tswv yim | 1 | HDMI RX I2C SDA rau DDC thiab SCDC |
| fmcb_la_tx_p_10 | Tswv yim | 1 | HDMI RX I2C SCL rau DDC thiab SCDC |
| fmcb_la_tx_p_12 | Tswv yim | 1 | HDMI TX hot plug detect |
| fmcb_la_tx_n_12 | Tswv yim | 1 | HDMI I2C SDA rau DDC thiab SCDC |
| fmcb_la_rx_p_10 | Tswv yim | 1 | HDMI I2C SCL rau DDC thiab SCDC |
| fmcb_la_tx_p_11 | Tswv yim | 1 | HDMI I2C SDA rau redriver tswj |
| fmcb_la_rx_n_9 | Tswv yim | 1 | HDMI I2C SCL rau redriver tswj |
Clocking Scheme
Cov hauv qab no yog cov txheej txheem clocking ntawm HDMI PHY Intel FPGA IP tsim example:
- clk_fpga_b3_p yog 100 MHz tsau tus nqi moos rau khiav NIOS processor thiab tswj kev ua haujlwm. Yog tias qhov khoom siv zaus raug, tus user_led_g[1] toggles rau txhua thib ob.
- refclk_fmcb_p yog tus nqi ruaj khov siv moos rau lub zog-up calibration ntawm cov transceivers. Nws yog 625 MHz los ntawm lub neej ntawd tab sis tuaj yeem yog txhua zaus.
- fmcb_gbtclk_m2c_p_0 yog TMDS moos rau HDMI RX. Lub moos no kuj tseem siv los tsav lub HDMI TX transceivers. Yog tias qhov khoom siv zaus yog 148.5 MHz, tus user_led_g[0] toggles rau txhua thib ob.
Kev teeb tsa kho vajtse
Lub HDMI PHY Intel FPGA IP tsim example yog HDMI 2.0b muaj peev xwm thiab ua lub voj-los ntawm kev ua qauv qhia rau tus qauv HDMI video kwj.
Txhawm rau khiav qhov kev sim kho vajtse, txuas lub HDMI-enabled ntaus ntawv xws li daim npav duab nrog HDMI interface rau HDMI RX txuas ntawm Bitec HDMI 2.0 tus ntxhais daim npav, uas xa cov ntaub ntawv mus rau transceiver RX thaiv thiab HDMI RX.
- Lub HDMI dab ntxuav tes txiav txim siab qhov chaw nres nkoj rau hauv tus qauv video kwj thiab xa mus rau lub moos rov qab core.
- Lub HDMI RX core txiav txim siab cov yeeb yaj kiab, pabcuam, thiab cov ntaub ntawv audio kom rov qab los ntawm AXI4-kwj interface rau HDMI TX core.
- Lub HDMI qhov chaw nres nkoj ntawm FMC tus ntxhais daim npav xa cov duab mus rau lub monitor.
- Nias lub pob cpu_resetn ib zaug los ua qhov system pib dua.
Nco tseg: Yog tias koj xav siv lwm Intel FPGA kev txhim kho pawg thawj coj, koj yuav tsum hloov cov khoom siv thiab cov haujlwm tus pin. Qhov chaw transceiver analog tau sim rau Intel Arria 10 FPGA cov khoom siv txhim kho thiab Bitec HDMI 2.0 tus ntxhais daim npav. Koj tuaj yeem hloov kho qhov chaw rau koj tus kheej lub rooj tsavxwm.
Cov ntaub ntawv kho dua tshiab rau HDMI PHY Intel
FPGA IP Design Example User Guide
| Cov ntaub ntawv Version | Intel Quartus Prime Version | IP Version | Hloov |
| 2022.07.20 | 22.2 | 1.0.0 | Kev tso tawm thawj zaug. |
Cov ntaub ntawv / Cov ntaub ntawv
 |
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