Intel HDMI PHY FPGA IP Dhizaini Example User Guide
Intel HDMI PHY FPGA IP Dhizaini Example

HDMI PHY Dhizaini Example Quick Start Guide yeIntel® Arria® 10 Devices

Iyo HDMI PHY Intel® FPGA IP dhizaini example yeIntel Arria® 10 zvishandiso inoratidzira HDMI 2.0 RX-TX retransmit dhizaini inotsigira kuunganidzwa uye kuyedza Hardware.
Kana iwe ukagadzira dhizaini example, iyo parameter editor inogadzira iyo fileinodiwa kutevedzera, kuunganidza, uye kuyedza dhizaini muhardware.

Mufananidzo 1. Matanho Ekuvandudza
Matanho Ebudiriro

Related Information
HDMI PHY Intel FPGA IP User Guide

Kugadzira Dhizaini

Shandisa iyo HDMI PHY Intel FPGA IP parameter mupepeti muIntel Quartus® Prime software kugadzira dhizaini ex.amples.

Mufananidzo 2. Kugadzira Kuyerera Kwekugadzira
Kugadzira Kuyerera Kwekugadzira

  1. Gadzira purojekiti yakanangana neIntel Arria 10 mudziyo mhuri uye sarudza yaunoda mudziyo.
  2. MuI IP Catalog, tsvaga uye tinya kaviri Interface Protocols ➤ Audio & Vhidhiyo ➤ HDMI TX PHY Intel FPGA IP (kana HDMI RX PHY Intel FPGA IP). The New IP Variant kana New IP Variation hwindo rinoonekwa.
  3. Rondedzera zita repamusoro-soro kune yako tsika IP musiyano. Iyo parameter mupepeti inochengetedza iyo IP kusiyanisa marongero mune a file zita .ip kana .qsys.
  4. Dzvanya OK. Iyo parameter editor inooneka.
    Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, uye mamwe maIntel mamaki zviratidzo zveIntel
    Corporation kana masangano ayo. Intel inobvumidza kuita kwayo FPGA uye semiconductor zvigadzirwa kune zvazvino zvirevo zvinoenderana neIntel's standard waranti, asi inochengetera kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi.
    Mamwe mazita nemhando anogona kunzi zvinhu zvevamwe.
  5. Pamusoro peDesign Exampuye tab, sarudza Arria 10 HDMI RX-TX Retransmit.
  6. Sarudza Simulation kugadzira testbench, uye sarudza Synthesis kugadzira iyo hardware dhizaini example.
    Iwe unofanirwa kusarudza inokwana imwe yeiyi sarudzo kuti ugadzire iyo dhizaini example files.
    Kana ukasarudza zvose zviri zviviri, nguva yechizvarwa irefu.
  7. For Gadzira File Fomati, sarudza Verilog kana VHDL.
  8. YeTarget Development Kit, sarudza Intel Arria 10 GX FPGA Development
    Kit. Kana ukasarudza kit yekuvandudza, ipapo iyo yakanangwa mudziyo inochinja kuti ienderane nemudziyo uri pabhodhi rakanangwa. YeIntel Arria 10 GX FPGA Development Kit, mudziyo wakasarudzika ndeye 10AX115S2F4I1SG.
  9. Dzvanya Gadzira Example Design.
Kunyora uye Kuedza Dhizaini

Kuunganidza uye kumhanyisa bvunzo yekuratidzira pane Hardware example design, tevera matanho aya:
Kunyora uye Kuedza Dhizaini

  1. Ita shuwa kuti hardware example design generation yapera.
  2. Tangisa Intel Quartus Prime software uye vhura iyo .qpf file: /quartus/a10_hdmi2_demo.qpf
  3. Tinya Kugadzirisa ➤ Tanga Kuunganidza.
  4. Mushure mekubudirira kuunganidza, a .sof file inogadzirwa muquartus/ output_files directory.
  5. Batanidza Bitec HDMI 2.0 FMC Mwanasikana Kadhi Rev 11 kune-bhodhi FMC port B (J2).
  6. Batanidza TX (P1) yeBitec FMC mwanasikana kadhi kune yekunze vhidhiyo sosi.
  7. Batanidza RX (P2) yeBitec FMC mwanasikana kadhi kune yekunze vhidhiyo sink kana vhidhiyo analyzer.
  8. Ita shuwa kuti zvese zvinochinja pabhodhi rekuvandudza zviri munzvimbo yekusarudzika.
  9. Gadzirisa iyo yakasarudzwa Intel Arria 10 mudziyo pabhodhi rekuvandudza uchishandisa yakagadzirwa .sof file (Zvishandiso ➤ Mugadziri).
  10. Iyo analyzer inofanirwa kuratidza vhidhiyo inogadzirwa kubva kwainobva. Kunyora uye Kuedza Dhizaini

Related Information
Intel Arria 10 FPGA Yekuvandudza Kit Mushandisi Guide

HDMI PHY Intel FPGA IP Dhizaini Example Parameters

Tafura 1. HDMI PHY Intel FPGA IP Dhizaini Exampuye Parameters yeIntel Arria 10
Devices

Idzi sarudzo dziripo dzeIntel Arria 10 zvishandiso chete.

Parameter Value Tsanangudzo
Inowanikwa Dhizaini Example
Sarudza Dhizaini Arria 10 HDMI RX-TX Retransmit Sarudza dhizaini exampkuti igadzirwe.
Design Example Files
Simulation Vhura, Bvisa Batidza iyi sarudzo kuti uite zvinodiwa files yekufananidza testbench.
Synthesis Vhura, Bvisa Batidza iyi sarudzo kuti uite zvinodiwa files yeIntel Quartus Prime kuunganidza uye hardware kuratidzira.
Yakagadzirwa HDL Format
Gadzira File Format Verilog, VHDL Sarudza yako yaunofarira HDL fomati yeyakagadzirwa dhizaini example fileset.

Cherechedza: Iyi sarudzo inongotarisa iyo fomati yeiyo yakagadzirwa yepamusoro level IP files. Zvimwe zvese files (semuenzaniso, semuenzanisoample testbenches uye yepamusoro-soro files yekuratidzira kwehardware) ari muVerilog HDL fomati.

Target Development Kit
Sarudza Bhodhi Hapana Developer Kit, Sarudza bhodhi yezvakanangwa dhizaini example.
  Arria 10 GX FPGA Development Kit,

Custom Development Kit

  • Kwete Kiti Yekuvandudza: Iyi sarudzo haisanganisi ese maficha emahara eiyo dhizaini example. Iyo IP musimboti inoseta ese mapini ekupa kune chaiwo mapini.
  • Arria 10 GX FPGA Development Kit: Iyi sarudzo inosarudza otomatiki chinangwa chepurojekiti kuti ienderane nemudziyo pane iyi kit yekuvandudza. Unogona kushandura chipfuro mudziyo uchishandisa Shandura Chinangwa Chishandiso parameter kana yako bhodhi redhiyo ine akasiyana mudziyo musiyano. Iyo IP musimboti inoseta ese pini migove zvinoenderana nebudiriro kit.
   
  • Custom Development Kit: Iyi sarudzo inobvumira dhizaini example yekuedzwa pane yechitatu bato yekuvandudza kit ine Intel FPGA. Ungangoda kuseta mapini ekuita uri wega.
Target Device
Shandura Chinangwa Chishandiso Vhura, Bvisa Batidza iyi sarudzo uye sarudza yaunofarira mudziyo musiyano weti yekuvandudza.

HDMI 2.0 PHY Dhizaini Example

Iyo HDMI PHY Intel FPGA IP dhizaini example inoratidza imwe HDMI chiitiko chakafanana loopback inosanganisira matatu RX chiteshi uye ina TX chiteshi, inoshanda pamitengo yedata kusvika ku6 Gbps.

Iyo yakagadzirwa HDMI PHY Intel FPGA IP dhizaini example rakafanana nedhizaini exampinogadzirwa muHDMI Intel FPGA IP musimboti. Nekudaro, iyi dhizaini example inoshandisa iyo itsva TX PHY, RX PHY, uye PHY arbiter pachinzvimbo chetsika RTL muHDMI Intel FPGA IP musimboti dhizaini ex.ample.

Mufananidzo 3. HDMI 2.0 PHY Dhizaini Example
HDMI 2.0 PHY Dhizaini Example

Module Tsanangudzo
RX PHY Iyo RX PHY inodzoreredza serial HDMI data uye tumira iyi kuHDMI RX musimboti mune yakafanana fomati pane yakadzoserwa wachi madomasi (rx_clk[2:0]). Iyo data inogadziriswa kuita vhidhiyo
Module Tsanangudzo
  data ichaburitswa kuburikidza neAXI4-stream vhidhiyo. Iyo RX PHY inotumirawo vid_clk uye ls_clk masiginecha kuHDMI RX musimboti kuburikidza nePHY interface.
HDMI TX Core Iyo HDMI TX musimboti inogamuchira AXI4-rukova vhidhiyo data uye inoisa iyi muHDMI fomati yakafanana data. Iyo HDMI TX musimboti inotumira iyi data kuTX PHY.
HDMI RX Core Iyo IP inogamuchira serial data kubva kuRX PHY uye inoita kurongeka kwedata, chiteshi deskew, TMDS decoding, yekubatsira data decoding, vhidhiyo decoding, odhiyo data decoding, uye kudhiza.
TX PHY Inogamuchira uye inoteedzera iyo yakafanana data kubva kuHDMI TX musimboti uye zvinobuda HDMI TMDS hova. Iyo TX PHY inogadzira tx_clk yeiyo HDMI TX musimboti. Iyo TX PHY inogadzirawo vid_clk uye ls_clk uye inotumira aya masaini kuHDMI TX musimboti kuburikidza nePHY interface.
IOPLL Inogadzira 300 MHz AXI serial stream wachi yeAXI4- stream interface.
I2C Master Kugadzirisa zvakasiyana-siyana zvePCB zvikamu.
Hardware uye Software Zvinodiwa

Intel inoshandisa iyi inotevera Hardware uye software kuyedza iyo dhizaini example.

Hardware

  • Intel Arria 10 GX FPGA Development Kit
  • HDMI Source (Graphics Processor Unit (GPU)
  • HDMI Sink (Monitor)
  • Bitec HDMI FMC 2.0 mwanasikana kadhi (Revision 11)
  • HDMI tambo

Software

  • Intel Quartus Prime Pro Edition (yekuyedza hardware)
  • ModelSim* - Intel FPGA Edition, ModelSim - Intel FPGA Starter Edition, NCSim,
    Riviera-PRO*, VCS* (Verilog HDL chete)/VCS MX, kana Xcelium* Parallel simulator

Directory Structure

Madhairekitori ane akagadzirwa file yeHDMI Intel FPGA IP dhizaini example.

Mufananidzo 4. Dhairekitori Mamiriro Ezvakagadzirwa Example
Dhairekitori Magadzirirwo eDesign Example

Reconfiguration Sequence Flow

Mufananidzo 5. Multi-rate Reconfiguration Sequence Flow 

Iyo nhamba inotaridza iyo yakawanda-yeti reconfiguration sequence kuyerera kwemutongi kana agamuchira yekupinda data rwizi uye referensi wachi frequency, kana kana transceiver yavhurwa.
Reconfiguration Sequence Flow

Interface Signals

Matafura anonyora zvikwangwani zveHDMI PHY Intel FPGA IP dhizaini example.

Tafura 3. Pamusoro-Chiratidzo chepamusoro

Signal Direction Upamhi Tsanangudzo
Pa-bhodhi Oscillator Chiratidzo
clk_fpga_b3_p Input 1 100 MHz yemahara inomhanya wachi yepakati referensi wachi
refclk_fmcb_p Input 1 Fixed rate referensi wachi yekusimbisa-up calibration ye transceiver. Iyo 625 MHz nekukasira asi inogona kuve yechero frequency
Mushandisi Push Mabhatani uye LEDs
cpu_resetn Input 1 Global reset
user_led_g Output 2 Green LED kuratidza
HDMI FMC Mwanasikana Kadhi Pini paFMC Port B
fmcb_gbtclk_m2c_p_0 Input 1 HDMI RX TMDS wachi
fmcb_dp_m2c_p Input 3 HDMI RX tsvuku, girini, uye bhuruu data chiteshi

• Bitec mwanasikana kudzokorora kadhi 11

— [0]: RX TMDS Channel 1 (Green)

— [1]: RX TMDS Chiteshi chechipiri (Tsvuku)

— [2]: RX TMDS Channel 0 (Blue)

fmcb_dp_c2m_p Output 4 HDMI TX wachi, tsvuku, girini, uye bhuruu data chiteshi

• Bitec mwanasikana kudzokorora kadhi 11

— [0]: TX TMDS Channel 2 (Tsvuku)

— [1]: TX TMDS Channel 1 (Green)

— [2]: TX TMDS Channel 0 (Blue)

— [3]: TX TMDS Clock Channel

fmcb_la_rx_p_9 Input 1 HDMI RX +5V simba rekuona
fmcb_la_rx_p_8 Input 1 HDMI RX inopisa plug inoona
fmcb_la_rx_n_8 Input 1 HDMI RX I2C SDA yeDDC uye SCDC
fmcb_la_tx_p_10 Input 1 HDMI RX I2C SCL yeDDC uye SCDC
fmcb_la_tx_p_12 Input 1 HDMI TX inopisa plug inoona
fmcb_la_tx_n_12 Input 1 HDMI I2C SDA yeDDC uye SCDC
fmcb_la_rx_p_10 Input 1 HDMI I2C SCL yeDDC uye SCDC
fmcb_la_tx_p_11 Input 1 HDMI I2C SDA yekudzora dhiraivha
fmcb_la_rx_n_9 Input 1 HDMI I2C SCL yekudzora dhiraivha
Clock Scheme

Ichi chinotevera chirongwa chewachi cheHDMI PHY Intel FPGA IP dhizaini example:

  • clk_fpga_b3_p ndeye 100 MHz yakatarwa chiyero wachi yekumhanyisa iyo NIOS processor uye kutonga mabasa. Kana iyo frequency yakapihwa iri chokwadi, mushandisi_led_g[1] anochinja kwesekondi yega yega.
  • refclk_fmcb_p inguva yakatarwa yereferensi wachi yekusimbisa-up calibration yevashanduri. Iyo 625 MHz nekukasira asi inogona kuve yechero frequency.
  • fmcb_gbtclk_m2c_p_0 ndiyo TMDS wachi yeHDMI RX. Wachi iyi inoshandiswawo kutyaira HDMI TX transceivers. Kana iyo frequency inopihwa iri 148.5 MHz, mushandisi_led_g[0] anochinja kwesekondi yega yega.
Hardware Setup

Iyo HDMI PHY Intel FPGA IP dhizaini example iHDMI 2.0b inokwanisa uye inoita loop-kuburikidza nekuratidzira kune yakajairwa HDMI vhidhiyo rwizi.

Kuti umhanye bvunzo dzehardware, batanidza mudziyo unogoneswa neHDMI senge kadhi remifananidzo rine HDMI interface kune HDMI RX yekubatanidza paBitec HDMI 2.0 mwanasikana kadhi, iyo inoendesa data kune transceiver RX block uye HDMI RX.

  1. Iyo HDMI sink inodhidha chiteshi kuita yakajairwa vhidhiyo rwizi uye inotumira kune wachi yekudzoreredza musimboti.
  2. Iyo HDMI RX musimboti inosarudza iyo vhidhiyo, yebetsero, uye odhiyo data kuti idzoserwe kumashure kuburikidza neAXI4-rukova interface kune HDMI TX musimboti.
  3. Iyo HDMI sosi chiteshi cheFMC mwanasikana kadhi inoendesa chifananidzo kune chekutarisa.
  4. Dzvanya bhatani cpu_resetn kamwe kuti uite system reset.
    Cherechedza: Kana iwe uchida kushandisa imwe Intel FPGA yekuvandudza bhodhi, iwe unofanirwa kushandura iyo migove yemuchina uye pini yekupihwa. Iyo transceiver analog kuseta inoedzwa iyo Intel Arria 10 FPGA yekuvandudza kit uye Bitec HDMI 2.0 mwanasikana kadhi. Iwe unogona kugadzirisa zvirongwa zvebhodhi rako pachako.

Gwaro Revision Nhoroondo yeHDMI PHY Intel
FPGA IP Dhizaini Example User Guide

Document Version Intel Quartus Prime Version IP Version Kuchinja
2022.07.20 22.2 1.0.0 Kusunungurwa kwekutanga.

Zvinyorwa / Zvishandiso

Intel HDMI PHY FPGA IP Dhizaini Example [pdf] Bhuku reMushandisi
HDMI PHY FPGA IP Dhizaini Example, HDMI PHY, FPGA IP Dhizaini Example, HDMI PHY IP Dhizaini Example, FPGA IP Dhizaini Example, IP Dhizaini Exampuye, 732781

References

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