Intel HDMI PHY FPGA IP Design Exampndi User Guide

HDMI PHY Design Example Quick Start Guide ya Intel® Arria® 10 Devices

Mapangidwe a HDMI PHY Intel® FPGA IP example ya zida za Intel Arria® 10 imakhala ndi HDMI 2.0 RX-TX retransmit design yomwe imathandizira kuphatikiza ndi kuyesa kwa hardware.
Mukapanga zojambula zakaleampndi, mkonzi wa parameter amangopanga files zofunika kuyerekezera, kusonkhanitsa, ndi kuyesa mapangidwe mu hardware.

Chithunzi 1. Njira Zachitukuko

Zambiri Zogwirizana
HDMI PHY Intel FPGA IP User Guide

Kupanga Mapangidwe

Gwiritsani ntchito HDMI PHY Intel FPGA IP parameter editor mu Intel Quartus® Prime software kuti mupange zojambula zakale.amples.

Chithunzi 2. Kupanga Mapangidwe Oyenda

1. Pangani pulojekiti yolunjika ku banja la chipangizo cha Intel Arria 10 ndikusankha chipangizo chomwe mukufuna.
2. Mu IP Catalog, pezani ndikudina kawiri Ma Interface Protocols ➤ Audio & Video ➤ HDMI TX PHY Intel FPGA IP (kapena HDMI RX PHY Intel FPGA IP). Zenera la New IP Variant kapena New IP Variant likuwonekera.
3. Tchulani dzina lapamwamba lamitundu yanu ya IP. Mkonzi wa parameter amasunga zosintha za IP mu a file dzina lake .ip kapena .qsys.
4. Dinani Chabwino. The parameter editor ikuwonekera.
   Malingaliro a kampani Intel Corporation Maumwini onse ndi otetezedwa. Intel, logo ya Intel, ndi zizindikiro zina za Intel ndi zizindikiro za Intel
   Corporation kapena mabungwe ake. Intel imatsimikizira kugwira ntchito kwa FPGA yake ndi zida za semiconductor malinga ndi zomwe zili pano malinga ndi chitsimikizo cha Intel, koma ili ndi ufulu wosintha zinthu ndi ntchito zilizonse nthawi iliyonse popanda kuzindikira. Intel sakhala ndi udindo kapena udindo chifukwa chakugwiritsa ntchito kapena kugwiritsa ntchito zidziwitso zilizonse, malonda, kapena ntchito zomwe zafotokozedwa pano kupatula monga momwe Intel adavomerezera momveka bwino. Makasitomala a Intel amalangizidwa kuti apeze mtundu waposachedwa kwambiri wamakina a chipangizocho asanadalire zidziwitso zilizonse zosindikizidwa komanso asanayike maoda azinthu kapena ntchito.
   Mayina ena ndi mtundu zitha kunenedwa kuti ndi za ena.
5. Pa Design Example tabu, sankhani Arria 10 HDMI RX-TX Retransmit.
6. Sankhani Kayeseleledwe kupanga testbench, ndi kusankha kaphatikizidwe kupanga hardware kapangidwe example.
   Muyenera kusankha chimodzi mwazosankha izi kuti mupange zojambula zakaleample files.
   Ngati musankha zonse ziwiri, nthawi ya m'badwo ndi yayitali.
7. Za Pangani File Format, sankhani Verilog kapena VHDL.
8. Kwa Target Development Kit, sankhani Intel Arria 10 GX FPGA Development
   Zida. Mukasankha zida zachitukuko, ndiye kuti chipangizocho chimasintha kuti chifanane ndi chipangizo chomwe chili pa bolodi. Kwa Intel Arria 10 GX FPGA Development Kit, chipangizo chokhazikika ndi 10AX115S2F4I1SG.
9. Dinani Pangani Exampndi Design.

Kulemba ndi Kuyesa Mapangidwe

Kupanga ndikuyesa kuyesa kwachiwonetsero pa hardware example design, tsatirani izi:

1. Onetsetsani kuti hardware example design generation yatha.
2. Tsegulani pulogalamu ya Intel Quartus Prime ndikutsegula fayilo ya .qpf file: /quartus/a10_hdmi2_demo.qpf
3. Dinani Kukonza ➤ Yambani Kuphatikiza.
4. Pambuyo pophatikiza bwino, a .sof file imapangidwa mu quartus/ output_files chikwatu.
5. Lumikizani Bitec HDMI 2.0 FMC Daughter Card Rev 11 ku doko la FMC pa bolodi B (J2).
6. Lumikizani TX (P1) ya Khadi la Bitec FMC ku kanema wakunja.
7. Lumikizani RX (P2) ya Bitec FMC kadi ya mwana wamkazi ku sinki yakunja ya kanema kapena chowunikira makanema.
8. Onetsetsani kuti masiwichi onse pa bolodi lachitukuko ali pamalo osakhazikika.
9. Konzani chipangizo chosankhidwa cha Intel Arria 10 pa bolodi lachitukuko pogwiritsa ntchito makina opangidwa ndi .sof file (Zida ➤ Wopanga Mapulogalamu).
10. Wosanthula ayenera kuwonetsa kanema wopangidwa kuchokera kugwero. Kulemba ndi Kuyesa Mapangidwe

Zambiri Zogwirizana
Intel Arria 10 FPGA Development Kit User Guide

HDMI PHY Intel FPGA IP Design Exampndi Parameters

Table 1. HDMI PHY Intel FPGA IP Design Example Parameters ya Intel Arria 10
Zipangizo

Zosankha izi zimapezeka pazida za Intel Arria 10 zokha.

Parameter	Mtengo	Kufotokozera
Mapangidwe Opezeka Example
Sankhani Design	Arria 10 HDMI RX-TX Retransmit	Sankhani chitsanzo chojambulaample kuti apangidwe.

Design Example Files
Kuyerekezera	Yatsani, Off	Yatsani izi kuti mupange zofunikira files ya testbench yoyeserera.
Kaphatikizidwe	Yatsani, Off	Yatsani izi kuti mupange zofunikira files ya Intel Quartus Prime compilation ndi mawonetsero a hardware.

Mtundu Wopangidwa wa HDL
Pangani File Mtundu	Verilog, VHDL	Sankhani mtundu womwe mumakonda wa HDL wamapangidwe opangidwa kaleample fileset. Zindikirani: Izi zimangotsimikizira mtundu wa IP yapamwamba yopangidwa files. Zina zonse files (mwachitsanzo, Eksample testbenches ndi mlingo wapamwamba files zowonetsera za hardware) zili mu mtundu wa Verilog HDL.

Chida Chachitukuko cha Target
Sankhani Board	Palibe Zida Zachitukuko,	Sankhani bolodi la mapangidwe omwe mukufunaample.
	Arria 10 GX FPGA Development Kit, Custom Development Kit	No Development Kit: Izi sizikuphatikiza mbali zonse za Hardware za kapangidwe kakaleample. IP core imayika magawo onse a pini kukhala ma pini enieni. Arria 10 GX FPGA Development Kit: Njira iyi imangosankha chipangizo chandamale cha polojekitiyi kuti chigwirizane ndi chipangizo chomwe chili pazitukukozi. Mukhoza kusintha chandamale chipangizo ntchito Sinthani Chipangizo Chotsatira parameter ngati kubwereza kwa bolodi lanu kuli ndi mtundu wina wa chipangizo. IP core imayika magawo onse a pini malinga ndi zida zachitukuko.
		Custom Development Kit: Njira iyi imalola zojambula zakaleample kuti ayesedwe pa zida zachitukuko chachitatu ndi Intel FPGA. Mungafunike kukhazikitsa ma pin assignments nokha.

Chida Cholowera
Sinthani Chipangizo Chotsatira	Yatsani, Off	Yatsani njira iyi ndikusankha chosinthira chomwe mumakonda cha zida zachitukuko.

HDMI 2.0 PHY Design Example

Mapangidwe a HDMI PHY Intel FPGA IP example akuwonetsa chiwonetsero chimodzi cha HDMI chofanana ndi njira zitatu za RX ndi ma TX anayi, omwe amagwira ntchito pamitengo ya data mpaka 6 Gbps.

Mapangidwe a HDMI PHY Intel FPGA IP exampndi chimodzimodzi ndi kapangidwe exampyopangidwa mu HDMI Intel FPGA IP core. Komabe, mapangidwe awa example amagwiritsa ntchito TX PHY, RX PHY, ndi PHY arbiter m'malo mwa RTL mu HDMI Intel FPGA IP core design ex.ample.

Chithunzi 3. HDMI 2.0 PHY Design Example

Module	Kufotokozera
Mtengo wa RX PHY	RX PHY imapezanso zambiri za HDMI ndikutumiza izi ku HDMI RX pachimake mumtundu wofananira pamadomeni omwe adabwezedwa (rx_clk[2:0]). Deta yasinthidwa kukhala kanema

Module	Kufotokozera
	deta kuti itulutsidwe kudzera pavidiyo ya AXI4-stream. RX PHY imatumizanso zizindikiro za vid_clk ndi ls_clk ku HDMI RX pachimake kudzera pa mawonekedwe a PHY.
HDMI TX Core	Choyambira cha HDMI TX chimalandira deta ya kanema ya AXI4 ndikuyika izi mumtundu wa HDMI data yofananira. Chingwe cha HDMI TX chimatumiza deta iyi ku TX PHY.
HDMI RX Core	IP imalandira ma serial data kuchokera ku RX PHY ndipo imapanga ma data, deskew channel, TMDS decoding, decoding yothandiza, kufotokozera mavidiyo, kusindikiza deta, ndi kusokoneza.
TX PA	Amalandira ndi kusanja deta yofananira kuchokera ku HDMI TX core ndi zotuluka HDMI TMDS mitsinje. TX PHY imapanga tx_clk ya HDMI TX core. TX PHY imapanganso vid_clk ndi ls_clk ndikutumiza zizindikiro ku HDMI TX pachimake pogwiritsa ntchito mawonekedwe a PHY.
IOPLL	Amapanga wotchi ya 300 MHz AXI ya seriyoni ya mawonekedwe a AXI4- stream.
I2C Master	Kuti sintha zosiyanasiyana PCB zigawo zikuluzikulu.

Zofunikira pa Hardware ndi Mapulogalamu

Intel imagwiritsa ntchito zida ndi mapulogalamu otsatirawa kuyesa kapangidwe kakaleample.

Zida zamagetsi

• Intel Arria 10 GX FPGA Development Kit
• HDMI Source (Graphics Processor Unit (GPU)
• HDMI Sink (Monitor)
• Khadi la Bitec HDMI FMC 2.0 (Revision 11)
• Zingwe za HDMI

Mapulogalamu

• Intel Quartus Prime Pro Edition (yoyesa ma hardware)
• ModelSim* - Intel FPGA Edition, ModelSim - Intel FPGA Starter Edition, NCSim,
  Riviera-PRO*, VCS* (Verilog HDL yokha)/VCS MX, kapena Xcelium* Parallel simulator

Kapangidwe ka Kalozera

Maulalo ali ndi zomwe zidapangidwa file kwa HDMI Intel FPGA IP design example.

Chithunzi 4. Kapangidwe ka Kalozera wa Zopangidwe Example

Kusintha kwa Sequence Flow

Chithunzi 5. Mipikisano yamitundu yambiri yosinthanso Mayendedwe Akuyenda 

Chithunzichi chikuwonetsa mayendedwe osinthika amitundu yambiri ya wowongolera akalandira mayendedwe olowera deta ndi ma frequency a wotchi, kapena transceiver ikatsegulidwa.

Zizindikiro za Interface

Matebulo amalemba ma sign a HDMI PHY Intel FPGA IP kapangidwe example.

Table 3. Zizindikiro Zapamwamba

Chizindikiro	Mayendedwe	M'lifupi	Kufotokozera
Chizindikiro cha Oscillator pa bolodi
clk_fpga_b3_p	Zolowetsa	1	Wotchi yaulere ya 100 MHz ya wotchi yoyambira
refclk_fmcb_p	Zolowetsa	1	Wotchi yokhazikika yolozera kuwongolera mphamvu kwa transceiver. Ndi 625 MHz mwachisawawa koma imatha kukhala pafupipafupi

Mabatani Okankhira Ogwiritsa ndi ma LED
cpu_resetn	Zolowetsa	1	Kukonzanso kwapadziko lonse
user_led_g	Zotulutsa	2	Chiwonetsero cha Green LED

HDMI FMC Daughter Card Pins pa FMC Port B
fmcb_gbtclk_m2c_p_0	Zolowetsa	1	Wotchi ya HDMI RX TMDS
fmcb_dp_m2c_p	Zolowetsa	3	HDMI RX njira zofiira, zobiriwira, ndi zabuluu • Kusintha kwa khadi la Bitec 11 — [0]: RX TMDS Channel 1 (Yobiriwira) — [1]: RX TMDS Channel 2 (Yofiira) — [2]: RX TMDS Channel 0 (Blue)
fmcb_dp_c2m_p	Zotulutsa	4	HDMI TX wotchi, ofiira, obiriwira, ndi njira zabuluu za data • Kusintha kwa khadi la Bitec 11 — [0]: TX TMDS Channel 2 (Yofiira) — [1]: TX TMDS Channel 1 (Yobiriwira) — [2]: TX TMDS Channel 0 (Blue) - [3]: TX TMDS Clock Channel
fmcb_la_rx_p_9	Zolowetsa	1	Kuzindikira mphamvu ya HDMI RX + 5V
fmcb_la_rx_p_8	Zolowetsa	1	Kuzindikira kotentha kwa HDMI RX
fmcb_la_rx_n_8	Zolowetsa	1	HDMI RX I2C SDA ya DDC ndi SCDC
fmcb_la_tx_p_10	Zolowetsa	1	HDMI RX I2C SCL ya DDC ndi SCDC
fmcb_la_tx_p_12	Zolowetsa	1	Kuzindikira kotentha kwa HDMI TX
fmcb_la_tx_n_12	Zolowetsa	1	HDMI I2C SDA ya DDC ndi SCDC
fmcb_la_rx_p_10	Zolowetsa	1	HDMI I2C SCL ya DDC ndi SCDC
fmcb_la_tx_p_11	Zolowetsa	1	HDMI I2C SDA yowongolera redriver
fmcb_la_rx_n_9	Zolowetsa	1	HDMI I2C SCL kwa redriver control

Clock Scheme

Zotsatirazi ndi dongosolo la mawotchi a HDMI PHY Intel FPGA IP design exampLe:

• clk_fpga_b3_p ndi wotchi yokhazikika ya 100 MHz yoyendetsa purosesa ya NIOS ndi ntchito zowongolera. Ngati ma frequency omwe aperekedwa ali olondola, user_led_g[1] amasintha sekondi iliyonse.
• refclk_fmcb_p ndi wotchi yokhazikika yowunikira mphamvu za transceivers. Ndi 625 MHz mwachisawawa koma imatha kukhala pafupipafupi.
• fmcb_gbtclk_m2c_p_0 ndi wotchi ya TMDS ya HDMI RX. Wotchi iyi imagwiritsidwanso ntchito kuyendetsa ma transceivers a HDMI TX. Ngati ma frequency operekedwa ndi 148.5 MHz, wogwiritsa_led_g[0] amatembenuza sekondi iliyonse.

Kukonzekera kwa Hardware

Mapangidwe a HDMI PHY Intel FPGA IP example ndi HDMI 2.0b yokhoza ndipo imapanga chiwonetsero chazithunzi za kanema wamtundu wa HDMI.

Kuti muyese kuyesa kwa hardware, gwirizanitsani chipangizo chothandizira HDMI monga khadi la zithunzi ndi mawonekedwe a HDMI ku cholumikizira cha HDMI RX pa Bitec HDMI 2.0 kadi ya mwana wamkazi, yomwe imatumiza deta ku chipika cha transceiver RX ndi HDMI RX.

1. Sink ya HDMI imayika doko kukhala mtsinje wamba wamavidiyo ndikutumiza ku nsonga yobwezeretsa wotchi.
2. Choyambira cha HDMI RX chimasankha vidiyo, zothandizira, ndi zomvera kuti zibwererenso kudzera pa mawonekedwe a AXI4-stream kupita pachimake cha HDMI TX.
3. Doko la HDMI la khadi la mwana wamkazi la FMC limatumiza chithunzicho ku chowunikira.
4. Dinani batani la cpu_resetn kamodzi kuti mukonzenso dongosolo.
   Zindikirani: Ngati mukufuna kugwiritsa ntchito gulu lina lachitukuko la Intel FPGA, muyenera kusintha magawo a chipangizocho ndi ma pini. Mapangidwe a analogi a transceiver amayesedwa pa chipangizo cha chitukuko cha Intel Arria 10 FPGA ndi Bitec HDMI 2.0 khadi la ana. Mutha kusintha makonda anu board.

Mbiri Yokonzanso Zolemba za HDMI PHY Intel
FPGA IP Design Exampndi User Guide

Document Version	Intel Quartus Prime Version	Mtundu wa IP	Zosintha
2022.07.20	22.2	1.0.0	Kutulutsidwa koyamba.

Zolemba / Zothandizira

Intel HDMI PHY FPGA IP Design Example [pdf] Buku Logwiritsa Ntchito HDMI PHY FPGA IP Design Example, HDMI PHY, FPGA IP Design Example, HDMI PHY IP Design Example, FPGA IP Design Exampndi, IP Design Exampndi, 732781

Maumboni

• Buku Logwiritsa Ntchito