Intel UG-01155 IOPLL FPGA IP Core

Ibuyekezelwe i-Intel® Quartus® Prime Design Suite: 18.1

Umhlahlandlela Womsebenzisi we-IOPLL Intel® FPGA IP Core

I-IOPLL Intel® FPGA IP core ikuvumela ukuthi ulungiselele izilungiselelo ze-Intel Arria® 10 ne-Intel Cyclone® 10 GX I/O PLL.

I-IOPLL IP core isekela izici ezilandelayo:

• Isekela izindlela eziyisithupha ezihlukene zempendulo yewashi: impendulo eqondile, yangaphandle, evamile, ehambisanayo yomthombo, isibhafa sokulibaziseka esiyiziro, nemodi ye-LVDS.
• Ikhiqiza amasignali okukhiphayo afika kwayisishiyagalolunye kumadivayisi e-Intel Arria 10 kanye ne-Intel CycloneM 10 GX.
• Ishintsha phakathi kwamawashi okufaka isithenjwa amabili.
• Isekela okokufaka okuseduze kwe-PLL (adjpllin) ukuze kuxhunywe ne-PLL ekhuphuka nomfula kumodi ye-Cascading ye-PLL.
• Idala Ukuqaliswa Kwenkumbulo File (.mif) futhi ivumela i-PLL dynamicVreconfiguration.
• Isekela ukushintshwa kwesigaba esiguqukayo se-PLL.

Ulwazi Oluhlobene

• Isingeniso se-Intel FPGA IP Cores
  Inikeza ulwazi olwengeziwe mayelana ne-Intel FPGA IP cores kanye nomhleli wepharamitha.
• Izindlela Zokusebenza ekhasini 9
• Amawashi Okukhiphayo ekhasini 10
• Ukushintsha Kwewashi Lereferensi ekhasini 10
• Ukukhipha i-PLL-to-PLL ekhasini 11
• I-IOPLL Intel FPGA IP Core User Guide Izingobo zomlando ekhasini 12

Ihlinzeka ngohlu lwemihlahlandlela yabasebenzisi yezinguqulo zangaphambilini ze-IOPLL Intel FPGA IP core.

Ukusekelwa Komndeni Kwedivayisi

I-IOPLL IP core isekela kuphela imindeni yedivayisi ye-Intel Arria 10 ne-Intel Cyclone 10 GX.

I-IOPLL IP Core Parameters

Isihleli sepharamitha eyinhloko ye-IOPLL IP sivela esigabeni se-PLL sekhathalogi ye-IP.

Ipharamitha	Inani Lomthetho	Incazelo
Umndeni Wedivayisi	I-Intel Arria 10, Intel I-Cyclone 10 GX	Icacisa umndeni wedivayisi.
Isakhi	—	Icacisa idivayisi eqondiwe.
Ijubane leBanga	—	Icacisa ibanga lejubane ledivayisi eqondisiwe.
Imodi ye-PLL	Inombolo ephelele-N I-PLL	Icacisa imodi esetshenziselwa i-IOPLL IP core. Ukukhethwa okusemthethweni kuphela I-Integer-N PLL. Uma udinga i-PLL eyingxenye, kufanele usebenzise i-fPLL Intel Arria 10/Cyclone 10 FPGA IP core.
I-Reference Clock Frequency	—	Icacisa imvamisa yokufaka yewashi lokokufaka, i-refclk, ku-MHz. Inani elizenzakalelayo lithi 100.0 MHz. Inani eliphansi neliphezulu lincike ocingweni olukhethiwe.
Nika amandla Imbobo Yokukhiphayo Ekhiyiwe	Vula noma Vala	Vula ukuze uvule imbobo ekhiyiwe.
Nika amandla amapharamitha wewashi elibonakalayo	Vula noma Vala	Vula ukuze ufake amapharamitha wekhawunta we-PLL aphathekayo esikhundleni sokucacisa imvamisa yewashi lokukhiphayo oyifunayo.
Imodi yokusebenza	ngqo, impendulo yangaphandle, evamile, umthombo synchronous, Ibhafa yokulibaziseka eyiziro, noma lvds	Icacisa ukusebenza kwe-PLL. Umsebenzi ozenzakalelayo ngu ngqo imodi. • Uma ukhetha i ngqo imodi, i-PLL inciphisa ubude bendlela yempendulo ukuze ikhiqize i-jitter encane kakhulu ekuphumeni kwe-PLL.Okukhiphayo kwewashi langaphakathi newashi langaphandle le-PLL kushintshaniswa ngesigaba ngokuphathelene nokokufaka kwewashi le-PLL. Kule modi, i-PLL ayinxephezeli nganoma yimaphi amanethiwekhi wewashi. • Uma ukhetha i evamile Imodi, i-PLL inxephezela ukubambezeleka kwenethiwekhi yewashi yangaphakathi esetshenziswa ukuphuma kwewashi. Uma i-PLL iphinde isetshenziselwe ukushayela iphinikhodi yokukhipha iwashi yangaphandle, ukushintsha kwesigaba esihambelanayo sesignali kuphini lokuphumayo kwenzeka. • Uma ukhetha i umthombo synchronous Imodi, ukubambezeleka kwewashi ukusuka kuphinikhodi ukuya kurejista yokufaka ye-I/O kufana nokulibaziseka kwedatha ukusuka kuphinikhodi ukuya kurejista yokufaka ye-I/O. • Uma ukhetha i impendulo yangaphandle Imodi, kufanele uxhume imbobo yokufaka ye-fbclk kuphinikhodi yokufaka. Uxhumano lwezinga lebhodi kufanele luxhume kokubili iphinikhodi yokufaka kanye nembobo yokukhipha iwashi yangaphandle, fboutclk. Imbobo ye-fbclk iqondaniswe newashi lokufaka. • Uma ukhetha i Ibhafa yokulibaziseka eyiziro Imodi, i-PLL kufanele inikeze iphinikhodi yokukhipha iwashi yangaphandle futhi inxephezele ukubambezeleka okwethulwe yileyo phini. Isignali ebonwe kuphinikhodi ivunyelaniswa newashi lokufaka. Okukhiphayo kwewashi le-PLL kuxhuma embobeni ye-altbidir futhi ishayela i-zdbfbclk njengendawo yokuphumayo. Uma i-PLL iphinde ishayele inethiwekhi yewashi yangaphakathi, ushintsho lwesigaba oluhambisanayo lwaleyo nethiwekhi luyenzeka. • Uma ukhetha i lvds Imodi, idatha efanayo kanye nobudlelwano besikhathi bewashi bamaphini kurejista yokuthwebula ye-SERDES yangaphakathi iyagcinwa. Imodi inxephezela ukubambezeleka kwenethiwekhi yewashi le-LVDS, naphakathi kwephinikhodi yedatha nephinikhodi yokufaka iwashi ezindleleni zerejista yokuthwebula ye-SERDES.
Inombolo Yamawashi	1–9	Icacisa inani lamawashi okukhiphayo adingekayo kudivayisi ngayinye edizayini ye-PLL. Izilungiselelo eziceliwe zokuvama kokuphumayo, ukushintshwa kwesigaba, nomjikelezo womsebenzi ziboniswa ngokusekelwe enanini lamawashi akhethiwe.
Cacisa Imvamisa ye-VCO	Vula noma Vala	Ikuvumela ukuthi ukhawulele imvamisa ye-VCO kunani elishiwo. Lokhu kuyasiza lapho udala i-PLL yemodi yangaphandle ye-LVDS, noma uma usayizi wesinyathelo sokushintsha wesigaba esiguqukayo ufunwa.
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Ipharamitha	Inani Lomthetho	Incazelo
Imvamisa ye-VCO (1)	—	• Nini Nika amandla amapharamitha wewashi elibonakalayo ivuliwe— ibonisa imvamisa ye-VCO ngokusekelwe kumanani we I-Reference Clock Frequency, I-Multiply Factor (M-Counter), futhi I-Divide Factor (N-Counter). • Nini Nika amandla amapharamitha wewashi elibonakalayo icishiwe— ikuvumela ukuthi ucacise inani eliceliwe lemvamisa ye-VCO. Inani elizenzakalelayo lithi 600.0 MHz.
Nikeza igama lomhlaba jikelele lewashi	Vula noma Vala	Ikuvumela ukuthi uqambe kabusha igama lewashi eliphumayo.
Igama Lewashi	—	Igama lewashi lomsebenzisi le-Synopsis Design Constraints (SDC).
Imvamisa oyifunayo	—	Icacisa imvamisa yewashi lokukhiphayo lembobo yewashi ehambisanayo, i-outclk[], nge-MHz. Inani elizenzakalelayo lithi 100.0 MHz. Amanani amancane naphezulu ancike ocingweni olusetshenzisiwe. I-PLL ifunda izinombolo kuphela ezindaweni zedesimali eziyisithupha zokuqala.
Imvamisa Yangempela	—	Ikuvumela ukuthi ukhethe imvamisa yewashi langempela ohlwini lwamafrikhwensi afinyelelekayo. Inani elimisiwe yimvamisa efinyelelekayo eseduze kakhulu nefrikhwensi oyifunayo.
Amayunithi we-Phase Shift	ps or amadigri	Icacisa iyunithi yokushintsha kwesigaba yembobo yewashi ehambisanayo, outclk[], ngama-picoseconds (ps) noma amadigri.
Ukushintsha Kwesigaba Esidingekayo	—	Icacisa inani eliceliwe lokushintsha kwesigaba. Inani elizenzakalelayo lithi I-0 ps.
Ukushintsha Kwesigaba Sangempela	—	Ikuvumela ukuthi ukhethe ukushintsha kwesigaba sangempela ohlwini lwamanani okushintsha kwesigaba angafinyeleleka. Inani elizenzakalelayo liwukushintsha kwesigaba esifinyeleleka esiseduze kakhulu ukuya ekushintsheni kwesigaba osifunayo.
Desired Duty Cycle	0.0–100.0	Icacisa inani eliceliwe lomjikelezo womsebenzi. Inani elizenzakalelayo lithi 50.0%.
Umjikelezo Wemisebenzi Yangempela	—	Ikuvumela ukuthi ukhethe umjikelezo wemfanelo wangempela ohlwini lwamanani omjikelezo wemisebenzi ongafinyeleleka. Inani elizenzakalelayo liwumjikelezo wemfanelo ofinyeleleka oseduze kakhulu womjikelezo wemisebenzi oyifunayo.
I-Multiply Factor (M-Counter) (2)	4–511	Icacisa isici sokuphindaphinda se-M-counter. Ibanga elisemthethweni lekhawunta ye-M lingu-4–511. Kodwa-ke, imikhawulo yefrikhwensi esemthethweni ye-PFD kanye nemvamisa ephezulu yezomthetho ye-VCO ikhawulela ububanzi bekhawunta be-M bufinyelele ku-4-160.
I-Divide Factor (N-Counter) (2)	1–511	Icacisa isici sokuhlukanisa se-N-counter. Ibanga elisemthethweni lekhawunta ye-N lingu-1–511. Nokho, imikhawulo yefrikhwensi encane esemthethweni ye-PFD ikhawulela ububanzi obusebenzayo bekhawunta ye-N ukuya ku-1–80.
I-Divide Factor (C-Counter) (2)	1–511	Icacisa isici sokuhlukanisa sewashi eliphumayo (C-counter).

1. Le pharamitha itholakala kuphela lapho Ukunika amandla amapharamitha wewashi elibonakalayo kuvaliwe.
2. Le pharamitha itholakala kuphela uma imingcele yewashi elikhiphayo elibonakalayo livuliwe.

I-IOPLL IP Core Parameters - Ithebhu Yezilungiselelo

Ithebula 2. I-IOPLL IP Core Parameters - Ithebhu Yezilungiselelo

Ipharamitha	Inani Lomthetho	Incazelo
I-PLL Bandwidth Preset	Phansi, Maphakathi, noma Phezulu	Icacisa ukulungiselelwa kokusetha kabusha komkhawulokudonsa we-PLL. Ukukhetha okuzenzakalelayo ngu Phansi.
Ukusetha kabusha okuzenzakalelayo kwe-PLL	Vula noma Vala	Zisetha kabusha ngokuzenzakalelayo i-PLL ekulahlekeni kokukhiya.
Dala okokufaka kwesibili kwe-clk 'refclk1'	Vula noma Vala	Vula ukuze unikeze iwashi eliyisipele elinamathiselwe ku-PLL yakho elingashintsha newashi lakho eliyinkomba langempela.
Iwashi Lereferensi Yesibili Imvamisa	—	Ikhetha imvamisa yesiginali yewashi lokufakwayo kwesibili. Inani elizenzakalelayo lithi 100.0 MHz. Inani eliphansi neliphezulu lincike ocingweni olusetshenzisiwe.
Dala isignali ye-'active_clk' ukuze ubonise iwashi lokufaka elisebenzayo	Vula noma Vala	Vula ukuze udale okukhiphayo okusebenzayoclk. Okukhiphayo okusebenzayoclk kubonisa iwashi lokufaka elisetshenziswa yi-PLL. Isignali yokuphuma iphansi ibonisa i-refclk kanye nesiginali yokuphumayo ephezulu ibonisa i-refclk1.
Dala isignali ye-'clkbad' yewashi ngalinye lokufaka	Vula noma Vala	Vula ukuze udale okuphumayo kwe-clkbad okubili, okukodwa kwewashi ngalinye lokokufaka. Isignali yokuphuma iphansi ikhombisa ukuthi iwashi liyasebenza futhi isignali ephezulu ikhombisa ukuthi iwashi alisebenzi.
Imodi yokushintsha	I-Switchover ezenzakalelayo, Ukushintshwa kwe-Manual, noma I-Switchover ezenzakalelayo ngokukhipha ngesandla	Icacisa imodi yokushintsha yohlelo lokusebenza lokuklama. I-IP isekela izindlela ezintathu zokushintshwa: • Uma ukhetha i I-Switchover ezenzakalelayo Imodi, isifunda se-PLL siqapha iwashi lesithenjwa elikhethiwe. Uma iwashi elilodwa lima, isekethe ishintshela ewashi eliyisipele ngokuzenzakalelayo emijikelezweni yewashi embalwa bese ibuyekeza amasignali esimo, i-clkbad ne-activeclk. • Uma ukhetha i Ukushintshwa kwe-Manual Imodi, lapho isignali yokulawula, i-extwitch, ishintsha ukusuka kumqondo ophezulu ukuya kokunengqondo ephansi, futhi ihlala iphansi okungenani imijikelezo yewashi emithathu, iwashi lokokufaka lishintshela kwelinye iwashi. I-extwitch ingakhiqizwa kusuka ku-FPGA core logic noma iphinikhodi yokufaka. • Uma ukhetha I-Switchover ezenzakalelayo ngokukhipha ngesandla imodi, uma isignali yokukhipha iphansi iphansi, ibhala ngaphezulu umsebenzi wokushintsha okuzenzakalelayo. Inqobo nje uma i-extwitch ihlala iphansi, esinye isenzo sokushintshwa siyavinjwa. Ukuze ukhethe le modi, imithombo yamawashi akho amabili kufanele isebenze futhi imvamisa yamawashi amabili ayikwazi ukuhluka ngaphezu kuka-20%. Uma womabili amawashi engekho kumafrikhwensi afanayo, kodwa umehluko wesikhathi wawo ungaphakathi kuka-20%, ibhulokhi yokuthola ukulahleka kwewashi ingathola iwashi elilahlekile. I-PLL cishe iyona ephuma ekuvaleni ngemva kokushintsha okokufaka kwewashi le-PLL futhi idinga isikhathi sokukhiya futhi.
Ukulibaziseka kwe-switchover	0–7	Yengeza inani elithile lokulibaziseka komjikelezo kunqubo yokushintsha. Inani elizenzakalelayo ngu-0.
Ukufinyelela kumbobo yokukhiphayo ye-PLL LVDS_CLK/ LOADEN	Ikhutshaziwe, Nika amandla i-LVDS_CLK/ LAWULA 0, noma Nika amandla i-LVDS_CLK/ LAISHA 0 & 1	Khetha Nika amandla i-LVDS_CLK/LOADEN 0 or Nika amandla i-LVDS_CLK/ LOADEN 0 & 1 ukuze unike amandla i-PLL lvds_clk noma imbobo yokukhipha yokulayisha. Inika amandla le pharamitha uma kwenzeka i-PLL iphakela ibhulokhi ye-LVDS SERDES nge-PLL yangaphandle. Uma usebenzisa izimbobo ze-I/O PLL outclk ezinezimbobo ze-LVDS, i-outclk[0..3] isetshenziselwa lvds_clk[0,1] kanye nezimbobo zokulayisha[0,1], i-outclk4 ingasetshenziselwa izimbobo ze-coreclk.
Nika amandla ukufinyelela embobeni yokukhiphayo ye-PLL DPA	Vula noma Vala	Vula ukuze unike amandla imbobo yokuphumayo ye-PLL DPA.
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Ipharamitha	Inani Lomthetho	Incazelo
Nika amandla ukufinyelela kumbobo yokukhipha iwashi yangaphandle ye-PLL	Vula noma Vala	Vula ukuze unike amandla imbobo yokukhipha iwashi langaphandle le-PLL.
Icacisa ukuthi iyiphi i-outclk ezosetshenziswa njengomthombo we-extclk_out[0]	C0 – C8	Icacisa imbobo ye-outclk ezosetshenziswa njengomthombo we-extclk_out[0].
Icacisa ukuthi iyiphi i-outclk ezosetshenziswa njengomthombo we-extclk_out[1]	C0 – C8	Icacisa imbobo ye-outclk ezosetshenziswa njengomthombo we-extclk_out[1].

Ithebhu ye-Cascading

Ithebula 3. I-IOPLL IP Core Parameters - I-Cascading Tab3

Ipharamitha	Inani Lomthetho	Incazelo
Dala isignali 'ye-cascade out' ukuze uxhumane ne-PLL engezansi	Vula noma Vala	Vula ukuze udale imbobo ye-cascade_out, okubonisa ukuthi le PLL iwumthombo futhi ixhuma nendawo (ephansi komfula) i-PLL.
Icacisa ukuthi iyiphi i-outclk okufanele isetshenziswe njengomthombo we-cascading	0–8	Icacisa umthombo we-cascading.
Dala isignali ye-adjpllin noma ye-cclk ukuze uxhumane ne-PLL ekhuphuka nomfula	Vula noma Vala	Vula ukuze udale imbobo yokufaka, ebonisa ukuthi le PLL iyindawo futhi ixhuma nomthombo (okhuphuka nomfula) PLL.

Ithebhu Yokumisa Kabusha Enamandla

Ithebula 4. I-IOPLL IP Core Parameters - Ithebhu Yokulungisa Kabusha Enamandla

Ipharamitha	Inani Lomthetho	Incazelo
Nika amandla ukumiswa kabusha okuguquguqukayo kwe-PLL	Vula noma Vala	Vula ukunika amandla ukumiswa kabusha okuguquguqukayo kwale PLL (ngokuhambisana ne-PLL Reconfig Intel FPGA IP core).
Nika amandla ukufinyelela ezimbobeni zokushintsha kwesigaba esiguqukayo	Vula noma Vala	Vula ukunika amandla isixhumi esibonakalayo sokushintsha kwesigaba esiguqukayo nge-PLL.
Inketho yesizukulwane se-MIF (3)	Khiqiza I-MIF entsha File, Engeza ukucushwa ku-MIF ekhona File, futhi Dala i-MIF File ngesikhathi se-IP Generation	Noma dala i-.mif entsha file equkethe ukucushwa kwamanje kwe-I/O PLL, noma engeza lokhu kumisa ku-.mif ekhona file. Ungasebenzisa lokhu .mif file ngesikhathi sokulungiswa kabusha okuguquguqukayo ukuze ulungise kabusha i-I/O PLL kuzilungiselelo zayo zamanje.
Indlela eya ku-MIF Entsha file (4)	—	Faka indawo futhi file igama le-.mif entsha file ukudalwa.
Indlela eya ku-MIF Ekhona file (5)	—	Faka indawo futhi file igama le-.mif ekhona file uhlose ukwengeza kukho.
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1. Le pharamitha itholakala kuphela uma Ukunika amandla ukulungiswa kabusha kwe-PLL kuvuliwe.
2. Le parameter itholakala kuphela uma Khiqiza i-MIF Entsha File ikhethwa njenge-MIF Generation
   Inketho.

   Ipharamitha	Inani Lomthetho	Incazelo
   Nika amandla i-Dynamic Phase Shift yokusakaza-bukhoma kwe-MIF (3)	Vula noma Vala	Vula ukuze ugcine izici zokushintsha kwesigaba esiguqukayo ukuze ulungise kabusha i-PLL.
   Ukukhethwa Kwekhawunta ye-DPS (6)	C0–C8, Bonke C, or M	Ikhetha ikhawunta ukuze ingene kushifti yesigaba esiguqukayo. U-M uyikhawunta yempendulo futhi u-C uyikhawunta ye-post-scale.
   Inombolo yama-Dynamic Phase Shifts (6)	1–7	Ikhetha inani lokukhuphuka kwesigaba sokushintsha. Usayizi wokukhuphuka kokushintshwa kwesigaba esisodwa ulingana no-1/8 wenkathi ye-VCO. Inani elizenzakalelayo lithi 1.
   I-Dynamic Phase Shift Direction (6)	Okuhle or Okubi	Inquma isiqondisindlela sokushintsha kwesigaba esiguqukayo esizogcinwa ku-PLL MIF.

3. Le pharamitha itholakala kuphela uma Engeza ukucushwa ku-MIF ekhona File ikhethwa njenge-MIF Generation Option

I-IOPLL IP Core Parameters - Ithebhu Yemingcele Ethuthukisiwe

Ithebula 5. I-IOPLL IP Core Parameters - Advanced Parameters Tab

Ipharamitha	Inani Lomthetho	Incazelo
Amapharamitha Athuthukile	—	Ibonisa ithebula lezilungiselelo ze-PLL ezingokoqobo ezizosetshenziswa ngokusekelwe kokufaka kwakho.

Incazelo Esebenzayo

• I-I/O PLL iwuhlelo lokulawula imvamisa ekhiqiza iwashi eliphumayo ngokuzivumelanisa lona newashi lokokufaka. I-PLL iqhathanisa umehluko wesigaba phakathi kwesiginali yokufaka kanye nesignali yokuphumayo yevolthitagi-e-controlled oscillator (VCO) bese yenza ukuvumelanisa kwesigaba ukuze kugcinwe i-engeli yesigaba engashintshi (ukukhiya) kumvamisa yokokufaka noma isiginali yereferensi. Ukuvumelanisa noma iluphu yempendulo engalungile yesistimu iphoqa i-PLL ukuthi ivalwe ngesigaba.
• Ungakwazi ukumisa ama-PLL njengeziphindaphindeki, abahlukanisi, ama-demodulators, amajeneretha okulandelela, noma amasekhethi okubuyisela iwashi. Ungasebenzisa ama-PLL ukuze ukhiqize amaza azinzile, ubuyisele amasiginali esiteshini sokuxhumana esinomsindo, noma usabalalise amasiginali wewashi kuyo yonke idizayini yakho.

Izakhiwo zokwakha ze-PLL

Amabhulokhi amakhulu e-I/O PLL isitshina samafrikhwensi esigaba (PFD), iphampu yokushaja, isihlungi seluphu, i-VCO, kanye nezinto zokubala, njengesibali sempendulo (M), isibali sangaphambi kwesikali (N), nezibali zangemuva kwesikali (C). Izakhiwo ze-PLL zincike kudivayisi oyisebenzisayo ekwakhiweni kwakho.

Le pharamitha itholakala kuphela uma Ukunika amandla i-Dynamic Phase Shift yokusakaza kwe-MIF kuvuliwe.

I-I/O PLL Architecture ejwayelekile

• Amagama alandelayo avame ukusetshenziswa ukuchaza ukuziphatha kwe-PLL:
  Isikhathi sokukhiya se-PLL—esaziwa nangokuthi isikhathi sokutholwa se-PLL. Isikhathi sokukhiya i-PLL yisikhathi sokuthi i-PLL ithole ubuningi obuqondiwe kanye nobudlelwano besigaba ngemva kokuqina, ngemva koshintsho oluhleliwe lokuphumayo, noma ngemva kokusetha kabusha i-PLL. Qaphela: Isofthiwe yokulingisa ayibonisi isikhathi sangempela sokukhiya i-PLL. Ukulingisa kukhombisa isikhathi sokukhiya esishesha ngokungenangqondo. Ukuze uthole imininingwane yangempela yesikhathi sokukhiya, bheka idatha yedatha yedivayisi.
• Isixazululo se-PLL—inani elincane lokwenyuka kwemvamisa ye-PLL VCO. Inani lamabhithi ezibalini ezingu-M kanye no-N linquma inani lokucaca kwe-PLL.
• I-PLL sample rate—i-FREF sampimvamisa ye-ling edingekayo ukwenza isigaba nemvamisa ukulungiswa ku-PLL. I-PLL sampisilinganiso ngu-fREF/N.

I-PLL Lock

Ilokhi ye-PLL incike kumasiginali wokufaka amabili kumtshina wamafrikhwensi wesigaba. Isignali yokukhiya iwukukhipha okungavumelaniyo kwama-PLL. Inani lemijikelezo edingekayo ukuze kungene isignali yokukhiya incike ewashini lokufaka le-PLL eliwashi lesekhethi yokukhiya. Hlukanisa umkhawulo wesikhathi sokukhiya se-PLL ngesikhathi sewashi lokufaka le-PLL ukuze ubale inani lemijikelezo yewashi elidingekayo ukuze kungene isignali yokukhiya.

Izindlela Zokusebenza

I-IOPLL IP core isekela izindlela eziyisithupha ezihlukene zokuphendula iwashi. Imodi ngayinye ivumela ukuphindaphindeka nokuhlukaniswa kwewashi, ukushintshwa kwesigaba, kanye nezinhlelo zomjikelezo womsebenzi.

Okukhipha Amawashi

• I-IOPLL IP core ingakhiqiza amasiginali afika kwayisishiyagalolunye. Amasiginali okukhipha iwashi akhiqiziwe avala umgogodla noma amabhulokhi angaphandle ngaphandle komnyombo.
• Ungasebenzisa isignali yokusetha kabusha ukuze usethe kabusha inani lewashi eliphumayo libe ngu-0 futhi ukhubaze amawashi okukhiphayo e-PLL.
• Iwashi ngalinye eliphumayo linesethi yezilungiselelo eziceliwe lapho ungacacisa khona amanani afiswayo efrikhwensi yokuphumayo, ukushintshwa kwesigaba, nomjikelezo womsebenzi. Izilungiselelo ozifisayo izilungiselelo ofuna ukuzisebenzisa ekwakhiweni kwakho.
• Amanani angempela emvamisa, ukushintshwa kwesigaba, kanye nomjikelezo womsebenzi yizilungiselelo eziseduze kakhulu (isilinganiso esihle kakhulu sezilungiselelo ezifiselekayo) ezingasetshenziswa kusekethe ye-PLL.

I-Reference Clock Switchover

Isici sokushintsha iwashi lereferensi sivumela i-PLL ukuthi ishintshe phakathi kwamawashi amabili okufaka okuyireferensi. Sebenzisa lesi sici ekuncishisweni kwewashi, noma ngohlelo lokusebenza lwesizinda samawashi amabili njengakusistimu. Isistimu ingavula iwashi elingasasebenzi uma iwashi eliyinhloko liyeka ukusebenza.
Usebenzisa isici sokushintshwa kwewashi lesithenjwa, ungacacisa imvamisa yewashi lokufaka lesibili, bese ukhetha imodi nokubambezeleka kokushintsha.

Ukutholwa kokulahleka kwewashi kanye nebhulokhi yokushintsha iwashi lereferensi inemisebenzi elandelayo:

• Iqapha isimo sewashi lesithenjwa. Uma iwashi lesithenjwa lihluleka, iwashi lizishintshela emthonjeni wokufaka wewashi eliyisipele. Iwashi libuyekeza isimo sezimpawu ze-clkbad ne-activeclk ukuze ixwayise umcimbi.
• Ishintsha iwashi lesithenjwa liye emuva naphambili phakathi kwamafrikhwensi amabili ahlukene. Sebenzisa isignali yokuvala ukuze ulawule isenzo sokushintsha mathupha. Ngemuva kokuthi kwenzeke ukushintshashintsha, i-PLL ingase ilahlekelwe ukukhiya okwesikhashana futhi idlule enqubweni yokubala.

I-PLL-to-PLL Cascading

Uma wehlisa ama-PLL ekwakhiweni kwakho, umthombo (okhuphuka nomfula) i-PLL kufanele ube nesilungiselelo somkhawulokudonsa ophansi, kuyilapho indawo (ephansi komfula) i-PLL kufanele ibe nesilungiselelo somkhawulokudonsa ophezulu. Phakathi nokukhishwa kwe-cascading, okukhiphayo komthombo we-PLL kusebenza njengewashi lesithenjwa (okokufaka) kwendawo okuyiwa kuyo ye-PLL. Izilungiselelo zomkhawulokudonsa wama-PLL acashile kufanele ahluke. Uma amasethingi omkhawulokudonsa wama-PLL acashile afana, ama-PLL acashile angase ampkhulisa umsindo wesigaba kumaza athile.Umthombo wewashi lokufaka i-adjpllin usetshenziselwa ukwehla phakathi kwama-PLL amafractional angama-fracturable.

Amachweba

Ithebula 6. I-IOPLL IP Core Ports

Ipharamitha	Uhlobo	Isimo	Incazelo
refclk	Okokufaka	Kudingeka	Umthombo wewashi lesithenjwa oshayela i-I/O PLL.
okokuqala	Okokufaka	Kudingeka	Imbobo yokusetha kabusha engavumelanisiwe yamawashi okukhiphayo. Shayela lesi mbobo phezulu ukuze usethe kabusha wonke amawashi okukhiphayo abe inani elingu-0. Kufanele uxhume le mbobo kusiginali yokulawula yomsebenzisi.
fbclk	Okokufaka	Ongakukhetha	Imbobo yokufaka yempendulo yangaphandle ye-I/O PLL. I-IOPLL IP core idala le mbobo lapho i-I/O PLL isebenza kumodi yempendulo yangaphandle noma imodi yebhafa yokulibaziseka okuyiziro. Ukuze uqedele iluphu yempendulo, uxhumano lweleveli yebhodi kufanele luxhume imbobo ye-fbclk kanye nembobo yewashi yangaphandle ye-I/O PLL.
fboutclk	Okukhiphayo	Ongakukhetha	Imbobo ephakela imbobo ye-fbclk ngomjikelezo wokulingisa. Imbobo ye-fboutclk itholakala kuphela uma i-I/O PLL ikumodi yempendulo yangaphandle.
zdbfbclk	I-Bidirectional	Ongakukhetha	Imbobo eqondiswa kabili exhuma kumjikelezo wokulingisa. Le mbobo kufanele ixhume kuphinikhodi eqondiswe kabili ebekwe ephini lokuphuma elizinikele lempendulo ye-I/O PLL. Imbobo ye-zdbfbclk itholakala kuphela uma i-I/O PLL ikumodi yebhafa yokulibaziseka okuyiziro. Ukuze ugweme ukuboniswa kwesignali uma usebenzisa imodi yebhafa yokulibaziseka okuyiziro, ungabeki ukulandelelwa kwebhodi kuphinikhodi ye-I/O eqondiswa kabili.
kukhiyiwe	Okukhiphayo	Ongakukhetha	I-IOPLL IP core ishayela le mbobo phezulu lapho i-PLL ithola ukukhiya. Ichweba lihlala liphezulu inqobo nje uma i-IOPLL ivaliwe. I-I/O PLL igomela ngembobo ekhiyiwe lapho izigaba namafrikhwensi ewashi lesithenjwa kanye newashi lempendulo kuyi-
waqhubeka...

Ipharamitha	Uhlobo	Isimo	Incazelo
			okufanayo noma ngaphakathi kokubekezelelana kwesifunda sokukhiya. Uma umehluko phakathi kwamasiginali wewashi amabili udlula ukubekezelelana kwesekhethi yokukhiya, i-I/O PLL ilahlekelwa ukukhiya.
refclk1	Okokufaka	Ongakukhetha	Umthombo wewashi lereferensi lesibili oshayela i-I/O PLL yesici sokushintsha iwashi.
susa	Okokufaka	Ongakukhetha	Isho ukuthi isignali yokuvala iphansi iphansi (1'b0) okungenani imijikelezo yewashi emi-3 ukuze ushintshe iwashi mathupha.
activeclk	Okukhiphayo	Ongakukhetha	Isignali yokuphumayo yokukhombisa ukuthi yimuphi umthombo wewashi lesithenjwa osetshenziswa yi-I/O PLL.
clkbad	Okukhiphayo	Ongakukhetha	Isignali yokuphumayo ebonisa isimo somthombo wewashi lesithenjwa sihle noma sibi.
i-cascade_out	Okukhiphayo	Ongakukhetha	Isignali yokuphumayo ephakela ku-I/O PLL engezansi.
adjpllin	Okokufaka	Ongakukhetha	Isignali yokokufaka ephakelayo kusuka ku-I/O PLL ekhuphukayo.
outclk_[]	Okukhiphayo	Ongakukhetha	Iwashi lokukhiphayo kusuka ku-I/O PLL.

I-IOPLL Intel FPGA IP Core User Guide Izingobo zomlando

Uma inguqulo ye-IP eyinhloko ingekho ohlwini, umhlahlandlela womsebenzisi wenguqulo yangaphambilini ye-IP iyasebenza

Inguqulo ye-IP Core	Umhlahlandlela Womsebenzisi
17.0	I-Altera I/O Phase-Locked Loop (Altera IOPLL) IP Core User Guide
16.1	I-Altera I/O Phase-Locked Loop (Altera IOPLL) IP Core User Guide
16.0	I-Altera I/O Phase-Locked Loop (Altera IOPLL) IP Core User Guide
15.0	I-Altera I/O Phase-Locked Loop (Altera IOPLL) IP Core User Guide

Umlando Wokubuyekezwa Kwedokhumenti we-IOPLL Intel FPGA IP Core User Guide

Inguqulo Yedokhumenti	Intel Quartus® Prime Version	Izinguquko
2019.06.24	18.1	Kubuyekezwe incazelo yokokufaka kwewashi ku- I-I/O PLL Architecture ejwayelekile umdwebo.
2019.01.03	18.1	• Kubuyekezwe i Ukufinyelela kumbobo yokukhiphayo ye-PLL LVDS_CLK/LOADEN ipharamitha ku I-IOPLL IP Core Parameters - Ithebhu Yezilungiselelo itafula. • Kubuyekezwe incazelo yembobo ye-zdbfbclk ku- Izimbobo ze-IOPLL IP Core itafula.
2018.09.28	18.1	• Kulungiswe incazelo ye-extwitch ku- Izimbobo ze-IOPLL IP Core itafula. • Kuqanjwe kabusha ama-IP cores alandelayo njengokuklanywa kabusha kwe-Intel: - Kushintshwe i-Altera IOPLL IP core yaba yi-IOPLL Intel FPGA IP core. - Kushintshwe i-Altera PLL Reconfig IP core ukuze i-PLL Reconfig Intel FPGA IP core. - Kushintshwe i-Arria 10 FPLL IP core yaba yi-fPLL Intel Arria 10/Cyclone 10 FPGA IP core.

Usuku	Inguqulo	Izinguquko
Juni 2017	2017.06.16	• Usekelo olungeziwe lwamadivayisi e-Intel Cyclone 10 GX. • Iqanjwe kabusha njenge-Intel.
Disemba 2016	2016.12.05	Kubuyekezwe incazelo yembobo yokuqala ye-IP core.
Juni 2016	2016.06.23	• I-IP Core Parameters ebuyekeziwe - Ithebula lethebhu yezilungiselelo. - Kubuyekezwe incazelo ye-Manual Switchover kanye ne-Othomathikhi Switchover ngamapharamitha okukhipha ngesandla. Isignali yokulawula ukushintshwa kwewashi iyasebenza iphansi. - Kubuyekeziwe incazelo yepharamitha ye-Switchover Delay. • Izibali ezichaziwe zika-M no-C zepharamitha Yokukhetha Ikhawunta ye-DPS kumapharamitha angu-IP Core – Ithebula le-Dynamic Reconfiguration Tab. • Kushintshwe igama lembobo yokushintsha iwashi lisuka ku-clkswitch liye ku-extwitch kumdwebo Ojwayelekile we-I/O PLL Architecture.
Meyi 2016	2016.05.02	I-IP Core Parameters ebuyekeziwe - Ithebula le-Dynamic Reconfiguration Tab.
Meyi 2015	2015.05.04	Kubuyekezwe incazelo yokunika amandla ukufinyelela kupharamitha yembobo yokuphuma ye-PLL LVDS_CLK/LOADEN kuma-IP Core Parameters - Ithebula lethebhu Yezilungiselelo. Kwengezwe isixhumanisi ku-Signal Interface Phakathi kwe-Altera IOPLL ne-Altera LVDS SERDES IP Cores ithebula ku-I/O kanye ne-High Speed ​​I/O ku-Arria 10 Devices isahluko.
Agasti 2014	2014.08.18	Ukukhishwa kokuqala.

Amadokhumenti / Izinsiza

Intel UG-01155 IOPLL FPGA IP Core [pdf] Umhlahlandlela Womsebenzisi UG-01155 IOPLL FPGA IP Core, UG-01155, IOPLL FPGA IP Core, FPGA IP Core

Izithenjwa

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