Xilinx AXI4-Stream Integrated Logic Analyzer Guide

The Integrated Logic Analyzer (ILA) e nang le AXI4-Stream Interface core ke IP e ka sebelisoang ho lekola matšoao a kahare le marang-rang a moralo. Koko ea ILA e kenyelletsa likarolo tse ngata tse tsoetseng pele tsa bahlahlobisisi ba sejoale-joale ba logic, ho kenyeletsoa li-equation tsa boolean trigger le li-trigger tsa phetoho. Konokono e boetse e fana ka ts'ebetso ea ho lokisa bothata le bokhoni ba ho beha leihlo hammoho le ho lekola protocol bakeng sa AXI e kenyellelitsoeng mohopolong le AXI4-Stream. Hobane motheo oa ILA o lumellana le moralo o shebiloeng, lithibelo tsohle tsa lioache tse kentsoeng moralong oa hau le tsona li sebelisoa ho likarolo tsa mantlha tsa ILA. Ho lokisa li-interfaces ka har'a moralo, ILA IP e hloka ho kenyelletsoa ho moralo oa block ho Vivado® IP integrator. Ka mokhoa o ts'oanang, khetho ea ho hlahloba protocol ea AXI4/AXI4-Stream e ka nolofalloa bakeng sa ILA IP ho sehokelo sa IP. Litlolo tsa Protocol li ka hlahisoa ka sebopeho sa wave viewer ea Vivado logic analyzer.

Likaroloana

Nomoro e ka khethoang ke mosebelisi ea li-ports tsa probe le bophara ba probe.

Lipheo tsa polokelo tse ka khethoang ke basebelisi joalo ka block RAM le UltraRAM
Likou tse ngata tsa li-probe li ka kopanngoa ho ba boemo bo le bong ba trigger.

Li-slots tsa AXI tse khethiloeng ke basebelisi ho lokisa li-interface tsa AXI ka moralo.
Likhetho tse hlophisehang bakeng sa likhokahano tsa AXI tse kenyelletsang mefuta ea li-interface le trace sample botebo.

Lintlha le thepa ea ho qala bakeng sa lipatlisiso.
Lipapiso tse 'maloa le bophara ba phuputso e' ngoe le e 'ngoe le likou tse ikemetseng ka har'a likhokahano.

Likhokahano tsa ho kenya / sephetho tse fapaneng.
Liphaephe tse hlophisehang bakeng sa lisebelisoa tsa ho kenya.

Ho hlahloba protocol ea AXI4-MM le AXI4-Stream.

Bakeng sa tlhaiso-leseling e batsi mabapi le motheo oa ILA, bona Tataiso ea Mosebelisi ea Vivado Design Suite: Programming and Debugging (UG908).

Lintlha tsa IP

Lethathamo la Lintlha tsa IP tsa LogiCORE™
Lintlha tsa mantlha
Lelapa la Sesebelisoa se Tšehetsoeng1	Versal™ ACAP
Li-interfaces tse tšehelitsoeng	IEEE Standard 1149.1 – JTAG
E fanoe ka Core
Moralo Files	RTL
Example Design	Verilog
Bench ea liteko	Ha e fanoe
Litšitiso File	Xilinx® Design Constraints (XDC)
Mohlala oa ketsiso	Ha e fanoe
S/W Driver e tšehelitsoeng	N/A
Moqapi o Lekiloeng oa Phalla2
Keno ea Moqapi	Vivado® Design Suite
Ketsiso	Bakeng sa li-simulator tse tšehelitsoeng, bona Xilinx Design Tools: Release Notes Guide.
Synthesis	Vivado Synthesis
Tšehetso
All Vivado IP Change Logs	Master Vivado IP Change Logs: 72775
Tšehetso ea Xilinx web leqephe
Lintlha: 1. Bakeng sa lenane le felletseng la lisebelisoa tse tšehetsoeng, bona lethathamo la libuka la Vivado® IP. 2. Bakeng sa liphetolelo tse tšehetsoeng tsa lisebelisoa, bona Xilinx Design Tools: Release Notes Guide.

Fetileview

Ho Tsamaisa Litaba ka Mokhoa oa Moqapi
Litokomane tsa Xilinx® li hlophisitsoe ho pota-pota mekhoa e tloaelehileng ea meralo ho u thusa ho fumana litaba tse loketseng mosebetsi oa hau oa hajoale oa nts'etsopele. Tokomane ena e akaretsa mekhoa e latelang ea moralo:

Ntlafatso ea Hardware, IP, le Platform: Ho theha li-blocks tsa PL IP bakeng sa sethala sa lisebelisoa, ho theha li-kernels tsa PL, papiso ea ts'ebetso ea subsystem, le ho lekola nako ea Vivado®, tšebeliso ea lisebelisoa le ho koaloa ha matla. E boetse e kenyelletsa ho theha sethala sa hardware bakeng sa ho kopanya tsamaiso. Lihlooho tse tokomaneng ena tse sebetsang tšebetsong ena ea moralo li kenyelletsa:
Litlhaloso tsa Port

Ho koala le ho tsosolosa
Ho Itloaetsa le ho Hlahisa Core

Core Overview
Lipontšo le likhokahano moralong oa FPGA li hokahane le probe ea ILA le li-slot inputs. Lipontšo tsena le likhokahano, tse khomaretsoeng ho probe le slots ka ho latellana, ke sampe etelletsoe pele ka lebelo la moralo mme e bolokoe ho sebelisoa on-chip block RAM. Lipontšo le likhokahano moralong oa Versal™ ACAP li hokahane le probe ea ILA le lintho tse kenang. Lipontšo tsena tse khomaretsoeng le li-interfaces ke sampe etelletsoe pele ka lebelo la moralo o sebelisa ts'ebetso ea oache ea mantlha mme e bolokoe mehopolong ea RAM ea on-chip block. Li-parameter tsa mantlha li totobatsa tse latelang:

Palo ea li-probes (ho fihla ho 512) le bophara ba probe (1 ho isa ho 1024).

Li-slots tse ngata le likhetho tsa sehokelo.
Trace sample botebo.

Lintlha le/kapa qala thepa bakeng sa lipatlisiso.
Palo ea libapiso bakeng sa probe ka 'ngoe.

Puisano le motheo oa ILA e etsoa ho sebelisoa mohlala oa AXI Debug Hub e hokelang ho Control, Interface, and Processing System (CIPS) IP core.

Kamora hore moralo o kenngoe ho Versal ACAP, sebelisa software ea Vivado® logic analyzer ho theha ketsahalo ea trigger bakeng sa tekanyo ea ILA. Ka mor'a hore sesosa se hlahe, sample buffer e tlatsitsoe ebe e kenngoa ho Vivado logic analyzer. U ka khona view data ena e sebelisa fensetere ea waveform. Tlhahlobo ea sampts'ebetso ea le le trigger e kengoa ts'ebetsong sebakeng sa logic se hlophisitsoeng. Memori ea on-chip block RAM kapa UltraRAM e ipapisitse le sepheo sa polokelo eo u e khethileng nakong ea ho e etsa e bolokang data ho fihlela e kentsoe ke software. Ha ho tlhahiso ea mosebelisi kapa tlhahiso e hlokehang ho qala liketsahalo, ho hapa data, kapa ho buisana le motheo oa ILA. ILA mantlha e khona ho beha leihlo matšoao a boemo ba sebopeho, e ka fetisa tlhaiso-leseling ea boemo ba transaction joalo ka litšebelisano tse hlahelletseng tsa li-interface tsa AXI4.

ILA Probe Trigger Comparator
Kenyelletso e 'ngoe le e' ngoe ea probe e hokahane le "trigger comparator" e khonang ho etsa lits'ebetso tse fapaneng. Ka nako e mathang sebapisi se ka hlophisoa ho etsa = kapa != papiso. Sena se kenyelletsa mekhoa ea boemo bo tšoanang, joalo ka X0XX101. E boetse e kenyelletsa ho lemoha liphetoho tse kang ho phahama (R), moeli o oelang (F), ebang ke moeli (B), kapa ha ho na phetoho (N). Moetsi oa li-trigger a ka etsa lipapiso tse rarahaneng, ho kenyelletsa >, <, ≥, le ≤.

BOHLOKOA! Papiso e behiloe ka nako ea ho sebetsa ka Vivado® logic analyzer.

Boemo ba ILA Trigger
Boemo ba sesosa ke phello ea lipalo tsa Boolean "AND" kapa "OR" tsa sephetho se seng le se seng sa ILA probe trigger comparator. U sebelisa Vivado® logic analyzer, u khetha hore na "AND" u ka etsa lipatlisiso tsa bapisa kapa "OR" bona. Boemo ba "AND" bo baka ketsahalo e qalang ha lipapiso tsohle tsa ILA li khotsofetse. Boemo ba "OR" bo baka ketsahalo e qalang ha papiso efe kapa efe ea ILA ea probe e khotsofetse. Boemo ba trigger ke ketsahalo ea trigger e sebelisetsoang tekanyo ea trace ea ILA.

Lisebelisoa

Koko ea ILA e etselitsoe ho sebelisoa ts'ebelisong e hlokang ho netefatsoa kapa ho e lokisa ka Vivado®. Setšoantšo se latelang se bontša CIPS IP core e ngola le ho bala ho tloha ho AXI thibela molaoli oa RAM ka AXI Network on Chip (NoC). Konokono ea ILA e hokahane le marang-rang a marang-rang pakeng tsa AXI NoC le AXI thibela molaoli oa RAM ho shebella transaction ea AXI4 ho mookameli oa hardware.

Ho fana ka laesense le ho odara
Mojule ona oa Xilinx® LogiCORE™ IP o fanoe ntle ho tefo ka Xilinx Vivado® Design Suite tlas'a maemo a License ea Mosebelisi oa Qetello ea Xilinx.
Hlokomela: Ho netefatsa hore o hloka laesense, sheba kholomo ea License ea IP Catalog. Ho kenyelelitsoe ho bolela hore laesense e kenyelelitsoe ho Vivado® Design Suite; Ho reka ho bolela hore o tlameha ho reka laesense ho sebelisa mantlha. Lintlha tse mabapi le li-module tse ling tsa Xilinx® LogiCORE™ IP li fumaneha leqepheng la Xilinx Intellectual Property. Ho fumana leseli mabapi le litheko le ho fumaneha ha li-module le lisebelisoa tse ling tsa Xilinx LogiCORE IP, ikopanye le moemeli oa hau oa lehae oa Xilinx.

Tlhaloso ea Sehlahisoa

Litlhaloso tsa Port
Litafole tse latelang li fana ka lintlha tse mabapi le likou tsa ILA le liparamente.
ILA Boema-kepe

Lethathamo la 1: ILA Boema-kepe
Lebitso la Port	I/O	Tlhaloso
clk	I	Oache ea moralo e tsamaisang lioache tsohle le mohopolo oa polokelo.
hlahloba [ – 1:0]	I	Lekola tlhahiso ea port. Nomoro ea probe port e maemong a ho tloha ho 0 ho isa ho 511. Bophara ba kou ea probe (e bontšitsoeng ke ) e maemong a 1 ho isa ho 1024. U tlameha ho phatlalatsa boema-kepe bona e le vector. Bakeng sa 1-bit port, sebelisa probe [0:0].
trig_out	O	Boema-kepe ba trig_out bo ka hlahisoa ho tsoa ho boemo ba trigger kapa ho tsoa boema-kepe ba kantle ba trig_in. Ho na le taolo ea nako e tsoang ho Logic Analyzer ho switjha lipakeng tsa boemo ba trigger le trig_in ho khanna trig_out.
trig_in	I	Kou ea ho kenya letsoho e sebelisitsoeng tsamaisong e thehiloeng ho Embedded Cross Trigger. E ka hokahana le ILA e 'ngoe ho theha Cascading Trigger.
sekotjana_ _	I	segokanyimmediamentsi sa sebolokigolo. Mofuta oa sebopeho e entsoe ka matla ho latela slot_ _ parameter ea mofuta oa interface. Likou tsa motho ka mong ka har'a li-interfaces li teng bakeng sa ho hlahlojoa ho mookameli oa hardware.
trig_out_ack	I	Keletso ea ho trig_out.
trig_in_ack	O	Keletso ea ho kenya_kenya.
resetn	I	ILA Input Type ha e setetsoe ho 'Interface Monitor', kou ena e lokela ho ba letšoao le ts'oanang la ho seta bocha le lumellanang le moralo oa moralo o hoketsoeng ho Slot_ _ likou tsa mantlha tsa ILA.
S_AXIS	I/O	Boema-kepe ba boikhethelo. E sebelisoa bakeng sa khokahanyo ea matsoho le AXI Debug Hub core ha 'Enable AXI4- Stream Interface for Manul Connection to AXI Debug Hub' e khethoa ho Likhetho tse Tsoetseng Pele.
M_AXIS	I/O	Boema-kepe ba boikhethelo. E sebelisoa bakeng sa ho hokahanya ka letsoho le AXI Debug Hub core ha 'Enable AXI4- Stream Interface for Manual Connection to AXI Debug Hub' e khethoa ho 'Advanced Options'.

Lethathamo la 1: ILA Boema-kepe (tsoela pele)
Lebitso la Port	I/O	Tlhaloso
aresetn	I	Boema-kepe ba boikhethelo. E sebelisoa bakeng sa ho hokahanya ka letsoho le AXI Debug Hub core ha 'Enable AXI4- Stream Interface for Manual Connection to AXI Debug Hub' e khethoa ho 'Advanced Options'. Boema-kepe bona bo lokela ho lumellana le boema-kepe ba ho seta bocha ba AXI Debug Hub.
aclk	I	Boema-kepe ba boikhethelo. E sebelisoa bakeng sa ho hokahanya ka letsoho le AXI Debug Hub core ha 'Enable AXI4- Stream Interface for Manual Connection to AXI Debug Hub' e khethoa ho 'Advanced Options'. Boema-kepe bona bo lokela ho lumellana le kou ea oache ea AXI Debug Hub.

ILA Parameters

Lethathamo la 2: ILA Parameters
Paramethara	E lumelletsoe Litekanyetso	Melao ea Boits'oaro	Tlhaloso
Karolo_Lebitso	Khoele e nang le A–Z, 0–9, le _ (tlaase)	ila_0	Lebitso la karolo e netefalitsoeng.
C_NUM_OF_PROBES	1–512	1	Palo ea likou tsa ILA probe.
C_MEMORY_TYPE	0, 1	0	Sepheo sa polokelo bakeng sa data e nkiloeng. 0 e lumellana le block RAM 'me 1 e lumellana le UltraRAM.
C_DATA_DEPTH	1,024, 2,048, 4,096, 8,192, 16,384, 32,768, 65,536, 131,072	1,024	Botebo ba buffer ea polokelo. Nomoro ena e emetse boholo ba palo ea samptse ka bolokoang ka nako bakeng sa tlhahiso e 'ngoe le e 'ngoe ea lipatlisiso.
C_PROBE _BOBALA	1–1024	1	Bophara ba kou ea probe . Hokae ke boema-kepe ba lipatlisiso bo nang le boleng ho tloha ho 0 ho isa ho 1,023.
C_TRIGOUT_EN	Nnete/Bohata	LESHANO	E nolofalletsa ts'ebetso ea trig out. Ho sebelisoa li-ports trig_out le trig_out_ack.
C_TRIGIN_EN	Nnete/Bohata	LESHANO	E nolofalletsa trig ts'ebetsong. Ho sebelisoa li-ports trig_in le trig_in_ack.
C_INPUT_PIPE_STAGES	0–6	0	Kenya li-flops tse eketsehileng ho li-ports tsa probe. Paramethara e le 'ngoe e sebetsa ho likou tsohle tsa probe.
ALL_PROBE_SAME_MU	Nnete/Bohata	'NETE	Sena se qobella palo e tšoanang ea boleng (li-unit tsa papali) ho li-probes tsohle.
C_PROBE _MU_CNT	1–16	1	Palo ea li-unit tsa Bapisa Boleng (Match) probe ka 'ngoe. Sena se sebetsa ha feela ALL_PROBE_SAME_MU e le FALSE.
C_PROBE _MOFUTA	DATA le TRIGGER, TRIGGER, DATA	DATA le TRIGGER	Ho khetha probe e khethiloeng bakeng sa ho hlakisa boemo ba sesosa kapa molemong oa polokelo ea data kapa ka bobeli.
C_ADV_TRIGGER	Nnete/Bohata	LESHANO	E nolofalletsa khetho ea ho qala pele. Sena se nolofalletsa mochini oa "trigger state" mme o ka ngola tatellano ea hau ea "trigger" ho Vivado Logic Analyzer.

Lethathamo la 2: ILA Parameters (tsoela pele)
Paramethara	E lumelletsoe Litekanyetso	Melao ea Boits'oaro	Tlhaloso
C_NUM_MONITOR_SLOTS	1-11	1	Nomoro ea Interface Slots.
Lintlha: 1. Palo e phahameng ea palo ea ho bapisa boleng (match) e lekanyelitsoe ho 1,024. Bakeng sa mohloli oa motheo (C_ADV_TRIGGER = FALSE), probe ka 'ngoe e na le palo e le 'ngoe ea boleng (joaloka phetolelong ea pejana). Empa bakeng sa khetho ea pele ea trigger (C_ADV_TRIGGER = TRUE), sena se bolela hore li-probes ka bomong li ntse li ka ba le khetho ea palo ea li-unit tsa boleng ho tloha ho e 'ngoe ho isa ho tse' nè. Empa likarolo tsohle tsa boleng ha lia lokela ho feta 1,024. Sena se bolela, haeba o hloka li-unit tse 'ne tsa ho bapisa ka mokhoa o mong le o mong, joale u lumelloa ho sebelisa li-probes tse 256 feela.

Ho theha le Core

Karolo ena e kenyelletsa litataiso le tlhaiso-leseling e eketsehileng ho thusa ho rala ka mantlha.

Tsupa nako
Sebaka sa ho kenya clk ke oache e sebelisoang ke mantlha ea ILA ho ngolisa litekanyetso tsa probe. Bakeng sa liphetho tse ntle, e lokela ho ba lets'oao le ts'oanang la oache le lumellanang le mohopolo oa moralo o hoketsoeng likoung tsa probe tsa mantlha tsa ILA. Ha o hokela ka letsoho le AXI Debug Hub, lets'oao la aclk le lokela ho lumellana le boema-kepe ba oache ea AXI Debug Hub.

Bafuputsi
Ha o seta Mofuta oa Input oa ILA ho Interface Monitor, seta boema-kepe e lokela ho ba lets'oao le ts'oanang la ho seta bocha le lumellanang le mohopolo oa moralo oo sebopeho sa ona se hokelletsoeng ho ona.
sekotjana_ _ koung ea mantlha ea ILA. Bakeng sa khokahanyo ka letsoho le konokono ea AXI Debug Hub, boema-kepe ba hona joale bo lokela ho hokahanngoa le kou e setang bocha ea AXI Debug Hub core.

Mehato ea Phallo ea Moralo
Karolo ena e hlalosa ho iketsetsa le ho hlahisa motheo, ho thibela motheo, le ho etsisa, ho kopanya, le ho kenya ts'ebetsong mehato e tobileng ho motheo ona oa IP. Lintlha tse ling mabapi le phallo e tloaelehileng ea moralo oa Vivado® le sehokahanyi sa IP li ka fumanoa ho litataiso tse latelang tsa Vivado Design Suite:

Tataiso ea Mosebelisi ea Vivado Design Suite: Ho rala litsamaiso tsa IP tse sebelisang IP Integrator (UG994)
Tataiso ea Mosebelisi ea Vivado Design Suite: Ho rala ka IP (UG896)
Tataiso ea Mosebelisi ea Vivado Design Suite: Ho Qala (UG910)
Tataiso ea Mosebelisi ea Vivado Design Suite: Ketsiso e utloahalang (UG900)

Ho Itloaetsa le ho Hlahisa Core

Karolo ena e kenyelletsa tlhahisoleseling mabapi le ho sebelisa lisebelisoa tsa Xilinx® ho iketsetsa le ho hlahisa mantlha ho Vivado® Design Suite. Haeba u iketsetsa le ho hlahisa mantlha ho Vivado IP integrator, bona Vivado Design Suite User Guide: Ho theha IP Subsystems u sebelisa IP Integrator (UG994) bakeng sa lintlha tse qaqileng. Mohokahanyi oa IP a ka ipapisa le litekanyetso tse itseng tsa tlhophiso ha a netefatsa kapa a hlahisa moralo. Ho hlahloba hore na litekanyetso lia fetoha, bona tlhaloso ea paramethara khaolong ena. Ho view boleng ba parameter, tsamaisa taelo ea validate_bd_design ho Tcl console. U ka etsa IP ea hau hore e sebelisoe moralong oa hau ka ho hlakisa boleng bakeng sa liparamente tse fapaneng tse amanang le motheo oa IP u sebelisa mehato e latelang:

Khetha IP ho tsoa lethathamong la IP.
Tobetsa habeli IP e khethiloeng kapa khetha Customize IP taelo ho toolbar kapa tobetsa ka ho le letona ho menu.

Bakeng sa lintlha, bona Tataiso ea Mosebelisi ea Vivado Design Suite: Ho Rala ka IP (UG896) le Tataiso ea Mosebelisi ea Vivado Design Suite: Ho Qala (UG910). Lipalo tse khaolong ena ke lipapiso tsa Vivado IDE. Ponahalo e bontšitsoeng mona e kanna ea fapana ho latela mofuta oa hajoale.

Ho fihlella core, etsa tse latelang:

Bula morero ka ho khetha File ebe Open Project kapa theha morero o mocha ka ho khetha File ebe New Project e Vivado.
Bula lethathamo la li-IP ebe u ea ho efe kapa efe ea li-taxonomies.

Tobetsa habeli ILA ho hlahisa lebitso la mantlha la Vivado IDE.

Kakaretso Dikgetho Panel
Setšoantšo se latelang se bonts'a tab ea Likhetho tse Akaretsang sebakeng sa Native se u lumellang ho hlakisa likhetho:

Setšoantšo se latelang se bonts'a tabo ea Likhetho tse Akaretsang ho tlhophiso ea AXI e u lumellang ho hlakisa likhetho:

Lebitso la Karolo: Sebelisa sebaka sena sa mongolo ho fana ka lebitso le ikhethileng la mojule bakeng sa mantlha oa ILA.

Mofuta oa Input oa ILA: Khetho ena e bolela hore na ke mofuta ofe oa sebopeho kapa lets'oao la ILA le lokelang ho lokisa liphoso. Hajoale, boleng ba paramente ena ke "Native Probes", "Interface Monitor" le "Mixed."
Palo ea Li-Probes: Sebelisa sebaka sena sa mongolo ho khetha palo ea li-ports tsa probe mokokotlong oa ILA. Sebaka se nepahetseng se sebelisoang ho Vivado® IDE ke 1 ho ea ho 64. Haeba u hloka li-ports tse fetang 64 tsa li-probe, u lokela ho sebelisa taelo ea Tcl e phallang ho hlahisa motheo oa ILA.
Palo ea Interface Slots (e fumaneha feela ka mofuta oa Interface Monitor le mofuta oa Mixed): Khetho ena e u lumella ho khetha palo ea li-interface tsa AXI tse hlokang ho hokahanngoa le ILA.

Palo e Tšoanang ea Li-Comparators bakeng sa Boema-kepe Bohle ba Probe: Palo ea bapisanisi ka probe e ka hlophisoa phanele ena. Palo e ts'oanang ea lipapiso bakeng sa li-probes tsohle e ka nolofalloa ka ho khetha.

Probe Port Panels
Setšoantšo se latelang se bonts'a tabo ea Probe Ports e u lumellang ho hlakisa litlhophiso:

Probe Port Panel: Bophara ba Probe Port ka 'ngoe bo ka hlophisoa ho Probe Port Panels. E 'ngoe le e' ngoe ea Probe Port Panel e na le likou tse fihlang ho tse supileng.
Probe Width: Bophara ba Probe Port ka 'ngoe bo ka boleloa. Sebaka se nepahetseng ke 1 ho isa ho 1024.
Palo ea Li-Comparators: Khetho ena e lumelloa feela ha khetho ea "Palo e Tšoanang ea Li-Comparators for All Probe Ports" e holofetse. Ho ka hlophisoa sebapi bakeng sa probe ka 'ngoe lipakeng tsa 1 ho isa ho 16.

Lintlha le / kapa Trigger: Mofuta oa probe bakeng sa probe ka 'ngoe e ka hlophisoa ho sebelisoa khetho ena. Likhetho tse nepahetseng ke DATA_le_TRIGGER, DATA le TRIGGER.
Likhetho tsa ho bapisa: Mofuta oa ts'ebetso kapa papiso ea probe ka 'ngoe e ka hlophisoa ho sebelisoa khetho ena.

Dikgetho tsa Sebopeho
Palo e latelang e bonts'a tabo ea Likhetho tsa Sebopeho ha Interface Monitor kapa mofuta oa Mixed o khethoa bakeng sa mofuta oa ho kenya oa ILA:

Mofuta oa Sehokelo: Morekisi, Laeborari, Lebitso, le Phetolelo (VLNV) ea sebopeho se lokelang ho beoa leihlo ke mantlha ea ILA.
Bophara ba ID ea AXI-MM: E khetha bophara ba ID ea sebopeho sa AXI ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.

AXI-MM Data Width: E khetha liparamente tse tsamaellanang le slot_Selects bophara ba data ba sebopeho sa AXI ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Bophara ba Aterese ea AXI-MM: E khetha bophara ba Aterese ea sebopeho sa AXI ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Numella AXI-MM/Stream Protocol Checker: E nolofalletsa tlhahlobo ea protocol ea AXI4-MM kapa AXI4-Stream bakeng sa slot ha slot_ mofuta oa sebopeho o hlophisitsoe joalo ka AXI-MM kapa AXI4-Stream, moo ke nomoro ea slot.

Numella Libali tsa ho Track Tracking: E nolofalletsa AXI4-MM mokhoa oa ho latedisa transaction.
Palo ea Lichelete tse Tsoetseng Pele tse Baliloeng: E totobatsa palo ea litefiso tse saletseng tsa Read Read ID ka 'ngoe. Theko e lokela ho lekana kapa e kholo ho feta palo ea litefiso tse setseng tsa Read bakeng sa khokahano eo.
Palo ea Lichelete tse sa Lebelloang tsa ho Ngola: E hlalosa palo ea lipehelo tse saletseng tsa Ngola ID ka 'ngoe. Theko e lokela ho lekana kapa e kholo ho feta palo ea Ngola e saletseng morao bakeng sa khokahano eo.

Lekola matshwao a Boemo ba APC: Etsa hore ho beholwe matshwao a boemo ba APC bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa mocha oa aterese oa AXI e le Lintlha: Khetha matšoao a aterese a bala bakeng sa morero oa polokelo ea data bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa mocha oa aterese oa AXI joalo ka Trigger: Khetha matšoao a ho bala a aterese bakeng sa ho hlakisa boemo ba sesosa sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.

Lokisa mocha oa data oa AXI e le Lintlha: Khetha matšoao a ho bala a kanale ea data molemong oa polokelo ea data bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa seteishene sa data sa AXI joalo ka Trigger: Khetha matšoao a ho bala a kanale ea data bakeng sa ho hlakisa maemo a ho qala bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa mocha oa aterese oa AXI joalo ka Lintlha: Khetha matšoao a aterese a aterese molemong oa polokelo ea data bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.

Lokisa mocha oa aterese oa AXI joalo ka Trigger: Khetha matšoao a aterese a aterese bakeng sa ho hlakisa maemo a qalang bakeng sa slot. ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa mocha oa data oa AXI joalo ka Lintlha: Khetha ngola matšoao a kanale ea data molemong oa polokelo ea data bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa mocha oa data oa AXI joalo ka Trigger: Khetha ho ngola matšoao a kanale ea data bakeng sa ho hlakisa boemo ba sesosa sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.

Lokisa mocha oa karabo oa AXI joalo ka Lintlha: Khetha ngola matšoao a kanale ea karabo molemong oa polokelo ea data bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
Lokisa mocha oa karabelo oa ho ngola oa AXI joalo ka Trigger: Khetha ho ngola matšoao a mocha oa karabo bakeng sa ho hlakisa boemo ba sesosa sa slot. ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-MM, moo ke nomoro ea slot.
AXI-Stream Tdata Width: E khetha bophara ba Tdata ba sebopeho sa AXI-Stream ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-Stream, moo ke nomoro ea slot.

AXI-Stream TID Width: E khetha bophara ba TID ba sebopeho sa AXI-Stream ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-Stream, moo ke nomoro ea slot.
AXI-Stream TUSER Width: E khetha bophara ba TUSER ba sebopeho sa AXI-Stream ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-Stream, moo ke nomoro ea slot.
AXI-Stream TDEST Width: E khetha bophara ba TDEST ba sebopeho sa AXI-Stream ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-Stream, moo ke nomoro ea slot.

Lokisa Lipontšo tsa AXIS joalo ka Lintlha: Khetha matšoao a AXI4-Stream molemong oa polokelo ea data bakeng sa slot
ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-Stream moo ke nomoro ea slot.
Lokisa Lipontšo tsa AXIS joalo ka Sehlomathisi: Khetha matšoao a AXI4-Stream bakeng sa ho hlakisa boemo ba ho qala bakeng sa slot ha slot_ mofuta oa sehokelo o hlophisitsoe joalo ka AXI-Stream, moo ke nomoro ea slot.
Hlophisa Slot e le Data le/kapa Trigger: E khetha matshwao a sekotjana ao e seng AXI bakeng sa ho hlakisa boemo ba sesosa kapa molemong oa polokelo ea data kapa ka bobeli bakeng sa slot ha slot_ mofuta oa segokanyimmediamentsi sa sebolokigolo se hlophisitsoe joalo ka se seng sa AXI, moo ke nomoro ea slot.

Likhetho tsa polokelo
Setšoantšo se latelang se bontša tab ea Likhetho tsa polokelo e u lumellang ho khetha mofuta oa sepheo sa polokelo le botebo ba memori e tla sebelisoa:

Sepheo sa polokelo: Paramethara ena e sebelisetsoa ho khetha mofuta oa sepheo sa polokelo ho tsoa ho menu e theoha.

Botebo ba data: Paramethara ena e sebelisetsoa ho khetha sample botebo ho tloha ho menu e theoha.

Dikgetho tse tsoetseng pele
Setšoantšo se latelang se bontša tab ea Advanced Options:

Numella AXI4-Stream Interface bakeng sa Khokahano ea Manual ho AXI Debug Hub: Ha e nolofalitsoe, khetho ena e fana ka sebopeho sa AXIS bakeng sa IP ho hokela ho AXI Debug Hub.
Numella Sehokelo sa ho Kena sa Trigger: Sheba khetho ena ho bulela sebaka sa boikhethelo sa ho kenya se kenyang.
Numella Sehokelo sa Trigger Output: Sheba khetho ena ho etsa hore ho be le kou ea boikhethelo ea trigger.

Kenya Pipe Stages: Khetha palo ea lirekoto tseo u batlang ho li kenya bakeng sa lipatlisiso ho ntlafatsa liphetho tsa ts'ebetsong. Paramethara ena e sebetsa ho li-probes tsohle.
Advanced Trigger: Lekola ho nolofalletsa tatellano ea trigger e thehiloeng mochining oa mmuso.

Moloko oa Tlhahiso
Bakeng sa lintlha, bona Vivado Design Suite User Guide: Designing with IP (UG896).

Ho qoelisa Core

Litšitiso tse Hlokehang
Moko oa ILA o kenyelletsa XDC file e nang le litšitiso tse nepahetseng tsa tsela e fosahetseng ho thibela ho thijoa ho fetelletseng ha litsela tsa khokahano ea sebaka sa oache. Ho lebelletsoe hape hore lets'oao la oache le hokahantsoeng le boema-kepe ba clk ba mantlha ea ILA le hateletsoe ka nepo moralong oa hau.

Lisebelisoa, Pakete, le Likhetho tsa Kereiti ea Lebelo
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.

Maqhubu a oache
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.

Tsamaiso ea Tshupanako
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.
Ho beoa oache
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.
Banka
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.

Ho beoa ha Transceiver
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.
Maemo a I/O le Maemo
Karolo ena ha e sebetse bakeng sa setsi sena sa IP.

Ketsiso

Bakeng sa tlhaiso-leseling e batsi mabapi le likarolo tsa papiso ea Vivado®, hammoho le leseli mabapi le ho sebelisa lisebelisoa tsa mokha oa boraro tse tšehelitsoeng, bona Tataiso ea Mosebelisi ea Vivado Design Suite: Logic Simulation (UG900).

Tšimoloho le Phethahatso
Bakeng sa lintlha tse mabapi le ho kopanya le ho kenya ts'ebetsong, bona Tataiso ea Mosebelisi ea Vivado Design Suite: Ho Rala ka IP (UG896).

Ho lokisa liphoso

Sehlomathiso sena se kenyelletsa lintlha tse mabapi le lisebelisoa tse fumanehang ho Tšehetso ea Xilinx® websebaka le lisebelisoa tsa ho lokisa liphoso. Haeba IP e hloka senotlolo sa laesense, senotlolo se tlameha ho netefatsoa. Lisebelisoa tsa meralo ea Vivado® li na le libaka tse 'maloa tsa ho hlahloba laesense bakeng sa ho kenya IP e nang le laesense ka phallo. Haeba tlhahlobo ea laesense e atleha, IP e ka tsoela pele ho hlahisa. Ho seng joalo, moloko o emisa ka phoso. Libaka tsa tlhahlobo ea laesense li tiisetsoa ke lisebelisoa tse latelang:

Vivado Synthesis

Ts'ebetsong ea Vivado
ngola_bitstream (Tcl taelo)

BOHLOKOA! Boemo ba laesense ea IP bo hlokomolohuoa libakeng tsa tlhahlobo. Teko e tiisa hore laesense e nepahetseng e teng. Ha e hlahlobe boemo ba laesense ea IP.

Ho fumana thuso ho Xilinx.com

Ho thusa ho rala le ho lokisa liphoso ha u sebelisa mantlha, Tšehetso ea Xilinx web Leqephe le na le lisebelisoa tsa bohlokoa joalo ka litokomane tsa sehlahisoa, lintlha tsa tokollo, lirekoto tsa likarabo, tlhahisoleseling mabapi le litaba tse tsebahalang, le likhokahano tsa ho fumana tšehetso e eketsehileng ea sehlahisoa. Likopano tsa Sechaba tsa Xilinx le tsona lia fumaneha moo litho li ka ithutang, ho nka karolo, ho arolelana, le ho botsa lipotso mabapi le tharollo ea Xilinx.

Litokomane
Tataiso ena ea sehlahisoa ke tokomane e kholo e amanang le mantlha. Tataiso ena, hammoho le litokomane tse amanang le lihlahisoa tsohle tse thusang ts'ebetsong ea moralo, li ka fumanoa ho Tšehetso ea Xilinx. web leqepheng la kapa ka ho sebelisa Xilinx® Documentation Navigator. Khoasolla Xilinx Documentation Navigator ho tsoa leqepheng la Downloads. Ho fumana lintlha tse ling mabapi le sesebelisoa sena le likarolo tse teng, bula thuso ea inthanete ka mor'a ho kenya.

Araba Litlaleho
Litlaleho tsa Karabo li kenyelletsa lintlha tse mabapi le mathata a atisang ho kopana le ona, lintlha tse thusang mabapi le ho rarolla mathata ana, le litaba leha e le life tse tsejoang ka sehlahisoa sa Xilinx. Lirekoto tsa Karabo lia etsoa le ho hlokomeloa letsatsi le letsatsi ho netefatsa hore basebelisi ba fumana lintlha tse nepahetseng ka ho fetesisa tse fumanehang. Litlaleho tsa Karabo tsa motheo ona li ka fumanoa ka ho sebelisa lebokose la Tšehetso ea Batla ho tšehetso e kholo ea Xilinx web leqephe. Ho eketsa liphetho tsa lipatlisiso tsa hau, sebelisa mantsoe a bohlokoa joalo ka:

Lebitso la sehlahisoa
Melaetsa ea lisebelisoa
Kakaretso ea bothata boo re kopanang le bona

Patlisiso ea filthara e teng ka mor'a hore liphetho li khutlisetsoe molemong oa liphetho tse ling.

Tšehetso ea tekheniki
Xilinx e fana ka ts'ehetso ea tekheniki ho Xilinx Community Forums bakeng sa sehlahisoa sena sa LogiCORE™ IP ha se sebelisoa joalo ka ha se hlalositsoe tokomaneng ea sehlahisoa. Xilinx e ke ke ea tiisa nako, ts'ebetso, kapa tšehetso haeba u etsa e 'ngoe ea tse latelang:

Kenya ts'ebetsong tharollo lisebelisoa tse sa hlalosoang litokomaneng.

Iketsetse tharollo ho feta e lumelletsoeng litokomaneng tsa sehlahisoa.
Fetola karolo efe kapa efe ea moralo e ngotsoeng U SE KE UA FETOLA.

Ho botsa lipotso, ea ho Liforamo tsa Sechaba tsa Xilinx.

Lisebelisoa tse Eketsehileng le Litsebiso tsa Molao

Lisebelisoa tsa Xilinx
Bakeng sa lisebelisoa tsa tšehetso tse joalo ka Likarabo, Litokomane, Litjarollo, le Liforamo, bona Tšehetso ea Xilinx.

Navigator ea Litokomane le Litsi tsa Moqapi
Xilinx® Documentation Navigator (DocNav) e fana ka phihlello ea litokomane tsa Xilinx, livideo le lisebelisoa tsa tšehetso, tseo u ka li sefang le ho li batla ho fumana tlhaiso-leseling. Ho bula DocNav:

• Ho tswa ho Vivado® IDE, khetha Thuso → Litokomane le Lithuto.
• Ho Windows, khetha Qala → Mananeo Ohle → Xilinx Design Tools → DocNav.
• Ka taelo ea Linux, kenya docnav.

Xilinx Design Hubs e fana ka likhokahano tsa litokomane tse hlophisitsoeng ke mesebetsi ea moralo le lihlooho tse ling, tseo u ka li sebelisang ho ithuta mehopolo ea bohlokoa le ho araba lipotso tse botsoang khafetsa. Ho fihlella li-Design Hubs:

Ho DocNav, tobetsa Litsi tsa Moralo View tab ya.
Ka Xilinx websaeteng, bona leqephe la Design Hubs.

Hlokomela: Bakeng sa tlhaiso-leseling e batsi ka DocNav, bona leqephe la Documentation Navigator ho Xilinx websebaka.

Litšupiso
Litokomane tsena li fana ka lintlha tse tlatselletsang tse thusang ka tataiso ena:

Tataiso ea Mosebelisi ea Vivado Design Suite: Lenaneo le ho Debugging (UG908)

Tataiso ea Mosebelisi ea Vivado Design Suite: Ho rala ka IP (UG896)
Tataiso ea Mosebelisi ea Vivado Design Suite: Ho rala litsamaiso tsa IP tse sebelisang IP Integrator (UG994)
Tataiso ea Mosebelisi ea Vivado Design Suite: Ho Qala (UG910)

Tataiso ea Mosebelisi ea Vivado Design Suite: Ketsiso e utloahalang (UG900)
Tataiso ea Mosebelisi ea Vivado Design Suite: Ts'ebetsong (UG904)
ISE ho Vivado Design Suite Migration Guide (UG911)

Tataiso ea Sehlahisoa sa AXI Protocol LogiCORE IP (PG101)
Tataiso ea Lihlahisoa tsa AXI4-Stream Protocol Checker LogiCORE IP (PG145)

Nalane ea Phetoho
Lethathamo le latelang le bonts'a nalane ea ntlafatso ea tokomane ena.

Karolo	Kakaretso ea Phetoho
11/23/2020 Phetolelo ea 1.1
Tokollo ea pele.	N/A

Ka kopo Bala: Litsebiso tsa Bohlokoa tsa Molao
Lintlha tseo u li senoletsoeng mona ka tlase ("Lisebelisoa") li fanoe feela bakeng sa khetho le tšebeliso ea lihlahisoa tsa Xilinx. Ho isa tekanyong e lumelletsoeng ke molao o sebetsang: (1) Thepa e fumaneha "JOALOKAHA E LE" 'me ka liphoso tsohle, Xilinx mona E HLOKOMELA LITEKELETSO LE MAEMO TSOHLE, POLELOA, TSE BOLELANG, KAPA MOLAO, HO kenyeletsoa EMPA E SA FUMANA LITEKISO TSA MERCHANTABILITY, N. - TLHOKOMELISO, KAPA HO LOKELANG HO SEBELISA MORERO OA MANG KAPA MANG; le (2) Xilinx e ke ke ea ikarabella (ebang ke konteraka kapa tort, ho kenyelletsa ho se tsotelle, kapa tlas'a khopolo leha e le efe ea boikarabelo) bakeng sa tahlehelo leha e le efe kapa tšenyo ea mofuta ofe kapa ofe e amanang le, e hlahang tlas'a, kapa e amanang le, Thepa. (ho kenyeletsoa ts'ebeliso ea hau ea Thepa), ho kenyeletsoa tahlehelo efe kapa efe e tobileng, e sa tobang, e ikhethang, ea tšohanyetso, kapa ea litlamorao (ho kenyeletsoa tahlehelo ea data, phaello, kamohelo kapa mofuta ofe kapa ofe oa tahlehelo kapa tšenyo e bakiloeng ke ketso efe kapa efe e tlisoang. ke motho oa boraro) le haeba ts'enyehelo kapa tahlehelo e joalo e ne e ka bonoa esale pele kapa Xilinx a ne a elelitsoe ka monyetla oa ho ts'oana.

Xilinx ha e na tlamo ea ho lokisa liphoso leha e le life tse fumanehang ho Thepa kapa ho u tsebisa ka lintlafatso tsa Lisebelisoa kapa litlhaloso tsa sehlahisoa. O ka se hlahise hape, wa fetola, wa aba, kapa wa hlahisa Disebediswa phatlalatsa ntle le tumello e ngotsweng pele. Lihlahisoa tse ling li tlas'a lipehelo le maemo a waranti e lekanyelitsoeng ea Xilinx, ka kopo sheba Melao ea Thekiso ea Xilinx e ka bang teng. viewed ho https://www.xilinx.com/legal.htm#tos; Li-cores tsa IP li ka ba tlas'a tiisetso le lipehelo tsa tšehetso tse teng laesenseng eo u e filoeng ke Xilinx. Lihlahisoa tsa Xilinx ha lia etsoa kapa ha li reretsoe ho sireletseha kapa ho sebelisoa ts'ebelisong efe kapa efe e hlokang ts'ebetso e sireletsehileng; o nka kotsi e le 'ngoe le boikarabello ba tšebeliso ea lihlahisoa tsa Xilinx lits'ebetsong tse bohlokoa joalo, ka kopo sheba Melao ea Thekiso ea Xilinx e ka bang teng. viewed ho https://www.xilinx.com/legal.htm#tos.
Tokomane ena e na le tlhahisoleseding ea pele 'me e ka fetoha ntle le tsebiso. Tlhahisoleseding e fanoeng mona e amana le lihlahisoa le/kapa litšebeletso tse e-so fumanehe bakeng sa thekiso, 'me li fanoe feela molemong oa tlhahisoleseding, 'me ha lia rereloa, kapa ho nkoa e le tlhahiso ea thekiso kapa boiteko ba ho rekisa lihlahisoa le/kapa litšebeletso tse boletsoeng. mona.

MOKHOA OA LIKOPO TLHOKOMELO
LIHLAHISO TSA MOSEBETSI (TSE HLAHISITSENG JOALOKA “XA” KAROLO EA NOMA) HA LIA HLOMELETSOA HO SEBELISA HO SEBELISA AIRBAGS KAPA HO SEBELISA LITIKETSO TSE AMANG TELAOO EA KOLOI (“KOPO EA SOLOKETSO”) NTLE HO NA LE TŠEBELETSO EA TŠEBELETSO. KA MAEMO A TŠIRELETSO EA ISO 26262 (“SAFETY DESIGN”). BAKENG SA BA TLA SEBELISA KAPA HO AJOA KAPA LITSAMAISO TSE LING TSE AKARENG LIHLAHISO, BA TLA LEKOLA LITSAMAISO TSE HLOKO KA SEBELE BAKENG SA TŠEBELETSO. TŠEBELETSO EA LIHLAHISO TSA KOPO EA TŠEBELETSO KA NTLE HO TLHALOSO EA TŠIRELETSO E KA PHETHAHETSENG EA MOREKI, E TLA FEELA HO MELAO E SEBELISANG LE MELAO E LAOLANG MEEDI MABAPI LE BOIKARABELO BA SEHLAHISO.
Copyright 2020 Xilinx, Inc. Xilinx, letšoao la Xilinx, Alveo, Artix, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, le mefuta e meng e khethiloeng e kenyellelitsoeng mona ke matšoao a khoebo a Xilinx United States le linaheng tse ling. Matshwao a mang kaofela ke thepa ya beng ba ona.PG357 (v1.1) November 23, 2020, ILA with AXI4-Stream Interface v1.1
Khoasolla PDF: Xilinx AXI4-Stream Integrated Logic Analyzer Guide

Litšupiso

Bukana ea Mosebelisi