Xilinx-logoXilinx AXI4-Stream Integrated Logic Analyzer Guide

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-samfurin

Gabatarwa

Integrated Logic Analyzer (ILA) tare da AXI4-Stream Interface core shine IP mai nazarin dabaru da za'a iya daidaitawa wanda za'a iya amfani dashi don saka idanu kan sigina na ciki da mu'amalar ƙira. Jigon ILA ya ƙunshi abubuwa da yawa na ci gaba na masu nazarin dabaru na zamani, gami da ma'auni na faɗakarwa na boolean da abubuwan da ke haifar da sauyin yanayi. Har ila yau, ainihin yana ba da damar yin amfani da keɓancewa da ikon sa ido tare da duba ka'ida don AXI da AXI4-Stream da aka yi taswirar ƙwaƙwalwar ajiya. Saboda ainihin ILA ɗin yana daidaitawa da ƙirar da ake sa ido, duk ƙayyadaddun ƙayyadaddun agogon ƙira waɗanda aka yi amfani da su akan ƙirar ku ana amfani da su akan abubuwan haɗin ILA. Don gyara musaya tsakanin ƙira, ILA IP yana buƙatar ƙarawa zuwa ƙirar toshe a cikin haɗin haɗin IP na Vivado®. Hakazalika, AXI4/AXI4-Stream yarjejeniya duba wani zaɓi za a iya kunna ga ILA IP a cikin IP integrator. Za'a iya nuna ƙetare ƙa'idodin ƙa'idar a cikin sigar igiyar ruwa viewer na Vivado Logic analyzer.

Siffofin

  • Lambar zaɓaɓɓen mai amfani na tashoshin bincike da faɗin bincike.
  • Makasudin ma'ajiya na zaɓaɓɓen mai amfani kamar toshe RAM da UltraRAM
  • Ana iya haɗa tashoshin bincike da yawa zuwa yanayin faɗakarwa guda ɗaya.
  • Ramin AXI mai amfani-zaɓi don gyara mu'amalar AXI a cikin ƙira.
  • Zaɓuɓɓuka masu daidaitawa don mu'amalar AXI gami da nau'ikan mu'amala da sampda zurfin.
  • Bayanai da jawo dukiya don bincike.
  • Yawan masu kwatantawa da faɗin kowane bincike da ɗayan tashoshin jiragen ruwa a cikin musaya.
  • Abubuwan da aka shigar/fitarwa masu haifar da giciye.
  • Mai iya daidaita bututun don shigar da bincike.
  • AXI4-MM da AXI4-Stream dubawar yarjejeniya.

Don ƙarin bayani game da ainihin ILA, duba Vivado Design Suite User Guide: Programming and Debugging (UG908).

Bayanan IP

LogiCORE™ IP Facts Tebur
Ƙimar Takamaiman
Iyali na Na'ura Mai Goyan baya1 Versal™ ACAP
Mahimman hanyoyin sadarwa masu goyan baya IEEE Standard 1149.1 - JTAG
An bayar da Core
Zane Files RTL
Exampda Design Verilog
Gwajin Bench Ba a Samar da shi ba
Matsaloli File Xilinx® Ƙirar Ƙira (XDC)
Samfurin Kwaikwayo Ba a Samar da shi ba
Direban S/W mai goyan baya N/A
Gwaje-gwajen Zane-zane2
Shigar Zane Vivado® Design Suite
kwaikwayo Don goyan bayan na'urar kwaikwayo, duba Kayayyakin ƙira Xilinx: Jagorar Bayanan kula.
Magana Vivado Synthesis
Taimako
Duk Vivado IP Canjin rajistan ayyukan Jagora Vivado IP Canjin rajistan ayyukan: 72775
Xilinx Support web shafi
Bayanan kula:

1. Don cikakken jerin na'urori masu goyan baya, duba Vivado® IP catalog.

2. Don nau'ikan kayan aikin da aka goyan baya, duba Kayayyakin ƙira Xilinx: Jagorar Bayanan kula.

Ƙarsheview

Kewayawa Abun ciki ta Tsarin Zane
An tsara takaddun Xilinx® a kusa da saiti na daidaitattun matakan ƙira don taimaka muku nemo abubuwan da suka dace don aikin haɓaka ku na yanzu. Wannan takarda ta ƙunshi matakai masu zuwa:

  • Hardware, IP, da Ci gaban Platform: Ƙirƙirar PL IP tubalan don dandamali na kayan aiki, ƙirƙirar kernels PL, simintin aikin subsystem, da kimanta lokacin Vivado®, amfani da albarkatu, da kuma rufewar wuta. Hakanan ya haɗa da haɓaka dandamalin kayan masarufi don haɗin tsarin. Batutuwa a cikin wannan takarda da suka shafi wannan tsarin ƙira sun haɗa da:
  • Bayanin Port
  • Clocking da Sake saiti
  • Keɓancewa da Samar da Core

Core Overview
Sigina da musaya a cikin ƙirar FPGA an haɗa su zuwa binciken ILA da abubuwan shigar da ramummuka. Waɗannan sigina da musaya, waɗanda aka haɗe zuwa binciken bincike da abubuwan shigar da ramuka, sampjagoranci a saurin ƙira kuma ana adana shi ta amfani da toshe kan-chip RAM. Sigina da musaya a cikin ƙirar Versal™ ACAP an haɗa su zuwa binciken ILA da abubuwan shigar da ramummuka. Waɗannan siginonin da aka haɗe da musaya sune sampjagoranci a saurin ƙira ta amfani da shigarwar agogo na ainihin kuma an adana shi a cikin toshe ƙwaƙwalwar RAM akan guntu. Mahimman sigogi sun ƙayyade masu zuwa:

  • Yawan bincike (har zuwa 512) da faɗin bincike (1 zuwa 1024).
  • Yawan ramummuka da zaɓuɓɓukan dubawa.
  • Trace sampda zurfin.
  • Bayanai da/ko jawo dukiya don bincike.
  • Adadin masu kwatance ga kowane bincike.

Ana gudanar da sadarwa tare da ainihin ILA ta amfani da misali na AXI Debug Hub wanda ke haɗawa da Control, Interface, and Processing System (CIPS) IP core.

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-1

Bayan an ɗora ƙirar ƙira a cikin Versal ACAP, yi amfani da software na nazari na dabaru na Vivado® don saita taron faɗakarwa don ma'aunin ILA. Bayan abin ya faru, sampLe buffer ya cika kuma an ɗora shi a cikin ma'aunin tunani na Vivado. Za ka iya view wannan bayanan ta amfani da taga na waveform. Binciken sampAna aiwatar da aikin le da faɗakarwa a cikin yankin dabaru na shirye-shirye. Akan-chip toshe RAM ko ƙwaƙwalwar UltraRAM dangane da maƙasudin ajiya da kuka zaɓa yayin tsarawa wanda ke adana bayanan har sai software ta loda su. Babu shigarwar mai amfani ko fitarwa da ake buƙata don jawo abubuwan da suka faru, kama bayanai, ko don sadarwa tare da ainihin ILA. ILA core yana da ikon sa ido kan sigina-matakin dubawa, yana iya isar da bayanin matakin ma'amala kamar fitattun ma'amaloli don mu'amalar AXI4.

ILA Probe Trigger Comparator
Kowace shigarwar bincike tana haɗe zuwa na'urar kwatancen jawo wanda ke da ikon yin ayyuka daban-daban. A lokacin gudu ana iya saita kwatancen don yin = ko != kwatancen. Wannan ya haɗa da matakan daidaitawa, kamar X0XX101. Hakanan ya haɗa da gano sauye-sauye na gefe kamar tashin gefen (R), gefen faɗuwa (F), ko dai gefen (B), ko babu canji (N). Mai kwatancen faɗakarwa na iya yin ƙarin hadaddun kwatance, gami da>, <, ≥, da ≤.

MUHIMMI! An saita kwatancen a lokacin gudu ta hanyar nazarin dabaru na Vivado®.

Halin Ƙarfafa ILA
Yanayin jawo shine sakamakon lissafin Boolean "AND" ko "OR" na kowane sakamakon binciken ILA yana haifar da kwatance. Yin amfani da na'urar nazarin dabaru na Vivado®, za ku zaɓi ko don "DA" binciko abubuwan da za a iya haifar da binciken kwatancen ko "OR" su. Saitin "AND" yana haifar da tashin hankali lokacin da duk kwatancen binciken ILA ya gamsu. Saitin “OR” yana haifar da tashin hankali lokacin da kowane kwatancen binciken ILA ya gamsu. Yanayin faɗakarwa shine lamarin faɗakarwa da aka yi amfani da shi don auna alamar ILA.

Aikace-aikace

An tsara ainihin ILA don a yi amfani da shi a cikin aikace-aikacen da ke buƙatar tabbatarwa ko cirewa ta amfani da Vivado®. Hoto na gaba yana nuna CIPS IP core yana rubutawa kuma yana karantawa daga AXI toshe RAM mai sarrafa ta hanyar AXI Network akan Chip (NoC). An haɗa maɓallin ILA zuwa cibiyar sadarwa tsakanin AXI NoC da AXI toshe mai sarrafa RAM don saka idanu kan ma'amalar AXI4 a cikin mai sarrafa kayan aiki.

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-2

Ba da lasisi da oda
An bayar da wannan tsarin Xilinx® LogiCORE™ ba tare da ƙarin farashi ba tare da Xilinx Vivado® Design Suite ƙarƙashin sharuɗɗan lasisin Xilinx Ƙarshen Mai amfani.
Lura: Don tabbatar da cewa kana buƙatar lasisi, duba ginshiƙin lasisi na IP Catalog. Haɗe yana nufin cewa an haɗa lasisi tare da Vivado® Design Suite; Sayi yana nufin cewa dole ne ka sayi lasisi don amfani da ainihin. Ana samun bayani game da wasu samfuran Xilinx® LogiCORE™ na IP a shafin Xilinx Intellectual Property. Don bayani game da farashi da samuwan wasu kayayyaki da kayan aikin Xilinx LogiCORE IP, tuntuɓi wakilin tallace-tallace Xilinx na gida.

Ƙayyadaddun samfur

Bayanin Port
Tebur masu zuwa suna ba da cikakkun bayanai game da tashoshin ILA da sigogi.
ILA Ports

Tebur 1: ILA Ports
Sunan tashar jiragen ruwa I/O Bayani
clk I Agogon ƙira wanda ke rufe duk abin faɗakarwa da dabaru na ajiya.
bincike [ 1:0] I Binciken shigarwar tashar jiragen ruwa. Lambar tashar bincike yana cikin kewayon daga 0 zuwa

511. Faɗin tashar binciken binciken (wanda aka nuna ta ) yana cikin kewayon 1 zuwa 1024.

Dole ne ku ayyana wannan tashar jiragen ruwa a matsayin vector. Don tashar jiragen ruwa 1-bit, yi amfani da bincike [0:0].

fidda kai O Za a iya samar da tashar tashar trig_out ko dai daga yanayin faɗakarwa ko daga tashar tashar trig_in ta waje. Akwai sarrafa lokacin gudu daga Ma'anar Logic don canzawa tsakanin yanayin faɗakarwa da trig_in don fitar da trig_out.
trig_in I Shigar da tashar shigar da wutar lantarki da aka yi amfani da ita a tsarin tushen tsari don Ƙaddamar da Cross Trigger. Ana iya haɗawa da wani ILA don ƙirƙirar Cascading Trigger.
ramuka_ _ I Ramin dubawa.

Nau'in dubawa an ƙirƙira shi da ƙarfi bisa ramin_ _ dubawa nau'in siga. Akwai tashoshin jiragen ruwa guda ɗaya a cikin musaya don saka idanu a cikin mai sarrafa kayan aiki.

tayar da hankali I Sanarwa ga trig_out.
trig_in_ack O Sanarwa ga trig_in.
sake saiti I Nau'in shigar da ILA lokacin da aka saita zuwa 'Interface Monitor', wannan tashar jiragen ruwa yakamata ta kasance siginar sake saiti iri ɗaya wanda yayi daidai da dabarun ƙira da ke haɗe zuwa Slot_ _ tashar jiragen ruwa na ILA core.
S_AXIS I/O Tashar tashar zaɓi.

An yi amfani da shi don haɗin hannu tare da AXI Debug Hub core lokacin da aka zaɓi 'Enable AXI4-Stream Interface for Manul Connection to AXI Debug Hub' a cikin Zaɓuɓɓukan Babba.

M_AXIS I/O Tashar tashar zaɓi.

An yi amfani da shi don haɗin hannu tare da AXI Debug Hub core lokacin da aka zaɓi 'Enable AXI4-Stream Interface for Manual Connect to AXI Debug Hub' a cikin' Zaɓuɓɓukan Babba'.

Tebur 1: ILA Ports (ci gaba)
Sunan tashar jiragen ruwa I/O Bayani
an saita I Tashar tashar zaɓi.

An yi amfani da shi don haɗin hannu tare da AXI Debug Hub core lokacin da aka zaɓi 'Enable AXI4-Stream Interface for Manual Connect to AXI Debug Hub' a cikin' Zaɓuɓɓukan Babba'. Ya kamata wannan tashar jiragen ruwa ta kasance ta daidaita tare da sake saitin tashar jiragen ruwa na AXI Debug Hub.

alk I Tashar tashar zaɓi.

An yi amfani da shi don haɗin hannu tare da AXI Debug Hub core lokacin da aka zaɓi 'Enware AXI4-Stream Interface for Manual Connect to AXI Debug Hub' a cikin' Zaɓuɓɓukan Babba'. Ya kamata wannan tashar jiragen ruwa ta kasance ta daidaita tare da tashar agogon AXI Debug Hub.

Farashin ILA

Tebur 2: Farashin ILA
Siga Ana halatta Darajoji Tsoffin Dabi'u Bayani
Sunan sashi_ Maƙarƙashiya tare da A–Z, 0–9, da _ (ƙarƙasa) ila_0 Sunan bangaren nan take.
C_NUM_OF_PROBES 1-512 1 Yawan tashoshin binciken ILA.
C_MEMORY_TYPE 0, 1 0 Makasudin ajiya don bayanan da aka kama. 0 yayi daidai da toshe RAM kuma 1 yayi daidai da UltraRAM.
C_DATA_DEPTH 1,024, 2,048,

4,096, 8,192,

16,384, 32,768,

65,536, 131,072

1,024 Binciken zurfin buffer ajiya. Wannan lambar tana wakiltar matsakaicin adadin samples wanda za'a iya adanawa a lokacin gudu don kowane shigarwar bincike.
C_PROBE _FASHI 1-1024 1 Nisa tashar jiragen ruwa . Ina ita ce tashar binciken tana da darajar daga 0 zuwa 1,023.
C_TRIGOUT_EN Gaskiya/Karya KARYA Yana ba da damar fitar da aikin. Ana amfani da tashar jiragen ruwa trig_out da trig_out_ack.
C_TRIGIN_EN Gaskiya/Karya KARYA Yana kunna trig a cikin aiki. Ana amfani da tashar jiragen ruwa trig_in da trig_in_ack.
C_INPUT_PIPE_STAGES 0-6 0 Ƙara ƙarin flops zuwa tashoshin bincike. Siga ɗaya ya shafi duk tashoshin bincike.
DUK_PROBE_SAME_MU Gaskiya/Karya GASKIYA Wannan yana tilasta kwatanta raka'o'in ƙima iri ɗaya (raka'o'in wasa) zuwa duk binciken.
C_PROBE _MU_CNT 1-16 1 Adadin Ƙimar Ƙimar (Match) a kowace bincike. Wannan yana aiki ne kawai idan ALL_PROBE_SAME_MU KARYA ce.
C_PROBE _TYPE DATA and TRIGGER, TRIGGER, DATA DATA da TRIGGER Don zaɓar binciken da aka zaɓa don ƙayyadaddun yanayin faɗakarwa ko don dalilai na ajiyar bayanai ko duka biyun.
C_ADV_TRIGGER Gaskiya/Karya KARYA Yana kunna zaɓin faɗakarwa na gaba. Wannan yana ba da damar injin jihar kuma zaku iya rubuta jerin abubuwan faɗakarwar ku a cikin Vivado Logic Analyzer.
Tebur 2: Farashin ILA (ci gaba)
Siga Ana halatta Darajoji Tsoffin Dabi'u Bayani
C_NUM_MONITOR_SLOTS 1-11 1 Yawan Interface Ramummuka.
Bayanan kula:

1. Matsakaicin adadin kwatancen ƙima (match) raka'a an iyakance shi zuwa 1,024. Don ainihin faɗakarwa (C_ADV_TRIGGER = FALSE), kowane bincike yana da juzu'in kwatancen ƙima guda ɗaya (kamar yadda yake cikin sigar farko). Amma don zaɓin faɗakarwa na gaba (C_ADV_TRIGGER = GASKIYA), wannan yana nufin ɗaiɗaikun binciken na iya samun yuwuwar zaɓi na adadin ƙimar ƙima daga ɗaya zuwa huɗu. Amma duk kwatankwacin raka'a kada ya wuce fiye da 1,024. Wannan yana nufin, idan kuna buƙatar kwatanta raka'a huɗu a kowane bincike to an ba ku damar amfani da bincike 256 kawai.

Zane tare da Core

Wannan sashe ya ƙunshi jagorori da ƙarin bayani don sauƙaƙe ƙira tare da ainihin.

Agogo
Tashar shigar da clk ita ce agogon da ainihin ILA ke amfani da shi don yin rijistar ƙimar binciken. Don sakamako mafi kyau, ya kamata ya zama siginar agogo iri ɗaya wanda ke daidaitawa da dabarun ƙira da ke haɗe zuwa tashoshin bincike na ainihin ILA. Lokacin haɗawa da hannu tare da AXI Debug Hub, siginar aclk yakamata ta kasance mai daidaitawa zuwa tashar shigar da agogon AXI Debug Hub.

Sake saiti
Lokacin da kuka saita Nau'in Input na ILA zuwa Mai duba Interface, sake saitin tashar jiragen ruwa yakamata ya zama siginar sake saiti iri ɗaya wanda yayi daidai da ƙirar ƙira wanda ke haɗe da haɗin gwiwa zuwa
ramuka_ _ tashar jiragen ruwa na ILA core. Don haɗin hannu tare da AXI Debug Hub core, tashar jiragen ruwa na yanzu yakamata ta kasance tare da sake saitin tashar jiragen ruwa na AXI Debug Hub core.

Zane Matakan Tafiya
Wannan sashe yana bayyana gyare-gyare da kuma samar da mahimmanci, ƙuntatawa mahimmanci, da kwaikwayo, kira, da matakan aiwatarwa waɗanda suka keɓance ga wannan ainihin IP. Ana iya samun ƙarin cikakkun bayanai game da daidaitaccen ƙirar ƙirar Vivado® da mai haɗin IP a cikin jagororin masu amfani na Vivado Design Suite masu zuwa:

  • Jagorar Mai Amfani Vivado Design Suite: Zana Tsarin Tsarin IP ta amfani da IP Integrator (UG994)
  • Jagorar Mai Amfani Vivado Design Suite: Zanewa tare da IP (UG896)
  • Jagorar Mai Amfani Vivado Design Suite: Farawa (UG910)
  • Jagorar Mai Amfani Vivado Design Suite: Logic Simulation (UG900)

Keɓancewa da Samar da Core

Wannan sashe ya ƙunshi bayani game da amfani da kayan aikin Xilinx® don keɓancewa da samar da ainihin a cikin Vivado® Design Suite. Idan kuna keɓancewa da samar da mahimmanci a cikin mahaɗar IP na Vivado, duba Jagorar Mai amfani na Vivado Design Suite: Zayyana Tsarin Tsarin IP ta amfani da IP Integrator (UG994) don cikakkun bayanai. Mai haɗa IP na iya ƙididdige wasu ƙididdiga ta atomatik lokacin inganta ko samar da ƙira. Don bincika ko ƙimar sun canza, duba bayanin siga a wannan babin. Zuwa view ƙimar siga, gudanar da ingantaccen_bd_design umarnin a cikin Tcl console. Kuna iya keɓance IP ɗin don amfani a ƙirar ku ta hanyar ƙididdige ƙima don sigogi daban-daban masu alaƙa da ainihin IP ta amfani da matakai masu zuwa:

  1.  Zaɓi IP daga kundin adireshin IP.
  2.  Danna maballin IP ɗin da aka zaɓa sau biyu ko zaɓin Ƙimar IP na umarni daga mashaya ko danna menu na dama.

Don cikakkun bayanai, duba Jagorar Mai amfani na Vivado Design Suite: Zayyana tare da IP (UG896) da Jagorar Mai amfani na Vivado Design Suite: Farawa (UG910). Figures a cikin wannan babin misalai ne na Vivado IDE. Tsarin da aka kwatanta anan zai iya bambanta da sigar yanzu.

Don samun dama ga ainihin, yi waɗannan:

  1.  Bude aikin ta zaɓi File sannan Bude Project ko ƙirƙirar sabon aikin ta zaɓi File sai Sabon Project a Vivado.
  2.  Buɗe kas ɗin IP kuma kewaya zuwa kowane ɗayan harajin haraji.
  3. Danna ILA sau biyu don kawo ainihin sunan Vivado IDE.

Gabaɗaya Panel Zaɓuɓɓuka
Hoton da ke gaba yana nuna Gabaɗaya Zaɓuɓɓuka shafin a cikin Saitin Ƙasa wanda ke ba ku damar tantance zaɓuɓɓuka:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-3

Hoton da ke gaba yana nuna Gabaɗaya Zaɓuɓɓuka shafin a cikin saitin AXI wanda ke ba ku damar tantance zaɓuɓɓukan:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-4

  • Sunan Bangaren: Yi amfani da wannan filin rubutu don samar da suna na musamman don ainihin ILA.
  • Nau'in shigar da ILA: Wannan zaɓi yana ƙayyade nau'in dubawa ko siginar ILA ya kamata a yi gyara. A halin yanzu, ƙimar wannan siga sune "Bincike na Ƙasa", "Interface Monitor" da "Gauraye."
  • Yawan Bincike: Yi amfani da wannan filin rubutu don zaɓar adadin tashoshin bincike akan ainihin ILA. Ingantacciyar kewayon da aka yi amfani da shi a cikin Vivado® IDE shine 1 zuwa 64. Idan kuna buƙatar tashar jiragen ruwa sama da 64, kuna buƙatar amfani da kwararar umarnin Tcl don samar da ainihin ILA.
  • Yawancin Interface Ramummuka (ana samunsu a nau'in Kulawa na Interface da nau'in Mixed): Wannan zaɓi yana ba ku damar zaɓar adadin ramummuka na AXI da ke buƙatar haɗawa da ILA.
  • Adadin Masu Kwatancen Duk Tashar Tashoshin Bincike: Ana iya saita adadin masu kwatanta kowane bincike akan wannan rukunin. Ana iya kunna adadin kwatancen na duk binciken ta zaɓi.

Binciken Port Panel
Hoto mai zuwa yana nuna shafin Probe Ports wanda ke ba ka damar tantance saituna:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-5

  • Panel Port Probe: Faɗin kowane Port Probe ana iya daidaita shi a cikin Panel Port Probe. Kowane Panel Port Probe yana da tashoshin jiragen ruwa har guda bakwai.
  • Nisa Binciken: Ana iya ambaton Nisa na kowane Port Probe. Ingantacciyar kewayon shine 1 zuwa 1024.
  • Adadin Masu Kwatancen: Ana kunna wannan zaɓin ne kawai lokacin da aka kashe zaɓin “Lambobin Kwatancen Dukan Tashoshin Bincike”. Ana iya saita kwatancen kowane bincike a cikin kewayon 1 zuwa 16.
  • Bayanai da/ko Tarawa: Nau'in bincike na kowane bincike ana iya saita ta ta amfani da wannan zaɓi. Zaɓuka masu inganci sune DATA_and_TRIGGER, DATA da TRIGGER.
  • Zaɓuɓɓukan Kwatance: Ana iya saita nau'in aiki ko kwatancen kowane bincike ta amfani da wannan zaɓi.

Zaɓuɓɓukan Interface
Hoto mai zuwa yana nuna shafin Zaɓuɓɓukan Interface lokacin da aka zaɓi nau'in Interface Monitor ko Mixed don nau'in shigarwar ILA:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-6

  • Nau'in Interface: Mai siyarwa, Laburare, Suna, da Sigar (VLNV) na keɓancewar ILA wanda za a sa ido a kai.
  • Nisa ID na AXI-MM: Yana zaɓar nisa ID na AXI dubawa lokacin da slot_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Faɗin Bayanai na AXI-MM: Yana zaɓar sigogin da suka dace da slot_Zaɓi niɗin bayanan bayanan AXI lokacin da ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Nisa Adireshin AXI-MM: Yana zaɓar faɗin adireshi na ƙirar AXI lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Kunna AXI-MM/Mai duba ladabi na rafi: Yana kunna AXI4-MM ko AXI4-Stream Checker don Ramin lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM ko AXI4-Stream, inda shine lambar ramin.
  • Kunna Ƙididdigar Ma'amala: Yana ba da damar AXI4-MM damar bin diddigin ma'amala.
  • Yawan Fitattun Karatun Ma'amaloli: Yana ƙayyadad da adadin fitattun ma'amalolin karanta kowane ID. Ya kamata darajar ta zama daidai ko girma fiye da adadin fitattun ma'amalolin karantawa na wannan haɗin.
  • Yawan Fitattun Rubutun Ma'amaloli: Yana ƙayyadaddun adadin fitattun ma'amaloli Rubuta kowane ID. Ya kamata darajar ta zama daidai ko girma fiye da adadin fitattun ma'amaloli na wannan haɗin.
  • Kula da Alamomin Matsayin APC: Ba da damar saka idanu kan siginonin matsayin APC don samun gurbi lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya tashar adireshin karanta AXI azaman Bayanai: Zaɓi siginar tashar adireshi karanta don manufar ajiyar bayanai don ramin lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya tashar adireshi na AXI a matsayin Mai Tarawa: Zaɓi siginar tashar adireshi don tantance yanayin faɗakarwa don rami. lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya tashar AXI karanta bayanai azaman Bayanai: Zaɓi karanta siginar tashar bayanai don dalilai na ajiyar bayanai don ramin lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Saita tashar AXI karanta tashar bayanai azaman Tara: Zaɓi siginar tashar bayanai don tantance yanayin faɗakarwa don ramin. lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya AXI rubuta tashar adireshi azaman Bayanai: Zaɓi rubuta siginar tashar adireshi don manufar ajiyar bayanai don ramin lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya AXI rubuta tashar adireshi azaman Mai Tarawa: Zaɓi rubuta siginar tashar adireshi don ƙayyadaddun yanayin faɗakarwa don rami. lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya AXI rubuta tashar bayanai azaman Bayanai: Zaɓi rubuta siginar tashar bayanai don manufar ajiyar bayanai don ramin lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Saita AXI rubuta tashar bayanai azaman Tasiri: Zaɓi rubuta siginar tashar bayanai don ƙayyadaddun yanayin faɗakarwa don rami. lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya AXI rubuta tashar amsawa azaman Bayanai: Zaɓi rubuta siginonin tashar amsa don dalilai na ajiyar bayanai don ramin lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • Sanya AXI rubuta tashar amsawa azaman Mai Tarawa: Zaɓi rubuta siginar tashar amsa don tantance yanayin faɗakarwa don ramin. lokacin ramin_ nau'in dubawa an saita shi azaman AXI-MM, inda shine lambar ramin.
  • AXI-Stream Tdata Nisa: Yana zaɓar nisa Tdata na AXI-Stream interface lokacin da ramin_ nau'in dubawa an saita shi azaman AXI-Stream, inda shine lambar ramin.
  • Nisa na AXI-Stream TID: Yana zaɓar nisa TID na AXI-Stream interface lokacin da ramin_ nau'in dubawa an saita shi azaman AXI-Stream, inda shine lambar ramin.
  • AXI-Stream TUSER Nisa: Yana zaɓar nisa TUSER na AXI-Stream interface lokacin da ramin_ nau'in dubawa an saita shi azaman AXI-Stream, inda shine lambar ramin.
  • Nisa na AXI-Stream TDEST: Yana zaɓar faɗin TDEST na AXI-Stream interface lokacin da ramin_ nau'in dubawa an saita shi azaman AXI-Stream, inda shine lambar ramin.
  • Sanya Siginonin AXIS azaman Bayanai: Zaɓi sigina na AXI4-Stream don manufar ajiyar bayanai don ramin
    lokacin ramin_ nau'in dubawa an saita shi azaman AXI-Stream inda shine lambar ramin.
  • Sanya Siginonin AXIS azaman Mai Tarawa: Zaɓi siginar AXI4-Stream don ƙayyadaddun yanayin faɗakarwa don rami lokacin ramin_ nau'in dubawa an saita shi azaman AXI-Stream, inda shine lambar ramin.
  • Sanya Ramin azaman Bayanai da/ko Mai Tarawa: Yana zaɓar sigina marasa ramin AXI don ƙayyadaddun yanayin faɗakarwa ko don dalilai na ajiyar bayanai ko duka biyu don Ramin. lokacin ramin_ nau'in dubawa an daidaita shi azaman wanda ba AXI ba, inda shine lambar ramin.

Zaɓuɓɓukan ajiya
Hoto mai zuwa yana nuna shafin Zaɓuɓɓukan Ma'ajiya wanda ke ba ka damar zaɓar nau'in ma'adanin ajiya da zurfin ƙwaƙwalwar da za a yi amfani da su:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-7

  • Maƙasudin Ma'ajiya: Ana amfani da wannan siga don zaɓar nau'in manufa ta ajiya daga menu mai buɗewa.
  • Zurfin Bayanai: Ana amfani da wannan siga don zaɓar madaidaicin sample zurfin daga menu mai saukewa.

Zaɓuɓɓuka na ci gaba
Hoton da ke gaba yana nuna shafin Zaɓuɓɓuka Na Babba:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-8

  • Kunna Interface AXI4-Stream don Haɗin Manual zuwa AXI Debug Hub: Lokacin da aka kunna, wannan zaɓi yana ba da ƙirar AXIS don IP don haɗawa zuwa AXI Debug Hub.
  • Kunna Interface Input Trigger: Duba wannan zaɓi don ba da damar shigar da tashar ta zaɓin zaɓi.
  • Kunna Interface Fitowar Tattaunawa: Duba wannan zaɓi don kunna tashar fitarwa ta zaɓi na zaɓi.
  • Shigar da Pipe Stages: Zaɓi adadin rajistar da kuke son ƙarawa don bincike don inganta sakamakon aiwatarwa. Wannan siga ya shafi duk bincike.
  • Babban Tasiri: Bincika don kunna jerin abubuwan da ke tushen injin na jihar.

Fitowa Generation
Don cikakkun bayanai, duba Jagorar mai amfani na Vivado Design Suite: Zayyana tare da IP (UG896).

Takurawa Core

Matsalolin da ake buƙata
Babban ILA ya ƙunshi XDC file wanda ke ƙunshe da ƙaƙƙarfan hanyoyin karya masu dacewa don hana wuce gona da iri na hanyoyin daidaitawa na yanki na agogo. Hakanan ana tsammanin siginar agogon da aka haɗa zuwa tashar shigar da clk na ainihin ILA yana da iyakancewa sosai a cikin ƙirar ku.

Na'ura, Kunshin, da Zaɓuɓɓukan Matsayin Sauri
Wannan sashe baya aiki don wannan ainihin IP.

  • Mitar agogo
    Wannan sashe baya aiki don wannan ainihin IP.
  • Gudanar da agogo
    Wannan sashe baya aiki don wannan ainihin IP.
  • Wurin Agogo
    Wannan sashe baya aiki don wannan ainihin IP.
  • Banki
    Wannan sashe baya aiki don wannan ainihin IP.
  • Wurin Wutar Lantarki
    Wannan sashe baya aiki don wannan ainihin IP.
  • Matsayin I/O da Matsayi
    Wannan sashe baya aiki don wannan ainihin IP.

kwaikwayo

Don cikakkun bayanai game da abubuwan siminti na Vivado®, da kuma bayani game da amfani da goyan bayan kayan aikin ɓangare na uku, duba Jagorar Mai amfani na Vivado Design Suite: Logic Simulation (UG900).

Magana da Aiwatarwa
Don cikakkun bayanai game da haɗawa da aiwatarwa, duba Jagorar mai amfani na Vivado Design Suite: Zayyana tare da IP (UG896).

Gyara kurakurai

Wannan ƙarin ya ƙunshi cikakkun bayanai game da albarkatun da ake samu akan Tallafin Xilinx® webshafin da kayan aikin gyara kurakurai. Idan IP ɗin yana buƙatar maɓallin lasisi, dole ne a tabbatar da maɓallin. Kayan aikin ƙira na Vivado® suna da wuraren binciken lasisi da yawa don gating IP mai lasisi ta hanyar kwarara. Idan rajistan lasisi ya yi nasara, IP na iya ci gaba da ƙira. In ba haka ba, tsara yana tsayawa da kuskure. Ana aiwatar da wuraren binciken lasisi ta kayan aiki masu zuwa:

  • Vivado Synthesis
  • Aiwatar da Vivado
  • rubuta_bitstream (Tcl umurnin)

MUHIMMI! An yi watsi da matakin lasisin IP a wuraren bincike. Gwajin ya tabbatar da akwai ingantacciyar lasisi. Ba ya duba matakin lasisin IP.

Neman Taimako akan Xilinx.com

Don taimakawa cikin ƙira da aiwatar da gyara lokacin amfani da ainihin, Xilinx Support web shafi ya ƙunshi mahimman albarkatu kamar takaddun samfur, bayanan saki, bayanan amsa, bayanai game da sanannun batutuwa, da hanyoyin haɗin kai don samun ƙarin tallafin samfur. Hakanan ana samun Tarukan Jama'a na Xilinx inda membobi zasu iya koyo, shiga, rabawa, da yin tambayoyi game da mafita Xilinx.

Takaddun bayanai
Wannan jagorar samfurin shine babban takarda mai alaƙa da ainihin. Wannan jagorar, tare da takaddun da suka danganci duk samfuran da ke taimakawa cikin tsarin ƙira, ana iya samun su akan Tallafin Xilinx. web shafi ko ta amfani da Xilinx® Documentation Navigator. Zazzage Navigator Takardun Xilinx daga shafin Zazzagewa. Don ƙarin bayani game da wannan kayan aiki da abubuwan da ke akwai, buɗe taimakon kan layi bayan shigarwa.

Rubutun Amsa
Rubutun Amsa sun haɗa da bayani game da matsalolin da aka saba fuskanta, bayani mai taimako kan yadda ake warware waɗannan matsalolin, da duk wasu sanannun al'amura tare da samfurin Xilinx. Ana ƙirƙira da adana bayanan Amsa kullun don tabbatar da cewa masu amfani sun sami damar samun ingantaccen bayanin da ake samu. Ana iya samun Rubutun Amsa don wannan cibiya ta amfani da akwatin Tallafin Bincike akan babban tallafin Xilinx web shafi. Don haɓaka sakamakon bincikenku, yi amfani da kalmomi kamar:

  • Sunan samfur
  • Saƙon kayan aiki
  • Takaitaccen batun da aka fuskanta

Ana samun binciken tacewa bayan an dawo da sakamako don ci gaba da niyya ga sakamakon.

Goyon bayan sana'a
Xilinx yana ba da goyan bayan fasaha akan Dandalin Xilinx Community don wannan samfurin IP na LogiCORE™ lokacin amfani da shi kamar yadda aka bayyana a cikin takaddun samfur. Xilinx ba zai iya ba da garantin lokaci, aiki, ko tallafi ba idan kun yi ɗaya daga cikin masu zuwa:

  • Aiwatar da mafita a cikin na'urorin da ba a bayyana su a cikin takaddun ba.
  • Keɓance mafita fiye da wanda aka yarda a cikin takaddun samfur.
  • Canja kowane sashe na ƙirar da aka yiwa lakabin KADA KA CANZA.

Don yin tambayoyi, kewaya zuwa Dandalin Xilinx Community Forums.

Ƙarin Bayanai da Sanarwa na Shari'a

Xilinx Resources
Don albarkatun tallafi kamar Amsoshi, Takaddun bayanai, Zazzagewa, da Taruka, duba Tallafin Xilinx.

Takaddun Navigator da Wuraren Zane
Xilinx® Documentation Navigator (DocNav) yana ba da dama ga takaddun Xilinx, bidiyo, da albarkatun tallafi, waɗanda zaku iya tacewa da bincika don nemo bayanai. Don buɗe DocNav:

  • • Daga Vivado® IDE, zaɓi Taimako → Takardu da Koyawa.
    • A kan Windows, zaɓi Fara → Duk Shirye-shiryen → Kayayyakin ƙira Xilinx → DocNav.
    • A cikin umarnin Linux, shigar da docnav.

Xilinx Design Hubs suna ba da hanyoyin haɗi zuwa takaddun da aka tsara ta ayyukan ƙira da sauran batutuwa, waɗanda zaku iya amfani da su don koyan mahimman ra'ayoyi da magance tambayoyin da ake yawan yi. Don samun damar Wuraren Zane:

  • A cikin DocNav, danna Wurin Zane View tab.
  • A lokacin Xilinx webshafin, duba shafin Zane-zane.

Lura: Don ƙarin bayani kan DocNav, duba Takardun Navigator shafi akan Xilinx website.

Magana
Waɗannan takaddun suna ba da ƙarin abu mai amfani tare da wannan jagorar:

  1.  Jagorar Mai Amfani Vivado Design Suite: Shirye-shirye da Gyara (UG908)
  2. Jagorar Mai Amfani Vivado Design Suite: Zanewa tare da IP (UG896)
  3. Jagorar Mai Amfani Vivado Design Suite: Zana Tsarin Tsarin IP ta amfani da IP Integrator (UG994)
  4. Jagorar Mai Amfani Vivado Design Suite: Farawa (UG910)
  5. Jagorar Mai Amfani Vivado Design Suite: Logic Simulation (UG900)
  6. Jagorar Mai Amfani Vivado Design Suite: Aiwatar (UG904)
  7. ISE zuwa Vivado Design Suite Jagoran Hijira (UG911)
  8. AXI Protocol Checker LogiCORE Jagoran Samfuran IP (PG101)
  9. AXI4-Stream Protocol Checker LogiCORE Jagoran Samfuran IP (PG145)

Tarihin Bita
Tebu mai zuwa yana nuna tarihin sake fasalin wannan takarda.

Sashe Takaitaccen Bita
11/23/2020 Shafin 1.1
Sakin farko. N/A

Da fatan za a karanta: Muhimman Sanarwa na Shari'a
Bayanin da aka bayyana muku anan (“Kayan”) an bayar da shi ne kawai don zaɓi da amfani da samfuran Xilinx. Matsakaicin iyakar abin da doka ta zartar: (1) Ana samar da kayayyaki “KAMAR YADDA” kuma tare da duk laifuffuka, Xilinx a nan yana ƙin yarda da DUKAN GARANTI DA SHARADI, BAYANI, BAYANI, KO Doka, gami da AMMA BAI IYA IYAKA GA WARRANTIS NA KASANCEWA BA. -CIN KAI, KO KWANTA GA KOWANE MUSAMMAN MANUFA; da (2) Xilinx ba zai zama abin dogaro ba (ko a cikin kwangila ko azabtarwa, gami da sakaci, ko ƙarƙashin kowane ka'idar abin alhaki) don kowane asara ko lalacewa ta kowane nau'i ko yanayin da ke da alaƙa da, tasowa a ƙarƙashin, ko dangane da, Kayayyakin. (ciki har da amfani da Kayayyakin), gami da kowane kai tsaye, kai tsaye, na musamman, na faruwa, ko asara ko lalacewa (ciki har da asarar bayanai, riba, fatan alheri, ko kowane irin asara ko lalacewar da aka samu sakamakon duk wani aiki da aka kawo. ta wani ɓangare na uku) ko da irin wannan lalacewa ko asara ta kasance mai iya yiwuwa ko kuma an shawarce su Xilinx yiwuwar hakan.

Xilinx bai ɗauka wani takalifi don gyara duk wani kurakurai da ke ƙunshe a cikin Kayayyakin ko sanar da ku sabuntawa ga Materials ko ga ƙayyadaddun samfur. Ba za ku iya sakewa, gyara, rarraba, ko nuna kayan a bainar jama'a ba tare da rubutaccen izini ba. Wasu samfuran suna ƙarƙashin sharuɗɗa da sharuɗɗan garantin iyaka na Xilinx, da fatan za a koma zuwa Sharuɗɗan Sayarwa Xilinx wanda zai iya zama. viewed a https://www.xilinx.com/legal.htm#tos; Ƙimar IP na iya kasancewa ƙarƙashin garanti da sharuɗɗan tallafi ƙunshe a cikin lasisin Xilinx ya ba ku. Ba a ƙirƙira samfuran Xilinx ko an yi niyya don su kasance masu aminci ko don amfani a cikin kowane aikace-aikacen da ke buƙatar aiki mai aminci; Kuna ɗaukar haɗarin kawai da alhaki don amfani da samfuran Xilinx a cikin irin waɗannan ƙa'idodi masu mahimmanci, da fatan za a koma zuwa Sharuɗɗan Siyarwa na Xilinx wanda zai iya zama viewed a https://www.xilinx.com/legal.htm#tos.
Wannan takaddar ta ƙunshi bayanan farko kuma ana iya canzawa ba tare da sanarwa ba. Bayanin da aka bayar a nan yana da alaƙa da samfura da/ko sabis ɗin da ba a samo su ba tukuna don siyarwa, kuma an bayar da shi don dalilai na bayanai kawai kuma ba a yi niyya ba, ko kuma za'a iya fassara su, azaman tayin siyarwa ko ƙoƙarin tallan samfuran da/ko sabis ɗin da ake magana akai. a nan.

KYAUTA APPLICATIONS AUTOMOTIVE
KAYAN MOTA (AN GANO DA “XA” A CIKIN KASHIN LAMBAR) BA A BANGAREN AMFANI DA YIN AMFANI DA AIRBAGS KO DOMIN AMFANI DA ABUBUWAN DA SUKE SHAFIN MULKIN MOTAR (“AIKATTUN TSARO”) RASHIN RASHIN RASHIN ARZIKI. ENT TARE DA ISO 26262 MOTOMOTIVE STANDARD ("TSARIN TSARO"). Abokan ciniki SAI SU, KAFIN AMFANI KO RABA WATA TSARIN WANDA YA HADA KAYANA, TA HANYAR GWADA IRIN WANNAN TSARO DON DOMIN TSARI. AMFANI DA KAYAN AIKI A YIN YIN TSIRA BA TARE DA TSIRA BA TARE DA TSIRA YA CIKA DA HARKAR KWASTOM BA, BA'A KAWAI ZUWA DOKAR MULKI DA HUKUNCE-HUKUNCEN MULKI KAN DOKAR KYAUTATAWA.
Haƙƙin mallaka 2020 Xilinx, Inc. Xilinx, tambarin Xilinx, Alveo, Artix, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, da sauran samfuran ƙira waɗanda aka haɗa a ciki alamun kasuwanci ne na Xilinx a Amurka da wasu ƙasashe. Duk sauran alamun kasuwanci mallakar masu su ne.PG357 (v1.1) Nuwamba 23, 2020, ILA tare da AXI4-Stream Interface v1.1
Sauke PDF: Xilinx AXI4-Stream Integrated Logic Analyzer Guide

Magana

Bar sharhi

Ba za a buga adireshin imel ɗin ku ba. Ana yiwa filayen da ake buƙata alama *