Xilinx - chizindikiroXilinx AXI4-Stream Integrated Logic Analyzer Guide

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-product

Mawu Oyamba

The Integrated Logic Analyzer (ILA) yokhala ndi AXI4-Stream Interface pachimake ndi makina osinthika osinthika a IP omwe angagwiritsidwe ntchito kuyang'anira ma sigino amkati ndi mawonekedwe apangidwe. Pakatikati pa ILA pali zinthu zambiri zapamwamba zowunikira malingaliro amakono, kuphatikiza ma equation a boolean trigger ndi zoyambitsa kusintha. Pachimake imaperekanso kuwongolera mawonekedwe ndi kuwunikira komanso kuyang'ana kwa protocol kwa AXI yojambulidwa ndi kukumbukira ndi AXI4-Stream. Chifukwa maziko a ILA amalumikizana ndi mapangidwe omwe akuyang'aniridwa, zoletsa zonse zamawotchi zomwe zimagwiritsidwa ntchito pamapangidwe anu zimayikidwanso pazigawo zapakati pa ILA. Kuti muthane ndi vuto pamapangidwe, ILA IP ikufunika kuwonjezeredwa pamapangidwe a block mu Vivado® IP integrator. Mofananamo, njira yoyang'anira protocol ya AXI4/AXI4-Stream imatha kuthandizidwa ndi ILA IP mu chophatikiza cha IP. Kuphwanya kwa Protocol kumatha kuwonetsedwa mu mawonekedwe a waveform viewer ya Vivado logic analyzer.

Mawonekedwe

  • Nambala yosankhidwa ndi ogwiritsa ya madoko ofufuza ndi m'lifupi mwake.
  • Zosungira zosankhidwa ndi ogwiritsa ntchito monga block RAM ndi UltraRAM
  • Madoko angapo a probe amatha kuphatikizidwa kukhala choyambitsa chimodzi.
  • AXI yosankhika ndi ogwiritsa ntchito kuti ikonzere mawonekedwe a AXI pamapangidwe.
  • Zosankha zosinthika zamakomedwe a AXI kuphatikiza mitundu ya mawonekedwe ndi trace sampkuzama le.
  • Data ndi kuyambitsa katundu kwa kafukufuku.
  • Zofananira zingapo ndi m'lifupi mwa kafukufuku aliyense ndi madoko apawokha mkati mwazolumikizirana.
  • Zolowetsa/zotulutsa m'njira zosiyanasiyana.
  • Kukonza mapaipi opangira zolowera.
  • Kuwunika kwa protocol ya AXI4-MM ndi AXI4-Stream.

Kuti mumve zambiri za ILA pachimake, onani Vivado Design Suite User Guide: Programming and Debugging (UG908).

Zowona za IP

LogiCORE™ IP Facts Table
Zofunika Kwambiri
Banja la Chipangizo Chothandizira1 Versal™ ACAP
Zothandizira Zogwiritsa Ntchito IEEE Standard 1149.1 - JTAG
Zoperekedwa ndi Core
Kupanga Files Mtengo RTL
Exampndi Design Verilog
Benchi Yoyeserera Osaperekedwa
Zopinga File Xilinx® Design Constraints (XDC)
Simulation Model Osaperekedwa
Woyendetsa S/W Wothandizira N / A
Kuyesedwa Kwapangidwe Kumayenda2
Kulowa kwa Design Vivado® Design Suite
Kuyerekezera Kwa ma simulators othandizira, onani Zida Zopangira za Xilinx: Maupangiri Omasulira.
Kaphatikizidwe Vivado Synthesis
Thandizo
Malemba Onse a Vivado IP Change Master Vivado IP Change Logs: 72775
Thandizo la Xilinx web tsamba
Ndemanga:

1. Kuti mupeze mndandanda wazinthu zonse zothandizira, onani kabukhu la Vivado® IP.

2. Pakuti amapereka Mabaibulo zida, onani Zida Zopangira za Xilinx: Maupangiri Omasulira.

Zathaview

Kuyenda Zomwe zili ndi Njira Yopanga
Zolemba za Xilinx® zimakonzedwa mozungulira njira zingapo zopangira kuti zikuthandizeni kupeza zomwe zikugwirizana ndi ntchito yanu yachitukuko. Chikalatachi chili ndi njira zotsatirazi:

  • Kukula kwa Hardware, IP, ndi Platform: Kupanga midadada ya PL IP papulatifomu ya Hardware, kupanga ma PL kernels, kayeseleledwe kantchito ka subsystem, ndikuwunika nthawi ya Vivado®, kugwiritsa ntchito zida, ndi kutseka kwamagetsi. Zimaphatikizanso kupanga nsanja ya Hardware yophatikiza dongosolo. Mitu yomwe ili m'chikalata ichi yomwe ikugwira ntchito pamapangidwe awa ndi awa:
  • Kufotokozera Kwadoko
  • Kutseka ndi Kukonzanso
  • Kusintha ndi Kupanga Core

Core Overview
Zizindikiro ndi zolumikizira mu kapangidwe ka FPGA zimalumikizidwa ndi kafukufuku wa ILA ndi zolowetsa. Zizindikiro izi ndi zolumikizira, zolumikizidwa ndi kafukufuku ndi zolowetsa motsatana, ndi sampimatsogozedwa pama liwiro opangira ndikusungidwa pogwiritsa ntchito pa-chip block RAM. Zizindikiro ndi zolumikizira mu kapangidwe ka Versal™ ACAP zimalumikizidwa ndi kafukufuku wa ILA ndi zolowetsa. Zizindikiro zophatikizika izi ndi zolumikizira ndi sampkutsogozedwa ndi liwiro la mapangidwe pogwiritsa ntchito mawotchi oyambira ndikusungidwa mu kukumbukira kwa chip block RAM. The core parameters imanena izi:

  • Ma probe angapo (mpaka 512) ndi probe wide (1 mpaka 1024).
  • A angapo mipata ndi mawonekedwe options.
  • Tsatirani sampkuzama le.
  • Deta ndi/kapena kuyambitsa katundu kwa kafukufuku.
  • Chiwerengero cha ofananitsa pa kafukufuku aliyense.

Kulankhulana ndi maziko a ILA kumachitika pogwiritsa ntchito chitsanzo cha AXI Debug Hub yomwe imalumikizana ndi Control, Interface, and Processing System (CIPS) IP core.

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-1

Mapangidwewo atayikidwa mu Versal ACAP, gwiritsani ntchito pulogalamu ya Vivado® logic analyzer kuti muyike chochitika choyambitsa muyeso wa ILA. Pambuyo poyambitsa, sample buffer imadzazidwa ndikuyikidwa mu Vivado logic analyzer. Mutha view deta izi ntchito waveform zenera. Kafukufuku sample ndi trigger magwiridwe antchito akugwiritsidwa ntchito mdera la logicable logic. Pa-chip block RAM kapena UltraRAM memory kutengera chandamale chosungira chomwe mwasankha pakusintha makonda komwe kumasunga deta mpaka itakwezedwa ndi pulogalamuyo. Palibe zolowera kapena zotulutsa zomwe zimafunikira kuyambitsa zochitika, kujambula deta, kapena kulumikizana ndi maziko a ILA. ILA core imatha kuyang'anira mawonekedwe amtundu wa mawonekedwe, imatha kuwonetsa zidziwitso zamtundu wa transaction monga zomwe zachitika zapanjira za AXI4.

ILA Probe Trigger Comparator
Kulowetsa kulikonse kwa probe kumalumikizidwa ndi chofananira choyambitsa chomwe chimatha kugwira ntchito zosiyanasiyana. Panthawi yothamanga wofananitsayo akhoza kukhazikitsidwa kuti achite = kapena != kufananitsa. Izi zikuphatikizanso milingo yofananira, monga X0XX101. Zimaphatikizanso kuzindikira kusintha kwa m'mphepete monga kukwera m'mphepete (R), m'mphepete (F), m'mphepete (B), kapena kusasintha (N). Wofanizira woyambitsa amatha kuchita zofananira zovuta, kuphatikiza >, <, ≥, ndi ≤.

ZOFUNIKA! Wofananitsayo amakhazikitsidwa panthawi yothamanga kudzera pa Vivado® logic analyzer.

ILA Trigger Condition
Choyambitsacho ndi chotsatira cha Boolean "AND" kapena "OR" kuwerengera kwa zotsatira za ILA probe trigger comparator. Pogwiritsa ntchito Vivado® logic analyzer, mumasankha "NDI" kufufuza zoyambitsa zofananira kapena "OR" iwo. Kukonzekera kwa "AND" kumayambitsa chochitika pamene mafananidwe onse a ILA probe akwaniritsidwa. Kukonzekera kwa "OR" kumayambitsa chochitika pamene kufananitsa kulikonse kwa ILA kwakwaniritsidwa. Choyambitsa ndiye chochitika choyambitsa chomwe chimagwiritsidwa ntchito poyeza muyeso wa ILA.

Mapulogalamu

Choyambira cha ILA chidapangidwa kuti chigwiritsidwe ntchito mu pulogalamu yomwe imafuna kutsimikiziridwa kapena kuwongolera pogwiritsa ntchito Vivado®. Chithunzi chotsatirachi chikuwonetsa CIPS IP core imalemba ndikuwerenga kuchokera ku AXI block RAM controller kudzera pa AXI Network on Chip (NoC). Choyambira cha ILA chimalumikizidwa ndi neti yolumikizirana pakati pa AXI NoC ndi AXI block RAM controller kuyang'anira ntchito ya AXI4 mu oyang'anira hardware.

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-2

Kupereka Chilolezo ndi Kuyitanitsa
Module iyi ya Xilinx® LogiCORE™ IP imaperekedwa popanda mtengo wowonjezera ndi Xilinx Vivado® Design Suite pansi pa Xilinx End User License.
Zindikirani: Kuti muwonetsetse kuti mukufuna laisensi, yang'anani gawo la License la IP Catalog. Kuphatikizidwa kumatanthauza kuti layisensi ikuphatikizidwa ndi Vivado® Design Suite; Kugula kumatanthauza kuti muyenera kugula laisensi kuti mugwiritse ntchito pachimake. Zambiri za ma module ena a Xilinx® LogiCORE™ IP akupezeka patsamba la Xilinx Intellectual Property. Kuti mumve zambiri zamitengo ndi kupezeka kwa ma module ndi zida za Xilinx LogiCORE IP, funsani woyimira malonda wa Xilinx kwanuko.

Mafotokozedwe a Zamalonda

Kufotokozera Kwadoko
Matebulo otsatirawa amafotokoza zambiri za madoko a ILA ndi magawo.
Madoko a ILA

Gulu 1: Madoko a ILA
Dzina la Port Ine/O Kufotokozera
clk I Wotchi yojambula yomwe imawotchi zonse zoyambira ndi zosungira.
kufufuza [ — 1:0] I Lowetsani polowera. Nambala ya probe port ili mumtundu kuchokera ku 0 mpaka

511. Kuzama kwa doko la probe (kusonyezedwa ndi ) ili pakati pa 1 mpaka 1024.

Muyenera kulengeza doko ili ngati vekitala. Pa doko la 1-bit, gwiritsani ntchito probe [0:0].

trig_out O Doko la trig_out litha kupangidwa kuchokera pa choyambitsa kapena kuchokera pa doko lakunja la trig_in. Pali nthawi yoyendetsa kuchokera ku Logic Analyzer kuti musinthe pakati pa trigger condition ndi trig_in kuti muyendetse trig_out.
trig_mu I Doko lolowetsa lolowera lomwe limagwiritsidwa ntchito potengera Embedded Cross Trigger. Itha kulumikizidwa ku ILA ina kuti mupange Cascading Trigger.
kagawo_ _ I Kagawo mawonekedwe.

Mtundu wa mawonekedwe imapangidwa mwamphamvu kutengera slot_ _ mawonekedwe amtundu wa parameter. Madoko omwe ali mkati mwazolumikizira amapezeka kuti awonedwe mu oyang'anira ma hardware.

trig_out_ack I Chivomerezo cha trig_out.
trig_in_ack O Chivomerezo kuti trig_in.
khazikitsanso I ILA Input Type ikakhazikitsidwa ku 'Interface Monitor', dokoli liyenera kukhala chizindikiro chofananira chomwe chimagwirizana ndi malingaliro opangira omwe amalumikizidwa ku Slot_ _ madoko a ILA core.
S_AXIS Ine/O Doko losasankha.

Amagwiritsidwa ntchito polumikizira pamanja ndi AXI Debug Hub core pamene 'Yambitsani AXI4- Stream Interface ya Manul Connection ku AXI Debug Hub' yasankhidwa mu Advanced Options.

M_AXIS Ine/O Doko losasankha.

Amagwiritsidwa ntchito polumikizira pamanja ndi AXI Debug Hub core pamene 'Yambitsani AXI4- Stream Interface for Manual Connection to AXI Debug Hub' yasankhidwa mu 'Advanced Options'.

Gulu 1: Madoko a ILA (pitiriza)
Dzina la Port Ine/O Kufotokozera
aresetn I Doko losasankha.

Amagwiritsidwa ntchito polumikizira pamanja ndi AXI Debug Hub core pamene 'Yambitsani AXI4- Stream Interface for Manual Connection to AXI Debug Hub' yasankhidwa mu 'Advanced Options'. Dokoli liyenera kukhala lolumikizana ndi doko lokonzanso la AXI Debug Hub.

aclk I Doko losasankha.

Amagwiritsidwa ntchito polumikizira pamanja ndi AXI Debug Hub core pamene 'Yambitsani AXI4- Stream Interface for Manual Connection to AXI Debug Hub' yasankhidwa mu 'Advanced Options'. Dokoli liyenera kukhala lolumikizana ndi doko la AXI Debug Hub.

ILA Parameters

Gulu 2: ILA Parameters
Parameter Zololedwa Makhalidwe Makhalidwe Osasinthika Kufotokozera
Chigawo_Dzina Chingwe chokhala ndi A–Z, 0–9, ndi _ (pansipansi) koma_0 Dzina la instantiated chigawo.
C_NUM_OF_PROBES 1-512 1 Chiwerengero cha ma ILA probe ports.
C_MEMORY_TYPE 0, 1 0 Zosungirako zomwe zajambulidwa. 0 ikufanana ndi block RAM ndipo 1 ikufanana ndi UltraRAM.
C_DATA_DEPTH 1,024, 2,048,

4,096, 8,192,

16,384, 32,768,

65,536, 131,072

1,024 Yang'anani kuzama kwa bafa yosungira. Nambala iyi ikuyimira kuchuluka kwa ma samples zomwe zitha kusungidwa panthawi yothamanga pakulowetsa kulikonse kwa kafukufuku.
C_PROBE _WIDTH 1-1024 1 Kukula kwa doko la probe . Kuti ndiye doko lofufuzira lomwe lili ndi mtengo kuchokera ku 0 mpaka 1,023.
C_TRIGOUT_EN Zoona/Zabodza ZABODZA Imathandiza trig out ntchito. Madoko trig_out ndi trig_out_ack amagwiritsidwa ntchito.
C_TRIGIN_EN Zoona/Zabodza ZABODZA Imathandizira trig mu magwiridwe antchito. Madoko trig_in ndi trig_in_ack amagwiritsidwa ntchito.
C_INPUT_PIPE_STAGES 0-6 0 Onjezerani zowonjezera zowonjezera ku ma probe ports. Parameter imodzi imagwira ntchito pamadoko onse a probe.
ALL_PROBE_SAME_MU Zoona/Zabodza ZOONA Izi zimakakamiza kufananitsa mayunitsi ofanana (mayunitsi ofananira) ndi ma probes onse.
C_PROBE _MU_CNT 1-16 1 Chiwerengero cha mayunitsi a Fananizani Mtengo (Match) pa kafukufuku aliyense. Izi ndizovomerezeka pokhapokha ALL_PROBE_SAME_MU ndi ZABODZA.
C_PROBE _TYPE DATA ndi TRIGGER, TRIGGER, DATA DATA ndi TRIGGER Kusankha kafukufuku wosankhidwa kuti mufotokozere momwe mungayambitsire kapena pofuna kusunga deta kapena zonse ziwiri.
C_ADV_TRIGGER Zoona/Zabodza ZABODZA Imayatsa njira yoyambitsa patsogolo. Izi zimathandizira makina a trigger state ndipo mutha kulemba zoyambira zanu mu Vivado Logic Analyzer.
Gulu 2: ILA Parameters (pitiriza)
Parameter Zololedwa Makhalidwe Makhalidwe Osasinthika Kufotokozera
C_NUM_MONITOR_SLOTS 1-11 1 Chiwerengero cha Interface mipata.
Ndemanga:

1. Chiwerengero chachikulu cha mayunitsi ofananitsa (machesi) amangokhala 1,024. Pazoyambitsa zoyambira (C_ADV_TRIGGER = FALSE), kafukufuku aliyense ali ndi gawo limodzi lofananira (monga momwe zidalili kale). Koma pa njira yoyambira yoyamba (C_ADV_TRIGGER = TRUE), izi zikutanthauza kuti ma probes amatha kukhala ndi mwayi wosankha kuchuluka kwa mayunitsi ofananiza kuyambira chimodzi mpaka zinayi. Koma mayunitsi onse ofananitsa sayenera kupitilira 1,024. Izi zikutanthauza, ngati mukufuna mayunitsi anayi ofananitsa pa kafukufuku ndiye kuti mumaloledwa kugwiritsa ntchito ma probe 256 okha.

Kupanga ndi Core

Gawoli lili ndi malangizo ndi zina zowonjezera kuti zithandizire kupanga ndi pachimake.

Kutseka
Cholowa cha clk ndi wotchi yomwe imagwiritsidwa ntchito ndi ILA pachimake kulembetsa miyeso ya kafukufuku. Kuti mupeze zotsatira zabwino, iyenera kukhala chizindikiro cha wotchi yomweyi yomwe imagwirizana ndi malingaliro opanga omwe amalumikizidwa ndi madoko a ILA pachimake. Mukalumikiza pamanja ndi AXI Debug Hub, chizindikiro cha aclk chikuyenera kukhala chofanana ndi doko lolowetsa wotchi ya AXI Debug Hub.

Kukhazikitsanso
Mukayika ILA Input Type to Interface Monitor, yambitsaninso doko liyenera kukhala chizindikiro chofananira chomwe chimagwirizana ndi kapangidwe kake komwe mawonekedwe ake amalumikizidwa.
kagawo_ _ doko la ILA core. Kuti mulumikizidwe pamanja ndi pachimake cha AXI Debug Hub, doko lomwe lilipo liyenera kukhala lolumikizana ndi doko lokhazikitsanso pakatikati pa AXI Debug Hub.

Kupanga Mayendedwe Oyenda
Gawoli likufotokoza makonda ndi kupanga pachimake, kukakamiza pachimake, ndi kayeseleledwe, kaphatikizidwe, ndi kukhazikitsa masitepe omwe ali achindunji ku IP core. Zambiri zatsatanetsatane wamayendedwe amtundu wa Vivado® ndi cholumikizira cha IP chingapezeke m'mawu otsatirawa a Vivado Design Suite:

  • Vivado Design Suite User Guide: Kupanga ma IP Subsystems pogwiritsa ntchito IP Integrator (UG994)
  • Vivado Design Suite User Guide: Kupanga ndi IP (UG896)
  • Vivado Design Suite User Guide: Poyambira (UG910)
  • Vivado Design Suite User Guide: Logic Simulation (UG900)

Kusintha ndi Kupanga Core

Gawoli limaphatikizapo zambiri zokhudzana ndi kugwiritsa ntchito zida za Xilinx® kuti musinthe mwamakonda ndikupanga maziko mu Vivado® Design Suite. Ngati mukukonzekera ndi kupanga maziko mu Vivado IP chophatikizira, onani Vivado Design Suite User Guide: Kupanga ma IP Subsystems pogwiritsa ntchito IP Integrator (UG994) kuti mudziwe zambiri. Chophatikizira cha IP chimatha kuwerengera zokha masinthidwe ena akamatsimikizira kapena kupanga mapangidwewo. Kuti muwone ngati zikhalidwe zikusintha, onani kufotokozera kwa parameter mumutu uno. Ku view mtengo wa parameter, yendetsani lamulo la validate_bd_design mu Tcl console. Mutha kusintha IP kuti mugwiritse ntchito pamapangidwe anu pofotokoza zamitundu yosiyanasiyana yolumikizidwa ndi IP core pogwiritsa ntchito njira izi:

  1.  Sankhani IP kuchokera pagulu la IP.
  2.  Dinani kawiri IP yosankhidwa kapena sankhani Customize IP lamulo kuchokera pazida kapena dinani kumanja menyu.

Kuti mudziwe zambiri, onani Vivado Design Suite User Guide: Kupanga ndi IP (UG896) ndi Vivado Design Suite User Guide: Poyambira (UG910). Zithunzi mumutuwu ndi zithunzi za Vivado IDE. Masanjidwe omwe akuwonetsedwa apa akhoza kusiyana ndi momwe akulembedwera pano.

Kuti mupeze core, chitani zotsatirazi:

  1.  Tsegulani polojekiti posankha File ndiye Tsegulani Project kapena pangani polojekiti yatsopano posankha File ndiye New Project ku Vivado.
  2.  Tsegulani kalozera wa IP ndikuyenda ku taxonomies iliyonse.
  3. Dinani kawiri ILA kuti mubweretse dzina lenileni la Vivado IDE.

General Options Panel
Chithunzi chotsatirachi chikuwonetsa tabu ya General Options mu Native setting yomwe imakupatsani mwayi wofotokozera zomwe mungachite:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-3

Chithunzi chotsatira chikuwonetsa tabu ya General Options mu AXI yomwe imakupatsani mwayi wofotokozera zomwe mungachite:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-4

  • Dzina lachigawo: Gwiritsani ntchito gawo ili kuti mupereke dzina lapadera la gawo la ILA core.
  • Mtundu Wolowetsa wa ILA: Njira iyi imatchula mtundu wa mawonekedwe kapena chizindikiro cha ILA chomwe chiyenera kusokoneza. Pakali pano, mfundo za parameter iyi ndi "Native Probes", "Interface Monitor" ndi "Mixed."
  • Chiwerengero cha Ma Probes: Gwiritsani ntchito gawo ili kuti musankhe kuchuluka kwa madoko a probe pachimake cha ILA. Mtundu wovomerezeka womwe umagwiritsidwa ntchito mu Vivado® IDE ndi 1 mpaka 64. Ngati mukufuna madoko opitilira 64, muyenera kugwiritsa ntchito mafunde a Tcl kuti mupange maziko a ILA.
  • Ma Interface Slots angapo (omwe akupezeka mu mtundu wa Interface Monitor okha ndi mtundu Wosakanikirana): Njira iyi imakupatsani mwayi wosankha kuchuluka kwa mawonekedwe a AXI omwe akuyenera kulumikizidwa ku ILA.
  • Chiwerengero Chofanana cha Ofananizira Pamadoko Onse a Probe: Chiwerengero cha ofananira pa kafukufuku akhoza kukhazikitsidwa pagawoli. Nambala yofananira ya ma probe onse imatha kuthandizidwa posankha.

Pezani ma Port Panel
Chithunzi chotsatira chikuwonetsa tabu ya Probe Ports yomwe imakupatsani mwayi wofotokozera makonda:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-5

  • Probe Port Panel: Kukula kwa Probe Port iliyonse kumatha kukhazikitsidwa mu Probe Port Panels. Probe Port Panel iliyonse ili ndi madoko asanu ndi awiri.
  • Probe Width: Kukula kwa Probe Port iliyonse kungatchulidwe. Mulingo woyenera ndi 1 mpaka 1024.
  • Chiwerengero cha Ofananitsa: Njirayi imathandizidwa pokhapokha ngati njira ya "Nambala Yofanana ya Ofananitsa Pamadoko Onse a Probe" yazimitsidwa. Wofananira wa kafukufuku aliyense mumtundu 1 mpaka 16 akhoza kukhazikitsidwa.
  • Deta ndi/kapena Choyambitsa: Mtundu wa probe pa kafukufuku uliwonse ukhoza kukhazikitsidwa pogwiritsa ntchito njirayi. Zosankha zovomerezeka ndi DATA_ndi_TRIGGER, DATA ndi TRIGGER.
  • Zosankha Zofananira: Mtundu wa ntchito kapena kufananitsa kwa kafukufuku aliyense zitha kukhazikitsidwa pogwiritsa ntchito njirayi.

Zosankha za Chiyankhulo
Chithunzi chotsatira chikuwonetsa tabu ya Interface Options pomwe Interface Monitor kapena mtundu wosakanikirana wasankhidwa pamtundu wolowetsa wa ILA:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-6

  • Mtundu wa Chiyankhulo: Wogulitsa, Laibulale, Dzina, ndi Mtundu (VLNV) wa mawonekedwe kuti aziyang'aniridwa ndi ILA core.
  • AXI-MM ID Width: Imasankha kukula kwa ID kwa mawonekedwe a AXI pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • AXI-MM Data Width: Imasankha magawo olingana ndi slot_Imasankha kuchuluka kwa data pa mawonekedwe a AXI pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • AXI-MM Address Width: Imasankha kukula kwa Adilesi ya mawonekedwe a AXI pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Yambitsani AXI-MM/Stream Protocol Checker: Imathandizira AXI4-MM kapena AXI4-Stream protocol checker pa slot pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM kapena AXI4-Stream, komwe ndi nambala ya slot.
  • Yambitsani Zowerengera Zotsatira: Zimathandizira kuti AXI4-MM athe kutsata zochitika.
  • Chiwerengero cha Zochita Zomwe Zawerengedwa: Zimatanthawuza kuchuluka kwa zomwe zatsala zomwe zawerengedwa pa ID iliyonse. Mtengo uyenera kukhala wofanana kapena wokulirapo kuposa kuchuluka kwa ntchito zomwe zatsala za Read pa intanetiyo.
  • Chiwerengero cha Zolemba Zomwe Zatsala: Imatchula kuchuluka kwa zomwe zatsalazo Lembani zomwe zatsala pa ID. Mtengowo uyenera kukhala wofanana kapena wokulirapo kuposa kuchuluka kwa zomwe zatsala za Lembani zolumikizirazo.
  • Yang'anirani zizindikiro za APC Status: Yambitsani kuyang'anira mawonekedwe a APC pa slot pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha adilesi yowerengera ya AXI ngati Chidziwitso: Sankhani ma siginecha owerengera adilesi kuti musunge deta posungira pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha adilesi ya AXI ngati Choyambitsa: Sankhani ma siginecha owerengera adilesi kuti mufotokozere momwe mungayambitsire malo. pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha data cha AXI ngati Chidziwitso: Sankhani ma siginecha owerengera a data pazolinga zosungirako deta pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha data cha AXI ngati Choyambitsa: Sankhani ma siginecha owerengera a data kuti mufotokozere momwe mungayambitsire malo pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha adilesi ya AXI ngati Chidziwitso: Sankhani zilembo zolembera ma adilesi kuti musunge deta posungira pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha adilesi ya AXI ngati Choyambitsa: Sankhani zilembo zolembera ma adilesi kuti mufotokozere zomwe zikuyambitsa kagawo. pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani AXI kulemba tchanelo cha data ngati Chidziwitso: Sankhani lembani ma siginecha a data kuti musungire data posungira pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani tchanelo cha data cha AXI ngati Choyambitsa: Sankhani zolemba zamakina a data kuti mufotokozere momwe mungayambitsire malo. pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani njira yoyankhira ya AXI ngati Chidziwitso: Sankhani zolembera zoyankhira zomwe mukufuna kusungirako deta pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • Konzani njira yoyankhira ya AXI ngati Choyambitsa: Sankhani zolemba zoyankhira kuti mufotokozere momwe mungayambitsire malo. pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-MM, pomwe ndi nambala ya slot.
  • AXI-Stream Tdata Width: Imasankha kukula kwa Tdata kwa mawonekedwe a AXI-Stream pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-Stream, komwe ndi nambala ya slot.
  • AXI-Stream TID Width: Imasankha kukula kwa TID kwa mawonekedwe a AXI-Stream pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-Stream, komwe ndi nambala ya slot.
  • AXI-Stream TUSER Width: Imasankha kukula kwa TUSER kwa mawonekedwe a AXI-Stream pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-Stream, komwe ndi nambala ya slot.
  • AXI-Stream TDEST Width: Imasankha kukula kwa TDEST kwa mawonekedwe a AXI-Stream pomwe slot_ mtundu wa mawonekedwe amapangidwa ngati AXI-Stream, komwe ndi nambala ya slot.
  • Konzani Zizindikiro za AXIS ngati Deta: Sankhani ma sigino a AXI4-Stream pofuna kusungirako deta polowera
    pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-Stream komwe ndi nambala ya slot.
  • Konzani Zizindikiro za AXIS ngati Zoyambitsa: Sankhani ma sigino a AXI4-Stream kuti mufotokozere momwe mungayambitsire malo pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati AXI-Stream, komwe ndi nambala ya slot.
  • Konzani Slot ngati Deta ndi/kapena Choyambitsa: Imasankha ma siginali osakhala a AXI kuti mufotokozere momwe mungayambitsire kapena cholinga chosungira deta kapena zonse ziwiri pamene kagawo_ mtundu wa mawonekedwe amapangidwa ngati osakhala AXI, pomwe ndi nambala ya slot.

Zosungirako Zosungira
Chithunzi chotsatirachi chikuwonetsa tabu ya Storage Options yomwe imakupatsani mwayi wosankha mtundu wa chandamale chosungira ndi kuya kwa kukumbukira kuti mugwiritse ntchito:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-7

  • Cholinga Chosungira: Choyimira ichi chimagwiritsidwa ntchito kusankha mtundu wa chandamale chosungira kuchokera pazotsitsa pansi.
  • Kuzama kwa Deta: Parameter iyi imagwiritsidwa ntchito kusankha s yoyeneraample deep kuchokera pa menyu yotsitsa.

Zosankha Zapamwamba
Chithunzi chotsatira chikuwonetsa tabu ya Advanced Options:

Xilinx-AXI4-Stream-Integrated-Logic-Analyzer-fig-8

  • Yambitsani AXI4-Stream Interface for Manual Connection to AXI Debug Hub: Ikayatsidwa, njirayi imapereka mawonekedwe a AXIS kuti IP ilumikizane ndi AXI Debug Hub.
  • Yambitsani Chiyankhulo Cholowetsa Choyambitsa: Chongani izi kuti mutsegule doko lolowera.
  • Yambitsani Trigger Output Interface: Yang'anani njira iyi kuti mutsegule doko loyambira.
  • Lowetsani Pipe Stages: Sankhani chiwerengero cha olembetsa omwe mukufuna kuwonjezera pa kafukufukuyu kuti muwongolere zotsatira. Parameter iyi imagwira ntchito pama probes onse.
  • Advanced Trigger: Yang'anani kuti muwongolere kusanja koyambira pamakina.

Zotulutsa Zotulutsa
Kuti mudziwe zambiri, onani Vivado Design Suite User Guide: Kupanga ndi IP (UG896).

Kuthamangitsa Core

Zopinga Zofunikira
Pakatikati pa ILA pali XDC file zomwe zili ndi njira zabodza zoletsa kuletsa kuphatikizika kwa njira zowoloka mawotchi. Tikuyembekezeredwanso kuti chizindikiro cha wotchi cholumikizidwa ndi doko la clk chapakati pa ILA chimakhala chokhazikika pamapangidwe anu.

Chipangizo, Phukusi, ndi Zosankha za Magiredi Othamanga
Gawoli silikugwira ntchito pa IP core iyi.

  • Ma Clock Frequencies
    Gawoli silikugwira ntchito pa IP core iyi.
  • Kuwongolera Mawotchi
    Gawoli silikugwira ntchito pa IP core iyi.
  • Kuyika Koloko
    Gawoli silikugwira ntchito pa IP core iyi.
  • Kubanki
    Gawoli silikugwira ntchito pa IP core iyi.
  • Kuyika kwa Transceiver
    Gawoli silikugwira ntchito pa IP core iyi.
  • I/O Standard ndi Kuyika
    Gawoli silikugwira ntchito pa IP core iyi.

Kuyerekezera

Kuti mumve zambiri za zida zoyeserera za Vivado®, komanso zambiri zogwiritsa ntchito zida za gulu lachitatu, onani Vivado Design Suite User Guide: Logic Simulation (UG900).

Kaphatikizidwe ndi Kukhazikitsa
Kuti mudziwe zambiri za kaphatikizidwe ndi kukhazikitsa, onani Vivado Design Suite User Guide: Designing with IP (UG896).

Kuthetsa vuto

Zowonjezera izi zikuphatikiza tsatanetsatane wazinthu zomwe zikupezeka pa Xilinx® Support webtsamba ndi zida zowongolera. Ngati IP ikufuna kiyi ya laisensi, kiyiyo iyenera kutsimikiziridwa. Zida zopangira Vivado® zili ndi malo angapo oyang'anira zilolezo zopezera IP yokhala ndi chilolezo kudzera mukuyenda. Ngati cheke chalayisensi chikuyenda bwino, IP ikhoza kupitiliza kupanga. Kupanda kutero, m'badwo umayima ndi cholakwika. Zoyang'anira ziphaso zimatsatiridwa ndi zida zotsatirazi:

  • Vivado Synthesis
  • Kukhazikitsa kwa Vivado
  • write_bitstream (Tcl lamulo)

ZOFUNIKA! Mulingo wa laisensi ya IP umanyalanyazidwa pamalo ochezera. Mayesowa amatsimikizira kuti chilolezo chilipo. Sichiyang'ana mlingo wa laisensi ya IP.

Kupeza Thandizo pa Xilinx.com

Kuthandizira pakupanga ndi kukonza zolakwika mukamagwiritsa ntchito pachimake, Thandizo la Xilinx web tsamba lili ndi zofunikira monga zolemba zamalonda, zolemba zotulutsa, zolemba zamayankho, zidziwitso zokhudzana ndi zomwe zikudziwika, ndi maulalo opezera chithandizo chowonjezera. Xilinx Community Forums amapezekanso komwe mamembala angaphunzire, kutenga nawo mbali, kugawana, ndikufunsa mafunso okhudza mayankho a Xilinx.

Zolemba
Kalozera wazogulitsa uyu ndiye chikalata chachikulu cholumikizidwa ndi pachimake. Bukuli, pamodzi ndi zolemba zokhudzana ndi zinthu zonse zomwe zimathandiza pakupanga mapangidwe, zingapezeke pa Xilinx Support web tsamba kapena pogwiritsa ntchito Xilinx® Documentation Navigator. Tsitsani Xilinx Documentation Navigator kuchokera patsamba lotsitsa. Kuti mumve zambiri za chida ichi ndi mawonekedwe omwe alipo, tsegulani chithandizo chapaintaneti mukatha kukhazikitsa.

Yankhani Zolemba
Mayankho Records amaphatikizanso zambiri zamavuto omwe nthawi zambiri amakumana nawo, zambiri zothandiza momwe mungathetsere mavutowa, ndi nkhani zilizonse zodziwika ndi mankhwala a Xilinx. Mayankho Records amapangidwa ndikusungidwa tsiku ndi tsiku kuwonetsetsa kuti ogwiritsa ntchito ali ndi chidziwitso cholondola kwambiri chomwe chilipo. Yankhani Zolemba pachimake ichi zitha kupezeka pogwiritsa ntchito Search Support bokosi pa chithandizo chachikulu cha Xilinx web tsamba. Kuti muwonjezere zotsatira zanu, gwiritsani ntchito mawu osakira monga:

  • Dzina la malonda
  • Mauthenga achida
  • Chidule cha nkhani yomwe mwakumana nayo

Kusaka kwa zosefera kumapezeka zotsatira zitabwezedwa kuti zikwaniritse zotsatira.

Othandizira ukadaulo
Xilinx imapereka chithandizo chaukadaulo pa Xilinx Community Forums pa malonda a LogiCORE™ IP akagwiritsidwa ntchito monga momwe zafotokozedwera pazolembedwa. Xilinx sangatsimikizire nthawi, magwiridwe antchito, kapena chithandizo ngati mutachita izi:

  • Gwiritsani ntchito yankho muzipangizo zomwe sizinafotokozedwe muzolemba.
  • Sinthani mwamakonda yankho kupyola lololedwa muzolemba zamalonda.
  • Sinthani gawo lililonse la kapangidwe kake lolembedwa MUSASINTHA.

Kuti mufunse mafunso, pitani ku Xilinx Community Forums.

Zowonjezera Zowonjezera ndi Zidziwitso Zalamulo

Malingaliro a kampani Xilinx Resources
Kuti mupeze zothandizira monga Mayankho, Zolemba, Kutsitsa, ndi Mabwalo, onani Thandizo la Xilinx.

Documentation Navigator ndi Design Hubs
Xilinx® Documentation Navigator (DocNav) imapereka mwayi wopeza zolemba za Xilinx, makanema, ndi zothandizira, zomwe mutha kusefa ndikufufuza kuti mupeze zambiri. Kuti mutsegule DocNav:

  • • Kuchokera ku Vivado® IDE, sankhani Thandizo → Zolemba ndi Maphunziro.
    • Pa Windows, sankhani Yambani → Mapulogalamu Onse → Zida Zopangira za Xilinx → DocNav.
    • Pa Linux command prompt, lowetsani docnav.

Xilinx Design Hubs imapereka maulalo ku zolemba zokonzedwa ndi ntchito zamapangidwe ndi mitu ina, yomwe mungagwiritse ntchito kuphunzira mfundo zazikulu ndikuyankha mafunso omwe amafunsidwa pafupipafupi. Kuti mupeze Design Hubs:

  • Mu DocNav, dinani Design Hubs View tabu.
  • Pa Xilinx webtsamba, onani Design Hubs tsamba.

Zindikirani: Kuti mumve zambiri pa DocNav, onani Tsamba la Documentation Navigator pa Xilinx webmalo.

Maumboni
Zolemba izi zimapereka zowonjezera zothandiza ndi bukhuli:

  1.  Vivado Design Suite User Guide: Programming and Debugging (UG908)
  2. Vivado Design Suite User Guide: Kupanga ndi IP (UG896)
  3. Vivado Design Suite User Guide: Kupanga ma IP Subsystems pogwiritsa ntchito IP Integrator (UG994)
  4. Vivado Design Suite User Guide: Poyambira (UG910)
  5. Vivado Design Suite User Guide: Logic Simulation (UG900)
  6. Vivado Design Suite User Guide: Kugwiritsa (UG904)
  7. ISE kupita ku Vivado Design Suite Migration Guide (UG911)
  8. AXI Protocol Checker LogiCORE IP Product Guide (PG101)
  9. AXI4-Stream Protocol Checker LogiCORE IP Product Guide (PG145)

Mbiri Yobwereza
Gome lotsatirali likuwonetsa mbiri yowunikanso chikalatachi.

Gawo Kubwereza Chidule
11/23/2020 Mtundu wa 1.1
Kutulutsidwa koyamba. N / A

Chonde Werengani: Zidziwitso Zofunika Zazamalamulo
Zomwe zawululidwa kwa inu pansipa ("Zida") zimaperekedwa pakusankha ndikugwiritsa ntchito zinthu za Xilinx. Kufikira pamlingo wololedwa ndi lamulo logwira ntchito: (1) Zipangizo zimaperekedwa "MOMWE ILIRI" ndipo ndi zolakwa zonse, Xilinx Ikukanika ZONSE ZONSE NDI ZINSINSI, KUSINTHA, ZOCHITIKA, KAPENA MALAMULO, KUphatikizira Koma OSATI ZONSE ZONSE ZA MERCHANTABILITY, N. -KUKOLAKWA, KAPENA KUKHALIRA PA CHOLINGA CHONSE CHINENE; ndi (2) Xilinx sadzakhala ndi mlandu (kaya mu mgwirizano kapena kuzunza, kuphatikizapo kunyalanyaza, kapena pansi pa chiphunzitso china chilichonse cha udindo) chifukwa cha kutaya kapena kuwonongeka kwa mtundu uliwonse kapena chikhalidwe chokhudzana ndi, chochokera pansi pa, kapena kugwirizana ndi Zida. (kuphatikiza kugwiritsa ntchito kwanu Zida), kuphatikiza kutayika kulikonse kwachindunji, kosalunjika, kwapadera, kosachitika, kapena kutayika kotsatira kapena kuwonongeka (kuphatikiza kutayika kwa data, phindu, chidwi, kapena kutayika kwamtundu uliwonse kapena kuwonongeka komwe kwachitika chifukwa cha zomwe zachitika ndi munthu wina) ngakhale kuwonongeka kapena kutayika koteroko kunali kotheka kapena Xilinx adalangizidwa za kuthekera kwa zomwezo.

Xilinx saona kuti ali ndi udindo wokonza zolakwika zilizonse zomwe zili mu Zida kapena kukudziwitsani za zosintha pa Zida kapena kutchulidwa kwazinthu. Simungathe kupanganso, kusintha, kugawa, kapena kuwonetsa pagulu popanda chilolezo cholembedwa. Zogulitsa zina zimatengera zomwe Xilinx ali nazo, chonde onani Migwirizano Yogulitsa ya Xilinx yomwe ingakhale. viewed ku https://www.xilinx.com/legal.htm#tos; IP cores ikhoza kukhala pansi pa chitsimikizo ndi mawu othandizira omwe ali mulayisensi yoperekedwa kwa inu ndi Xilinx. Zogulitsa za Xilinx sizinapangidwe kapena kulinganizidwa kuti zisawonongeke kapena kuti zigwiritsidwe ntchito panjira iliyonse yomwe imafuna kulephera kotetezeka; Mukuganiza kuti muli pachiwopsezo chokha komanso udindo wogwiritsa ntchito zinthu za Xilinx pazofunikira zotere, chonde onani Migwirizano Yogulitsa ya Xilinx yomwe ingakhale viewed ku https://www.xilinx.com/legal.htm#tos.
Chikalatachi chili ndi chidziwitso choyambirira ndipo chikhoza kusintha popanda chidziwitso. Zambiri zomwe zaperekedwa pano zikukhudzana ndi malonda ndi/kapena ntchito zomwe sizinagulitsidwebe, ndipo zimaperekedwa kuti zidziwitse zokhazokha ndipo sizinalingalire, kapena kutanthauzira, ngati zogulitsa kapena kuyesa kugulitsa malonda ndi/kapena ntchito zomwe zatchulidwa pano.

ZOYENERA KUKHALA ZOFUNIKA KWAMBIRI
ZOLENGEDWA ZA MA GALIMOTO (ZOMWE ZOMWE ZINACHITIKA KUTI “XA” M’GAWO NUMBER) SIZIKUFUNIKA KUTI ZIZIGWIRITSA NTCHITO PAKUFA KWA AIRBAGS KAPENA KUGWIRITSA NTCHITO PA NTCHITO ZIMENE ZIMAKHUDZA KULAMULIRA GALIMOTO (“SAFETY APPLICATION”) KOPANDA KUKHALA PALI NTCHITO YOTSATIRA NTCHITO YOPHUNZITSIRA 26262 ISO. XNUMX MUYANGA WACHITETEZO WAMAgalimoto (“KUPANGA KWACHITETEZO”). AKASITA AMAKHALA ASANAGWIRITSA NTCHITO KAPENA KUGAWIRIRA ZINTHU ALIYENSE AMENE AMAPHATIKIRA ZOPHUNZITSA, AYESE MWAMWAMBA ZINTHU ZOMWE ZILI PA CHOLINGA ZA CHITETEZO. KUGWIRITSA NTCHITO ZOPHUNZITSA PACHITETEZO KOPANDA KUPANGIDWA KWACHITETEZO KULI PATSOPANO KWA MAKASISIYA, ZOKHALA PA MALAMULO WOGWIRITSA NTCHITO NDI MALAMULO OKHALA NDI ZINSINSI PA NTCHITO YA PRODUCT.
Copyright 2020 Xilinx, Inc. Xilinx, logo ya Xilinx, Alveo, Artix, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, ndi mitundu ina yosankhidwa yomwe ili pano ndi zilembo za Xilinx ku United States ndi mayiko ena. Zizindikiro zina zonse ndi eni ake.PG357 (v1.1) November 23, 2020, ILA with AXI4-Stream Interface v1.1
Tsitsani PDF: Xilinx AXI4-Stream Integrated Logic Analyzer Guide

Maumboni

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