I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS kulogo ye-FPGA Yedivayisi Esekelwe

I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS Emindenini Yedivayisi Ye-FPGA Esekelwe

I-intel-AN-522-Implementing-Bus-LVDS-Interface-in-Supported-FPGA-Device-Families-Image-Image

I-Bus LVDS (BLVDS) inweba amandla okuxhumana kwe-LVDS iphuzu-kuya-iphuzu ekucushweni kwamaphoyinti amaningi. I-Multipoint BLVDS inikezela ngesixazululo esisebenzayo sezinhlelo zokusebenza zendiza engemuva eningi.

Ukusekelwa Kokusetshenziswa kwe-BLVDS kumadivayisi we-Intel FPGA

Ungakwazi ukusebenzisa ukuxhumana kwe-BLVDS kulawa madivayisi we-Intel usebenzisa amazinga asohlwini lwe-I/O.

Uchungechunge Umndeni I/O Standard
I-Stratix® I-Intel Stratix 10
  • Umehluko we-SSTL-18 Ikilasi I
  •  Umehluko we-SSTL-18 Class II
I-Stratex V
  •  Umehluko we-SSTL-2 Ikilasi I
  • Umehluko we-SSTL-2 Class II
I-Stratix IV
I-Stratix III
I-Arria® I-Intel Arria 10
  • Umehluko we-SSTL-18 Ikilasi I
  •  Umehluko we-SSTL-18 Class II
U-Arria V
  •  Umehluko we-SSTL-2 Ikilasi I
  •  Umehluko we-SSTL-2 Class II
I-Arria II
Cyclone® I-Intel Cyclone i-10 GX
  • Umehluko we-SSTL-18 Ikilasi I
  • Umehluko we-SSTL-18 Class II
I-Intel Cyclone 10 LP I-BLVDS
I-Cyclone V
  •  Umehluko we-SSTL-2 Ikilasi I
  •  Umehluko we-SSTL-2 Class II
I-Cyclone IV I-BLVDS
I-Cyclone III LS
I-Cyclone III
MAX® I-Intel MAX 10 I-BLVDS

Qaphela:
Amandla edrayivu ahlelekayo nezici zesilinganiso sokubulala kulawa madivayisi zikuvumela ukuthi wenze ngendlela oyifisayo isistimu yakho yamaphoyinti amaningi ukuze isebenze kakhulu. Ukuze unqume inani eliphezulu ledatha elisekelwayo, yenza isifaniso noma ukulinganisa ngokusekelwe ekusethweni kwesistimu yakho ethile kanye nohlelo lokusebenza.
I-BLVDS iphelileview ekhasini 4
I-BLVDS Technology kumadivayisi e-Intel ekhasini lesi-6
Ukusetshenziswa kwamandla e-BLVDS ekhasini 9
I-BLVDS Design Example ekhasini 10
Ukuhlaziywa Kokusebenza ekhasini 17
Umlando Wokubuyekezwa Kombhalo we-AN 522: Ukusebenzisa Isixhumi esibonakalayo se-Bus LVDS Emindenini Yedivayisi ye-Intel FPGA Esekelwe ekhasini 25
Ulwazi Oluhlobene
Amazinga we-I/O we-BLVDS Interface kumadivayisi we-Intel FPGA ekhasini lesi-7

I-BLVDS iphelileview

Uhlelo olujwayelekile lwe-multipoint BLVDS luqukethe inani lamapheya adlulisayo kanye nomamukeli (ama-transceivers) axhunywe ebhasini.
I-Multipoint BLVDSI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 01Ukucushwa emfanekisweni owandulelayo kunikeza ukuxhumana okuphindwe kabili okuyi-half-duplex kuyilapho kunciphisa ukuminyana koxhumano. Noma iyiphi i-transceiver ingathatha indima yesidluliseli, nama-transceiver asele asebenza njengabamukeli (umdluliseli oyedwa kuphela ongakwazi ukusebenza ngesikhathi). Ukulawulwa kwethrafikhi yamabhasi, kungaba ngephrothokholi noma isixazululo sehadiwe ngokuvamile kuyadingeka ukuze kugwenywe ingxabano yabashayeli ebhasini. Ukusebenza kwe-multipoint BLVDS kuthintwa kakhulu ukulayisha nokuqedwa kwe-capacitive ebhasini.
Ukucatshangelwa kokuklama
Idizayini enhle yamaphoyinti amaningi kufanele icabangele umthwalo we-capacitive nokunqanyulwa ebhasini ukuze uthole ubuqotho besignali engcono. Ungakwazi ukunciphisa amandla okulayisha ngokukhetha i-transceiver enamandla ephinikhodi ephansi, isixhumi esinamandla aphansi, nokugcina ubude be-stub bufushane. Enye yokucatshangelwa kwedizayini ye-BLVDS yamaphoyinti amaningi ukuvinjelwa okusebenzayo komehluko kwebhasi eligcwele ngokugcwele, okubizwa ngokuthi yi-impedance esebenzayo, kanye nokubambezeleka kokusabalalisa ngebhasi. Okunye ukucatshangelwa kwedizayini ye-multipoint BLVDS kufaka phakathi ukungaphumeleli kokuphepha, uhlobo lwesixhumi nokuphuma kwephini, ukwakheka kwebhasi le-PCB lokulandela umkhondo, kanye nokucaciswa kwezinga lomshayeli.
I-Impedance Ephumelelayo
I-impedance esebenzayo incike ekulandeleni kwebhasi i-impedance Zo kanye nokulayisha okunamandla ebhasini. Izixhumi, i-stub ekhadini le-plug-in, ukupakishwa, namandla okokufaka owamukelayo konke kunomthelela ekulayisheni okunamandla, okunciphisa ukuvinjelwa okusebenzayo kwebhasi.
I-Equation 1. Izibalo Eziphumelelayo Zomehluko
Sebenzisa lesi sibalo ukuze ulinganisele umehluko osebenzayo webhasi elilayishiwe (Zeff).I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 02Kuphi:

  • I-Zdiff (Ω) ≈ 2 × Zo = ukuphazanyiswa kwesici esihlukile sebhasi
  •  I-Co (pF/inch) = umthamo wesici ngeyunithi ngayinye yobude bebhasi
  • CL (pF) = amandla omthwalo ngamunye
  •  N = inani lemithwalo ebhasini
  •  H (intshi) = d × N = ubude bebhasi
  •  d (intshi) = isikhala phakathi kwekhadi ngalinye le-plug-in
  •  I-Cd (pF/inch) = CL/d = amandla asabalalisiwe ngobude beyunithi yonkana ibhasi

Ukwenyuka kwamandla okulayisha noma ukuvala isikhala esiseduze phakathi kwamakhadi e-plug-in kunciphisa ukuvimba okusebenzayo. Ukuze uthuthukise ukusebenza kwesistimu, kubalulekile ukukhetha i-transceiver ene-capacitance ephansi nesixhumi. Gcina ubude be-stub yomamukeli ngamunye phakathi kwesixhumi nephinikhodi ye-I/O ye-transceiver bufushane ngangokunokwenzeka.
I-Impedance Esebenzayo Ejwayelekile Iqhathaniswa ne-Cd/Co
Lesi sibalo sibonisa imiphumela ye-capacitance esabalalisiwe ku-impedance esebenzayo evamile.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 03Ukunqanyulwa kuyadingeka ekupheleni kwebhasi ngayinye, kuyilapho idatha igeleza kuzo zombili izinkomba. Ukuze unciphise ukucabangela nokukhala ebhasini, kufanele uhambisane nokumelana nokunqanyulwa kwe-impedance ephumelelayo. Kusistimu ene-Cd/Co = 3, i-impedance esebenzayo izikhathi ezingu-0.5 ze-Zdiff. Ngokuqedwa kabili ebhasini, umshayeli ubona umthwalo olinganayo wezikhathi ze-0.25 ze-Zdiff; futhi ngaleyo ndlela kunciphisa ukushwibeka kwamasignali kanye nemajini yomsindo ehlukile kukonke okokufaka komamukeli (uma kusetshenziswa umshayeli we-LVDS ojwayelekile). Umshayeli we-BLVDS ubhekana nalolu daba ngokwandisa idrayivu yamanje ukuze azuze ivolumu efanayotage swing at the receiver inputs.
Ukulibaziseka kokusabalalisa
Ukubambezeleka kokusabalalisa (tPD = Zo × Co) ukubambezeleka kwesikhathi ngomugqa wokudlulisela ngobude beyunithi ngayinye. Kuya nge-impedance yesici kanye nesici
amandla ebhasi.
Ukubambezeleka Kokusakaza Okuphumelelayo
Ngebhasi elilayishiwe, ungakwazi ukubala ukubambezeleka kokusabalalisa okusebenzayo ngale zibalo. Ungakwazi ukubala isikhathi sokuthi isignali isabalalise kusuka kumshayeli A iye kumamukeli B njenge-tPDEFF × ubude bomugqa phakathi komshayeli A nomamukeli B.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 04

I-BLVDS Technology kumadivayisi we-Intel

Kumadivayisi e-Intel asekelwayo, isixhumi esibonakalayo se-BLVDS sisekelwa kunoma iyiphi irowu noma ikholomu I/amabhange anikwa amandla i-VCCIO engu-1.8 V (amadivayisi e-Intel Arria 10 ne-Intel Cyclone 10 GX) noma angu-2.5 V (amanye amadivayisi asekelwayo). Kulawa mabhange e-I/O, isixhumi esibonakalayo sisekelwa kumaphini we-I/O ahlukile kodwa hhayi kokokufaka kwewashi elizinikele noma izikhonkwane zokukhipha iwashi. Nokho, kumadivayisi we-Intel Arria 10 kanye ne-Intel Cyclone 10 GX, isixhumi esibonakalayo se-BLVDS sisekelwa kumaphini wewashi azinikele asetshenziswa njengama-I/O avamile.

  •  Isidluliseli se-BLVDS sisebenzisa amabhafa wokuphuma amabili anesiphetho esisodwa nebhafa yokuphuma yesibili ehlelwe njengehlanekezelwe.
  •  Isamukeli se-BLVDS sisebenzisa ibhafa yokufaka ye-LVDS ezinikele.

Amabhafa we-BLVDS I/O kumadivayisi asekelweI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 05Sebenzisa amabhafa ahlukene okokufaka noma okukhiphayo kuye ngohlobo lohlelo lokusebenza:

  • Uhlelo lokusebenza lwe-Multidrop-sebenzisa okokufaka noma i-bafa yokukhipha kuye ngokuthi idivayisi ihloselwe ukusebenza komshayeli noma umamukeli.
  • Uhlelo lokusebenza lwe-Multipoint—ibhafa yokukhiphayo kanye nebhafa yokufaka yabelana ngezikhonkwane ze-I/O ezifanayo. Udinga isignali yokunika amandla okukhiphayo (ye-oe) ukuze usho kathathu ibhafa ye-LVDS uma ingathumeli amasiginali.
  •  Unganiki amandla ukunqanyulwa kochungechunge lwe-on-chip (RS OCT) kubhafa yokuphumayo.
  • Sebenzisa izinqamuleli zangaphandle kumabhafa okukhiphayo ukuze unikeze ukufaniswa kwe-impedance ne-stub ekhadini le-plug-in.
  • Unganiki amandla ukunqanyulwa kwe-on-chip differential (i-RD OCT) kubhafa yokufaka ehlukile ngoba ukunqanyulwa kwebhasi kuvamise ukusetshenziswa kusetshenziswa izinqamuli zokunqanyulwa zangaphandle kuzo zombili iziphetho zebhasi.

Amazinga we-I/O we-BLVDS Interface kumadivayisi we-Intel FPGA
Ungasebenzisa isixhumi esibonakalayo se-BLVDS usebenzisa amazinga afanelekile e-I/O kanye nezidingo zamanje zamandla kumadivayisi e-Intel asekelwayo.
I-I/O Standard kanye Nosekelo Lwezici zesixhumi esibonakalayo se-BLVDS kumadivayisi e-Intel Asekelwe

Amadivayisi Phina I/O Standard V I-CCIO

(V)

Inketho Yamanje Yamandla Isilinganiso Slew
Ikholomu I/O Umugqa I/O Isilungiselelo Senketho Intel Quartus® Prime Setting
I-Intel Stratix 10 I-LVDS Umehluko we-SSTL-18 Ikilasi I 1.8 8, 6, 4 —- Kancane 0
Ngokushesha (Okuzenzakalelayo) 1
Umehluko we-SSTL-18 Class II 1.8 8 Kancane 0
Ngokushesha (Okuzenzakalelayo) 1
I-Intel Cyclone 10 LP Cyclone IV
I-Cyclone III
DIFFIO I-BLVDS 2.5 8,

12 (okuzenzakalelayo),

16

8,

12 (okuzenzakalelayo),

16

Kancane 0
Maphakathi 1
Ngokushesha (okuzenzakalelayo) 2
I-Stratix IV Stratix III Arria II DIFFIO_RX
(1)
Umehluko we-SSTL-2 Ikilasi I 2.5 8, 10, 12 8, 12 Kancane 0
Maphakathi 1
Ukushesha okumaphakathi 2
Ngokushesha (okuzenzakalelayo) 3
Umehluko we-SSTL-2 Class II 2.5 16 16 Kancane 0
Maphakathi 1
waqhubeka...
  1.  Iphinikhodi ye-DIFFIO_TX ayisekeli izamukeli zangempela ezihlukile ze-LVDS.
Amadivayisi Phina I/O Standard V I-CCIO

(V)

Inketho Yamanje Yamandla Isilinganiso Slew
Ikholomu I/O Umugqa I/O Isilungiselelo Senketho Intel Quartus® Prime Setting
Ukushesha okumaphakathi 2
Ngokushesha (okuzenzakalelayo) 3
I-Stratix V Arria V Cyclone V DIFFIO_RX
(1)
Umehluko we-SSTL-2 Ikilasi I 2.5 8, 10, 12 8, 12 Kancane 0
Umehluko we-SSTL-2 Class II 2.5 16 16 Ngokushesha (okuzenzakalelayo) 1
I-Intel Arria 10
I-Intel Cyclone i-10 GX
I-LVDS Umehluko we-SSTL-18 Ikilasi I 1.8 4, 6, 8, 10, 12 Kancane 0
Umehluko we-SSTL-18 Class II 1.8 16 Ngokushesha (okuzenzakalelayo) 1
I-Intel MAX 10 DIFFIO_RX I-BLVDS 2.5 8, 12,16 (okuzenzakalelayo) 8, 12,

16 (okuzenzakalelayo)

Kancane 0
Maphakathi 1
Ngokushesha (okuzenzakalelayo) 2

Ukuze uthole ulwazi olwengeziwe, bheka kumadokhumenti edivayisi afanele njengoba esohlwini lwesigaba solwazi oluhlobene:

  • Ukuze uthole ulwazi lwephinikhodi yezabelo, bheka ukuphina ukuphuma kwedivayisi files.
  • Ngezici zezindinganiso ze-I/O, bheka kubhukwana ledivayisi I/O isahluko.
  •  Ukuze uthole imininingwane kagesi, bheka imininingwane yedatha yedivayisi noma i-DC kanye nedokhumenti yezimpawu zokushintsha.

Ulwazi Oluhlobene

  •  I-Intel Stratix 10 Pin-Out Files
  •  I-Stratix V Pin-Out Files
  • I-Stratix IV Pin-Out Files
  •  I-Stratix III Iphinikhodi Yedivayisi Files
  •  I-Intel Arria 10 ye-Pin-Out yedivayisi Files
  •  I-Arria V Device Pin-Out Files
  •  I-Arria II GX Iphinikhodi Yedivayisi Files
  • I-Intel Cyclone 10 GX Device Pin-Out Files
  • I-Intel Cyclone 10 LP Pin-Out yedivayisi Files
  • I-Cyclone V Device Pin-Out Files
  •  I-Cyclone IV Device Pin-Out Files
  • I-Cyclone III Device Pin-Out Files
  • I-Intel MAX 10 Iphinikhodi Yedivayisi Files
  • Intel Stratix 10 General Purpose I/O Umhlahlandlela Womsebenzisi
  •  Izici ze-I/O kumadivayisi we-Stratix V
  •  Izici ze-I/O Kudivayisi ye-Stratix IV
  •  Izici zedivayisi ye-Stratix III ye-I/O
  • Izici ze-I/O kumadivayisi we-Stratix V
  •  Izici ze-I/O Kudivayisi ye-Stratix IV
  •  Izici zedivayisi ye-Stratix III ye-I/O
  •  I-I/O ne-High Speed ​​I/O kumadivayisi we-Intel Arria 10
  •  Izici ze-I/O kumadivayisi we-Arria V
  • Izici ze-I/O kumadivayisi we-Arria II
  •  I-I/O ne-High Speed ​​I/O kumadivayisi e-Intel Cyclone 10 GX
  •  I-I/O ne-High Speed ​​I/O kumadivayisi e-Intel Cyclone 10 LP
  • Izici ze-I/O kumadivayisi e-Cyclone V
  • Izici ze-I/O kumadivayisi e-Cyclone IV
  •  Izici ze-I/O kuMndeni Wedivayisi Ye-Cyclone III
  • Intel MAX 10 General Purpose I/O Umhlahlandlela Womsebenzisi
  •  Idatha ye-Intel Stratix 10 yedivayisi
  • I-Stratix V Device Datasheet
  •  I-DC kanye Nezici Zokushintsha zamadivayisi we-Stratix IV
  •  I-Stratix III Device Datasheet: DC kanye Nezimo Zokushintsha
  •  I-Intel Arria 10 yedatha yedivayisi
  •  I-Arria V Device Datasheet
  • Idatha yedivayisi ye-Arria II Devices
  • I-Intel Cyclone 10 GX Device Datasheet
  •  I-Intel Cyclone 10 LP Idatha Yedivayisi
  •  I-Cyclone V Device Datasheet
  •  I-Cyclone IV Device Datasheet
  • I-Cyclone III Device Datasheet
  • I-Intel MAX 10 yedatha yedivayisi
Ukusetshenziswa kwamandla we-BLVDS
Uma kuqhathaniswa nobunye ubuchwepheshe bamabhasi asebenza kahle kakhulu njenge-Gunning Transceiver Logic (GTL), esebenzisa ngaphezu kuka-40 mA, i-BLVDS ivamise ukukhipha okwamanje ebangeni lika-10 mA. Okwesiboneloample, ngokusekelwe esilinganisweni se-Cyclone III Early Power Estimator (EPE) sezimpawu zamandla ezijwayelekile zamadivayisi e-Cyclone III endaweni yokushisa ye-ambient engu-25° C, ukusetshenziswa kwamandla okumaphakathi kwebhafa ye-BLVDS eqondiswa kabili ngenani ledatha elingu-50 MHz nokuphumayo. inikwe amandla u-50% wesikhathi cishe u-17 mW.
  • Ngaphambi kokufaka idizayini yakho kudivayisi, sebenzisa i-EPE esekelwe ku-Excel kudivayisi esekelwe oyisebenzisayo ukuze uthole ubukhulu obulinganiselwe bokusetshenziswa kwamandla kwe-BLVDS I/O.
  •  Ukuze uthole amaphinikhodi okokufaka kanye ne-bidirectional, ibhafa yokufaka ye-BLVDS ihlala ivuliwe. Ibhafa yokufaka ye-BLVDS idla amandla uma kukhona umsebenzi oshintshayo ebhasini (ngokwesiboneloample, amanye ama-transceiver athumela futhi amukela idatha, kodwa idivayisi ye-Cyclone III akuwona umamukeli ohlosiwe).
  •  Uma usebenzisa i-BLVDS njengebhafa yokokufaka kuma-multidrop noma njengesibafa se-bidirectional kuzinhlelo zokusebenza zamaphuzu amaningi, i-Intel incoma ukuthi kufakwe inani lokuguqula elihlanganisa yonke imisebenzi ebhasini, hhayi nje imisebenzi ehloselwe isilondolozi se-Intel sedivayisi ye-BLVDS.

Example ye-BLVDS I/O Yokungena Kwedatha ku-EPE
Lesi sibalo sibonisa ukungena kwe-BLVDS I/O ku-Cyclone III EPE. Ukuze uthole amazinga e-I/O ukuze ukhethe ku-EPE yamanye amadivayisi e-Intel asekelwayo, bheka ulwazi oluhlobene.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 06I-Intel incoma ukuthi usebenzise Ithuluzi le-Intel Quartus Prime Power Analyzer ukuze wenze ukuhlaziya okunembile kwamandla e-BLVDS I/O ngemva kokuqeda umklamo wakho. Ithuluzi Lokuhlaziya Amandla lilinganisela amandla ngokusekelwe kumininingwane yedizayini ngemva kokuqedwa kwendawo nomzila. Ithuluzi Lokuhlaziya Amandla lisebenzisa inhlanganisela yemisebenzi yesignali efakwe umsebenzisi, esuselwe kukulingisa, kanye nelinganiselwe, okuthi, kuhlanganiswe namamodeli wesekethe anemininingwane, akhiphe izilinganiso zamandla ezinembe kakhulu.
Ulwazi Oluhlobene

  • Isahluko sokuhlaziya amandla, I-Intel Quartus Prime Pro Edition Handbook
    Inikeza ulwazi olwengeziwe mayelana nethuluzi le-Intel Quartus Prime Pro Edition Power Analyzer le-Intel Stratix 10, Intel Arria 10, kanye nemindeni yedivayisi ye-Intel Cyclone 10 GX.
  • Isahluko sokuhlaziya amandla, I-Intel Quartus Prime Standard Edition Handbook
    Inikeza ulwazi olwengeziwe mayelana nethuluzi le-Intel Quartus Prime Standard Edition Power Analyzer le-Stratix V, Stratix IV, Stratix III, Arria V, Arria II, Intel Cyclone 10 LP, Cyclone V, Cyclone IV, Cyclone III LS, Cyclone III, ne-Intel MAX 10 imindeni yedivayisi.
  • Ikhasi le-Early Power Estimators (EPE) kanye ne-Power Analyzer
    Inikeza ulwazi olwengeziwe mayelana ne-EPE kanye nethuluzi le-Intel Quartus Prime Power Analyzer.
  • Ukusebenzisa Isixhumi esibonakalayo se-Bus LVDS emindenini yedivayisi ye-Intel FPGA esekelwe ekhasini lesi-3
    Ifaka kuhlu izilinganiso ze-I/O ozokhethwa ku-EPE ukuze ulinganisele ukusetshenziswa kwamandla kwe-BLVDS.

I-BLVDS Design Example
Umklamo exampI-le ikubonisa ukuthi usifaka kanjani isilondolozi se-BLVDS I/O kumadivayisi asekelwayo anenhloso evamile efanelekile yamakhodi e-I/O (GPIO) kusofthiwe ye-Intel Quartus Prime.

  •  I-Intel Stratix 10, i-Intel Arria 10, ne-Intel Cyclone 10 GX amadivayisi—sebenzisa i-GPIO Intel FPGA IP core.
  •  Amadivayisi we-Intel MAX 10—sebenzisa i-GPIO Lite Intel FPGA IP core.
  •  Wonke amanye amadivayisi asekelwayo—sebenzisa i-ALTIOBUF IP core.

Ungalanda i-ex designample kusuka kusixhumanisi solwazi oluhlobene. Ngesibonelo sebhafa ye-BLVDS I/O, i-Intel incoma izinto ezilandelayo:

  •  Sebenzisa i-GPIO IP core kumodi yokuqondiswa kabili futhi imodi yokuhlukanisa ivuliwe.
  •  Nikeza izinga le-I/O kumaphini wokuqondiswa kabili:
  •  I-BLVDS—Intel Cyclone 10 LP, Cyclone IV, Cyclone III, kanye namadivayisi we-Intel MAX 10.
  •  I-SSTL-2 Ikilasi I noma Ikilasi II—i-Stratix V, i-Stratix IV, i-Stratix III, i-Arria V, i-Arria II, ne-Cyclone V ehlukile.
  • Umehluko we-SSTL-18 Ikilasi I noma Ikilasi II—Intel Stratix 10, Intel Arria 10, kanye namadivayisi we-Intel Cyclone 10 GX.

Okokufaka noma Izibhafa Zokukhiphayo Ngesikhathi Sokusebenza Kokubhala Nokufunda

Bhala Ukusebenza (i-BLVDS I/O Buffer) Umsebenzi Wokufunda (Ibhafa Yokufaka Ehlukile)
  • Thola ukusakazwa kwedatha ye-serial kusuka kumongo we-FPGA ngembobo yokufaka ye-doutp
  •  Dala inguqulo ehlanekezelwe yedatha
  • Dlulisa idatha ngamabhafa okukhiphayo amabili anesiphetho esisodwa axhunywe kuphinikhodi ye-p kanye ne-n bidirectional
  • Thola idatha evela ebhasini ngokusebenzisa izikhonkwane ze-p kanye ne-n bidirectional
  • Ithumela idatha ye-serial kumongo we-FPGA ngembobo ye-din
  • Imbobo ye-oe ithola isignali ye-oe kusuka kumongo wedivayisi ukuze inike amandla noma ikhubaze amabhafa okukhiphayo anesiphetho esisodwa.
  •  Gcina isignali ye-o iphansi ukuze usho kathathu amabhafa okukhiphayo phakathi nomsebenzi wokufunda.
  •  Umsebenzi we-AND wesango ukumisa isignali edlulisiwe ukuthi ibuyele emuva kumongo wedivayisi. Ibhafa yokufaka ehlukile ihlala ivuliwe.

Ulwazi Oluhlobene

  •  I/O Buffer (ALTIOBUF) IP Core User Guide
  •  I-GPIO IP Core User Guide
  •  I-Intel MAX 10 I/O Imihlahlandlela Yokusebenzisa
  • Isingeniso se-Intel FPGA IP Cores
  • I-Design Exampngaphansi kwe-AN 522

Ihlinzeka ngomklamo we-Intel Quartus Prime exampkancane ezisetshenziswe kule nothi yohlelo lokusebenza.
I-Design Example Izinkombandlela ze-Intel Stratix 10 Amadivayisi
Lezi zinyathelo zisebenza kumadivayisi we-Intel Stratix 10 kuphela. Qinisekisa ukuthi usebenzisa i-GPIO Intel FPGA IP core.

  1. Dala i-GPIO Intel FPGA IP core engasekela okokufaka okuphindwe kabili nokukhipha ibhafa:
    • a. Faka i-GPIO Intel FPGA IP core.
    • b. Ku-Data Direction, khetha i-Bidir.
    • c. Ngobubanzi bedatha, faka u-1.
    • d. Vula Sebenzisa ibhafa ehlukile.
    • e. Kumodi yokubhalisa, khetha lutho.
  2. Xhuma amamojula nezimbobo zokufaka nokuphumayo njengoba kukhonjisiwe esithombeni esilandelayo:
    Uxhumano Lwezimbobo Okokufaka Nokukhiphayo Example ye-Intel Stratix 10 AmadivayisiI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 07
  3. Kumhleli Womsebenzi Womsebenzi, yabela izinga elifanele le-I/O njengoba kuboniswe esithombeni esilandelayo. Ungakwazi futhi ukusetha amandla amanje kanye nezinketho zesilinganiso sokubulala. Uma kungenjalo, isoftware ye-Intel Quartus Prime ithatha izilungiselelo ezizenzakalelayo.
    Isabelo se-BLVDS I/O ku-Intel Quartus Prime Assignment Editor ye-Intel Stratix 10 DevicesI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 08
  4. Hlanganisa futhi wenze ukulingisa okusebenzayo nge-ModelSim* - Intel FPGA Edition software.

Ulwazi Oluhlobene

  • I-ModelSim – Intel FPGA Edition Software Support
    Inikeza ulwazi olwengeziwe mayelana nesofthiwe ye-ModelSim - Intel FPGA Edition futhi iqukethe izixhumanisi ezihlukahlukene zezihloko ezinjengokufaka, ukusetshenziswa, nokuxazulula izinkinga.
  • Amazinga we-I/O we-BLVDS Interface kumadivayisi we-Intel FPGA ekhasini lesi-7
    Iklelisa izikhonkwane kanye namazinga e-I/O ongawabela mathupha kumadivayisi e-Intel FPGA asekelwayo wezinhlelo zokusebenza ze-BLVDS.
  • I-Design Exampngaphansi kwe-AN 522
    Ihlinzeka ngomklamo we-Intel Quartus Prime exampkancane ezisetshenziswe kule nothi yohlelo lokusebenza.

I-Design Example Izinkombandlela ze-Intel Arria 10 Amadivayisi
Lezi zinyathelo zisebenza kumadivayisi we-Intel Arria 10 asebenzisa i-Intel Quartus Prime Standard Edition kuphela. Qinisekisa ukuthi usebenzisa i-GPIO Intel FPGA IP core.

  1. Vula i-StratixV_blvds.qar file ukungenisa umklamo we-Stratix V example software ye-Intel Quartus Prime Standard Edition.
  2. Thutha i-ex yedizayiniample ukusebenzisa i-GPIO Intel FPGA IP core:
    • a. Kumenyu, khetha Iphrojekthi ➤ Thuthukisa Izingxenye Ze-IP.
    • b. Chofoza kabili into ethi “ALIOBUF”.
      Iwindi le-MegaWizard Plug-In Manager le-ALTIOBUF IP core liyavela.
    • c. Vala iphrojekthi yokufanisa/okuzenzakalelayo.
    • d. Kumndeni wedivayisi okhethiwe manje, khetha i-Arria 10.
    • e. Chofoza okuthi Qeda bese uchofoza okuthi Qeda futhi.
    • f. Ebhokisini lengxoxo elivelayo, chofoza okuthi KULUNGILE.
      Isoftware ye-Intel Quartus Prime Pro Edition yenza inqubo yokufuduka bese ikhombisa umhleli wepharamitha we-GPIO IP.
  3. Lungiselela i-GPIO Intel FPGA IP core ukuze usekele okokufaka okuphindwe kabili nokukhipha ibhafa:
    • a. Ku-Data Direction, khetha i-Bidir.
    • b. Ngobubanzi bedatha, faka u-1.
    • c. Vula Sebenzisa ibhafa ehlukile.
    • d. Chofoza okuthi Qeda bese ukhiqiza i-IP core.
  4. Xhuma amamojula nezimbobo zokufaka nokuphumayo njengoba kukhonjisiwe esithombeni esilandelayo:
    Uxhumano Lwezimbobo Okokufaka Nokukhiphayo Example ye-Intel Arria 10 AmadivayisiI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 09
  5. Kumhleli Womsebenzi Womsebenzi, yabela izinga elifanele le-I/O njengoba kuboniswe esithombeni esilandelayo. Ungakwazi futhi ukusetha amandla amanje kanye nezinketho zesilinganiso sokubulala. Uma kungenjalo, isofthiwe ye-Intel Quartus Prime Standard Edition ithatha izilungiselelo ezizenzakalelayo zamadivayisi we-Intel Arria 10—Umehluko we-SSTL-18 Class I noma Class II I/O standard.
    Isabelo se-BLVDS I/O ku-Intel Quartus Prime Assignment Editor ye-Intel Arria 10 DevicesI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 10Qaphela:
    Kumadivayisi we-Intel Arria 10, ungakwazi ukwabela kokubili izindawo zephinikhodi ze-p ne-n zamaphini we-LVDS ngomhleli Womsebenzi.
  6. Hlanganisa futhi wenze ukulingisa okusebenzayo ngesoftware ye-ModelSim - Intel FPGA Edition.

Ulwazi Oluhlobene

  • I-ModelSim – Intel FPGA Edition Software Support
    Inikeza ulwazi olwengeziwe mayelana nesofthiwe ye-ModelSim - Intel FPGA Edition futhi iqukethe izixhumanisi ezihlukahlukene zezihloko ezinjengokufaka, ukusetshenziswa, nokuxazulula izinkinga.
  • Amazinga we-I/O we-BLVDS Interface kumadivayisi we-Intel FPGA ekhasini lesi-7
    Iklelisa izikhonkwane kanye namazinga e-I/O ongawabela mathupha kumadivayisi e-Intel FPGA asekelwayo wezinhlelo zokusebenza ze-BLVDS.
  • I-Design Exampngaphansi kwe-AN 522
    Ihlinzeka ngomklamo we-Intel Quartus Prime exampkancane ezisetshenziswe kule nothi yohlelo lokusebenza.

I-Design Example Izinkombandlela zamadivayisi we-Intel MAX 10
Lezi zinyathelo zisebenza kumadivayisi we-Intel MAX 10 kuphela. Qinisekisa ukuthi usebenzisa i-GPIO Lite Intel FPGA IP core.

  1. Dala i-GPIO Lite Intel FPGA IP core engasekela okokufaka okuphindwe kabili nokukhipha ibhafa:
    • a. Faka i-GPIO Lite Intel FPGA IP core.
    • b. Ku-Data Direction, khetha i-Bidir.
    • c. Ngobubanzi bedatha, faka u-1.
    • d. Vula Sebenzisa ibhafa yokuhlukanisa mbumbulu.
    • e. Kumodi yokubhalisa, khetha i-Bypass.
  2. Xhuma amamojula nezimbobo zokufaka nokuphumayo njengoba kukhonjisiwe esithombeni esilandelayo:
     Uxhumano Lwezimbobo Okokufaka Nokukhiphayo Example ye-Intel MAX 10 AmadivayisiI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 11
  3. Kumhleli Womsebenzi Womsebenzi, yabela izinga elifanele le-I/O njengoba kuboniswe esithombeni esilandelayo. Ungakwazi futhi ukusetha amandla amanje kanye nezinketho zesilinganiso sokubulala. Uma kungenjalo, isoftware ye-Intel Quartus Prime ithatha izilungiselelo ezizenzakalelayo.
    Isabelo se-BLVDS I/O kusihleli se-Intel Quartus Prime Assignment samadivayisi we-Intel MAX 10I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 12
  4. Hlanganisa futhi wenze ukulingisa okusebenzayo ngesoftware ye-ModelSim - Intel FPGA Edition.

Ulwazi Oluhlobene

  • I-ModelSim – Intel FPGA Edition Software Support
    Inikeza ulwazi olwengeziwe mayelana nesofthiwe ye-ModelSim - Intel FPGA Edition futhi iqukethe izixhumanisi ezihlukahlukene zezihloko ezinjengokufaka, ukusetshenziswa, nokuxazulula izinkinga.
  • Amazinga we-I/O we-BLVDS Interface kumadivayisi we-Intel FPGA ekhasini lesi-7
    Iklelisa izikhonkwane kanye namazinga e-I/O ongawabela mathupha kumadivayisi e-Intel FPGA asekelwayo wezinhlelo zokusebenza ze-BLVDS.
  • I-Design Exampngaphansi kwe-AN 522
    Ihlinzeka ngomklamo we-Intel Quartus Prime exampkancane ezisetshenziswe kule nothi yohlelo lokusebenza.
I-Design Example Imihlahlandlela Yawo Wonke Amadivayisi Asekelwe Ngaphandle kwe-Intel Arria 10, Intel Cyclone 10 GX, ne-Intel MAX 10

Lezi zinyathelo zisebenza kuwo wonke amadivayisi asekelwayo ngaphandle kwe-Intel Arria 10, Intel Cyclone 10 GX, ne-Intel MAX 10. Qinisekisa ukuthi usebenzisa i-ALTIOBUF IP core.

  1.  Dala i-ALTIOBUF IP core engasekela okokufaka okukabili nokukhipha ibhafa:
    • a. Qinisekisa i-ALTIOBUF IP core.
    • b. Lungiselela imojula Njengesigcinalwazi se-bidirectional.
    • c. kokuthi Ithini inombolo yamabhafa azoqiniswa, faka u-1.
    • d. Vula Sebenzisa imodi ehlukile.
  2. Xhuma amamojula nezimbobo zokufaka nokuphumayo njengoba kukhonjisiwe esithombeni esilandelayo:
     Uxhumano Lwezimbobo Okokufaka Nokukhiphayo Example Yawo Wonke Amadivayisi Asekelwe Ngaphandle kwe-Intel Arria 10, i-Intel Cyclone 10 GX, kanye namadivayisi we-Intel MAX 10I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 13
  3. Kumhleli Womsebenzi Wokwenziwa, yabela izinga elifanele le-I/O njengoba liboniswe esithombeni esilandelayo ngokuya ngocingo lwakho. Ungakwazi futhi ukusetha amandla amanje kanye nezinketho zesilinganiso sokubulala. Uma kungenjalo, isoftware ye-Intel Quartus Prime ithatha izilungiselelo ezizenzakalelayo.
    • I-Intel Cyclone 10 LP, i-Cyclone IV, i-Cyclone III, kanye ne-Cyclone III LS amadivayisi—i-BLVDS I/O indinganiso kuya kumaphini wokukhomba kabili okuthi p kanye no-n njengoba kuboniswe emfanekisweni olandelayo.
    • I-Stratix V, i-Stratix IV, i-Stratix III, i-Arria V, i-Arria II, kanye namadivayisi we-Cyclone V—Umehluko we-SSTL-2 Ikilasi I noma i-Class II I/O ejwayelekile.
      Isabelo se-BLVDS I/O ku-Intel Quartus Prime Assignment EditorI-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 14Qaphela: Ungakwazi ukwabela mathupha kokubili izindawo zephinikhodi ze-p ne-n kudivayisi ngayinye esekelwayo ngomhleli Womsebenzi Wokunikwa. Ngamadivaysi asekelwayo namaphinikhodi ongawabela wena ngokwakho, bheka ulwazi oluhlobene.
  4. Hlanganisa futhi wenze ukulingisa okusebenzayo ngesoftware ye-ModelSim - Intel FPGA Edition.

Example Yemiphumela Yokulingisa Okusebenzayo
Uma isignali ye-o igonyelwa, i-BLVDS ikwimodi yokusebenza yokubhala. Uma isignali ye-o isusiwe, i-BLVDS ikwimodi yokusebenza yokufunda.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 15Qaphela:
Ukuze ulingise usebenzisa i-Verilog HDL, ungasebenzisa i-blvds_tb.v testbench, efakwe ku-ex yedizayini efanele.ample.
Ulwazi Oluhlobene

  • I-ModelSim – Intel FPGA Edition Software Support
    Inikeza ulwazi olwengeziwe mayelana nesofthiwe ye-ModelSim - Intel FPGA Edition futhi iqukethe izixhumanisi ezihlukahlukene zezihloko ezinjengokufaka, ukusetshenziswa, nokuxazulula izinkinga.
  • Amazinga we-I/O we-BLVDS Interface kumadivayisi we-Intel FPGA ekhasini lesi-7
    Iklelisa izikhonkwane kanye namazinga e-I/O ongawabela mathupha kumadivayisi e-Intel FPGA asekelwayo wezinhlelo zokusebenza ze-BLVDS.
  • I-Design Exampngaphansi kwe-AN 522
    Ihlinzeka ngomklamo we-Intel Quartus Prime exampkancane ezisetshenziswe kule nothi yohlelo lokusebenza.
Ukuhlaziya Ukusebenza

Ukuhlaziywa kokusebenza kwe-multipoint BLVDS kubonisa umthelela wokunqanyulwa kwebhasi, ukulayisha, izici zomshayeli nomamukeli, kanye nendawo yomamukeli osuka kumshayeli ohlelweni. Ungasebenzisa i-ex ye-BLVDS design efakiweampukuze uhlaziye ukusebenza kohlelo lokusebenza lwamaphoyinti amaningi:

  •  I-Cyclone III BLVDS design example—lesi sibampI-le isebenza kuwo wonke uchungechunge lwedivayisi ye-Stratix, i-Arria, ne-Cyclone esekelwayo. Ngomndeni wedivayisi ye-Intel Arria 10 noma ye-Intel Cyclone 10 GX, udinga ukuthutha i-ex designample kumndeni wedivayisi efanele kuqala ngaphambi kokuthi uyisebenzise.
  • I-Intel MAX 10 BLVDS design example—lesi sibample isebenza kumndeni wedivayisi ye-Intel MAX 10.
  • I-Intel Stratix 10 BLVDS design example—lesi sibample iyasebenza emndenini wedivayisi ye-Intel Stratix 10.

Qaphela:
Ukuhlaziywa kokusebenza kwe-multipoint BLVDS kulesi sigaba kusekelwe ekufanisweni kwemodeli ye-Cyclone III BLVDS yokufaka/yokukhipha ulwazi lwebhafa (IBIS) kuHyperLynx*.
I-Intel incoma ukuthi usebenzise lawa mamodeli we-Intel IBIS ukuze ulingise:

  • I-Stratix III, i-Stratix IV, ne-Stratix V—imodeli ye-SSTL-2 IBIS eqondene nedivayisi ethile
  • Intel Stratix 10, Intel Arria 10(2) kanye namadivayisi we-Intel Cyclone 10 GX:
    •  Ibhafa yokuphumayo—Imodeli ehlukile ye-SSTL-18 IBIS
    • Okokufaka kwebhafa—imodeli ye-LVDS IBIS

Ulwazi Oluhlobene

  • Ikhasi le-Intel FPGA IBIS Model
    Ihlinzeka ngokulandwa kwamamodeli wedivayisi ye-Intel FPGA.
  •  I-Design Exampngaphansi kwe-AN 522
    Ihlinzeka ngomklamo we-Intel Quartus Prime exampkancane ezisetshenziswe kule nothi yohlelo lokusebenza.
Ukusethwa Kwesistimu

 I-Multipoint BLVDS ene-Cyclone III BLVDS Transceivers
Lesi sibalo sibonisa uhlelo lwe-multipoint topology enama-transceivers e-Cyclone III BLVDS ayishumi (aqanjwe ngo-U1 kuya ku-U10).I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 16Ulayini wokuthutha amabhasi kucatshangwa ukuthi unezici ezilandelayo:

  •  Umugqa womdweshu
  •  Ukuphazamiseka kwesici okungu-50 Ω
  • Amandla wesici angu-3.6 pF iyintshi ngayinye
  •  Ubude obungamayintshi angu-10
  • Amamodeli we-Intel Arria 10 IBIS awokuqala futhi awatholakali kumodeli ye-Intel IBIS web ikhasi. Uma udinga lezi zinhlobo zokuqala ze-Intel Arria 10 IBIS, xhumana ne-Intel.
  • Ukuvinjelwa kwesici sebhasi cishe ku-100 Ω
  •  Isikhala phakathi kwe-transceiver ngayinye siyiyintshi elingu-1
  • Ibhasi linqanyulwe kuzo zombili iziphetho nge-termination resistor RT
Ku-exampkuboniswe esithombeni esandulele, izimelambi zokuchema ezihlulekayo zokuthi 130 kΩ kanye no-100 kΩ zidonsela ibhasi endaweni eyaziwayo lapho bonke abashayeli bemiswe kathathu, basusiwe, noma bacishiwe. Ukuze uvimbele ukulayisha ngokweqile kumshayeli kanye nokuhlanekezelwa kwe-waveform, ubukhulu bezinto eziphikisayo ezihlulekayo kufanele kube i-oda elilodwa noma amabili aphezulu kune-RT. Ukuze uvimbele ukuguquguquka okukhulu kwemodi evamile ukuthi kwenzeke phakathi kwezimo zebhasi elisebenzayo kanye nelesifunda-ntathu, indawo emaphakathi ye-fail-safe bias kumele ibe seduze nevolthi ye-offset.tagi-e yomshayeli (+1.25 V). Unganika amandla ibhasi ngezinto ezivamile zamandla (VCC).
Ama-transceivers e-Cyclone III, Cyclone IV, kanye ne-Intel Cyclone 10 LP BLVDS acatshangwa ukuthi anezici ezilandelayo:
  • Amandla edrayivu azenzakalelayo angu-12 mA
  • Izilungiselelo zesilinganiso esinensayo ngokuzenzakalelayo
  • Iphinikhodi ye-transceiver ngayinye engu-6 pF
  •  I-Stub ku-transceiver ngayinye ye-BLVDS iyi-microstrip engu-1-intshi yesici esivimbelayo esingu-50 Ω kanye nekhono lesici elingu-3 pF iyintshi ngayinye.
  •  Amandla okuxhumana (isixhumi, iphedi, kanye ne-PCB) yesidluliseli ngasinye ebhasini sithathwa njenge-2 pF.
  • Ingqikithi yamandla omthwalo ngamunye icishe ibe ngu-11 pF

Ngesikhala sokulayisha esiyiyintshi elingu-1, amandla asabalalisiwe alingana no-11 pF iyintshi ngayinye. Ukunciphisa ukucabangela okubangelwa ama-stubs, futhi futhi ukunciphisa amasignali aphumayo
umshayeli, i-impedance efana ne-50 Ω resistor RS ibekwa ekuphumeni kwe-transceiver ngayinye.

Ukunqanyulwa kwebhasi
Ukuthikamezeka okusebenzayo kwebhasi elilayishwe ngokugcwele ngu-52 Ω uma ushintsha umthamo wesici sebhasi kanye namandla asabalalisiwe ngobude beyunithi yokusetha ungene kuzibalo ezisebenzayo zokuhlukanisa umehluko. Ukuze uthole ubuqotho besignali obuphelele, kufanele ufanise i-RT ne-52 Ω. Izibalo ezilandelayo zibonisa imiphumela yokufanisa-, ngaphansi-, kanye nokuqedwa ngokweqile ku-different waveform (VID) kumaphini okufaka owamukelayo. Izinga ledatha ngu-100 Mbps. Kulezi zibalo, ukuqedwa ngaphansi (RT = 25 Ω) kuphumela ekuboniseni nasekunciphiseni ngokuphawulekayo imajini yomsindo. Kwezinye izimo, ngaphansi kokunqanyulwa kwephula ngisho nomkhawulo womamukeli (VTH = ±100 mV). Uma i-RT ishintshelwa ku-50 Ω, kuba khona imajini yomsindo omkhulu ngokuphathelene ne-VTH futhi ukuboniswa akunakwa.

Umthelela Wokunqanyulwa Kwebhasi (Umshayeli ku-U1, Isamukeli ku-U2)
Kulesi sibalo, i-U1 isebenza njengesidlulisi bese kuthi i-U2 iye ku-U10 ibe ngabamukeli.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 17

Umthelela Wokunqanyulwa Kwebhasi (Umshayeli ku-U1, Isamukeli ku-U10)
Kulesi sibalo, i-U1 isebenza njengesidlulisi bese kuthi i-U2 iye ku-U10 ibe ngabamukeli.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 18

Umthelela Wokunqanyulwa Kwebhasi (Umshayeli ku-U5, Isamukeli ku-U6)
Kulesi sibalo, i-U5 iyisidlulisi kanti abanye bangabamukeli.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 19

Umthelela Wokunqanyulwa Kwebhasi (Umshayeli ku-U5, Isamukeli ku-U10)
Kulesi sibalo, i-U5 iyisidlulisi kanti abanye bangabamukeli.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 20Ukuma okuhlobene komshayeli nomamukeli ebhasini nakho kuthinta ikhwalithi yesiginali eyamukelwe. Umamukeli oseduze kumshayeli uhlangabezana nomthelela omubi kakhulu wolayini wokudlulisa ngoba kule ndawo, izinga lomkhawulo lishesha kakhulu. Lokhu kuba kubi nakakhulu uma umshayeli etholakala phakathi nebhasi.
Okwesiboneloample, qhathanisa noMfanekiso 16 ekhasini 20 kanye noMfanekiso 18 ekhasini 21. I-VID kwesamukeli u-U6 (umshayeli ku-U5) ikhombisa ukukhala okukhulu kunalokho kwesamukeli u-U2 (umshayeli ku-U1). Ngakolunye uhlangothi, izinga lomkhawulo liyehliswa lapho umamukeli etholakala kude nomshayeli. Isikhathi esikhulu kunazo zonke sokukhuphuka esirekhodiwe ngu-1.14 ns lapho umshayeli etholakala ekugcineni kwebhasi (U1) kanye nomamukeli ngakolunye uhlangothi (U10).

Ubude be-Stub
Ubude be-stub ende abukhulisi nje kuphela isikhathi sendiza ukusuka kumshayeli ukuya kowamukelayo, kodwa futhi kuphumela kumthamo omkhulu wokulayisha, okubangela ukubonakaliswa okukhulu.

Umthelela Wokukhuphula Ubude Be-Stub (Umshayeli ku-U1, Isamukeli ku-U10)
Lesi sibalo siqhathanisa i-VID ku-U10 lapho ubude be-stub bukhuphuka busuka ku-intshi eyodwa ukuya kumayintshi amabili futhi umshayeli eku-U1.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 21

Ukuqedwa kweStub
Kufanele uqondanise i-impedance yomshayeli ne-stub character impedance. Ukubeka i-RS resistor termination series ekuphumeni komshayeli kunciphisa kakhulu umthelela omubi wolayini wokudlulisa obangelwa yi-stub eside kanye namazinga onqenqema asheshayo. Ngaphezu kwalokho, i-RS ingashintshwa ukuze kuncishiswe i-VID ukuze ihlangabezane nezimfuneko zomamukeli.

Umthelela Wokunqanyulwa Kwe-Stub (Umshayeli ku-U1, Isamukeli ku-U2 ne-U10)
Lesi sibalo siqhathanisa i-VID ku-U2 ne-U10 lapho i-U1 idlulisa.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 22

Izinga Lokushaya Umshayeli
Izinga lokubulala elisheshayo lisiza ukuthuthukisa isikhathi sokukhuphuka, ikakhulukazi kumamukeli akude kakhulu nomshayeli. Kodwa-ke, izinga lokubulala elisheshayo liphinde likhulise ukukhala ngenxa yokucabanga.

Umthelela we-Driver Edge Rate (Umshayeli ku-U1, Isamukeli ku-U2 ne-U10)
Lesi sibalo sibonisa umphumela wesilinganiso somshayeli. Ukuqhathanisa kwenziwa phakathi kwezinga lokubulala elihamba kancane nelisheshayo elinamandla okushayela angu-12 mA. Umshayeli uku-U1 futhi amagagasi ahlukene e-U2 nase-U10 ayahlolwa.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 23

Ukusebenza Kwesistimu Kukonke

Izinga ledatha eliphakeme kakhulu elisekelwa i-BLVDS enamaphuzu amaningi linqunywa ngokubheka umdwebo weso lomamukeli okude kakhulu ovela kumshayeli. Kule ndawo, isignali edlulisiwe inezinga lonqenqema elihamba kancane futhi ithinta ukuvulwa kwamehlo. Nakuba ikhwalithi yesiginali eyamukelwe kanye negoli lemajini yomsindo lincike ezinhlelweni zokusebenza, ukuvuleka kwamehlo okubanzi, kuba ngcono. Kodwa-ke, kufanele futhi uhlole umamukeli oseduze nomshayeli, ngoba imiphumela yolayini wokudlulisela ivame ukuba mibi kakhulu uma umamukeli etholakala eduze nomshayeli.
Umfanekiso 23. Umdwebo Wamehlo ku-400 Mbps (Umshayeli ku-U1, Isamukeli ku-U2 ne-U10)
Lesi sibalo sibonisa imidwebo yamehlo ku-U2 (ijika elibomvu) kanye ne-U10 (ijika eliluhlaza okwesibhakabhaka) ngenani ledatha elingu-400 Mbps. I-jitter engahleliwe yesikhawu seyunithi engu-1% ithathwa ekufanisweni. Umshayeli uku-U1 enamandla amanje azenzakalelayo kanye nezilungiselelo zesilinganiso sokubulala. Ibhasi ligcwele ngokugcwele i-RT = 50 Ω. Ukuvulwa kwamehlo okuncane kakhulu kuku-U10, okuqhelile kakhulu ku-U1. Ukuphakama kwamehlo sampokuholwa ku-0.5 unit interval ngu-692 mV kanye no-543 mV we-U2 no-U10, ngokulandelana. Kunomkhawulo omkhulu womsindo maqondana ne-VTH = ±100 mV kuzo zombili izimo.I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS ku-FPGA Yedivayisi Esekelwe Imindeni 24

Umlando Wokubuyekezwa Kombhalo we-AN 522: Ukusebenzisa Isixhumi esibonakalayo se-Bus LVDS Emindenini Yedivayisi ye-Intel FPGA Esekelwe

Idokhumenti Inguqulo Izinguquko
2018.07.31
  • Kukhishwe amadivayisi we-Intel Cyclone 10 GX ku-ex designample imihlahlandlela. Yize amadivayisi we-Intel Cyclone 10 GX esekela i-BLVDS, i-design exampLes kule nothi yohlelo lokusebenza ayisekeli amadivayisi we-Intel Cyclone 10 GX.
  • Kulungiswe i-ex yedizayiniampLes guide yamadivayisi we-Intel Arria 10 ukuze ucacise ukuthi i-design example zinyathelo zisekelwa kuphela i-Intel Quartus Prime Standard Edition, hhayi i-Intel Quartus Prime Pro Edition.
2018.06.15
  • Kungezwe ukusekelwa kwamadivayisi we-Intel Stratix 10.
  • Kubuyekezwe izixhumanisi zolwazi oluhlobene.
  •  Iqanjwe kabusha i-Intel FPGA GPIO IP yaba yi-GPIO Intel FPGA IP.
Usuku Inguqulo Izinguquko
Novemba 2017 2017.11.06
  • Usekelo olungeziwe lwamadivayisi e-Intel Cyclone 10 LP.
  • Kubuyekezwe izixhumanisi zolwazi oluhlobene.
  • Kubuyekezwe amagama ajwayelekile e-I/O ukuze alandele ukusetshenziswa okuvamile.
  • Iqanjwe kabusha njenge-Intel, okuhlanganisa amagama wamadivayisi, ama-IP cores, namathuluzi esofthiwe, lapho kusebenza khona.
Meyi 2016 2016.05.02
  • Ukwesekwa okwengeziwe kanye nomklamo example yamadivayisi we-Intel MAX 10.
  • Kuhlelwe kabusha izigaba ezimbalwa ukuze kuthuthukiswe ukucaca.
  • Izimo ezishintshiwe ze I-Quartus II ku I-Quartus Prime.
Juni 2015 2015.06.09
  • Kubuyekezwe i-ex yedizayiniample files.
  • Idizayini ebuyekeziwe example mihlahlandlela:
  •  Ihambise izinyathelo zamadivayisi we-Arria 10 esihlokweni esisha.
  •  Kungezwe izinyathelo zokuthutha i-ex yedizayiniamples ukusebenzisa i-Altera GPIO IP core yamadivayisi we-Arria 10.
  • Kubuyekezwe i-ex yedizayiniampizinyathelo zokufanisa i-ex yedizayini ebuyekeziweampLes.
  • Kubuyekezwe zonke izixhumanisi ukuze zibuyekezwe webindawo yendawo kanye webamadokhumenti asekelwe (uma ekhona).
Agasti 2014 2014.08.18
  •  Inothi lohlelo lokusebenza olubuyekeziwe ukuze kwengezwe usekelo lwedivayisi ye-Arria 10.
  • Kuhlelwe kabusha futhi kwabhalwa kabusha izigaba ezimbalwa ukuze kucace kanye nokubuyekezwa kwesitayela.
  • Isifanekiso esibuyekeziwe.
Juni 2012 2.2
  •  Ibuyekezwe ukuze ifake amadivayisi we-Arria II, i-Arria V, i-Cyclone V, ne-Stratix V.
  • Kubuyekeziwe Ithebula 1 kanye neThebula 2.
Ephreli 2010 2.1 Kubuyekezwe i-ex yedizayiniamplesixhumanisi ku-“Design Example” ingxenye.
Novemba 2009 2.0
  • Kufakwe imindeni yedivayisi ye-Arria II GX, Cyclone III, kanye ne-Cyclone IV kulolu hlelo lokusebenza.
  • Kubuyekeziwe Ithebula 1, Ithebula 2, kanye neThebula 3.
  • Buyekeza uMdwebo 5, uMdwebo 6, uMdwebo 8 ukuya kuMfanekiso 11.
  • Idizayini ebuyekeziwe example files.
Novemba 2008 1.1
  • Kubuyekezwe kusifanekiso esisha
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  •  Kubuyekezwe isahluko esithi “Power Consumption of BLVDS”
  •  Kubuyekeziwe “I-Design Example” isahluko
  • Kushintshwe Umfanekiso 4 ekhasini lesi-7
  •  Kubuyekeziwe “I-Design Example Guidelines” isahluko
  • Kubuyekezwe isahluko esithi “Ukuhlaziya Ukusebenza”
  • Kubuyekeziwe isahluko esithi “Ukunqanyulwa Kwebhasi”
  • Kubuyekezwe isahluko esithi "Isifinyezo".
Julayi 2008 1.0 Ukukhishwa kokuqala.

Amadokhumenti / Izinsiza

I-intel AN 522 Isebenzisa Isixhumi esibonakalayo se-Bus LVDS Emindenini Yedivayisi Ye-FPGA Esekelwe [pdf] Umhlahlandlela Womsebenzisi
AN 522 Ukusebenzisa Ibhasi LVDS Interface Esekelwe FPGA Kudivayisi Imindeni, AN 522, Ukusebenzisa Bus LVDS Interface ku-FPGA Esekelwe Imindeni Yedivayisi, Interface Esekelwe FPGA Kudivayisi Imindeni, FPGA Kudivayisi Imindeni

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