ALTERA Arria 10 Hybrid Memory Cube Controller Design Example

IHybrid Memory Cube Controller Design Example Isikhokelo somsebenzisi sibonelela ngolwazi kuyilo kunye nokusetyenziswa koyilo lwehardware yoMlawuli weHMC example. Isikhokelo sihlaziywa kwi-Quartus Prime Design Suite 16.0 kwaye sagqitywa ukuhlaziywa ngoMeyi 2, 2016.
Uyilo ExampLe Isikhokelo sokuQala ngokukhawuleza sibonelela ngemiyalelo yenyathelo nenyathelo lokuqulunqa, ukulinganisa, ukuvelisa, kunye nokuvavanya i-HMC Controller design ex.ample. Jonga kuMfanekiso 1-1 ukuze ufumane ngaphezuluview yamanyathelo ophuhliso.

Uyilo Eksample Inkcazo

Uyilo lwehardware yoMlawuli weHMC example iquka amacandelo ahlukeneyo afana neBhodi ye-Arria 10 iDivaysi, i-HMC Controller IP Core, Iiwashi kunye nokuSeta kwakhona i-TX PLLs, i-Data yesicelo seGenerator kunye ne-Response Monitor, i-TX/TX FIFO MAC, i-RX MAC, uVavanyo lwe-Avalon-MM Control kunye nee-LED, isiNxibelelwano seSimo soMlawuli , I-Avalon-MM I-2C Master, i-Inititialization State Machine, i-TX Lane Swapper, i-Transceiver x16, i-RX Lane Swapper, i-Arria 10 ye-Transceiver Reconfiguration Interface, kunye ne-HMC Device. Example uyilo ifuna izicwangciso ezithile ukusebenza ngokufanelekileyo kwi Arria 10 GX FPGA Development Kit kunye HMC intombi ikhadi.

Iinkcukacha ezongezelelweyo

Icandelo leeNkcukacha ezoNgezelelweyo libonelela ngeenkcukacha kuluhlu lwesikhokelo kuyilo oluvelisiweyo example, imbali yohlaziyo lwesikhokelo somsebenzisi, izivumelwano zokuchwetheza ezisetyenziswa kwisikhokelo, kunye nendlela yokuqhagamshelana ne-Intel ngenkxaso.

Imiyalelo yokusetyenziswa kwemveliso

Landela le miyalelo ingezantsi ukusebenzisa i-HMC Controller hardware design example:

1. Qokelela uyilo exampusebenzisa i-simulator
2. Yenza ukulinganisa okusebenzayo
3. Veza uyilo example
4. Qokelela uyilo example usebenzisa iQuartus Prime
5. Vavanya uyilo lwehardware

Qaphela ukuba ubumbeko lwehardware kunye novavanyo files yoyilo example zibekwe kwi/example_design/par, ngelixa ukulinganisa files zibekwe kwi/example_design/sim.

Ukukunceda uqonde indlela yokusebenzisa i-Hybrid Memory Cube Controller IP core, i-core features a testbench simulatable kunye noyilo lwehardware ex.ample exhasa ukuhlanganiswa kunye novavanyo lwehardware. Xa uvelisa uyilo exampLe, umhleli weparameter yenza ngokuzenzekelayo i files iyimfuneko ukulinganisa, ukuqulunqa, kunye nokuvavanya uyilo kwihardware. Ungakhuphela uyilo oluhlanganisiweyo kwi-Intel® Arria® 10 GX FPGA Development Kit.

Ulwazi olunxulumeneyo
Hybrid Memory Cube Controller IP Core User Guide

Uyilo Eksample Ulwakhiwo lukavimba weefayili

Ubumbeko lwehardware kunye novavanyo files (uyilo lwehardware example) zibekwe ngaphakathiample_ design_install_dir>/example_design/par. Ukulinganisa files (testbench yokulinganisa kuphela) zikwindawoample_design_install_dir>/example_design/sim.

Uyilo Eksample Components

Uyilo lwehardware yoMlawuli weHMC example iquka la malungu alandelayo:

• I-HMC Controller IP core enewotshi yereferensi ye-CDR isetelwe kwi-125 MHz kunye nemephu ye-RX engagqibekanga kunye nezicwangciso zemephu ze-TX.
  Phawula: Uyilo example ifuna ukuba ezi zicwangciso zisebenze ngokufanelekileyo kwi-Arria 10 GX FPGA Development Kit enekhadi lentombi le-HMC.
• Ingqiqo yomthengi elungelelanisa inkqubo ye-IP engundoqo, kunye nokuveliswa kwepakethi kunye nokujonga.
• JTAG umlawuli onxibelelana ne-Altera System Console. Unxibelelana nengqiqo yomxhasi ngeNkqubo yeConsole.

Udwelisa isitshixo files ukuba ukuphumeza example testbench.

/src/hmcc_example.sv	Uyilo lwehardware yenqanaba eliphezulu example file.
/sim/hmcc_tb.sv	Inqanaba eliphezulu file yokulinganisa.
Izikripthi zeTestbench Phawula: Sebenzisa i-Main enikiweyofile ukwenza ezi scripts.
/sim/run_vsim.do	Iskripthi seModelSim sokusebenzisa i-testbench.
/sim/run_vcs.sh	Iskripthi se-Synopsys VCS sokusebenzisa i-testbench.
/sim/run_ncsim.sh	Iskripthi seCadence NCSim ukuqhuba i-testbench.

Ukuvelisa i-Design Example

Umfanekiso 1-5: Eksample Tab yoYilo kwiHybrid Memory Cube Controller Parameter Editor

Landela la manyathelo ukuvelisa i-Arria 10 yoyilo lwehardware example kunye ne-testbench:

1. KwiKhathalogi ye-IP (Izixhobo> Ikhathalogu ye-IP), khetha i-Arria 10 yesixhobo sosapho ekujoliswe kuso.
2. KwiKhathalogu ye-IP, fumana kwaye ukhethe iHybrid Memory Cube Controller. Iwindow entsha yoKwahluka kwe-IP iyavela.
3. Chaza igama elikwinqanaba eliphezulu lokwahluka kwe-IP yakho. Umhleli weparameter ugcina useto loguqulo lwe IP kwi file igama .qsys.
4. Kufuneka ukhethe isixhobo esithile se-Arria 10 kwindawo yesiXhobo, okanye ugcine isixhobo esihlala sihleli sikhethwa yiQuartus Prime software.
5. Cofa u-Kulungile. Umhleli weparameter ye-IP uyavela.
6. Kwi-IP ithebhu, khankanya iiparamitha zokwahluka kondoqo we-IP yakho.
7. KwiEksampLe thebhu yoYilo, khetha useto lulandelayo loyilo example:
   1. Kuba Khetha uYilo, khetha ukhetho lweBhodi yeNtombi yeHMCC.
   2. Kuba Eksample Design Files, khetha i Ufaniso ukhetho ukuvelisa ibhentshi yovavanyo, kwaye khetha i Udibaniso ukhetho ukuvelisa uyilo lwe hardware ex.ample.
   3. KwiFomathi yeHDL eVelweyo, yiVerilog kuphela ekhoyo.
   4. KwiKhithi yoPhuhliso ekuJoliswe kuyo khetha i-Arria 10 GX FPGA Development Kit (iSilicon yokuvelisa).
      Phawula: Xa ukhetha le khithi, uyilo lwehardware example ibhala phezu ukhetho lwakho lwangaphambili isixhobo kunye nesixhobo kwibhodi ekujoliswe kuyo. Xa uvelisa uyilo exampLe, i-software ye-Intel Quartus Prime idala i-Intel
      Iprojekthi yeQuartus Prime, useto, kunye ne-pin izabelo zebhodi oyikhethileyo. Ukuba awufuni isoftware ijolise kwibhodi ethile, khetha Akukho.
8. Cofa uVelisa Example Design iqhosha

Ukuqonda iTestbench

I-Altera ibonelela ngoyilo example kunye HMC Controller IP core. Uyilo example iyafumaneka kokubini ukulinganisa undoqo we-IP yakho kunye nokuhlanganiswa. Uyilo example kwimisebenzi yokulinganisa njenge-HMC Controller IP core testbench.
Ukuba ucofa uVelisa Example UYilo kwi-HMC Controller parameter editor, i-Quartus Prime software ivelisa i-testbench yokubonisa. Umhleli weparameter uyakukhokelela kwindawo oyifunayo ye-testbench.
Ukulinganisa i-testbench, kufuneka unikeze imodeli yakho yokusebenza yebhasi ye-HMC (BFM). Altera ivavanya uyilo example testbench kunye Micron Hybrid Memory Cube BFM. I-testbench ayibandakanyi imodyuli ye-I2C master, kuba i-Micron HMC BFM ayixhasi kwaye ayifuni ukucwangciswa kwemodyuli ye-I2C.
Ngokulinganisa, i-testbench ilawula i-TX PLL kunye nojongano lwedatha yedatha ukwenza ulandelelwano lwezenzo ezilandelayo:

1. Iqwalasela i-HMC BFM kunye ne-HMC Controller IP engundoqo izinga ledatha kunye nobubanzi betshaneli, kwiNdlela yokuPhendula eVulekileyo yeLuphu.
2. Iseka ikhonkco phakathi kwe-BFM kunye ne-IP core.
3. Ukwalathisa izibuko ezine ezingundoqo ze-IP ukubhala iipakethi ezine zedatha kwi-BFM.
4. Ukwalathisa i-IP engundoqo ukuze ufunde kwakhona idatha evela kwi-BFM.
5. Ijonga ukuba idatha efundiweyo ihambelana nedatha yokubhala.
6. Ukuba idatha iyahambelana, ibonisa TEST_PASSED.

Ukulinganisa i-Design Example Testbench
Umzobo 1-6: Inkqubo

Landela la manyathelo ukulinganisa i-testbench:

1. Kulayini womyalelo, tshintshela kwiample>/uluhlu lwe-sim.
2. Chwetheza yenza izikripthi.
3. Chwetheza omnye kule miyalelo ilandelayo, ngokuxhomekeke kwisilingisi sakho:
4. Ukuya view iziphumo zokulinganisa:
   1. Xa uqhuba i-testbench kuyo nayiphi na i-simulators ezintathu ezixhaswayo, iskripthi senza ulandelelwano lwe-testbench kwaye siloga umsebenzi wesilingisi kwi.ample directory>/example_ uyilo/sim/ .log. yi “vsim”, “ncsim”, okanye “vcs”.
   2. Xa uqhuba i-testbench kuyo nayiphi na i-simulators emithathu exhaswayo, iskripthi sivelisa i-waveform file. Uyakwazi ukwenza umyalelo make _gui ukulayisha i-waveform kwi-simulator-specific waveform viewer.
      Ukuya view imbonakalo yamaza file kwisilinganisi sakho, chwetheza omnye wale miyalelo ilandelayo:

      Ilayisensi yokulinganisa Mentor Graphics ModelSim	Umgca womyalelo yenza vsim_gui	Ifom yamaza File <design example directory>/umzample_design/sim/ mentor/hmcc_wf.wlf
      I-Synopsys Discovery Visual Environment	yenza vcs_gui	<design example directory>/umzample_design/sim/ hmcc_wf.vpd
      ICadence SimVision Waveform	yenza ncsim_gui	<design example directory>/umzample_design/sim/ cadence/hmcc_wf.shm
5. Hlalutya iziphumo. I-testbench ephumeleleyo ithumela kwaye ifumane iipakethi ezilishumi kwizibuko ngalinye, kwaye ibonisa Test_PASSED”

Ukuseka iBhodi

Cwangcisa ibhodi ukuqhuba uyilo lwe hardware example.
Phawula: Qinisekisa ukuba umbane ucinyiwe phambi kokuba utshintshe naziphi na iisetingi.

1. Seta iiswitshi zeDIP kwikhadi lentombi ngolu hlobo lulandelayo:
2. Cwangcisa iswitshi ye-DIP SW1 ukubonisa ityhubhu ye-ID 0:
   

   Tshintsha	Umsebenzi	Ukumisela
   1	CUB[0]	Vula
   2	CUB[1]	Vula
   3	CUB[2]	Vula
   4	—	Ungakhathali

Cwangcisa i-DIP switch SW2 ukucacisa useto lwewotshi:

Tshintsha	Umsebenzi	Ukumisela
1	CLK1_FSEL0	Vula (125 MHz)
2	CLK1_FSEL1	Vula (125 MHz)
3	CLK1_SEL	Vula (iCrystal)
4	—	Ungakhathali

• Qhagamshela ikhadi lentombi le-HMC kwi-Arria 10 FPGA Development Kit usebenzisa i-J8 kunye ne-J10 yekhadi lentombi.
• Seta abatsiba kwiArria 10 GX FPGA Development Kit:
• Yongeza i-shunts kwi-J8 jumper ukukhetha i-1.5 V njengoseto lwe-VCCIO ye-FMC isiqhagamshelanisi B.
• Yongeza i-shunts kwi-J11 jumper ukukhetha i-1.8 V njengoseto lwe-VCCIO ye-FMC isiqhagamshelanisi A.

Ukuqulunqa kunye noVavanyo loYilo Example kwi-Hardware

Ukuqokelela kunye nokuqhuba uvavanyo lokubonisa kwi-hardware design exampLe, landela la manyathelo

1. Qinisekisa uyilo lwehardware exampisizukulwana sigqityiwe.
2. Kwisoftware yeQuartus Prime, vula iprojekthi yeQuartus Primeample_design_install_dir> /example_design/par/hmcc_example.qpf.
3. KwiDashbhodi yokuHlanganisa, cofa uYilo loQoqophiso (uHlelo lwe-Intel Quartus Prime Pro) okanye khetha Ukuqhuba > Qala ukuHlanganisa (Intel Quartus Prime Standard Standard Edition).
4. Emva kokuba wenze i-.sof, landela la manyathelo ukucwangcisa uyilo lwehardware example kwisixhobo seArria 10:
   1. Khetha iZixhobo> uMcwangcisi.
   2. KuMdwelisi weNkqubo, cofa uSeto lweHardware.
   3. Khetha isixhobo sokucwangcisa.
   4. Khetha kwaye wongeze i-Arria 10 GX FPGA yeKhiti yoPhuhliso apho iseshoni yakho ye-Quartus Prime inokuxhuma khona.
   5. Qinisekisa ukuba iMowudi isetelwe ku-JTAG.
   6. Cofa i-Auto Khangela kwaye ukhethe nasiphi na isixhobo.
   7. Cofa kabini isixhobo seArria 10.
   8. Vula i.sof ngaphakathiample_design_install_dir>/exampuyilo/inxalenye/imveliso_ files,
      Phawula: Isoftware yeQuartus Prime itshintsha isixhobo ukuya kwese .sof.
   9. Kumqolo ngeyakho .sof, khangela ibhokisi kwiNkqubo/Qwalasela ikholamu.
   10. Cofa uQalisa.
   11. Emva kokuba isoftware iqwalasele isixhobo ngoyilo lwehardware exampLe, jonga ii-LED zebhodi:
       1. I-LED ebomvu edanyazayo ibonisa ukuba uyilo luyasebenza.
       2. Ii-LED ezimbini eziluhlaza kufutshane ne-LED edanyazayo ebomvu zibonisa ukuba ikhonkco le-HMC liqalisiwe kwaye uvavanyo luphumelele.
       3. I-LED enye ebomvu kufutshane ne-LED edanyazayo ebomvu ibonisa ukuba uvavanyo aluphumelelanga.
   12. Ukhetho. Sebenzisa i-System Console testbench ukujonga iziphumo zovavanyo ezongezelelweyo.
       Phawula: Sebenzisa iConsole yeNkqubo ukujonga iimpawu zesimo kuyilo example xa ibhodi iqhagamshelwe kwikhompyuter yakho ngeJTAG ujongano. I-System Console ibonisa ubume bebhodi ye-LED yokubeka iliso kude, imo yokuqalisa inyathelo ngalinye, kunye nobume besicelo sejenereyitha nganye kunye nomkhangeli wempendulo. I-System Console ikwabonelela ngojongano lokuqalisa okanye ukuqalisa kwakhona uvavanyo.
       1. Khetha iZixhobo> IziXhobo zokuLungisa iNkqubo> Ikhonsoli yeNkqubo.
       2. KwiConsole yeNkqubo, khetha File > Phumeza ushicilelo.
       3. Vula i file <example_design_install_dir>/example_design/par/sysconsole_ testbench.tcl.
       4. Isoftware ilayisha iziphumo zovavanyo lomzobo. Khetha Qalisa kwakhona ukwenza uvavanyo kwakhona.

Ukuqulunqa kunye noVavanyo loYilo Example kwi-Hardware

I-Hybrid Memory Cube Controller Design

Uyilo Eksample Inkcazo

Uyilo example ibonisa ukusebenza kweHybrid Memory Cube Controller IP core. Uyakwazi ukuvelisa uyilo ukusuka ExampLe thebhu yoYilo yeHybrid Memory Cube Controller ujongano lomsebenzisi wegraphic (GUI) kumhleli weparameter yeIP.

Iimbonakalo

• I-I2C master kunye ne-I2C yokuqalisa umatshini wombuso wekhadi lentombi le-HMC kunye noqwalaselo lwe-HMC
• I-ATX PLL kunye ne-transceiver recalibration state machine
• Cela ijeneretha
• Cela ukubeka iliso
• Inkqubo yeConsole interface

IiMfuno zeHardware kunye neSoftware
UAltera usebenzisa le hardware ilandelayo kunye nesoftware ukuvavanya uyilo example:

• Intel Quartus Prime software
• Inkqubo yeConsole
• I-ModelSim-AE, i-Modelsim-SE, i-NCsim (i-Verilog HDL kuphela), okanye isilingisi se-VCS
• Arria 10 GX FPGA Development Kit
• Ikhadi lentombi le-HMC

Inkcazo esebenzayo

I-Altera ibonelela ngoyilo olulungele ukuhlanganiswa example kunye HMC Controller IP core. Olu luyilo example ijolise Arria 10 GX FPGA Development Kit kunye HMC intombi ikhadi edityaniswe ngokusebenzisa izihlanganisi FMC.
Ungasebenzisa uyilo njenge example yodibaniso oluchanekileyo lwe-IP yakho engundoqo kuyilo lwakho, okanye njengoyilo lokuqalisa unokwenza ngokweemfuno zoyilo lwakho. Uyilo example iquka imodyuli ye-I2C master, imodyuli yokuhlaziya i-PLL / CDR, enye i-transceiver yangaphandle ye-PLL IP core, kunye nengqiqo yokuvelisa kunye nokukhangela ukuthengiselana. Uyilo example ithatha isixhobo Micron HMC 15G-SR HMC, nto leyo a fourlisixhobo inki, kwikhadi intombi. Uyilo example ibandakanya umzekelo omnye we-IP engundoqo kwaye idibanisa kwikhonkco enye kwisixhobo se-HMC. Umzobo 2-1: HMC Controller Design Example Block Diagram

Emva kokuba uqwalasele i Arria 10 FPGA ngoyilo example, umlawuli we-I2C uqwalasela iijenereyitha zewotshi ebhodini kunye nesixhobo se-HMC. Xa ulungelelwaniso lugqityiwe, uyilo example ilinganisa i ATX PLL. Ngexesha lokusebenza, isicelo ijenereyitha ivelisa imiyalelo yokufunda nokubhala ukuba i-HMC Controller IP core iyayiqhuba. I-monitor yesicelo ibamba iimpendulo kwi-IP core kwaye ihlolisise ukuchaneka kwayo.

Iimpawu zokunxibelelana
Itheyibhile 2-1: UMlawuli we-HMC IP Core Design Example Imiqondiso

Igama loMqondiso clk_50	Isalathiso Igalelo	Ububanzi (Amasuntswana) 1	Inkcazo 50 MHz ikloko yokufaka.
hssi_refclk	Igalelo	1	Iwotshi yereferensi ye-CDR ye-HMC kunye ne-HMCC IP engundoqo.

Igama loMqondiso hmc_lxrx	Isalathiso Igalelo	Ububanzi (Amasuntswana) Ubalo lwesijelo (16 okanye 8)	Inkcazo I-FPGA transceiver ifumana izikhonkwane.
hmc_lxtx	Isiphumo	Ubalo lwesijelo (16 okanye 8)	Izikhonkwane zokudlulisa i-FPGA.
hmc_ctrl_lxrxps	Igalelo	1	FPGA Transceiver amandla ukugcina ulawulo.
hmc_ctrl_lxtxps	Isiphumo	1	HMC transceiver amandla ukugcina ulawulo.
hmc_ctrl_ferr_n	Igalelo	1	HMC FERR_N imveliso.
hmc_ctrl_p_rst_n	Isiphumo	1	HMC P_RST_N igalelo.
hmc_ctrl_scl	Iindlela ezimbini	1	HMC I2C uqwalaselo iwotshi.
hmc_ctrl_sda	Iindlela ezimbini	1	HMC I2C idatha yoqwalaselo.
fmc0_scl	Isiphumo	1	Engasetyenziswanga. Ukuqhutyelwa phantsi ukukhusela i-FPGA I / O izikhonkwane ukusuka kwi-3.3 V pullup kwikhadi lentombi.
fmc0_sda	Isiphumo	1	Engasetyenziswanga. Ukuqhutyelwa phantsi ukukhusela i-FPGA I / O izikhonkwane ukusuka kwi-3.3 V pullup kwikhadi lentombi.
push_iqhosha	Igalelo	1	Ukucofa iqhosha elisetyenziselwe ukusetwa kwakhona.
ukubetha_kwentliziyo_n	Isiphumo	1	Ukubetha kwentliziyo imveliso ye-LED.
ilinki_init_igqityiwe_n	Isiphumo	1	Ukuqaliswa kwekhonkco kugqibezela ukuphuma kwe-LED.
uvavanyo_luphumelele_n	Isiphumo	1	Uvavanyo luphumelele imveliso ye-LED.
Uvavanyo_aluphumelelanga_n	Isiphumo	1	Uvavanyo aluphumelelanga imveliso ye-LED.

Uyilo Eksample Bhalisa imephu
Itheyibhile 2-2: UMlawuli we-HMC IP Core Design Example Bhalisa imephu

Ukubhalela ezi rejista kusetha kwakhona uyilo.

Amasuntswana 1:0	Igama Lommandla Ukubalwa kwePort	Uhlobo RO	Ixabiso lokuSeta kwakhona Iyahluka	Inkcazo Inani lamazibuko ondoqo we IP umzekelo.
7:2	Igciniwe	RO	0x00

Uluhlu 2-4: BOARD_LEDs Bhalisa
Le rejista ibonisa ubume bee-LED zebhodi

Amasuntswana 0	Igama Lommandla Uvavanyo aluphumelelanga	Uhlobo RO	Ixabiso lokuSeta kwakhona 0x00	Inkcazo Uvavanyo aluphumelelanga.
1	Uvavanyo luphumelele	RO	0x00	Uvavanyo luphumelele.
2	UkuQalisa uQhagamshelwano lwe-HMCC Lugqityiwe	RO	0x00	Ukuqaliswa kwekhonkco le-HMC kugqityiwe kwaye kukulungele ukugcwala.
3	Ukubetha kwentliziyo	RO	0x00	Iyatshintsha xa uyilo luqhuba.
7:4	Igciniwe	RO	0x00

Uluhlu 2-5: TEST_INITIALIZATION_STATUS Bhalisa

Amasuntswana 0	Igama Lommandla Iseti ye-I2C Clock Generator	Uhlobo RO	Ixabiso lokuSeta kwakhona 0x00	Inkcazo Iijenereyitha zewotshi ziqwalaselwe.
1	I-ATX PLL kunye neTransceiver Recalibration iGqibile	RO	0x00	I-ATX PLL kunye nee-transceivers zilungelelaniswe kwakhona kwiwotshi yokufaka.
2	I2C HMC Uqwalaselo Lugqityiwe	RO	0x00	Uqwalaselo lwesixhobo se-HMC ngaphezulu kwe-I2C lugqityiwe.
3	UkuQalisa uQhagamshelwano lwe-HMC Lugqityiwe	RO	0x00	Ukuqaliswa kwekhonkco le-HMC kugqityiwe kwaye kukulungele ukugcwala.
7:4	Igciniwe	RO	0x00

Uluhlu 2-6: PORT_STATUS Bhalisa

Amasuntswana 0	Igama Lommandla Port 0 Izicelo Kulungile	Uhlobo RO	Ixabiso lokuSeta kwakhona 0x00	Inkcazo Ukwenziwa kwesicelo sePort 0 kugqityiwe.
1	Izibuko 0 Iimpendulo Kulungile	RO	0x00	Port 0 impendulo yokujonga idlulile.
2	Port 1 Izicelo Kulungile	RO	0x00	Ukwenziwa kwesicelo sePort 1 kugqityiwe.
3	Izibuko 1 Iimpendulo Kulungile	RO	0x00	Port 1 impendulo yokujonga idlulile.

Amasuntswana 4	Igama Lommandla Port 2 Izicelo Kulungile	Uhlobo RO	Ixabiso lokuSeta kwakhona 0x00	Inkcazo Ukwenziwa kwesicelo sePort 2 kugqityiwe.
5	Izibuko 2 Iimpendulo Kulungile	RO	0x00	Port 2 impendulo yokujonga idlulile.
6	Port 3 Izicelo Kulungile	RO	0x00	Ukwenziwa kwesicelo sePort 3 kugqityiwe.
7	Izibuko 4 Iimpendulo Kulungile	RO	0x00	Port 3 impendulo yokujonga idlulile.

Iinkcukacha ezongezelelweyo

HMC Controller Design Example Imbali yoHlaziyo lweSikhokelo soMsebenzisi
Uluhlu A-1: ​​Imbali yoHlaziyo loxwebhu
Ushwankathela iimpawu ezintsha kunye notshintsho kuyilo exampisikhokelo somsebenzisi we-HMC Controller IP core.

Umhla	Inguqulelo ye-ACDS	Iinguqu
2016.05.02	16.0	Ukukhutshwa kokuqala.

Uqhagamshelana njani ne-Intel
Itheyibhile A-2: Indlela Yokuqhagamshelana ne-Intel
Ukufumana olona lwazi luhlaziyiweyo malunga neemveliso ze-Intel, bhekisa kule theyibhile. Unokuqhagamshelana neofisi yakho yentengiso ye-Intel okanye ummeli weentengiso.

Qhagamshelana	Indlela yonxibelelwano	Idilesi
Uxhaso lobuchwepheshe	Webindawo	www.altera.com/support
Uqeqesho lobuchwephesha	Webindawo	www.altera.com/training
	I-imeyile	FPGATraining@intel.com
Uncwadi lwemveliso	Webindawo	www.altera.com/literature
Inkxaso engekho zobugcisa: ngokubanzi	I-imeyile	nacomp@altera.com

Qhagamshelana   Inkxaso engeyiyo eyobugcisa: ilayisensi yesoftware

Indlela yonxibelelwano   I-imeyile

Idilesi   authorization@altera.com

Ulwazi olunxulumeneyo

• www.altera.com/support
• www.altera.com/training
• custrain@altera.com
• www.altera.com/literature
• nacomp@altera.com
• authorization@altera.com

Iingqungquthela zokuchwetheza

Itheyibhile A-3: Iingqungquthela zokuchwetheza
Udwelisa izivumelwano zokuchwetheza olusetyenziswa luxwebhu

I-ayikhoni yeNgxelo ikuvumela ukuba ungenise ingxelo kwi-Altera malunga noxwebhu. Iindlela zokuqokelela ingxelo ziyahluka ngokufanelekileyo kuxwebhu ngalunye

Intel Corporation. Onke Amalungelo Agciniwe. I-Intel, i-Intel logo, i-Altera, i-Arria, i-Cyclone, i-Enpirion, i-MAX, i-Nios, i-Quartus kunye ne-Stratix amagama kunye neelogo ziimpawu zorhwebo ze-Intel Corporation okanye ii-subsidiaries zayo e-US kunye / okanye kwamanye amazwe. I-Intel iqinisekisa ukusebenza kweFPGA yayo kunye neemveliso zesemiconductor kwiinkcukacha zangoku ngokuhambelana newaranti esemgangathweni ye-Intel, kodwa inelungelo lokwenza utshintsho kuzo naziphi na iimveliso kunye neenkonzo nangaliphi na ixesha ngaphandle kwesaziso. I-Intel ayithathi xanduva okanye ityala elivela kwisicelo okanye ukusetyenziswa kwalo naluphi na ulwazi, imveliso, okanye inkonzo echazwe apha ngaphandle kokuba kuvunyelwene ngokubhaliweyo yi-Intel. Abathengi be-Intel bayacetyiswa ukuba bafumane inguqulelo yamva nje yeenkcazo zesixhobo ngaphambi kokuba baxhomekeke kulo naluphi na ulwazi olupapashiweyo naphambi kokubeka iiodolo zeemveliso okanye iinkonzo.
Amanye amagama kunye neempawu zingabangwa njengempahla yabanye
101 Innovation Drive, San Jose, CA 95134

Okokugqibela uhlaziyo lweQuartus Prime Design Suite: 16.0
UG-20027
2016.05.02
101 IDrayivu yokuQamba
San Jose, CA 95134
www.altera.com

Amaxwebhu / Izibonelelo

ALTERA Arria 10 Hybrid Memory Cube Controller Design Example [pdf] Isikhokelo somsebenzisi Arria 10 Hybrid Memory Cube Controller Design Example, Arria 10, Hybrid Memory Cube Controller Design Example, Uyilo loMlawuli Eksample, Uyilo Eksample

Iimbekiselo

• Incwadi yokusebenzisa