intel Cyclone 10 Native FloatingPoint DSP FPGA IP
Intel® Cyclone® 10 GX Ibile Lilefoofo-Point DSP Intel® FPGA IP Itọsọna olumulo
Iṣatunṣe Intel® Cyclone® 10 GX Ibile Lilefoofo-Point DSP Intel® FPGA IP
Yan awọn paramita oriṣiriṣi lati ṣẹda ipilẹ IP ti o dara fun apẹrẹ rẹ.
- Ninu Intel® Quartus® Prime Pro Edition, ṣẹda iṣẹ akanṣe tuntun ti o fojusi ẹrọ Intel Cyclone® 10 GX kan.
- Ni IP Catalog, tẹ lori Library ➤ DSP ➤ Alakoko DSP ➤ Intel Cyclone 10 GX Native Lilefo loju omi DSP.
Intel Cyclone 10 GX Native Lilefoofo-Point DSP IP Core IP olootu paramita ṣii. - Ninu apoti ifọrọwerọ Iyipada IP Tuntun, tẹ Orukọ Ohun kan sii ki o tẹ O DARA.
- Labẹ Parameters, yan awọn DSP Àdàkọ ati awọn View o fẹ fun ipilẹ IP rẹ
- Ninu DSP Block View, yi aago pada tabi tunto iforukọsilẹ to wulo kọọkan.
- Fun isodipupo Fikun-un tabi Ipo Vector 1, tẹ lori Pq Ni multiplexer ni GUI lati yan titẹ sii lati ibudo chainin tabi ibudo Ax.
- Tẹ aami Adder ni GUI lati yan afikun tabi iyokuro.
- Tẹ lori Pq Jade multiplexer ni GUI lati jeki chainout ibudo.
- Tẹ Ṣẹda HDL.
- Tẹ Pari.
Intel Cyclone 10 GX Native Lilefoofo-Point DSP Intel FPGA IP paramita
Table 1. paramita
Paramita | Iye | Aiyipada Iye | Apejuwe |
DSP Àdàkọ | Isodipupo Fi kun
Ṣe isodipupo Fikun Ilọpo Ipopọ Ipo Vector 1 Ipo fekito 2 |
Isodipupo | Yan ipo iṣiṣẹ ti o fẹ fun bulọọki DSP.
Awọn ti o yan isẹ ti wa ni afihan ni awọn DSP Àkọsílẹ View. |
View | Iforukọsilẹ Mu awọn Iforukọsilẹ ṣiṣẹ | Forukọsilẹ Mu ṣiṣẹ | Awọn aṣayan lati yan ero aago tabi ero atunto fun awọn iforukọsilẹ view. Awọn ti o yan isẹ ti wa ni afihan ni awọn DSP Àkọsílẹ View. |
tesiwaju… |
Paramita | Iye | Aiyipada Iye | Apejuwe |
Yan Forukọsilẹ Mu ṣiṣẹ fun DSP Àkọsílẹ View lati fihan awọn iforukọsilẹ eto clocking. O le yi awọn aago fun kọọkan ninu awọn iforukọsilẹ ni yi view.
Yan Forukọsilẹ Clears fun DSP Àkọsílẹ View lati ṣafihan eto atunto awọn iforukọsilẹ. Tan-an Lo Nikan Ko lati yi eto atunto awọn iforukọsilẹ pada. |
|||
Lo Nikan Ko | Tan tabi pa | Paa | Tan paramita yii ti o ba fẹ atunto ẹyọkan lati tun gbogbo awọn iforukọsilẹ ni bulọọki DSP. Pa paramita yii lati lo oriṣiriṣi awọn ebute oko tunto lati tun awọn iforukọsilẹ.
Tan-an fun ko o 0 lori iforukọsilẹ iṣẹjade; pa fun ko o 1 on o wu Forukọsilẹ. Nu 0 fun awọn iforukọsilẹ titẹ sii nlo aclr[0] ifihan agbara. Nu 1 fun ilojade ati awọn iforukọsilẹ opo gigun ti epo aclr [1] ifihan agbara. Gbogbo awọn iforukọsilẹ titẹ sii lo aclr[0] ifihan agbara atunto. Gbogbo iṣẹjade ati awọn iforukọsilẹ opo gigun ti epo lo aclr[1] ifihan agbara atunto. |
DSP View Dina. | |||
Ẹwọn Ni Multiplexer (14) | Mu Muu ṣiṣẹ | Pa a | Tẹ lori multiplexer lati mu chainin ṣiṣẹ
ibudo. |
Pq Jade Multiplexer (12) | Muu Muu ṣiṣẹ | Pa a | Tẹ lori multiplexer lati mu chainout ṣiṣẹ
ibudo. |
Adder (13) | +
– |
+ | Tẹ lori awọn Adder aami lati yan afikun tabi iyokuro ipo. |
Forukọsilẹ aago
• aago aago (2) • aago (3) • aago az_(4) • ọpọ_pipeline_clock k(5) • ax_chainin_pl_clock k (7) • adder_input_clock (9) Adder_input_2_clock ck (10) • aago_jade (11) • akojo_ aago (1) • accum_pipeline_cl oki (6) • accum_adder_clock k (8) |
Ko si aago 0
aago 1 aago 2 |
aago 0 | Lati fori eyikeyi iforukọsilẹ, yi aago iforukọsilẹ pada si Ko si.
Yi aago iforukọsilẹ pada si: • aago 0 lati lo clk[0] ifihan agbara bi orisun aago • aago 1 lati lo clk[1] ifihan agbara bi orisun aago • aago 2 lati lo clk[2] ifihan agbara bi orisun aago O le yi awọn eto wọnyi pada nigbati o ba yan Forukọsilẹ Mu ṣiṣẹ in View paramita. |
olusin 1. DSP Block View
Table 2. DSP Awọn awoṣe
Awọn awoṣe DSP | Apejuwe |
Isodipupo | Ṣe iṣẹ isodipupo konge ẹyọkan ati pe o kan idogba wọnyi:
• Jade = Ay * Az |
Fi kun | Ṣe afikun konge ẹyọkan tabi iṣẹ iyokuro ati pe o lo awọn idogba wọnyi:.
• Jade = Ay + Ax • Jade = Ay – Ax |
Isodipupo Fi | Ipo yii n ṣe isodipupo konge ẹyọkan, atẹle nipa afikun tabi awọn iṣẹ iyokuro ati lo awọn idogba wọnyi.
• Jade = (Ay * Az) - chainin • Jade = (Ay * Az) + chainin • Jade = (Ay * Az) – Ax • Jade = (Ay * Az) + Ax |
Isodipupo Akojo | Ṣe isodipupo-ojuami lilefoofo atẹle nipa afikun aaye lilefoofo tabi iyokuro pẹlu abajade isodipupo iṣaaju ati pe o kan awọn idogba wọnyi:
• Jade (t) = [Ay (t) * Az (t)] – Jade (t-1) nigba ti akojo ifihan agbara ti wa ni ìṣó ga. • Jade (t) = [Ay (t) * Az (t)] + Jade (t-1) nigbati akojo ibudo ti wa ni ìṣó ga. • Jade (t) = Ay (t) * Az (t) nigbati akojo ibudo ti wa ni ìṣó kekere. |
Ipo fekito 1 | Ṣiṣe isodipupo-ojuami lilefoofo atẹle nipa afikun-ojuami lilefoofo tabi iyokuro pẹlu titẹ sii chainin lati inu dina DSP oniyipada ti tẹlẹ ati pe o kan awọn idogba wọnyi:. |
tesiwaju… |
Awọn awoṣe DSP | Apejuwe |
• Jade = (Ay * Az) - chainin
• Jade = (Ay * Az) + chainin • Jade = (Ay * Az) , chainout = Ax |
|
Ipo fekito 2 | Ṣiṣe isodipupo-ojuami lilefoofo nibiti ipilẹ IP ṣe ifunni abajade isodipupo taara si chainout. Kokoro IP lẹhinna ṣafikun tabi yọkuro igbewọle chainin lati inu bulọọki DSP oniyipada ti tẹlẹ lati Ax titẹ sii bi abajade abajade.
Ipo yii kan awọn idogba wọnyi: • Jade = Ake – chainin , chainout = Ay * Az • Jade = Ax + chainin, chainout = Ay * Az • Jade = Ake, chainout = Ay * Az |
Intel Cyclone 10 GX Abinibi Lilefoofo-Point DSP Intel FPGA IP Awọn ifihan agbara
Nọmba 2. Intel Cyclone 10 GX Abinibi-Point Lilefoofo DSP Intel FPGA IP Awọn ifihan agbara
Nọmba naa ṣe afihan titẹ sii ati awọn ifihan agbara ti IP mojuto.
Tabili 3. Intel Cyclone 10 GX Ibile Lilefoofo-Point DSP Intel FPGA IP Awọn ifihan agbara Input
Orukọ ifihan agbara | Iru | Ìbú | Aiyipada | Apejuwe |
ake[31:0] | Iṣawọle | 32 | Kekere | Input data akero si awọn multiplier. Wa ninu:
Fi ipo kun • isodipupo-Fi mode lai chainin ati chainout ẹya-ara • Ipo fekito 1 • Ipo fekito 2 |
ay[31:0] | Iṣawọle | 32 | Kekere | Input data akero si awọn multiplier.
Wa ni gbogbo awọn ipo iṣiṣẹ lilefoofo-ojuami. |
az[31:0] | Iṣawọle | 32 | Kekere | Input data akero si awọn multiplier. Wa ninu:
• isodipupo Fikun-un isodipupo • Isodipupo Akojo • Ipo fekito 1 • Ipo fekito 2 |
ẹwọn[31:0] | Iṣawọle | 32 | Kekere | So awọn ifihan agbara wọnyi pọ si awọn ifihan agbara chainout lati inu oju omi lilefoofo DSP IP ti iṣaaju. |
klk[2:0] | Iṣawọle | 3 | Kekere | Awọn ifihan agbara aago titẹ sii fun gbogbo awọn iforukọsilẹ.
Awọn ifihan agbara aago wọnyi wa nikan ti eyikeyi ninu awọn iforukọsilẹ igbewọle, awọn iforukọsilẹ opo gigun ti epo, tabi iforukọsilẹ iṣelọpọ ti ṣeto si Aago0 or Aago1 or Aago2. |
eyin[2:0] | Iṣawọle | 3 | Ga | Ṣiṣẹ aago fun clk[2:0]. Awọn ifihan agbara wọnyi nṣiṣẹ-Ga.
• ena[0] wa fun Aago0 • ena[1] wa fun Aago1 • ena[2] wa fun Aago2 |
aclr[1:0] | Iṣawọle | 2 | Kekere | Awọn ifihan agbara titẹ sii Asynchronous fun gbogbo awọn iforukọsilẹ. Awọn ifihan agbara wọnyi jẹ giga-giga.
Lo aclr[0] fun gbogbo awọn iforukọsilẹ titẹ sii ati lilo aclr[1] fun gbogbo opo gigun ti epo ati awọn iforukọsilẹ iṣẹjade. |
akojo | Iṣawọle | 1 | Kekere | Ifihan agbara titẹ sii lati mu ṣiṣẹ tabi mu ẹya-ara ikojọpọ ṣiṣẹ.
• Fi ami ifihan yii han lati jẹ ki esi jẹki abajade paramọlẹ naa. Yọ ifihan agbara yi lati mu siseto esi pada. O le so tabi mu ami-ifihan agbara yi han lakoko akoko ṣiṣe. Wa ni isodipupo Accumulate mode. |
igbejade[31:0] | Abajade | 32 | — | So awọn ifihan agbara wọnyi pọ si awọn ifihan agbara chainin ti mojuto lilefoofo-ojuami DSP IP atẹle. |
abajade[31:0] | Abajade | 32 | — | O wu data akero lati IP mojuto. |
Iwe Itan Atunyẹwo
Awọn iyipada si Intel Cyclone 10 GX abinibi Lilefoofo-Point DSP Intel FPGA IP Itọsọna olumulo
Ọjọ | Ẹya | Awọn iyipada |
Oṣu kọkanla ọdun 2017 | 2017.11.06 | Itusilẹ akọkọ. |
Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn ami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. * Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.
Awọn iwe aṣẹ / Awọn orisun
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intel Cyclone 10 Native FloatingPoint DSP FPGA IP [pdf] Itọsọna olumulo Cyclone 10 Native FloatingPoint DSP FPGA IP, 10 Native FloatingPoint DSP FPGA IP, Native FloatingPoint DSP FPGA IP, FloatingPoint DSP FPGA IP, DSP FPGA IP, FPGA IP |