MICROCHIP RTG4 Addendum RTG4 FPGAs Zane-zane da Jagororin Jigo
Gabatarwa
Wannan ƙari ga AC439: Tsarin allo da Jagororin shimfidawa na RTG4 FPGA Aikace-aikacen Bayanan kula, yana ba da ƙarin bayani, don jaddada cewa tsayin DDR3 jagororin daidaitawa da aka buga a cikin bita 9 ko kuma daga baya suna fifiko akan shimfidar allon da aka yi amfani da shi don kayan haɓakawa na RTG4™. Da farko, kayan haɓaka na RTG4 yana samuwa ne kawai tare da Silicon Injiniya (ES). Bayan fitowar farko, daga baya aka cika kit ɗin tare da daidaitattun matakan saurin gudu (STD) da na'urorin samarwa na -1 gudun RTG4. Lambobin ɓangarori, RTG4-DEV-KIT da RTG4-DEV-KIT-1 sun zo tare da ƙimar saurin STD da na'urori masu saurin saurin -1 bi da bi.
Bugu da ƙari, wannan ƙari ya haɗa da cikakkun bayanai game da halin I/O na na'urar don nau'ikan wutar lantarki da saukar da wutar lantarki daban-daban, da kuma, tabbacin DEVRST_N yayin aiki na yau da kullun.
Binciken Tsarin Kwamitin RTG4-DEV-KIT DDR3
- Kit ɗin ci gaba na RTG4 yana aiwatar da bayanan 32-bit da 4-bit ECC DDR3 dubawa don kowane ginanniyar ginanniyar RTG4 FDDR guda biyu da PHY blocks (FDDR Gabas da Yamma). An tsara hanyar sadarwa ta jiki azaman hanyoyin byte biyar.
- Kit ɗin yana bin gardama ta hanyar zagayawa kamar yadda aka bayyana a cikin Sashen Jagororin Layout na DDR3 na AC439: Tsarin allo da Jagororin shimfidawa na RTG4 FPGA Bayanin Aikace-aikacen. Koyaya, tunda an ƙirƙira wannan kayan haɓakawa kafin buga bayanin kula na aikace-aikacen, bai dace da sabunta ƙa'idodin daidaita tsayin da aka bayyana a bayanin aikace-aikacen ba. A cikin ƙayyadaddun DDR3, akwai iyaka +/- 750 ps akan skew tsakanin data strobe (DQS) da agogon DDR3 (CK) a kowace na'urar ƙwaƙwalwar ajiyar DDR3 yayin ma'amala ta rubutu (DSS).
- Lokacin da aka bi jagororin da suka dace da tsayin daka a cikin AC439 bita 9 ko kuma daga baya na bayanin bayanin aikace-aikacen, tsarin hukumar RTG4 zai cika iyakar tDQSS don duka -1 da na'urori masu saurin STD a duk gabaɗayan tsari, vol.tage, da zafin jiki (PVT) kewayon aiki wanda ke goyan bayan na'urorin samarwa na RTG4. Ana cim ma wannan ta hanyar ƙididdigewa a cikin mafi munin yanayin fitarwa tsakanin DQS da CK a fil ɗin RTG4. Musamman, lokacin amfani da kayan aiki
ginannen mai sarrafa RTG4 FDDR tare da PHY, DQS yana jagorantar CK da 370 ps matsakaicin don na'urar matakin saurin-1 da DQS Jagoran CK ta 447 ps iyakar na'urar matakin saurin STD, a cikin mafi munin yanayi. - Dangane da binciken da aka nuna a cikin Tebu 1-1, RTG4-DEV-KIT-1 ya haɗu da iyakokin tDQSS a kowace na'urar ƙwaƙwalwar ajiya, a mafi munin yanayin aiki don RTG4 FDDR. Koyaya, kamar yadda aka nuna a cikin Tebu 1-2, tsarin RTG4-DEV-KIT, wanda ke cike da na'urori masu saurin STD na RTG4, baya saduwa da tDQSS don na'urorin ƙwaƙwalwar ajiya na huɗu da na biyar a cikin tashi-by topology, a mafi munin yanayin aiki don RTG4 FDDR. Gabaɗaya, ana amfani da RTG4-DEV-KIT a yanayi na yau da kullun, kamar yanayin ɗaki a cikin yanayin lab. Don haka, wannan bincike mafi muni baya aiki ga RTG4-DEV-KIT da aka yi amfani da shi a cikin yanayi na yau da kullun. Binciken yana aiki azaman exampna dalilin da ya sa yana da mahimmanci a bi ƙa'idodin daidaita tsayin DDR3 da aka jera a cikin AC439, don ƙirar allon mai amfani ta hadu da tDQSS don aikace-aikacen jirgin.
- Don ƙarin bayani kan wannan example, da kuma nuna yadda ake ramawa da hannu don shimfidar allon allo na RTG4 wanda ba zai iya saduwa da jagororin daidaita tsayin AC439 DDR3 ba, RTG4-DEV-KIT tare da na'urori masu saurin STD har yanzu suna iya saduwa da tDQSS a kowace na'urar ƙwaƙwalwar ajiya, a mafi munin yanayi, saboda ginannen mai sarrafa RTG4 FDDR tare da PHY yana da ikon jinkirta bayanan ta kowane siginar DteQSne. Ana iya amfani da wannan jujjuyawar tsaye don rage skew tsakanin DQS da CK a na'urar ƙwaƙwalwar ajiya wacce ke da tDQSS> 750 ps. Dubi sashin Horon DRAM, a cikin UG0573: RTG4 FPGA Babban Saurin DDR Interfaces Jagorar Mai amfani don ƙarin bayani game da amfani da sarrafa jinkiri (a cikin rajistar REG_PHY_WR_DQS_SLAVE_RATIO) don DQS yayin yin ciniki. Ana iya amfani da wannan ƙimar jinkiri a cikin Libero® SoC lokacin da ake kunna mai sarrafa FDDR tare da farawa ta atomatik ta hanyar gyara lambar farawa ta CoreABC FDDR mai sarrafa kansa. Ana iya amfani da irin wannan tsari zuwa shimfidar allon mai amfani wanda bai dace da tDQSS ba a kowace na'urar ƙwaƙwalwar ajiya.
Tebur 1-1. Ƙimar RTG4-DEV-KIT-1 tDQSS Ƙididdigar Ƙirar -1 da Interface FDDR1
Hanyar Nazari | Tsawon Agogo (mils) | Jinkirin Yada Agogo (ps) | Tsayin Bayanai (mils) | Yada bayanai n
Jinkiri (ps) |
Bambanci tsakanin CLKDQS
saboda Routing (mils) |
tDQSS a kowane ƙwaƙwalwar ajiya, bayan allon skew+FPGA DQSCLK
skew (ps) |
Ƙwaƙwalwar FPGA-1st | 2578 | 412.48 | 2196 | 351.36 | 61.12 | 431.12 |
Ƙwaƙwalwar FPGA-2 | 3107 | 497.12 | 1936 | 309.76 | 187.36 | 557.36 |
Ƙwaƙwalwar FPGA-3rd | 3634 | 581.44 | 2231 | 356.96 | 224.48 | 594.48 |
Ƙwaƙwalwar FPGA-4 | 4163 | 666.08 | 2084 | 333.44 | 332.64 | 702.64 |
Ƙwaƙwalwar FPGA-5 | 4749 | 759.84 | 2848 | 455.68 | 304.16 | 674.16 |
Lura: A cikin mafi munin yanayi, RTG4 FDDR DDR3 DQS-CLK skew don na'urorin -1 shine matsakaicin 370 ps da mafi ƙarancin 242 ps.
Tebur 1-2. Ƙididdiga na RTG4-DEV-KIT tDQSS don Sassan STD da Interface FDDR1
Hanyar Nazari | Tsawon Agogo (mils) | Jinkirin Yada Agogo
(ps) |
Tsayin Bayanai (mils) | Yada bayanai n Jinkiri (ps) | Bambanci tsakanin CLKDQS
saboda Routing (mils) |
tDQSS a kowane ƙwaƙwalwar ajiya, bayan allon skew+FPGA DQSCLK
skew (ps) |
Ƙwaƙwalwar FPGA-1st | 2578 | 412.48 | 2196 | 351.36 | 61.12 | 508.12 |
Ƙwaƙwalwar FPGA-2 | 3107 | 497.12 | 1936 | 309.76 | 187.36 | 634.36 |
Ƙwaƙwalwar FPGA-3rd | 3634 | 581.44 | 2231 | 356.96 | 224.48 | 671.48 |
Ƙwaƙwalwar FPGA-4 | 4163 | 666.08 | 2084 | 333.44 | 332.64 | 779.64 |
Ƙwaƙwalwar FPGA-5 | 4749 | 759.84 | 2848 | 455.68 | 304.16 | 751.16 |
Lura: A cikin mafi munin yanayi, RTG4 FDDR DDR3 DQS-CLK skew don na'urorin STD shine matsakaicin 447 ps da mafi ƙarancin 302 ps.
Lura: An yi amfani da ƙididdigar jinkirin yaduwar hukumar na 160 ps/inch a cikin wannan bincike misaliample don tunani. Haƙiƙanin jinkirin yada allon allo don allon mai amfani ya dogara da takamaiman hukumar da ake tantancewa.
Tsarin Wuta
Wannan ƙari ga AC439: Tsarin allo da Sharuɗɗan shimfidawa na RTG4 FPGA Aikace-aikacen Bayanan kula, yana ba da ƙarin bayani, don jaddada mahimmancin bin Jagororin Ƙirar Hukumar. Tabbatar ana bin jagororin game da Ƙarfafawa da Ƙarfafawa.
Ƙarfafawa
Tebur mai zuwa yana lissafin shawarwarin da aka ba da shawarar amfani da wutar lantarki da madaidaitan jagororin haɓaka ƙarfin su.
Tebur 2-1. Jagororin Ƙarfafa Ƙarfafawa
Amfani Case | Bukatun Jeri | Hali | Bayanan kula |
DEVRST_N
An tabbatar da lokacin kunna wutar lantarki, har sai duk kayan wutar lantarki na RTG4 sun kai ga yanayin aiki da aka ba da shawarar |
Babu takamaiman ramp-up oda ake bukata. Kawo ramp- up dole ne ya tashi monotonically. | Da zarar VDD da VPP sun isa matakan kunnawa (VDD ~ = 0.55V, VPP ~ = 2.2V) da
An saki DEVRST_N, POR Delay Counter zai yi aiki ~ 40ms hankula (50ms max), sannan ƙarfin na'urar har zuwa aiki yana manne da Figures 11 da 12 (DEVRST_N PUFT) na Jagoran Mai Amfani Mai Kula da Tsari (UG0576). A takaice dai wannan jeri yana ɗaukar 40 ms + 1.72036 ms (na al'ada) daga wurin da aka fito da DEVRST_N. Lura cewa amfani da DEVRST_N na gaba baya jira na'urar POR don yin ƙarfin aiki har zuwa ayyuka masu aiki don haka wannan jerin yana ɗaukar 1.72036 ms kawai (na al'ada). |
Ta hanyar ƙira, abubuwan da aka fitar za a kashe su (watau yawo) yayin ƙarfin wuta. Da zarar ma'aunin POR
an gama, an fito da DEVRST_N kuma duk kayan VDDI I/O sun isa nasu ~ 0.6V bakin kofa, sa'an nan I/Os za a tristated tare da rauni ja-up kunna, har sai da fitarwa canji zuwa mai amfani iko, da Figures 11 da 12 na UG0576. Mahimman abubuwan da aka samu waɗanda dole ne su kasance ƙasa da ƙasa yayin haɓaka wutar lantarki suna buƙatar juzu'i na 1K-ohm na waje. |
DEVRST_N
ja-har zuwa VPP da duk kayayyaki ramp sama a kusan lokaci guda |
VDDPLL dole ne ya zama ba
Ƙarshen wutar lantarki zuwa ramp sama, kuma dole ne ya kai mafi ƙarancin shawarar aiki voltage kafin wadata ta ƙarshe (VDD ko VDDI) ya fara rampdon hana fitowar kulle PLL glitches. Dubi Jagorar Mai Amfani da Albarkatun Clocking RTG4 (UG0586) don bayanin yadda ake amfani da CCC/PLL READY_VDDPLL shigarwa don cire abubuwan da ake buƙata don samar da wutar lantarki na VDDPLL. Ko dai a ɗaure SERDES_x_Lyz_VDDAIO zuwa kayan aiki iri ɗaya da VDD, ko kuma a tabbatar sun kunna wuta lokaci guda. |
Da zarar VDD da VPP sun isa matakin kunnawa (VDD ~ = 0.55V, VPP ~ = 2.2V)
Ma'aunin jinkiri na 50 ms POR zai yi aiki. Ƙarfin na'ura zuwa lokacin aiki yana aiki da shi Hoto na 9 da 10 (VDD PUFT) na Jagorar Mai Amfani da Mai Kula da Tsari (UG0576). A takaice dai, jimlar lokacin shine 57.95636 ms. |
Ta hanyar ƙira, abubuwan da aka fitar za a kashe su (watau yawo) yayin ƙarfin wuta. Da zarar ma'aunin POR
An gama, an saki DEVRST_N kuma duk kayan VDDI IO sun isa nasu ~ 0.6V bakin kofa, sa'an nan I/Os za a tristated tare da rauni ja-up kunna, har sai da fitarwa canji zuwa mai amfani iko, da Figures 9 da 10 na UG0576. Mahimman abubuwan da aka samu waɗanda dole ne su kasance ƙasa da ƙasa yayin haɓaka wutar lantarki suna buƙatar juzu'i na 1K-ohm na waje. |
Amfani Case | Bukatun Jeri | Hali | Bayanan kula |
VDD/ SERDES_VD DAIO -> VPP/VDDPLL
-> |
Jerin da aka jera a cikin Shafin Yanayi.
DEVRST_N an ja-har zuwa VPP. |
Da zarar VDD da VPP sun isa matakin kunnawa (VDD ~ = 0.55V, VPP ~ = 2.2V) 50ms
Ma'aunin jinkirin POR zai yi aiki. Ƙarfin na'ura zuwa lokacin aiki yana manne da Figures 9 da 10 (VDD PUFT) na Jagoran Mai Amfani Mai Kula da Tsari (UG0576). Kammala jerin wutar lantarki na na'urar da ƙarfin aiki zuwa lokacin aiki yana dogara ne akan wadatar VDDI ta ƙarshe wacce aka kunna. |
Ta hanyar ƙira, abubuwan da aka fitar za a kashe su (watau yawo) yayin ƙarfin wuta. Da zarar ma'aunin POR
an gama, an fito da DEVRST_N kuma duk kayan VDDI I/O sun isa nasu ~ 0.6V bakin kofa, to, IOs za a tristated tare da rauni ja-up kunna, har sai da fitarwa canja wuri zuwa mai amfani iko, da Figures 9 da 10 na UG0576. Babu kunnawa mai rauni mai rauni yayin haɓakawa har sai duk abubuwan VDDI sun kai ~ 0.6V. Babban fa'ida na wannan jeri shine na ƙarshe na VDDI wanda ya kai wannan ƙofar kunnawa ba za ta kunna mai rauni mai rauni ba kuma zai canza kai tsaye daga yanayin naƙasasshe zuwa ƙayyadaddun yanayin mai amfani. Wannan na iya taimakawa rage adadin 1K na waje-ƙasa da ake buƙata don ƙira waɗanda ke da yawancin bankunan I/O waɗanda VDDI na ƙarshe ke ƙarfafa su. Ga duk sauran bankunan I/O da aka yi amfani da su ta kowane wadatar VDDI ban da na ƙarshe na samar da VDDI don haɓakawa, mahimman abubuwan da ake buƙata waɗanda dole ne su kasance ƙasa kaɗan yayin haɓaka wutar lantarki suna buƙatar 1K-ohm mai jujjuya ƙasa. |
Jira aƙalla 51ms -> | |||
VDDI (Duk IO
bankuna) |
|||
OR | |||
VDD/ SERDES_VD DAIO -> | |||
VPP/VDDPLL/ 3.3V_VDDI -> | |||
Jira aƙalla 51ms -> | |||
VDDI
(ba-3.3V_VD DI) |
La'akari lokacin DEVRST_N Tabbatarwa da Ƙarfafawa
Idan AC439: Tsarin allo da Jagororin shimfidawa don RTG4 FPGA jagororin bayanin kula da aikace-aikacen ba a bi ba don Allah a sakeview bayanai masu zuwa:
- Don jerin abubuwan da aka ba da wutar lantarki a cikin Tebur 2-2, mai amfani na iya ganin glitches na I/O ko ruɗawa da abubuwan da suka faru na yanzu.
- Kamar yadda aka bayyana a cikin Sanarwar Shawarar Abokin Ciniki (CAN) 19002.5, karkacewa daga jerin saukar da wutar lantarki da aka ba da shawarar a cikin takaddar bayanan RTG4 na iya haifar da ɗan lokaci mai wucewa akan wadatar 1.2V VDD. Idan 3.3V VPP wadata ne ramped saukar kafin 1.2V VDD wadata, wani wucin gadi halin yanzu a kan VDD za a lura kamar yadda VPP da DEVRST_N (powered by VPP) kai kusan 1.0V. Wannan halin yanzu na wucin gadi baya faruwa idan aka kunna VPP ƙasa a ƙarshe, gwargwadon shawarwarin datasheet.
- Girma da tsawon lokaci na wucin gadi na yanzu sun dogara ne da ƙira da aka tsara a cikin FPGA, ƙayyadaddun ƙayyadaddun allon iya daidaita ƙarfin aiki, da martanin wucin gadi na 1.2V vol.tage regulator. A cikin lokuta da ba kasafai ba, an ga wani motsi na wucin gadi har zuwa 25A (ko 30 Watts akan wadatar 1.2V VDD mara kyau). Saboda yanayin rarrabawar wannan halin yanzu na VDD na wucin gadi a duk faɗin masana'anta na FPGA (ba a keɓance shi zuwa wani yanki na musamman ba), da ɗan gajeren lokacin sa, babu damuwa amintacce idan wutar lantarki ta ƙasa ta 25A ko ƙasa da haka.
- A matsayin mafi kyawun aikin ƙira, bi shawarwarin daftarin bayanai don guje wa ɗan gajeren lokaci.
- I/O glitches na iya zama kusan 1.7V akan 1.2 ms.
- Ana iya ganin babban ƙunci akan abubuwan da ke tuƙi Low ko Tristate.
- Ana iya lura da ƙarancin ƙugiya akan abubuwan tuƙi mai girma (ƙananan glitch ba za a iya ragewa ta ƙara 1 KΩ ƙasa ba).
- Ƙaddamar da VDDIx na farko yana ba da damar sauyi na monotonic daga High zuwa Low, amma fitarwa a takaice yana tafiyar da ƙasa wanda zai shafi allon mai amfani wanda ke ƙoƙarin cire kayan fitarwa a waje lokacin da aka kunna RTG4 VDDIx. RTG4 yana buƙatar kada a fitar da I/O Pads a waje sama da VDDIX bankin wadata voltagDon haka idan an ƙara resistor na waje zuwa wani layin dogo na wutar lantarki, yakamata yayi wuta lokaci guda tare da samar da VDDIx.
Tebur 2-2. I/O Glitch Scenarios Lokacin Rashin Bibiyar Shawarar Tsarin Saukar Wuta a AC439Jiha Fitowar Tsohuwar VDD (1.2V) VDDIX (<3.3V) VDDIX (3.3V) VPP (3.3V) DEVRST_N Ƙarfin Ƙarƙashin Hali I/O Glitch A halin yanzu In-Rush I/O Tuƙi Ƙananan ko Ƙarfi Ramp ƙasa bayan VPP a kowane tsari Ramp saukar da farko An ɗaure zuwa VPP Na 1 Ee Ramp sauka a kowane tsari bayan tabbatarwa DEVRST_N Tabbatarwa kafin kowane kayayyaki ramp kasa Na 1 A'a Babban Tuƙi I/O Ramp ƙasa bayan VPP a kowane tsari Ramp saukar da farko An ɗaure zuwa VPP Ee Ee Ramp saukar da kowane tsari kafin VPP Ramp kasa karshe An ɗaure zuwa VPP No2 A'a Ramp sauka a kowane tsari bayan tabbatarwa DEVRST_N Tabbatarwa kafin kowane kayayyaki ramp kasa Ee A'a - Ana ba da shawarar 1 KΩ mai jujjuya ƙasa na waje don rage babban glitch akan mahimmancin I/Os, wanda dole ne ya kasance ƙasa da ƙasa yayin saukarwar wuta.
- Ana ganin ƙananan ƙugiya kawai don I/O wanda aka ja daga waje zuwa wutar lantarki wanda ya kasance mai ƙarfi kamar VPP r.amps kasa. Koyaya, wannan cin zarafin na'urar da aka ba da shawarar yanayin aiki tunda dole ne PAD ya zama babba bayan daidaitaccen VDDIX r.amps kasa.
- Idan an tabbatar da DEVRST_N, mai amfani na iya ganin ƙaramin ƙulli akan kowane fitarwa I/O wanda ke tuki mai tsayi kuma shima a waje yana jan sama ta hanyar resistor zuwa VDDI. Don misaliample, tare da 1KΩ resistor mai cirewa, ƙaramin glitch yana kaiwa ƙaramin voltage na 0.4V tare da tsawon lokaci na 200 ns na iya faruwa kafin a yi maganin fitarwa.
Lura: DEVRST_N ba dole ba ne a ja sama da VPP voltage. Don guje wa abubuwan da ke sama ana ba da shawarar sosai a bi jerin abubuwan da aka kunna wutar lantarki da ƙasa da aka bayyana a cikin AC439: Tsarin allo da Jagororin shimfidawa na RTG4 FPGA Bayanin Aikace-aikacen.
Tarihin Bita
Tarihin bita ya bayyana canje-canjen da aka aiwatar a cikin takaddar. Canje-canjen an jera su ta bita, farawa da ɗaba'ar yanzu.
Table 3-1. Tarihin Bita
Bita | Kwanan wata | Bayani |
A | 04/2022 | • A lokacin da'awar DEVRST_N, duk RTG4 I/Os za a daidaita su. Abubuwan da masana'anta na FPGA ke fitar da su da tsayin daka a waje na iya samun ɗan ƙaranci kafin shigar da yanayin tristate. Dole ne a bincika ƙirar allo mai irin wannan yanayin fitarwa don fahimtar tasirin haɗin kai zuwa abubuwan FPGA waɗanda za su iya yin kuskure lokacin da aka tabbatar da DEVRST_N. Don ƙarin bayani, duba Mataki na 5 a sashe
2.2. La'akari lokacin DEVRST_N Tabbatarwa da Ƙarfafawa. • Sake suna Ƙarfin Ƙarfi zuwa sashe na 2.2. La'akari lokacin DEVRST_N Tabbatarwa da Ƙarfafawa. • Canza zuwa samfurin Microchip. |
2 | 02/2022 | • Ƙara sashin Ƙarfafawa.
• Ƙara sashin Sequencing Power. |
1 | 07/2019 | Buga na farko na wannan takarda. |
Tallafin FPGA Microchip
Ƙungiyar samfuran Microchip FPGA tana goyan bayan samfuran ta tare da sabis na tallafi daban-daban, gami da Sabis na Abokin Ciniki, Cibiyar Tallafin Fasaha ta Abokin Ciniki, a website, da ofisoshin tallace-tallace na duniya. Ana ba abokan ciniki shawarar ziyartar albarkatun kan layi na Microchip kafin tuntuɓar tallafi saboda da yuwuwar an riga an amsa tambayoyinsu.
Tuntuɓi Cibiyar Tallafawa Fasaha ta hanyar webYanar Gizo a www.microchip.com/support. Ambaci lambar Sashe na Na'urar FPGA, zaɓi nau'in shari'ar da ta dace, da ƙaddamar da ƙira files yayin ƙirƙirar shari'ar tallafin fasaha.
Tuntuɓi Sabis na Abokin Ciniki don tallafin samfur mara fasaha, kamar farashin samfur, haɓaka samfur, sabunta bayanai, matsayin tsari, da izini.
- Daga Arewacin Amirka, kira 800.262.1060
- sauran duniya, kira 650.318.4460
- Fax, daga ko'ina cikin duniya, 650.318.8044
Microchip Website
Microchip yana ba da tallafin kan layi ta hanyar mu websaiti a www.microchip.com/. Wannan webana amfani da site don yin files da bayanai cikin sauƙin samuwa ga abokan ciniki. Wasu daga cikin abubuwan da ake samu sun haɗa da:
- Tallafin samfur - Takaddun bayanai da errata, bayanin kula da aikace-aikacen sampshirye-shirye, albarkatun ƙira, jagororin mai amfani da takaddun tallafi na hardware, sabbin fitattun software da software da aka adana
- Babban Tallafin Fasaha - Tambayoyi akai-akai (FAQs), buƙatun tallafin fasaha, ƙungiyoyin tattaunawa akan layi, jerin membobin shirin abokan hulɗa na Microchip
- Kasuwancin Microchip - Mai zaɓin samfura da jagororin oda, sabbin sabbin labarai na Microchip, jerin tarurrukan karawa juna sani da abubuwan da suka faru, jerin ofisoshin tallace-tallace na Microchip, masu rarrabawa da wakilan masana'anta
Sabis ɗin Sanarwa Canjin samfur
Sabis ɗin sanarwar canjin samfur na Microchip yana taimakawa abokan ciniki su kasance a halin yanzu akan samfuran Microchip. Masu biyan kuɗi za su karɓi sanarwar imel a duk lokacin da aka sami canje-canje, sabuntawa, bita ko ƙirƙira masu alaƙa da ƙayyadadden dangin samfur ko kayan aikin haɓaka na ban sha'awa.
Don yin rajista, je zuwa www.microchip.com/pcn kuma bi umarnin rajista.
Tallafin Abokin Ciniki
Masu amfani da samfuran Microchip na iya samun taimako ta hanyoyi da yawa:
- Mai Rarraba ko Wakili
- Ofishin Talla na Gida
- Injiniyan Magance Ciki (ESE)
- Goyon bayan sana'a
Abokan ciniki yakamata su tuntuɓi mai rarraba su, wakilin ko ESE don tallafi. Hakanan akwai ofisoshin tallace-tallace na gida don taimakawa abokan ciniki. An haɗa lissafin ofisoshin tallace-tallace da wurare a cikin wannan takarda.
Ana samun tallafin fasaha ta hanyar websaiti a: www.microchip.com/support
Siffar Kariyar Lambar Na'urorin Microchip
Kula da cikakkun bayanai masu zuwa na fasalin kariyar lambar akan samfuran Microchip:
- Samfuran Microchip sun haɗu da ƙayyadaddun bayanai da ke ƙunshe a cikin takamaiman takaddar bayanan Microchip ɗin su.
- Microchip ya yi imanin cewa dangin samfuran sa suna da tsaro lokacin da aka yi amfani da su ta hanyar da aka yi niyya, cikin ƙayyadaddun aiki, da kuma ƙarƙashin yanayi na yau da kullun.
- Ƙimar Microchip kuma tana kare haƙƙin mallaka na fasaha da ƙarfi. Ƙoƙarin keta fasalulluka na kariyar lambar samfurin Microchip an haramta shi sosai kuma yana iya keta dokar haƙƙin mallaka na Millennium Digital.
- Babu Microchip ko duk wani masana'anta na semiconductor ba zai iya tabbatar da amincin lambar sa ba. Kariyar lambar ba yana nufin muna ba da garantin cewa samfurin “ba zai karye ba”. Kariyar lambar tana ci gaba da haɓakawa. Microchip ya himmatu don ci gaba da haɓaka fasalin kariyar lambar samfuranmu.
Sanarwa na Shari'a
- Ana iya amfani da wannan ɗaba'ar da bayanin nan tare da samfuran Microchip kawai, gami da ƙira, gwadawa, da haɗa samfuran Microchip tare da aikace-aikacenku. Amfani da wannan bayanin ta kowace hanya ya saba wa waɗannan sharuɗɗan. Bayani game da aikace-aikacen na'ura an bayar da shi ne kawai don dacewa kuma ana iya maye gurbinsa
by updates. Alhakin ku ne don tabbatar da cewa aikace-aikacenku ya dace da ƙayyadaddun bayananku. Tuntuɓi ofishin tallace-tallace na Microchip na gida don ƙarin tallafi ko, sami ƙarin tallafi a www.microchip.com/en-us/support/design-help/client-support-services. - WANNAN BAYANI AN BAYAR DA MICROCHIP "KAMAR YADDA". MICROCHIP BA YA YI WAKILI KO GARANTI KOWANE IRI KO BAYANI KO BAYANI, RUBUCE KO BAKI, Dokoki
KO IN BA haka ba, DANGANE DA BAYANIN HADA AMMA BAI IYA IYAKA GA WANI GARANTI BAYANIN KARYA, KYAUTATA, DA KWANTA GA MUSAMMAN MANUFAR, KO GARANTIN DA KE DANGANTA GA SHARUDINSA, ARZIKI. - BABU WANI FARKO MICROCHIP BA ZAI IYA HANNU GA DUK WATA BAYANI NA MUSAMMAN, HUKUNCI, MASU FARU, KO SAKAMAKON RASHI, LALATA, KUDI, KO KUDI NA KOWANE IRIN ABINDA YA DANGANE BAYANI KO SAMUN HANYAR AMFANINSA, ANA SHAWARAR DA YIWU KO LALACEWAR DA AKE SANYA. ZUWA CIKAKKIYAR DOKA, JAMA'AR DOKAR MICROCHIP A KAN DUK DA'AWA A KOWANE HANYA DAKE DANGANTA BAYANI KO AMFANINSA BA ZAI WUCE YAWAN KUDADE BA, IDAN WATA, CEWA KA BIYA GASKIYA GA GADON.
Amfani da na'urorin Microchip a cikin tallafin rayuwa da/ko aikace-aikacen aminci gabaɗaya yana cikin haɗarin mai siye, kuma mai siye ya yarda ya kare, ramuwa da riƙe Microchip mara lahani daga kowane lalacewa, iƙirari, dacewa, ko kashe kuɗi sakamakon irin wannan amfani. Ba a isar da lasisi, a fakaice ko akasin haka, ƙarƙashin kowane haƙƙin mallaka na Microchip sai dai in an faɗi haka.
Alamomin kasuwanci
- Sunan Microchip da tambarin, tambarin Microchip, Adaptec, AnyRate, AVR, tambarin AVR, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LAN maXStyMD, Link maXTouch, MediaLB, megaAVR, Microsemi, tambarin Microsemi, MAFI YAWAN tambari, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, tambarin PIC32, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash , Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, da XMEGA alamun kasuwanci ne masu rijista na Microchip Technology Incorporated a cikin Amurka da wasu ƙasashe.
- AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Shuru- Waya, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, WinPath, da ZL alamun kasuwanci ne masu rijista na Microchip Technology Incorporated a cikin Amurka
- Maɓallin Maɓalli na kusa, AKS, Analog-for-da-Digital Age, Duk wani Capacitor, AnyIn, AnyOut, Ƙaƙwalwar Sauyawa, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Matsakaicin Matsakaicin DAMM , ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Daidaitawar hankali, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, Tambarin Tambarin MPLAB, MPLIB, MPLINK, MultiTRAK, NetDetach, NVM Express, NVMe, Ƙwararren Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REUTERS , Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Jimiri, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, da ZENA alamun kasuwanci ne na Fasahar Microchip Incorporated a cikin
Amurka da sauran kasashe. - SQTP alamar sabis ce ta Microchip Technology Incorporated a cikin Amurka Tambarin Adaptec, Frequency on Buƙata, Fasahar Adana Silicon, Symmcom, da Amintaccen Lokaci alamun kasuwanci ne masu rijista na Microchip Technology Inc. a wasu ƙasashe.
- GestIC alamar kasuwanci ce mai rijista ta Microchip Technology Germany II GmbH & Co. KG, reshen Microchip Technology Inc., a wasu ƙasashe.
Duk sauran alamun kasuwanci da aka ambata a nan mallakin kamfanoninsu ne.
© 2022, Microchip Technology Incorporated da rassanta. Duka Hakkoki.
ISBN: 978-1-6683-0362-7
Tsarin Gudanar da inganci
Don bayani game da Tsarin Gudanar da Ingancin Microchip, da fatan za a ziyarci www.microchip.com/quality.
Kasuwanci da Sabis na Duniya
AMURKA | ASIA/PACIFIC | ASIA/PACIFIC | TURAI |
Ofishin Kamfanin
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Goyon bayan sana'a: www.microchip.com/support Web Adireshi: www.microchip.com Atlanta Dulut, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itace, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Ofishin Jakadancin Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Kanada - Toronto Tel: 905-695-1980 Fax: 905-695-2078 |
Ostiraliya - Sydney
Lambar waya: 61-2-9868-6733 China - Beijing Lambar waya: 86-10-8569-7000 China - Chengdu Lambar waya: 86-28-8665-5511 China - Chongqing Lambar waya: 86-23-8980-9588 China - Dongguan Lambar waya: 86-769-8702-9880 China - Guangzhou Lambar waya: 86-20-8755-8029 China - Hangzhou Lambar waya: 86-571-8792-8115 China - Hong Kong SAR Lambar waya: 852-2943-5100 China - Nanjing Lambar waya: 86-25-8473-2460 China - Qingdao Lambar waya: 86-532-8502-7355 China - Shanghai Lambar waya: 86-21-3326-8000 China - Shenyang Lambar waya: 86-24-2334-2829 China - Shenzhen Lambar waya: 86-755-8864-2200 China - Suzhou Lambar waya: 86-186-6233-1526 China - Wuhan Lambar waya: 86-27-5980-5300 China - Xian Lambar waya: 86-29-8833-7252 China - Xiamen Lambar waya: 86-592-2388138 China - Zhuhai Lambar waya: 86-756-3210040 |
Indiya - Bangalore
Lambar waya: 91-80-3090-4444 Indiya - New Delhi Lambar waya: 91-11-4160-8631 Indiya - Pune Lambar waya: 91-20-4121-0141 Japan - Osaka Lambar waya: 81-6-6152-7160 Japan - Tokyo Lambar waya: 81-3-6880-3770 Koriya - Daegu Lambar waya: 82-53-744-4301 Koriya - Seoul Lambar waya: 82-2-554-7200 Malaysia - Kuala Lumpur Lambar waya: 60-3-7651-7906 Malaysia - Penang Lambar waya: 60-4-227-8870 Philippines - Manila Lambar waya: 63-2-634-9065 Singapore Lambar waya: 65-6334-8870 Taiwan - Hsin Chu Lambar waya: 886-3-577-8366 Taiwan - Kaohsiung Lambar waya: 886-7-213-7830 Taiwan - Taipei Lambar waya: 886-2-2508-8600 Thailand - Bangkok Lambar waya: 66-2-694-1351 Vietnam - Ho Chi Minh Lambar waya: 84-28-5448-2100 |
Ostiriya - Wels
Lambar waya: 43-7242-2244-39 Saukewa: 43-7242-2244-393 Denmark - Copenhagen Lambar waya: 45-4485-5910 Fax: 45-4485-2829 Finland - Espoo Lambar waya: 358-9-4520-820 Faransa - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Jamus - Garching Lambar waya: 49-8931-9700 Jamus - Han Lambar waya: 49-2129-3766400 Jamus - Heilbronn Lambar waya: 49-7131-72400 Jamus - Karlsruhe Lambar waya: 49-721-625370 Jamus - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Jamus - Rosenheim Lambar waya: 49-8031-354-560 Isra'ila - Ra'ana Lambar waya: 972-9-744-7705 Italiya - Milan Lambar waya: 39-0331-742611 Fax: 39-0331-466781 Italiya - Padova Lambar waya: 39-049-7625286 Netherlands - Drunen Lambar waya: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Lambar waya: 47-72884388 Poland - Warsaw Lambar waya: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Lambar waya: 46-8-5090-4654 UK - Wokingham Lambar waya: 44-118-921-5800 Saukewa: 44-118-921-5820 |
© 2022 Microchip Technology Inc. da rassansa
Takardu / Albarkatu
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MICROCHIP RTG4 Addendum RTG4 FPGAs Zane-zane da Jagororin Jigo [pdf] Jagorar mai amfani RTG4 Addendum RTG4 FPGAs Tsarin Gudanarwa da Jagororin Jigo, RTG4, Ƙirar RTG4 FPGAs Tsarin Hukumar da Jagororin Jigo, Ƙira da Jagororin Jigo. |