STMicroelectronics STM32MP133C F 32-bit Arm Cortex-A7 1GHz MPU User Guide

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1 STMicroelectronics STM32MP133C F 32-bit Arm Cortex-A7 1GHz MPU

2 Zvinotsanangurwa

3 Arm Cortex-A7 Subsystem

4 Ndangariro

5 DDR Controller

6 FAQs

7 Zvinyorwa / Zvishandiso

7.1 References

8 Related Posts

STMicroelectronics STM32MP133C F 32-bit Arm Cortex-A7 1GHz MPU

Zvinotsanangurwa

Core: Arm Cortex-A7
Memory: Yekunze SDRAM, Yakamisikidzwa SRAM

Dhata Bhazi: 16-bit parallel interface
Chengetedzo/Kuchengeteka: Reset uye Power Management, LPLV-Stop2, Standby

Package: LFBGA, TFBGA ine min pitch 0.5 mm
Clock Management

General-chinangwa Input/Outputs
Interconnect Matrix

4 DMA Vatongi
Nhaurirano Peripherals: Kusvikira ku29

Analog Peripherals: 6
Nguva: Kusvikira ku24, Watchdogs: 2

Hardware Kuwedzera
Debug Mode

Fuse: 3072-bit inosanganisira yakasarudzika ID uye HUK yeAES 256 makiyi
ECOPACK2 inoenderana

Arm Cortex-A7 Subsystem

Iyo Arm Cortex-A7 subsystem yeSTM32MP133C/F inopa…

Ndangariro

Chishandiso ichi chinosanganisira Yekunze SDRAM uye Yakamisikidzwa SRAM yekuchengetedza data…

DDR Controller

Iyo DDR3/DDR3L/LPDDR2/LPDDR3 controller inobata ndangariro kuwana…

Power Supply Management
Iyo magetsi ekupa chirongwa uye maneja anovimbisa kugadzikana kwemagetsi kuendesa ...

Clock Management
Iyo RCC inobata kugovera wachi uye zvigadziriso…

General-purpose Input/Outputs (GPIOs)
Iwo maGPIO anopa maitiro ekugonesa kune ekunze zvishandiso…

TrustZone Dziviriro Controller
Iyo ETZPC inosimudzira kuchengetedzwa kwehurongwa nekugadzirisa kodzero dzekuwana…

Bhazi-Interconnect Matrix
Iyo matrix inofambisa kuendesa data pakati pemamodule akasiyana…

FAQs

Mubvunzo: Ndeipi huwandu hwepamusoro hwema peripherals ekutaurirana anotsigirwa?
A: Iyo STM32MP133C/F inotsigira anosvika makumi maviri nemapfumbamwe ekutaurirana.

Mubvunzo: Mangani ma analogi peripherals aripo?
A: Chishandiso chinopa 6 analog peripherals kune akasiyana analogi mabasa.

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STM32MP133C STM32MP133F

Arm® Cortex®-A7 kusvika ku1 GHz, 2×ETH, 2×CAN FD, 2×ADC, 24 timers, odhiyo, crypto uye adv. kuchengeteka
Datasheet - kugadzira data

Features
Inosanganisira ST state-of-the-art ine patented tekinoroji
Core
· 32-bit Arm® Cortex®-A7 L1 32-Kbyte I / 32-Kbyte D 128-Kbyte yakabatana nhanho 2 cache Arm® NEONTM uye Arm® TrustZone®

Ndangariro
· Yekunze DDR ndangariro kusvika 1 Gbyte kusvika LPDDR2/LPDDR3-1066 16-bit kusvika DDR3/DDR3L-1066 16-bit
168 Kbytes emukati SRAM: 128 Kbytes eAXI SYSRAM + 32 Kbytes eAHB SRAM uye 8 Kbytes eSRAM muBackup domain
· Dual Quad-SPI memory interface · Flexible ekunze memory controller inosvika
16-bit data bhasi: parallel interface yekubatanidza ekunze ICs uye SLC NAND ndangariro inosvika ku8-bit ECC.
Chengetedzo/chengetedzo
· Chengetedza bhutsu, TrustZone® peripherals, 12 xtampmapini anosanganisira 5 x anoshanda tampers
· Tembiricha, voltage, frequency uye 32 kHz yekutarisa
Dzorerazve uye simba manejimendi
· 1.71 V kusvika 3.6 VI / Os kupa (5 V-kushivirira I / Os) · POR, PDR, PVD uye BOR · On-chip LDOs (USB 1.8 V, 1.1 V) · Backup regulator (~ 0.9 V) · Internal tembiricha sensors · Low-simba modes: Kurara, LPStop, Stop, LPStop
LPLV-Stop2 uye Standby

LFBGA

TFBGA

LFBGA289 (14 × 14mm) Pitch 0.8 mm

TFBGA289 (9 × 9 mm) TFBGA320 (11 × 11 mm)
min pitch 0.5 mm

· DDR kuchengetwa muStandby mode · Zvinodzora zvePMIC shamwari chip

Kutarisira wachi
Oscillator yemukati: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz LSI oscillator
Oscillator Ekunze: 8-48 MHz HSE oscillator, 32.768 kHz LSE oscillator
· 4 × PLLs ane mafractional mode

General-chinangwa kuisa/zvinobuda
Kusvikira ku135 yakachengeteka I/O ports ine kukanganisa kugona
· Kusvika ku6 kumuka

Interconnect matrix
· 2 bhazi matrices 64-bit Arm® AMBA® AXI interconnect, kusvika 266 MHz 32-bit Arm® AMBA® AHB interconnect, kusvika 209 MHz

4 DMA controllers kuburitsa iyo CPU
· 56 nzira dzemuviri dzakazara
1 x yakakwirira-kumhanya general-chinangwa tenzi yakananga ndangariro yekuwana controller (MDMA)
· 3 × mbiri-chiteshi DMAs ine FIFO uye kukumbira router kugona kune yakakwana yeperipheral manejimendi.

Gunyana 2024
Urwu ruzivo rwechigadzirwa mukugadzirwa kwakazara.

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STM32MP133C/F

Anosvika makumi maviri nemaviri ekutaurirana
· 5 × I2C FM+ (1 Mbit/s, SMBus/PMBusTM) · 4 x UART + 4 x UART (12.5 Mbit/s,
ISO7816 interface, LIN, IrDA, SPI) · 5 × SPI (50 Mbit/s, kusanganisira 4 ine yakazara-duplex
I2S odhiyo kirasi yechokwadi kuburikidza nemukati audio PLL kana yekunze wachi)(+2 QUADSPI + 4 neUSART) · 2 × SAI (stereo audio: I2S, PDM, SPDIF Tx) · SPDIF Rx ine 4 inputs · 2 × SDMMC kusvika 8 bits (SD/e ·MMCle × CSD × CAN × 2 ‣ tsigiro protocol · MMCle × SDIO) · SPDIF Rx. USB 2 high-speed Host kana 2.0 × USB 1 high-speed Host

+ 1 × USB 2.0 yakakwirira-kumhanya OTG panguva imwe chete · 2 x Ethernet MAC/GMAC IEEE 1588v2 hardware, MII/RMII/RGMII
6 analog peripherals
· 2 × ADCs ine 12-bit max. resolution inosvika ku5 Msps
1 x tembiricha sensor · 1 x dhijitari sefa ye sigma-delta modulator
(DFSDM) ine 4 chiteshi uye 2 mafirita · Yemukati kana yekunze ADC referensi VREF+
Kusvikira ku24 timers uye 2 watchdogs
2 × 32-bit timers inosvika 4 IC/OC/PWM kana pulse counter uye quadrature (yakawedzera) encoder yekuisa
· 2 × 16-bit advanced timers · 10 × 16-bit general-chinangwa nguva (kusanganisira
2 basic timers isina PWM) · 5 × 16-bit yakaderera-simba nguva · Chengetedza RTC ine sub-sekondi chaiyo uye
hardware karenda · 4 Cortex®-A7 system timers (yakachengeteka,
isina kuchengeteka, chaiyo, hypervisor) · 2 × vakazvimiririra varindi
Hardware acceleration
· AES 128, 192, 256 DES/TDES

2 (yakazvimirira, yakazvimirira yakachengeteka) 5 (2 inochengeteka) 4 5 (3 inochengeteka)
4 + 4 (kusanganisira 2 yakachengetedzeka USART), mamwe anogona kunge ari bhutsu sosi
2 (kusvika mana ekuteerera chiteshi), ine I4S tenzi/muranda, PCM yekuisa, SPDIF-TX 2 ports
Yakamisikidzwa HSPHY neBCD Yakamisikidzwa HS PHY ine BCD (yakachengeteka), inogona kuve sosi yebhutsu
2 × HS yakagovaniswa pakati peHost neOTG 4 yekupinza

2 (1 × TTCAN), wachi calibration, 10 Kbyte yakagovaniswa buffer 2 (8 + 8 bits) (yakachengeteka), e·MMC kana SD inogona kuve yebhutsu sosi 2 sarudzo yakazvimirira magetsi ekushandisa eSD kadhi nzvimbo.
1 (dual-quad) (yakachengeteka), inogona kuve sosi yebhutsu

–
–
Boot
–
Boot
Boot Boot
(1)

Kero yakafanana/data 8/16-bit FMC Parallel AD-mux 8/16-bit
NAND 8/16-bit 10/100M/Gigabit Ethernet DMA Cryptography
Hash Chokwadi random nhamba jenareta Fuse (imwe-nguva inorongwa)

4 × CS, kusvika ku4 × 64 Mbyte
Hongu, 2 × CS, SLC, BCH4/8, inogona kuva bhutsu sosi 2 x (MII, RMI, RGMII) ine PTP uye EEE (yakachengeteka)
3 zviitiko (1 yakachengeteka), 33-channel MDMA PKA (ine DPA dziviriro), DES, TDES, AES (ine DPA dziviriro)
(zvese zvinochengeteka) SHA-1, SHA-224, SHA-256, SHA-384, SHA-512, SHA-3, HMAC
(yakachengeteka) Chokwadi-RNG (yakachengeteka) 3072 mabhiti anoshanda (akachengeteka, 1280 mabhiti anowanikwa kune mushandisi)

–
Bhutsu -
–

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Tsanangudzo

Tafura 1. STM32MP133C/F maficha uye peripheral kuverenga (inoenderera)

STM32MP133CAE STM32MP133FAE STM32MP133CAG STM32MP133FAG STM32MP133CAF STM32MP133FAF Zvakasiyana-siyana

Features

LFBGA289

TFBGA289

TFBGA320

GPIOs nekukanganisa (huwandu kuverenga)

135(2)

Yakachengeteka GPIOs Wakeup pini

Zvose
6

Tamper pini (inoshingaira tamper)

12 (5)

DFSDM Kusvikira ku12-bit yakawiriraniswa ADC

4 makinera ekuisa ane 2 mafirita

–

2 (3) (kusvika ku5 Msps pa12-bit imwe neimwe) (yakachengeteka)

ADC1: 19 nzira dzinosanganisira 1x yemukati, 18 nzira dziripo

12-bit ADC chiteshi muhuwandu (4)

mushandisi kusanganisira 8x musiyano

–

ADC2: 18 nzira dzinosanganisira 6x yemukati, 12 nzira dziripo

mushandisi kusanganisira 6x musiyano

Yemukati ADC VREF VREF+ pini yekupinda

1.65 V, 1.8 V, 2.048 V, 2.5 V kana VREF+ kuisa -
Ehe

1. QUADSPI inogona kutanga kubva kumaGPIO akazvitsaurira kana kushandisa mamwe maFMC Nand8 boot GPIOs (PD4, PD1, PD5, PE9, PD11, PD15 (ona Tafura 7: STM32MP133C/F tsananguro dzebhora).
2. Iyi yakazara GPIO kuverenga inosanganisira ina JTAG GPIOs uye matatu BOOT GPIOs ane mashoma ekushandisa (anogona kupokana nekunze kwechishandiso chinongedzo panguva yemuganho scan kana boot).
3. Kana maADC ese ari maviri ashandiswa, wachi yekernel inofanira kunge yakafanana kune ese maADC uye yakamisikidzwa ADC prescalers haigone kushandiswa.
4. Pamusoro pezvo, kune zvakare machani emukati: - ADC1 yemukati chiteshi: VREFINT - ADC2 yemukati nzira: tembiricha, mukati voltage referensi, VDDCORE, VDDCPU, VDDQ_DDR, VBAT / 4.

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STM32MP133C/F

Mufananidzo 1. STM32MP133C/F block diagram

IC zvinhu

@VDDA

HSI

AXIM: Arm 64-bit AXI yakabatana (266 MHz) T

@VDDCPU

GIC

Cortex-A7 CPU 650/1000 MHz + MMU + FPU + NEONT

32K D$

32K I$

CNT (timer) T

ETM

2561K2B8LK2B$L+2$SCU T
async

128 zvishoma

CSI

LSI

Debug nguvaamp

jenareta TSGEN

DAP
(JTAG/SWD)

SYSRAM 128KB

ROM 128KB

2 x ETH MAC
10/100/1000 (hapana GMII)

FIFO

BKPSRAM 8KB

RNG

HASH

16b PHY

DDRCTRL 58
LPDDR2/3, DDR3/3L

async

CRYP

SAES

DDRMCE T TZC T

DDRPHYC
T

DLY

8b QUADSPI (mbiri) T

16b

FMC

CRC

DLYBSD1

(SDMMC1 DLY kutonga)

DLYBSD2

(SDMMC2 DLY kutonga)

DLYBQS

(QUADSPI DLY control)

FIFO FIFO

DLY DLY

14 8b SDMMC1 T 14 8b SDMMC2 T

PHY

USBH

(2xHS Host)

PLLUSB

FIFO

PKA

FIFO

T MDMA 32 chiteshi

AXIMC TT

17 16b Trace port

ETZPC

IWDG1

@VBAT

BSEC

OTP Fuses

@VDDA

RTC / AWU

TAMP / Backup regs T

@VBAT

LSE (32kHz XTAL)

System nguva STGENC

generation

STGENR

USBPHYC
(USB 2 x PHY kutonga)
IWDG2

@VBAT

@VDDA

VREFBUF

16b LPTIM2

16b LPTIM3

16b LPTIM4

16b LPTIM5

BOOT mapini

SYSCFG

HDP

10 16b TIM1/PWM 10 16b TIM8/PWM

SAI1

SAI2

4ch DFSDM

Buffer 10KB CCU

FDCAN1

FDCAN2

FIFO FIFO
APB2 (100 MHz)

8KB FIFO
APB5 (100MHz)

APB3 (100 MHz)

APB4

async AHB2APB

SRAM1 16KB T SRAM2 8KB T SRAM3 8KB T

AHB2APB

DMA1
8 hova
DMAMUX1
DMA2
8 hova

DMAMUX2

DMA3
8 hova

PMB (process monitor)
DTS (digital temp. sensor)

Voltage regulators

@VDDA

Supply supervision

FIFO

2 × 2 Matrix
AHB2APB

64 bits AXI

64bits AXI tenzi

32 bits AHB 32 bits AHB tenzi

32 bits APB

T TrustZone kuchengetedza kuchengetedza

AHB2APB

APB2 (100 MHz)

APB1 (100 MHz)
FIFO FIFO FIFO FIFO FIFO

MLAHB: Arm 32-bit yakawanda-AHB bhazi matrix (209 MHz)
APB6
FIFO FIFO FIFO FIFO

@VBAT
T
FIFO

HSE (XTAL)

PLL1/2/3/4

RCC

T PWR

ZVAKAWANDA

16ext

176

USBO

(OTG HS)

PHY

12b ADC1

12b ADC2

GPIOA

16b

GPIOB

16b

GPIOC

16b

GPIOD

16b

GPIOE

16b

GPIOF

16b

GPIOG 16b 16

GPIOH

16b

GPIOI

16b

AHB2APB

UART1

Smartcard IrDA

UART2

Smartcard IrDA

SPI4/I2S4

SPI5

I2C3/SMBUS

I2C4/SMBUS

I2C5/SMBUS

Sefa Sefa

TIM12

16b

TIM13

16b

TIM14

16b

TIM15

16b

TIM16

16b

TIM17

16b

TIM2 TIM3 TIM4

32b

16b

TIM5 TIM6 TIM7

32b

16b

LPTIM1 16b

UART3

Smartcard IrDA

UART4

UART5

UART7

UART8

Sefa Sefa

I2C1/SMBUS

I2C2/SMBUS

SPI2/I2S2

SPI3/I2S3

UART6

Smartcard IrDA

SPI1/I2S1

FIFO FIFO

MSv67509V2

DS13875 Rev 5

STM32MP133C/F

Inoshanda pamusoroview

3.1
3.1.1
3.1.2

Arm Cortex-A7 subsystem
Features
· ARMv7-A architecture · 32-Kbyte L1 instruction cache · 32-Kbyte L1 data cache · 128-Kbyte level2 cache · Arm + Thumb®-2 instruction set · Arm TrustZone security technology · Arm NEON advanced SIMD · DSP and SIMD extensions · VFPv4 Hardware virtual tracepoint · VFPv160 Hardware tracepoint · Integrated generic interrupt controller (GIC) ine XNUMX yakagovaniswa peripheral interrupts · Yakabatanidzwa generic timer (CNT)
Overview
Iyo Cortex-A7 processor ndeye simba-inoshanda-inoshanda processor processor yakagadzirirwa kupa hupfumi hwekuita mumapfekero epamusoro-soro, uye mamwe mashoma-simba akaiswa uye kushandiswa kwevatengi. Inopa anosvika makumi maviri muzana kuita kwetambo imwe chete kupfuura iyo Cortex-A20 uye inopa kuita kwakafanana pane iyo Cortex-A5.
Iyo Cortex-A7 inosanganisa ese maficha epamusoro-inoshanda Cortex-A15 uye CortexA17 processors, kusanganisira virtualization rutsigiro muhardware, NEON, uye 128-bit AMBA 4 AXI bhazi interface.
Iyo Cortex-A7 processor inovaka pane iyo-inoshanda simba 8-stage pombi yeCortex-A5 processor. Iyo inobatsirawo kubva kune yakasanganiswa L2 cache yakagadzirirwa yakaderera-simba, ine yakaderera transaction latencies uye yakagadziridzwa OS rutsigiro rwekuchengetedza cache. Pamusoro peizvi, kune yakagadziridzwa kufanotaura kwebazi uye yakagadziridzwa memory system performance, ine 64-bit loadstore nzira, 128-bit AMBA 4 AXI mabhazi uye yakawedzera TLB saizi (256 kupinda, kumusoro kubva 128 kupinda kweCortex-A9 uye Cortex-A5), kuwedzera kuita kwemabasa makuru akadai se. web kubhurawuza.
Thumb-2 tekinoroji
Inopa kuita kwepamusoro kwechinyakare Arm kodhi uku ichipawo kusvika ku30% kudzikiswa kwechinodikanwa chendangariro chekuchengetedza mirairo.
TrustZone tekinoroji
Inovimbisa kuita kwakavimbika kwekuchengetedza zvikumbiro kubva pakutonga kodzero dzedhijitari kusvika kukubhadhara kwemagetsi. Rutsigiro rwakakura kubva kune tekinoroji uye indasitiri vanodyidzana.

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Inoshanda pamusoroview

STM32MP133C/F

NEON
NEON tekinoroji inogona kukurumidzira multimedia uye chiratidzo chekugadzirisa algorithms senge vhidhiyo encode/decode, 2D/3D mifananidzo, mutambo, odhiyo uye kutaura kugadzirisa, kugadzirisa mifananidzo, runhare, uye inzwi synthesis. Iyo Cortex-A7 inopa injini inopa zvese mashandiro uye kushanda kweCortex-A7 inoyangarara-point unit (FPU) uye kuita kweNEON yepamberi SIMD yekuraira yakaiswa kuti iwedzere kukwidziridza midhiya uye chiratidzo chekugadzirisa mabasa. NEON inowedzera Cortex-A7 processor FPU kuti ipe quad-MAC uye yekuwedzera 64-bit uye 128-bit register set inotsigira akapfuma seti yekushanda kweSIMD pamusoro pe8-, 16- uye 32-bit integer uye 32-bit inoyangarara-point data huwandu.
Hardware virtualization
Yakanyanya mashandiro emahara erutsigiro rwe data manejimendi uye arbitration, apo akawanda software nharaunda uye maapplication avo anokwanisa kuwana panguva imwe chete kugona kwehurongwa. Izvi zvinogonesa kuzadzikiswa kwemidziyo yakasimba, ine chaiwo nharaunda dzakanyatsoparadzaniswa kubva kune imwe neimwe.
Yakagadziridzwa L1 cache
Kuita uye simba rakagadziridzwa L1 cache rinobatanidza kushoma kuwana latency matekiniki ekuwedzera kuita uye kuderedza mashandisiro emagetsi.
Yakabatanidzwa L2 cache controller
Inopa yakaderera-latency uye yakakwirira-bandwidth yekuwana kune cached memory mune yakakwira-frequency, kana kuderedza mashandisiro emagetsi ane chekuita ne-off-chip memory yekuwana.
Cortex-A7 inoyangarara-point unit (FPU)
Iyo FPU inopa yakakwira-inoshanda imwechete uye yakapetwa kaviri chaiyo inoyangarara-poindi mirayiridzo inoenderana neArm VFPv4 architecture iri software inoenderana nezvizvarwa zvakapfuura zveArm floating-point coprocessor.
Snoop control unit (SCU)
Iyo SCU ine basa rekugadzirisa iyo yekubatanidza, kukakavara, kutaurirana, cache kune cache uye sisitimu yekuchinjisa ndangariro, cache kubatana uye humwe hunyanzvi hwe processor.
Kubatana kwehurongwa uku kunoderedzawo kuoma kwesoftware kunobatanidzwa mukuchengetedza kuwirirana kwesoftware mukati memutyairi wega wega OS.
Generic interrupt controller (GIC)
Kushandisa iyo yakamisikidzwa uye yakadhirowa inovhiringidza controller, iyo GIC inopa yakapfuma uye inochinjika nzira yekupindirana-processor kutaurirana uye nzira uye kuisa pamberi peiyo system kukanganisa.
Kutsigira kusvika ku192 yakazvimiririra inovhiringidza, pasi pesoftware control, hardware inoiswa pamberi, uye inofambiswa pakati peiyo inoshanda sisitimu uye TrustZone software manejimendi layer.
Uku kuchinjika kwenzira uye tsigiro ye virtualization yekuvhiringidza mukati meiyo inoshanda sisitimu, inopa imwe yeakakosha maficha anodiwa kusimudzira kugona kwemhinduro uchishandisa hypervisor.

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Inoshanda pamusoroview

3.2
3.2.1
3.2.2

Ndangariro
SDRAM yekunze
Zvishandiso zveSTM32MP133C/F zvakadzvanya chidzora chekunze SDRAM chinotsigira zvinotevera: · LPDDR2 kana LPDDR3, 16-bit data, kusvika ku1 Gbyte, kusvika pa533 MHz wachi · DDR3 kana DDR3L, 16-bit data, kusvika pa1 Gbyte, kusvika pa533 MHz.
Yakaiswa SRAM
Zvese zvishandiso zvine chekuita: · SYSRAM: 128 Kbytes (ine programmable size yakachengeteka zone) · AHB SRAM: 32 Kbytes (yakachengeteka) · BKPSRAM (backup SRAM): 8 Kbytes
Zviri mukati meiyi nharaunda inodzivirirwa kubva pazvingangove zvisingadiwe kunyora zvinyorwa, uye zvinogona kuchengetwa muStandby kana VBAT modhi. BKPSRAM inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.

3.3

DDR3/DDR3L/LPDDR2/LPDDR3 controller (DDRCTRL)

DDRCTRL yakasanganiswa neDDRPHYC inopa yakakwana memory interface mhinduro yeDDR memory subsystem. · Imwe 64-bit AMBA 4 AXI ports interface (XPI) · AXI wachi asynchronous kune controller · DDR memory cypher injini (DDRMCE) ine AES-128 DDR pa-the-fly nyora
encryption/read decryption. · Zvinotsigirwa zviyero:
JEDEC DDR3 SDRAM tsanangudzo, JESD79-3E yeDDR3/3L ine 16-bit interface.
JEDEC LPDDR2 SDRAM tsanangudzo, JESD209-2E yeLPDDR2 ine 16-bit interface.
JEDEC LPDDR3 SDRAM tsanangudzo, JESD209-3B yeLPDDR3 ine 16-bit interface.
· Yepamberi scheduler uye SDRAM yekuraira jenareta · Programmable yakazara data upamhi (16-bit) kana hafu yedata yakafara (8-bit) · Yepamberi QoS Tsigiro ine matatu traffic kirasi pakuverenga uye maviri traffic makirasi pane kunyora
AXI ports · Rutsigiro rwunogoneka rwekubuda kureba sarudzo (4, 8, 16) · Nyora musanganiswa kuti ubvumire akawanda kunyora kukero imwe chete kuti abatanidzwe kuita
kunyora kumwe chete · Single rank kumisikidza

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Inoshanda pamusoroview

STM32MP133C/F

· Tsigiro ye otomatiki SDRAM simba-pasi yekupinda uye kubuda kunokonzerwa nekushaikwa kwekutengesa kwekusvika kwenguva inorongwa
· Tsigiro ye otomatiki wachi yekumira (LPDDR2/3) yekupinda uye kubuda kunokonzerwa nekushaikwa kwekusvika kwekutengeserana
· Tsigiro ye otomatiki yakaderera-simba modhi mashandiro anokonzerwa nekushaikwa kwekusvika kwekutengesa kwenguva inorongwa kuburikidza nehardware yakaderera-simba interface.
· Programmable paging policy · Tsigiro ye otomatiki kana pasi pesoftware control self-refresh yekupinda nekubuda
LPDDR3) · Tsigiro yeyakajeka SDRAM modhi register inogadziridza pasi pekutonga kwesoftware
mabhengi ebhangi · Mushandisi-akasarudzwa anodzoreredza kudzora sarudzo · DDRPERFM yakabatana block kuti ibatsire kutarisa kwekuita uye kugadzirisa
DDRCTRL uye DDRPHYC inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.
Iyo DDRMCE (DDR memory cypher injini) maficha makuru akanyorwa pazasi: · AXI system bus master/slave interfaces (64-bit) · In-line encryption (yekunyora) uye decryption (yekuverenga), zvichibva payakaiswa firewall.
programming · Maviri encryption modhi padunhu (yepamusoro dunhu rimwe): hapana encryption (bypass mode),
block cipher modhi · Kutanga uye kupera kwematunhu anotsanangurwa ne 64-Kbyte granularity · Default kusefa (dunhu 0): chero mukana unopihwa · Dunhu rekuwana kusefa: hapana
Inotsigirwa block cipher: AES Inotsigirwa ketani modhi · Block mode ine AES cipher inoenderana neECB modhi yakatsanangurwa muNIST FIPS kuburitswa 197 advanced encryption standard (AES), ine kiyi yakabatana yekubvisa basa rakavakirwa paKeccak-400 algorithm yakabudiswa pa https://keccak.team. website. · Imwe seti yekunyora-chete uye inovharika master kiyi marejista · AHB yekumisikidza chiteshi, ane rombo anoziva

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3.4

TrustZone kero nzvimbo controller yeDDR (TZC)

TZC inoshandiswa kusefa mapindiro ekuverenga/kunyora kune DDR controller zvinoenderana nekodzero dzeTrustZone uye zvinoenderana neasina kuchengeteka tenzi (NSAID) munzvimbo dzinosvika mapfumbamwe dzinorongwa: · Kugadziriswa kunotsigirwa nesoftware yakavimbika chete · Imwe sefa unit · Matunhu mapfumbamwe:
Dunhu 0 rinogara rakagoneswa uye rinovhara kero yese renji. Matunhu 1 kusvika 8 ane programmable base-/end-address uye anogona kupihwa
chero imwe kana ese masefa. · Mvumo yekupinda yakachengeteka uye isina kuchengetedzwa yakarongwa dunhu rega · Kupinda kusina kuchengetedzeka kwakasefa maererano neNSAID · Matunhu anodzorwa nesefa imwe chete haafanire kupindirana · Kukundikana modes nekukanganisa uye/kana kukanganisa · Kubvuma kugona = 256 · Muchengeti wegedhi logic yekugonesa uye kudzima yefirita yega yega · Kufungidzira kupinda.

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3.5

Bhutsu modes

Pakutanga, iyo bhutsu sosi inoshandiswa nemukati boot ROM inosarudzwa neBOOT pini uye OTP byte.

Tafura 2. Boot modes

BOOT2 BOOT1 BOOT0 Yekutanga bhutsu modhi

Comments

Mirira chinongedzo chiri kuuya pa:

UART uye USB (1)

USART3/6 uye UART4/5/7/8 pamapini akasarudzika

USB yakakwira-kumhanya mudziyo paOTG_HS_DP/DM mapini(2)

1 Serial NOR flash(3) Serial NOR flash paQUADSPI(5)

e·MMC(3)

e·MMC paSDMMC2 (default)(5)(6)

NAND flash(3)

SLC NAND flash paFMC

Bhutsu yekuvandudza (hapana flash memory boot)

Inoshandiswa kuwana debug yekuwana pasina bhutsu kubva kuflash memory (4)

SD kadhi (3)

SD kadhi paSDMMC1 (default)(5)(6)

Mirira chinongedzo chiri kuuya pa:

0 UART uye USB (1) (3) UART3/6 uye UART4/5/7/8 pamapini akasarudzika

USB yakakwira-kumhanya mudziyo paOTG_HS_DP/DM mapini(2)

1 Serial NAND flash(3) Serial NAND flash paQUADSPI(5)

1. Inogona kuvharwa neOTP marongero. 2. USB inoda HSE wachi/crystal (ona AN5474 yemafrequency anotsigirwa ane uye asina OTP marongero). 3. Boot source inogona kuchinjwa neOTP marongero (yeexamptanga bhutsu pakadhi reSD, wozoti e·MMC ine OTP marongero). 4. Cortex®-A7 core in infinite loop toggling PA13. 5. Default pini inogona kuchinjwa neOTP. 6. Neimwe nzira, imwe SDMMC interface kupfuura iyi yakasarudzika inogona kusarudzwa neOTP.

Kunyange zvazvo bhutsu yakaderera ichiitwa uchishandisa wachi dzemukati, ST yakapa mapeji esoftware pamwe chete nenzvimbo huru dzekunze dzakadai seDDR, USB (asi isina kuganhurirwa) inoda kristaro kana oscillator yekunze kuti ibatanidzwe pamapini eHSE.
Ona RM0475 "STM32MP13xx advanced Arm®-based 32-bit MPUs" kana AN5474 "Kutanga neSTM32MP13xx mitsara yekugadzira hardware" yezvipingamupinyi uye kurudziro maererano neHSE pini yekubatanidza uye inotsigirwa frequency.

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3.6

Kutungamirirwa kwemagetsi

3.6.1
Yambiro:

Simba rekupa magetsi
VDD ndiyo huru inopihwa yeI/Os uye chikamu chemukati chakachengetwa chine simba panguva yekumira mode. Inobatsira voltage renji ndeye 1.71 V kusvika 3.6 V (1.8 V, 2.5 V, 3.0 V kana 3.3 V typ.)
VDD_PLL neVDD_ANA dzinofanira kunge dzakabatanidzwa neVDD. VDDCPU ndiyo Cortex-A7 CPU yakatsaurirwa voltage inopa, iyo kukosha kwayo kunoenderana ne
inodiwa CPU frequency. 1.22 V kusvika 1.38 V mune run mode. VDD inofanira kunge iripo VDDCPU isati yasvika. VDDCORE ndiyo huru yedhijitari voltage uye inowanzovhara panguva yekumira mode. Voltage renji ndeye 1.21 V kusvika 1.29 V mune run mode. VDD inofanira kuvapo VDDCORE isati yasvika. · Pini yeVBAT inogona kubatanidzwa kune bhatiri rekunze (1.6 V <VBAT <3.6 V). Kana pasina bhatiri rekunze rinoshandiswa, pini iyi inofanirwa kubatana neVDD. VDDA ndiyo analogi (ADC/VREF), inopa voltage (1.62 V kusvika 3.6 V). Kushandisa mukati meVREF + kunoda VDDA yakaenzana kana yakakwirira kudarika VREF + + 0.3 V. · Pini yeVDDA1V8_REG ndiyo inobuda yemutongi wemukati, yakabatanidzwa mukati ku USB PHY uye USB PLL. Iyo yemukati VDDA1V8_REG regulator inogoneswa neiyo default uye inogona kudzorwa nesoftware. Inogara yakavharwa panguva yekumira mode.
Pini chaiyo BYPASS_REG1V8 haifanire kusiiwa ichiyangarara. Inofanirwa kuve yakabatana kuVSS kana kuVDD kumisa kana kudzima vhoriyamutage regulator. Apo VDD = 1.8 V, BYPASS_REG1V8 inofanira kuiswa. VDDA1V1_REG pini ndiko kubuda kweyemukati regulator, yakabatana nechomukati ku USB PHY. Iyo yemukati VDDA1V1_REG regulator inogoneswa neiyo default uye inogona kudzorwa nesoftware. Inogara yakavharwa panguva yekumira mode.
VDD3V3_USBHS ndiyo USB inomhanya-mhanya. Voltagchiyero che 3.07 kusvika ku3.6 V.
VDD3V3_USBHS haifanire kunge iripo kunze kwekunge VDDA1V8_REG iripo, zvikasadaro kukuvara zvachose kunogona kuitika paSTM32MP133C/F. Izvi zvinofanirwa kuvimbiswa nePMIC chinzvimbo chehurongwa kana nechikamu chekunze kana paine discrete chikamu chekupa magetsi kuita.
VDDSD1 uye VDDSD2 zvakateerana SDMMC1 uye SDMMC2 SD kadhi kadhi magetsi ekutsigira yekupedzisira-yepamusoro-kumhanya modhi.
VDDQ_DDR ndiyo DDR IO inopa. 1.425 V kusvika 1.575 V yekubatanidza DDR3 ndangariro (1.5 V typ.)
1.283 V kusvika 1.45 V yekubatanidza DDR3L ndangariro (1.35 V typ.)
1.14 V kusvika 1.3 V yekubatanidza LPDDR2 kana LPDDR3 ndangariro (1.2 V typ.)
Munguva yesimba-kumusoro uye simba-pasi zvikamu, zvinotevera kutevedzana kwesimba zvinodiwa zvinofanirwa kuremekedzwa:
· Kana VDD iri pasi pe1 V, mamwe magetsi emagetsi (VDDCORE, VDDCPU, VDDSD1, VDDSD2, VDDA, VDDA1V8_REG, VDDA1V1_REG, VDD3V3_USBHS, VDDQ_DDR) inofanira kuramba iri pasi peVDD + 300 mV.
· Kana VDD iri pamusoro pe1 V, magetsi ese anozvimiririra.
Munguva yesimba-pasi chikamu, VDD inogona kudzika zvishoma pane zvimwe zvinopihwa chete kana simba rakapihwa STM32MP133C/F richiramba riri pasi pe1 mJ. Izvi zvinobvumira ekunze decoupling capacitors kuti abudiswe neakasiyana-siyana nguva panguva yekudzika-pasi kwechikamu chenguva.

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V 3.6
VBOR0 1

Mufananidzo 2. Simba-up/down sequence

STM32MP133C/F

VDDX(1) VDD

3.6.2
Cherechedza: 26/219

0.3

Simba-on

Operating mode

Simba-pasi

nguva

Nzvimbo yekutenga haisiriyo

VDDX <VDD + 300 mV

VDDX yakazvimirira kubva kuVDD

MSv47490V1

1. VDDX inoreva chero magetsi pakati peVDDCORE, VDDCPU, VDDSD1, VDDSD2, VDDA, VDDA1V8_REG, VDDA1V1_REG, VDD3V3_USBHS, VDDQ_DDR.

Mutariri wemagetsi

Iwo maturusi ane yakabatanidzwa simba-pa reset (POR)/ simba-pasi reset (PDR) redunhu rakasanganiswa neBrownout reset (BOR) wedunhu:
· Simba-pakugadzirisazve (POR)
Iyo POR mutariri anotarisisa VDD magetsi uye anoienzanisa neyakagadziriswa chikumbaridzo. Iwo maturusi anoramba ari mukuita reset modhi kana VDD iri pazasi pechikumbaridzo ichi, · Power-down reset (PDR)
Mutariri wePDR anotarisa VDD magetsi. Reset inogadzirwa kana VDD inodonha pazasi pechikumbaridzo chakamisikidzwa.
· Brownout reset (BOR)
Mutariri weBOR anotarisisa VDD magetsi. Zvikumbaridzo zvitatu zveBOR (kubva pa2.1 kusvika ku2.7 V) zvinogona kugadzirwa kuburikidza nesarudzo mabheti. Reset inogadzirwa kana VDD inodonha pazasi pechikumbaridzo ichi.
· Power-on reset VDDCORE (POR_VDDCORE) Mutariri wePOR_VDDCORE anotarisisa magetsi eVDDCORE oaenzanisa nechikumbaridzo chakamira. Iyo VDDCORE domain inoramba iri mureset mode kana VDDCORE iri pazasi pechikumbaridzo ichi.
· Simba-pasi reset VDDCORE (PDR_VDDCORE) Iyo PDR_VDDCORE maneja anotarisisa VDDCORE magetsi. Iyo VDDCORE domain reset inogadzirwa kana VDDCORE inodonha pazasi pechikumbaridzo chakamisikidzwa.
· Power-on-reset VDDCPU (POR_VDDCPU) Mutariri wePOR_VDDCPU anotarisa VDDCPU magetsi uye anoienzanisa nechikumbaridzo chakamira. Iyo VDDCPU domain inoramba iri mureset modhi kana VDDCORE iri pazasi pechikumbaridzo ichi.
Iyo PDR_ON pini yakachengeterwa STMicroelectronics bvunzo dzekugadzira uye inofanirwa kugara yakabatana neVDD mukushandisa.

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3.7

Yakaderera-simba zano

Pane nzira dzakati wandei dzekudzikisa mashandisirwo emagetsi paSTM32MP133C/F: · Kuderedza kushandiswa kwesimba nekudzikisira maCPU wachi uye/kana
bhazi matrix wachi uye/kana kudzora ega ega wachi. · Sevha mashandisiro emagetsi kana CPU iri IDLE, nekusarudza pakati pezvinowanikwa zvakaderera-
magetsi modes zvinoenderana nezvinodiwa nemushandisi application. Izvi zvinobvumira kukanganiswa kwakanyanya pakati penguva pfupi yekutanga, yakaderera-simba mashandisirwo, pamwe neanowanikwa wakeup masosi, kuwanikwa. · Shandisa iyo DVFS (dynamic voltage uye frequency scaling) mapoinzi anoshanda anodzora zvakananga CPU wachi frequency pamwe neiyo VDDCPU inobuda.
Maitiro ekushandisa anobvumira kutonga kwekugovera wachi kune akasiyana masisitimu zvikamu uye simba rehurongwa. Iyo system operation mode inofambiswa neMPU sub-system.
Iyo MPU sub-system yakaderera-simba modhi dzakanyorwa pazasi: · Kurara: Iyo CPU wachi inomiswa uye yeperipheral (s) wachi inoshanda se.
yakamboiswa muRCC (reset uye wachi controller). · CStop: Iyo CPU peripheral (s) wachi inomiswa. · CStandby: VDDCPU OFF
CShope uye CStop yakaderera-simba modhi inopinzwa neCPU paunenge uchiita iyo WFI (kumirira kukanganisa) kana WFE (kumirira chiitiko) mirairo.
The system operating modes iripo ndeiyi anotevera: · Run (system at its full performance, VDDCORE, VDDCPU and clocks ON) · Stop (clock OFF) · LP-Stop (clocks OFF) · LPLV-Stop (clocks OFF, VDDCORE neVDDCPU supply level inogona kudzikiswa) · LPDDCPUCORE yakaderera,VVD-Stop2 OFF, VDDCPU yakaderera + Standby (VDCPU, VDDCORE, uye wachi ZVIRIMBERI)

Tafura 3. System versus CPU power mode

System simba mode

CPU

Run mode

CRun kana Kurara

Stop mode LP-Stop mode LPLV-Stop mode LPLV-Stop2 mode
Standby mode

CStop kana CStandby CStandby

3.8

Reset uye wachi controller (RCC)

Iyo wachi uye reset controller inotarisira chizvarwa chewachi ese, pamwe neawa gating, uye kutonga kwehurongwa uye peripheral resets.RCC inopa kuchinjika kwepamusoro mukusarudzwa kwewachi masosi uye inobvumira kushandiswa kweawa ratios kuvandudza simba rekushandisa. Mukuwedzera, pane mamwe ma peripherals ekutaurirana anokwanisa kushanda nawo

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3.8.1 3.8.2

maviri akasiyana mawachi madomasi (angave bhazi interface wachi kana kernel peripheral wachi), iyo frequency system inogona kuchinjwa pasina kugadzirisa baudrate.
Kutarisira wachi
Midziyo yacho inomisikidza mana oscillator emukati, maviri oscillator ane ekunze crystal kana resonator, matatu emukati oscillator ane kukurumidza kutanga nguva uye mana PLL.
Iyo RCC inogamuchira inotevera wachi sosi yekupinda: · Internal oscillator:
64 MHz HSI wachi (1% kurongeka) 4 MHz CSI wachi 32 kHz LSI wachi · Oscillator Ekunze: 8-48 MHz HSE wachi 32.768 kHz LSE wachi
Iyo RCC inopa ina PLLs: · PLL1 yakatsaurirwa kuCPU ichivharira · PLL2 ichipa:
wachi dzeAXI-SS (kusanganisira APB4, APB5, AHB5 uye AHB6 mabhiriji) wachi dzeDDR interface · PLL3 inopa: wachi dzeakawanda-Layer AHB uye peripheral bhazi matrix (kusanganisira iyo APB1,
APB2, APB3, APB6, AHB1, AHB2, uye AHB4) kernel wachi dzemaperipherals · PLL4 yakatsaurirwa kugadzirwa kwekernel wachi dzemaperipherals akasiyana siyana.
Iyo system inotanga paHSI wachi. Iyo mushandisi application inogona kusarudza iyo wachi yekumisikidza.
System reset sources
Simba-reset reset rinotanga marejista ose kunze kwekugadzirisa, chikamu cheRCC, chikamu cheRTC uye marejita emagetsi ekugadzirisa simba, pamwe chete neBackup power domain.
Kugadziriswa kwechikumbiro kunogadzirwa kubva kune imwe yeanotevera masosi: · reset kubva kuNRST pad · reset kubva kuPOR uye PDR chiratidzo (inowanzonzi simba-on reset) · reset kubva kuBOR (inowanzonzi brownout) · reset kubva kune yakazvimirira watchdog 1 · reset kubva kune yakazvimirira watchdog 2 · a software system reset kubva ku7 Corte chengetedzo-A kubva kuXNUMX Corte chengetedzo -A. feature is activated
A system reset inogadzirwa kubva kune anotevera masosi: · an application reset · reset kubva POR_VDDCORE chiratidzo · kubuda kubva Standby mode kuenda Run mode.

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A MPU processor reset inogadzirwa kubva kune anotevera masosi: · a system reset · pese MPU yabuda CStandby · software MPU reset kubva kuCortex-A7 (CPU)

3.9

Zvakawanda-chinangwa kuisa/zvinobuda (GPIOs)

Imwe neimwe yepini yeGPIO inogona kugadzirwa nesoftware sekubuda (push-dhonza kana kuvhura-drain, ine kana isina kudhonza-kumusoro kana kudhonzera-pasi), sekuisa (ine kana isina kudhonza-kumusoro kana kudhonzera-pasi) kana serimwe danho rekuita. Mazhinji emapini eGPIO akagovaniswa nedhijitari kana analog mamwe mabasa. Ese maGPIO akakwira-azvino-anokwanisa uye ane kukurumidza kusarudzwa kuti atore zvirinani ruzha rwemukati, mashandisiro emagetsi uye magetsi emagetsi.
Mushure mekugadzirisazve, ese maGPIO ari muanalog modhi yekudzikisa simba rekushandisa.
Iyo I/O gadziriso inogona kuvharwa kana ichidikanwa nekutevera chaiyo kutevedzana kuitira kudzivirira kunyora zvisirizvo kumareji eI/Os.
Ese mapini eGPIO anogona kuiswa ega seakachengeteka, zvinoreva kuti software inosvika kune aya maGPIO uye anosanganisirwa maperipheral anotsanangurwa seakachengeteka anongobvumidzwa kuchengetedza software inoshanda paCPU.

3.10
Cherechedza:

TrustZone kudzivirira controller (ETZPC)
ETZPC inoshandiswa kugadzirisa TrustZone chengetedzo yebhazi masters nevaranda vane programmable-chengetedzo hunhu (securable zviwanikwa). Semuenzaniso: · On-chip SYSRAM yakachengeteka dunhu saizi inogona kurongwa. · AHB uye APB peripherals inogona kuitwa yakachengeteka kana isina kuchengetedzwa. AHB SRAM inogona kuitwa yakachengeteka kana isina kuchengetedzwa.
Nekumisikidza, SYSRAM, AHB SRAMs uye ma peripherals akachengetedzeka akaiswa kuti awane kuwana chete, saka, isingasvikike nevasina kuchengetedzwa masters seDMA1/DMA2.

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3.11

Bhasi-interconnect matrix
Midziyo iyi ine matrix yebhazi yeAXI, imwe huru yeAHB bhazi matrix uye mabhiriji ebhazi anobvumira vatenzi vemabhazi kuti vabatanidzwe nevaranda vebhazi (ona mufananidzo uri pazasi, madots anomiririra akagonesa tenzi / muranda kubatana).
Mufananidzo 3. STM32MP133C/F bhasi matrix

MDMA

SDMMC2

SDMMC1

DBG Kubva kuMLAHB batanidza USBH

CPU

ETH1 ETH2

128-bit

AXIM

M1 M2

M11

S1 S2 S3 S4 S5 S6 S7 S8 S9

Default muranda AXIMC

NIC-400 AXI 64 bits 266 MHz - gumi masters / gumi varanda

Kubva kuAXIM batanidza DMA1 DMA2 USBO DMA3

M1 M2

M3 M4

M6 M7

S4 S5 Interconnect AHB 32 bits 209 MHz - 8 masters / 6 varanda

DDRCTRL 533 MHz AHB zambuko kuenda kuAHB6 KuMLAHB batanidza FMC/NAND QUADSPI SYSRAM 128 KB ROM 128 KB AHB zambuko kuenda kuAHB5 APB zambuko kuenda kuAPB5 APB zambuko kuenda kuDBG APB
AXI 64 synchronous master port AXI 64 synchronous muranda port AXI 64 asynchronous master port AXI 64 asynchronous muranda port AHB 32 synchronous master port AHB 32 synchronous muranda port AHB 32 asynchronous master port AHB 32 asynchronous
Bhiriji kuenda kuAHB2 SRAM1 SRAM2 SRAM3 KuAXIM interconnect Bridge kuenda kuAHB4
MSv67511V2

MLAHB

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3.12

DMA controllers
Iwo maturusi anoratidza anotevera maDMA mamodule ekuburitsa CPU chiitiko: · master direct memory access (MDMA)
Iyo MDMA inomhanya-inomhanya DMA controller, iyo inotarisira marudzi ese ekuchinja kwendangariro (peripheral-to-memory, memory-to-memory, memory-to-peripheral), pasina chero CPU chiito. Iyo ine tenzi AXI interface. Iyo MDMA inokwanisa kuwirirana nevamwe vatongi veDMA kuti vawedzere hunyanzvi hweDMA, kana kugona kubata zvikumbiro zveDMA zvakananga. Imwe neimwe ye32 chiteshi inogona kuita block transfers, inodzokororwa block transfers uye yakabatana rondedzero kutamiswa. Iyo MDMA inogona kusetwa kuita yakachengeteka kutamisa kune yakachengetedzwa ndangariro. · Vatongi vatatu veDMA (vasina kuchengetedzeka DMA1 uye DMA2, pamwe neDMA3 yakachengeteka) Mutongi wega wega ane mbiri-chiteshi AHB, yehuwandu hwe16 husina kuchengeteka uye masere akachengeteka DMA nzira dzekuita FIFO-based block transfers.
Zvikamu zviviri zveDMAMUX multiplex uye nzira yeDMA peripheral zvikumbiro kune vatatu veDMA controllers, nepamusoro-soro, kuwedzera nhamba yezvikumbiro zveDMA zvinomhanya panguva imwe chete, pamwe nekugadzira zvikumbiro zveDMA kubva kune peripheral output triggers kana DMA zviitiko.
DMAMUX1 mepu zvikumbiro zveDMA kubva kune zvisina kuchengetedzwa kune DMA1 uye DMA2 machanera. DMAMUX2 mepu zvikumbiro zveDMA kubva kunzvimbo dzakachengeteka kuenda kuDMA3 chiteshi.

3.13

Yakawedzera kukanganisa uye chiitiko controller (EXTI)
Iyo yakawedzera kukanganisa uye chiitiko controller (EXTI) inogadzirisa iyo CPU uye system yekumuka kuburikidza neinogadziriswa uye yakananga chiitiko mamepu. EXTI inopa zvikumbiro zvekumuka kune simba rekutonga, uye inogadzira chikumbiro chekuvhiringidza kuGIC, uye zviitiko kuCPU chiitiko chekuisa.
Izvo zvikumbiro zveEXTI zvekumuka zvinobvumira sisitimu kuti imutswe kubva kuStop modhi, uye CPU kuti imutswe kubva kuCStop uye CStandby modes.
Iko kukanganisa chikumbiro uye chiitiko chekukumbira chiitiko chinogona kushandiswawo mu Run mode.
Iyo EXTI inosanganisirawo iyo EXTI IOport kusarudzwa.
Kukanganisa kwega kwega kana chiitiko chinogona kusetwa sechakachengeteka kuitira kudzivirira kupinda kune yakachengeteka software chete.

3.14

Cyclic redundancy cheki kuverenga yeyuniti (CRC)
Iyo CRC (cyclic redundancy check) calculation unit inoshandiswa kuwana CRC kodhi uchishandisa programmable polynomial.
Pakati pemamwe maapplication, CRC-yakavakirwa matekiniki anoshandiswa kuona kutapurirana kwedata kana kuvimbika kwekuchengetedza. Muchikamu cheEN/IEC 60335-1 chiyero, vanopa nzira yekuona iyo flash memory kuperera. Iyo CRC yekuverenga unit inobatsira komputa siginecha yesoftware panguva yekumhanya, kuenzaniswa nereferensi siginicha inogadzirwa panguva yekubatanidza uye inochengetwa panzvimbo yakapihwa yekurangarira.

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3.15

Flexible memory controller (FMC)
Iyo FMC controller maficha makuru ndeaya anotevera: · Interface ine static-memory mepu zvishandiso zvinosanganisira:
NOR flash memory Static kana pseudo-static random access memory (SRAM, PSRAM) NAND flash memory ine 4-bit/8-bit BCH hardware ECC · 8-,16-bit data bus width · Yakazvimirira chip-select control kubhengi rimwe nerimwe rendangariro · Kugadziriswa kwakazvimirira kwebhangi rega rega rendangariro · Nyora FIFO
Marejista eFMC anogona kuchengetedzwa.

3.16

Dual Quad-SPI memory interface (QUADSPI)
Iyo QUADSPI inyanzvi yekutaurirana inonangana neimwe, mbiri kana quad SPI flash ndangariro. Inogona kushanda mune chero yeaya matatu anotevera modhi: · Indirect mode: maoparesheni ese anoitwa pachishandiswa marejista eQUADSPI. * Status-polling mode: iyo yekunze flash memory mamiriro rejista inoverengwa nguva nenguva uye
kukanganisa kunogona kugadzirwa kana mureza uchiiswa. Memory-mepu modhi: iyo yekunze flash memory inomisikidzwa kune kero nzvimbo
uye inoonekwa nehurongwa sekunge yaive yemukati mendangariro.
Zvese zviri zviviri kupinza uye kugona zvinogona kuwedzerwa kaviri uchishandisa mbiri-flash modhi, uko maviri Quad-SPI flash ndangariro anowanikwa panguva imwe chete.
QUADSPI inosanganiswa ne block block (DLYBQS) inobvumira kutsigirwa kwekunze kwedata frequency pamusoro pe100 MHz.
Iyo QUADSPI dhizaini yekumisikidza inogona kuchengetedzwa, pamwe nekunonoka kwayo block.

3.17

Analog-to-digital converters (ADC1, ADC2)
Midziyo yacho inomisikidza maviri analog-kune-digital converters, ane resolution inogona kugadziridzwa ku12-, 10-, 8- kana 6-bit. Imwe neimwe ADC inogovera anosvika gumi nemasere ekunze nzira, ichiita shanduko mune imwechete-kupfura kana scan mode. Mune scan mode, iyo otomatiki shanduko inoitwa pane yakasarudzwa boka reanalog yekupinda.
Ose maADCs ane chengetedzo yemabhazi ekubatanidza.
Imwe neimwe ADC inogona kushandirwa neDMA controller, nekudaro ichibvumira kutamisa otomatiki kweADC yakashandurwa kukosha kunzvimbo yekuenda pasina chero software yekuita.
Mukuwedzera, iyo analog watchdog ficha inogona kunyatso tarisa yakashandurwa voltage yeimwe, mamwe kana ese machanera akasarudzwa. Kuvhiringidza kunogadzirwa kana voltage ari kunze kwezvikumbaridzo zvakarongwa.
Kuti ubatanidze shanduko yeA/D uye nenguva, maADC anogona kuitiswa nechero TIM1, TIM2, TIM3, TIM4, TIM6, TIM8, TIM15, LPTIM1, LPTIM2 uye LPTIM3 zvinobatidza nguva.

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3.18

Tembiricha sensor
Midziyo inopinza tembiricha sensor inogadzira voltage (VTS) inosiyana zvichienderana nekupisa. Iyi tembiricha sensor yakabatana nemukati kuADC2_INP12 uye inokwanisa kuyera tembiricha ambient kubva pa40 kusvika +125 °C nekunyatso ±2%.
Iyo tembiricha sensor ine yakanaka mutsara, asi inofanirwa kuverengerwa kuti iwane yakanaka yakazara kurongeka kweyero yetembiricha. Sezvo tembiricha sensor inogadzirisa inosiyana kubva kune chip kuenda kune chip nekuda kwekusiyana kwemaitiro, iyo isina kuverengerwa yemukati tembiricha sensor inokodzera maapplication anoona shanduko yekushisa chete. Kuti uvandudze kurongeka kweyero yekushisa sensor kuyerwa, mudziyo wega wega unogadzika fekitori-yakayerwa ne ST. Iyo tembiricha sensor fekitori calibration data inochengetwa neST munzvimbo yeOTP, iyo inowanikwa mukuverenga-chete modhi.

3.19

Digital tembiricha sensor (DTS)
Zvishandiso izvi zvinomisikidza frequency inobuda tembiricha sensor. DTS inoverenga frequency yakavakirwa paLSE kana PCLK kuti ipe ruzivo rwekushisa.
Anotevera mabasa anotsigirwa: · kuvhiringa chizvarwa netembiricha pachikumbaridzo · wakeup signal generation by tembiricha pachikumbaridzo

3.20
Cherechedza:

VBAT kushanda
Iyo VBAT simba domain ine iyo RTC, iyo backup marejista uye yekuchengetedza SRAM.
Kuti ukwanise kukwirisa bhatiri nguva, iyi simba domain inopihwa neVDD kana iripo kana nevol.tage inoshandiswa paVBAT pini (apo VDD inopa isipo). VBAT simba rinoshandurwa kana PDR yaona kuti VDD yadonha pazasi pePDR level.
Iyo voltage paVBAT pini inogona kupihwa nebhatiri rekunze, supercapacitor kana zvakananga neVDD. Muchiitiko chekupedzisira, VBAT modhi haisi kushanda.
Kushanda kweVBAT kunoitwa kana VDD isipo.
Hapana chimwe chezviitiko izvi (zvinovhiringidza zvekunze, TAMP chiitiko, kana RTC alarm / zviitiko) vanokwanisa kudzoreredza zvakananga kupihwa kweVDD uye kumanikidza mudziyo kubva mukushanda kweVBAT. Zvisinei, TAMP zviitiko uye RTC alarm / zviitiko zvinogona kushandiswa kugadzira chiratidzo kune yekunze dunhu (kazhinji PMIC) inogona kudzorera iyo VDD kugovera.

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3.21

Voltage reference buffer (VREFBUF)
Midziyo inobatirira voltage reference buffer iyo inogona kushandiswa sevoltage referensi yeADCs, uye zvakare se voltage referensi yezvikamu zvekunze kuburikidza neVREF + pini. VREFBUF inogona kuchengetedzwa. Iyo yemukati VREFBUF inotsigira ina voltages: · 1.65 V · 1.8 V · 2.048 V · 2.5 Vtage referensi inogona kupihwa kuburikidza neVREF + pini kana iyo yemukati VREFBUF yadzimwa.
Mufananidzo 4. Voltage reference buffer

VREFINT

–

VREF+

VSSA

MSv64430V1

3.22

Digital sefa ye sigma-delta modulator (DFSDM)
Midziyo inopinza imwe DFSDM nerutsigiro rwemamodule maviri edhijitari mafirita uye mana ekunze ekuisa serial chiteshi (transceivers) kana alternately mana emukati akaenzana mapeji.
Iyo DFSDM inopindirana ekunze modulators kune mudziyo uye inoita kusefa kwedhijitari yeakagamuchira data hova. modulators anoshandiswa kushandura masaini eanalog kuita dhijitari-serial hova dzinoumba izvo zvinopinda zveDFSDM.
Iyo DFSDM inogona zvakare kubatanidza PDM (pulse-density modulation) maikorofoni uye kuita iyo PDM kuPCM kutendeuka uye kusefa (hardware inomhanyisa). Iyo DFSDM inoratidzira inosarudzika inofananidzwa yedhata kuyerera mamepu kubva kuADCs kana kubva kumudziyo ndangariro (kuburikidza neDMA/CPU kuchinjirwa muDFSDM).
Iyo DFSDM transceivers inotsigira akati wandei serial-interface mafomati (kutsigira akasiyana modulators). DFSDM dhijitari mafirita modules anoita dhijitari kugadzirisa zvinoenderana nemushandisi-inotsanangurwa mafirita paramita inosvika makumi maviri nemana ekupedzisira ADC resolution.

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Iyo DFSDM yeperipheral inotsigira: · Mana multiplexed ekuisa dijitari serial chiteshi:
inogadzirika SPI interface yekubatanidza akasiyana modulators anogadziriswa Manchester coded 1-waya interface PDM (pulse-density modulation) maikorofoni yekuisa yakanyanya kupinza wachi frequency kusvika ku20 MHz (10 MHz yeManchester coding) wachi inobuda yemamodulators (0 kusvika 20 MHz) · Mamwe mapindiro kubva kune ina yemukati dhijitari inopindirana ne16 data dhizaini:- pfumo yedata 1 dhizaini hova (DMA) · Maviri edhijitari mafirita module ane inogadziriswa dhijitari chiratidzo chekugadzirisa: Sincx sefa: kurongeka / mhando (5 kusvika XNUMX), pamusoroampling ratio (1 kusvika 1024) musanganisi: oversampling ratio (1 kusvika 256) · Kusvikira ku24-bit yakabuda data resolution, yakasainwa yakabuda data format · Automatic data offset correction (offset yakachengetwa murejista nemushandisi) · Kuenderera mberi kana kutendeuka kumwechete · Kutanga-kwe-shanduko kunokonzerwa ne: software inokonzeresa zvemukati nguva zviitiko zvekunze kutanga-kwe-shanduko synchronously neyokutanga digitaalinen filter module (DFSDM) fevaluering data yakaderera (DFSDM- fevaluering data) pachikumbaridzo marejista yakatsaurirwa inogadziriswa Sincx dhijitari sefa (kurongeka = 1 kusvika 3,
oversampling ratio = 1 kusvika 32) kupinza kubva kumagumo ekubuda data kana kubva kune yakasarudzwa yekuisa serial chiteshi inoenderera ichitarisisa yakazvimiririra kubva kune yakajairwa kutendeuka · Ipfupi-yedunhu detector kuti ione yakazadza yakazara analog yekupinza maitiro (pasi nepamusoro renji): kusvika ku8-bit counter kuti ione 1 kusvika 256 inoteedzana 0 kana 1 inoyerera inoteedzera dhizaini dhata Analog watchdog chiitiko kana pane pfupi-circuit detector chiitiko · Yakanyanyisa detector: kuchengetwa kwehushoma uye huwandu hwakakosha hwekupedzisira kutendeuka data inozorodzwa nesoftware · DMA kugona kuverenga yekupedzisira kutendeuka data · Kukanganisa: kupera kwekutendeuka, kuwanda, analog watchdog, pfupi dunhu, yekuisa serial chiteshi wachi kusavapo · “Regular” kushandurwa kunogona kushandurwa chero nguva yekushandurwa nguva kana kunyange mukuenderera mberi mode
pasina kuve nekukanganisa panguva ye "jekiseni" shanduko "yakajairwa" shanduko yenguva chaiyo uye nekunyanya kutendeuka.

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3.23

True random number jenareta (RNG)
Midziyo yacho inomisikidza imwe RNG iyo inopa 32-bit manhamba asina kujairika anogadzirwa neyakasanganiswa analogi wedunhu.
Iyo RNG inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.
Iyo RNG yechokwadi inobatanidza kune yakachengetedzwa AES uye PKA peripherals kuburikidza nebhazi rakatsaurirwa (risingaverengeki neCPU).

3.24

Cryptographic uye hash processors (CRYP, SAES, PKA uye HASH)
Zvishandiso izvi zvinomisikidza imwe cryptographic processor inotsigira iyo yepamusoro cryptographic algorithms inowanzodikanwa kuve nechokwadi chekuvanzika, chokwadi, kutendeseka kwedata uye kusaramba kana uchichinjana meseji nevezera.
Midziyo iyi zvakare yakamisikidza yakatsaurirwa DPA inodzivirira yakachengeteka AES 128- uye 256-bit kiyi (SAES) uye PKA hardware encryption/decryption accelerator, ine yakatsaurirwa hardware bhazi isingawanikwe neCPU.
CRYP maficha makuru: · DES/TDES (data encryption standard / katatu data encryption standard): ECB (electronic
codebook) uye CBC (cipher block chaining) chaining algorithms, 64-, 128- kana 192-bit kiyi · AES (advanced encryption standard): ECB, CBC, GCM, CCM, uye CTR (counter mode) chaining algorithms, 128-, 192- kana 256-bit kiyi.
Universal HASH zvinhu zvikuru: · SHA-1, SHA-224, SHA-256, SHA-384, SHA-512, SHA-3 (chengetedza HASH algorithms) · HMAC
Iyo cryptographic accelerator inotsigira DMA chikumbiro chizvarwa.
CRYP, SAES, PKA uye HASH inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.

3.25

Boot uye chengetedzo uye OTP kutonga (BSEC)
Iyo BSEC (bhutsu uye chengetedzo uye OTP control) inoitirwa kudzora OTP (imwe-nguva programmable) fuse bhokisi, rinoshandiswa rakamisikidzwa risiri-inoshanduka chengetedzo yekumisikidza mudziyo uye chengetedzo paramita. Chimwe chikamu cheBSEC chinofanirwa kugadziridzwa sechinowanikwa nesoftware yakachengeteka chete.
Iyo BSEC inogona kushandisa mazwi eOTP kuchengetedza HWKEY 256-bit yeSAES (yakachengeteka AES).

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3.26

Nguva uye vatariri
Midziyo iyi inosanganisira mbiri-yepamusoro-yekudzora nguva, gumi general-chinangwa nguva (kubva mairi manomwe akachengetedzwa), maviri ekutanga nguva, shanu-yakaderera-simba nguva, imbwa mbiri, uye ina system timer mune yega Cortex-A7.
Zvese zviverengero zvenguva zvinogona kuomeswa nechando mudebug mode.
Tafura iri pazasi inoenzanisa maficha epamberi-kutonga, general-chinangwa, yakakosha uye yakaderera-simba nguva.

Timer mhando

Timer

Tafura 4. Nguva yekuenzanisa

Counter resolution-
tion

Counter type

Prescaler factor

DMA chikumbiro chizvarwa

Bata/ enzanisa zviteshi

Complementary output

Max interface
wachi (MHz)

Max
timer
wachi (MHz)(1)

Yepamberi TIM1, -control TIM8

16-bit

Kumusoro, Chero nhamba pasi, pakati pe1 kumusoro/pasi ne65536

Ehe

TIM2 TIM5

32-bit

Kumusoro, Chero nhamba pasi, pakati pe1 kumusoro/pasi ne65536

Ehe

TIM3 TIM4

16-bit

Kumusoro, Chero nhamba pasi, pakati pe1 kumusoro/pasi ne65536

Ehe

Chero nhamba

TIM12(2) 16-bit

Pakati pe1

Aihwa

General

uye 65536

chinangwa

TIM13(2) TIM14(2)

16-bit

Chero nhamba Kumusoro pakati pe1
uye 65536

Aihwa

Chero nhamba

TIM15(2) 16-bit

Pakati pe1

Ehe

uye 65536

TIM16(2) TIM17(2)

16-bit

Chero nhamba Kumusoro pakati pe1
uye 65536

Ehe

Basic

TIM6, TIM7

16-bit

Chero nhamba Kumusoro pakati pe1
uye 65536

Ehe

LPTIM1,

Lowpower

LPTIM2(2), LPTIM3(2),
LPTIM4,

16-bit

1, 2, 4, 8, Up 16, 32, 64,
128

Aihwa

LPTIM5

104.5

209

Aihwa

104.5

209

Aihwa

104.5

209

Aihwa

104.5

209

Aihwa

104.5

209

104.5

209

104.5

209

Aihwa

104.5

209

1(3)

Aihwa

104.5 104.5

1. Iyo yakanyanya timer wachi inosvika 209 MHz zvichienderana neTIMGxPRE bit muRCC. 2. Yakachengeteka timer. 3. Hapana chiteshi chekutora paLPTIM.

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3.26.1 3.26.2 3.26.3

Yepamberi-yekudzora nguva (TIM1, TIM8)
Iyo yepamusoro-yekudzora nguva (TIM1, TIM8) inogona kuonekwa sematatu-chikamu PWM jenareta akawedzeredzwa pamatanho matanhatu. Ivo vane inopindirana PWM yakabuda ine programmable yakaiswa nguva dzakafa. Ivo vanogona zvakare kutariswa seyakakwana-yechinangwa nguva. Matanho avo mana akazvimirira anogona kushandiswa ku: · kubatwa kwekuisa · kuburitsa kuenzanisa · PWM chizvarwa (kumucheto- kana pakati-yakarongedzerwa modes) · one-pulse mode kubuda
Kana akagadziridzwa seyakajairwa 16-bit timers, ane akafanana maficha seanowanzo-chinangwa chenguva. Kana akagadziridzwa se 16-bit PWM jenareta, ane yakazara modulation kugona (0-100 %).
Iyo yepamusoro-yekudzora timer inogona kushanda pamwe chete neyakajairwa-chinangwa nguva kuburikidza neiyo timer link yekubatanidza kana chiitiko cheni.
TIM1 uye TIM8 inotsigira yakazvimirira DMA yekukumbira chizvarwa.
General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17)
Kune gumi zvinogoneka zvakajairika-chinangwa nguva zvakamisikidzwa muSTM32MP133C/F zvishandiso (ona Tafura 4 kune misiyano). · TIM2, TIM3, TIM4, TIM5
TIM 2 neTIM5 zvakavakirwa pa32-bit auto-reload up/down counter uye 16-bit prescaler, ukuwo TIM3 neTIM4 zvichibva pa16-bit auto-reload up/downcounter uye 16-bit prescaler. Yese nguva inoratidzira nzira ina dzakazvimiririra yekupinza / kubuda kuenzanisa, PWM kana imwe-pulse mode kubuda. Izvi zvinopa anosvika gumi nematanhatu ekuisa / kuburitsa kuenzanisa / maPWM pamapakeji makuru. Aya majekiseni-chinangwa-nguva anogona kushanda pamwe chete, kana nedzimwewo general-chinangwa nguva uye yepamusoro-yekudzora nguva TIM16 uye TIM1, kuburikidza neiyo timer link yekubatanidza kana chiitiko cheni. Chero yeaya akajairwa-chinangwa nguva anogona kushandiswa kugadzira PWM zvinobuda. TIM8, TIM2, TIM3, TIM4 ese ane yakazvimirira DMA yekukumbira chizvarwa. Ivo vanokwanisa kubata quadrature (incremental) encoder masiginecha uye madhijitari anobuda kubva kune imwe kusvika kune ina hall-effect sensors. · TIM5, TIM12, TIM13, TIM14, TIM15, TIM16 Iyi nguva yakavakirwa pa17-bit auto-reload upcounter uye 16-bit prescaler. TIM16, TIM13, TIM14 uye TIM16 inoratidzira imwe yakazvimirira chiteshi, nepo TIM17 neTIM12 iine nzira mbiri dzakazvimiririra dzekupinza / kuburitsa kuenzanisa, PWM kana imwe-pulse modhi yekubuda. Iwo anogona kuwiriraniswa neTIM15, TIM2, TIM3, TIM4 yakazara-yakazara-yechinangwa chenguva kana kushandiswa seyakareruka nguva. Imwe neimwe yeidzi nguva inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.
Basic timers (TIM6 uye TIM7)
Aya ma timer anonyanya kushandiswa seyakajairwa 16-bit nguva base.
TIM6 uye TIM7 inotsigira yakazvimirira DMA yekukumbira chizvarwa.

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3.26.4
3.26.5 3.26.6

Yakaderera-simba nguva (LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5)
Imwe neimwe yakaderera-simba timer ine yakazvimirira wachi uye inomhanya zvakare muStop modhi kana yakavharwa neLSE, LSI kana wachi yekunze. An LPTIMx inokwanisa kumutsa mudziyo kubva kuStop mode.
Idzi nguva dzine simba shoma dzinotsigira zvinhu zvinotevera: · 16-bit up counter ine 16-bit autoreload register · 16-bit enzanisa register · Configurable output: pulse, PWM · Continuous/one-shot mode · Selectable software/hardware input trigger · Selectable clock source:
Yemukati wachi sosi: LSE, LSI, HSI kana APB wachi yekunze sosi pamusoro peLPTIM yekuisa (inoshanda kunyangwe isina wachi yemukati
sosi inomhanya, inoshandiswa ne pulse counter application) · Programmable digital glitch filter · Encoder mode
LPTIM2 neLPTIM3 zvinogona kutsanangurwa (muETZPC) sezviri kuwanikwa nesoftware yakachengeteka chete.
Imbwa dzakazvimiririra (IWDG1, IWDG2)
Iyo yakazvimirira watchdog yakavakirwa pa12-bit downcounter uye 8-bit prescaler. Yakavharwa kubva kune yakazvimiririra 32 kHz yemukati RC (LSI) uye, sezvo ichishanda yakazvimiririra kubva pawachi huru, inogona kushanda muStop uye Standby modes. IWDG inogona kushandiswa semurindi wekugadzirisa zvakare mudziyo kana dambudziko raitika. Iyo hardware- kana software inogadziriswa kuburikidza nesarudzo bytes.
IWDG1 inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.
Generic timers (Cortex-A7 CNT)
Cortex-A7 generic timers yakanyudzwa mukati meCortex-A7 inodyiswa nekukosha kubva kune system timing generation (STGEN).
Iyo Cortex-A7 processor inopa inotevera nguva: · yemuviri timer yekushandisa mune yakachengeteka uye isina-akachengeteka modes.
Marejista eiyo timer yemuviri akabhengi kuti ape akachengeteka uye asina-akachengetedzwa makopi. · virtual timer yekushandisa mune isina-yakachengeteka modes · yemuviri timer yekushandisa mune hypervisor mode
Generic timers haisi ndangariro yakamepurwa maperipherals uye anobva angosvikirwa chete neakananga Cortex-A7 coprocessor mirairo (cp15).

3.27

System timer chizvarwa (STGEN)
Iyo system timing generation (STGEN) inogadzira kukosha kwekuverenga nguva kunopa kuenderana view yenguva kune ese Cortex-A7 generic timers.

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The system timeing generation ine anotevera akakosha maficha: · 64-bit yakafara kudzivirira roll-over nyaya · Kutanga kubva pazero kana kukosha kunogoneka · Kudzora APB interface (STGENC) inoita kuti timer iponeswe uye idzorerwe.
mukati mezviitiko zve Powerdown · Kuverenga-chete APB interface (STGENR) inoita kuti kukosha kwenguva kuverengerwe nevasiri-
yakachengeteka software uye debug maturusi · Timer kukosha kwekuwedzera iyo inogona kumiswa panguva yekugadzirisa system
STGENC inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.

3.28

Yechokwadi-nguva wachi (RTC)
Iyo RTC inopa otomatiki kumuka kuti igadzirise ese akaderera-simba modes.RTC inozvimiririra BCD timer/counter uye inopa nguva-ye-zuva wachi/karenda ine programmable alarm inovhiringidza.
Iyo RTC inosanganisirawo periodic programmable wakeup mureza nekukanganisa kugona.
Marejista maviri e32-bit ane masekonzi, maminetsi, maawa (12- kana 24-awa fomati), zuva (zuva revhiki), zuva (zuva remwedzi), mwedzi, uye gore, rinoratidzwa mubinary coded decimal format (BCD). Iyo sub-seconds kukosha inowanikwawo mune binary fomati.
Binary mode inotsigirwa kurerutsa software mutyairi manejimendi.
Kubhadharwa kwe28-, 29- (gore rekusvetuka), 30-, uye 31-mazuva emwedzi inoitwa otomatiki. Muripo wenguva yekuchengetedza masikati unogonawo kuitwa.
Kuwedzera 32-bit marejista ane programmable alarm subseconds, masekondi, maminetsi, maawa, zuva, uye zuva.
Iyo yedhijitari calibration ficha inowanikwa kutsiva chero kutsauka mukristaro oscillator kurongeka.
Mushure meBackup domain reset, ese maRTC marejista anodzivirirwa kubva kune angangoita parasitic kunyora ekupinda uye akadzivirirwa neakachengetedzwa kuwana.
As long as the supply voltage inoramba iri muhuwandu hwekushanda, iyo RTC haimbomira, pasinei nemamiriro ekugadzirisa (Run mode, low-power mode kana pasi pekugadzirisa zvakare).
Iwo makuru eRTC maficha ndeaya anotevera: · Karenda ine subseconds, masekondi, maminetsi, maawa (12 kana 24 fomati), zuva (zuva re
vhiki), zuva (zuva remwedzi), mwedzi, uye gore · Masikati ekuchengetedza muripo unogoneka nesoftware · Inorongwa alarm ine kukanganisa basa. Iyo alarm inogona kumutswa chero ipi zvayo
kusanganiswa kweminda yekarenda. · Otomatiki wakeup unit inogadzira iyo periodic mureza iyo inomutsa otomatiki kumuka
kukanganisa · Reference wachi yekuona: yakanyatsojeka yechipiri sosi wachi (50 kana 60 Hz) inogona
inoshandiswa kunatsiridza karenda nemazvo. · Kuwiriranisa kwakaringana newachi yekunze uchishandisa sub-second shift feature · Digital calibration circuit (periodic counter correction): 0.95 ppm kurongeka, inowanikwa mu
calibration window yemasekonzi akati wandei

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· Nguvaamp basa rekuchengetedza chiitiko · Kuchengeta kweSWKEY muRTC backup marejista ane yakananga bhazi kupinda kuSAE (kwete
inoverengwa neCPU) · Maskable kukanganisa/zviitiko:
Alamu A Alarm B Kumuka kunovhiringa Timestamp * Rutsigiro rweTrustZone: RTC yakachengetedzeka zvizere Alarm A, alarm B, wakeup timer uye nguvaamp munhu akachengeteka kana asina kuchengetedzwa
configuration RTC calibration yakaitwa yakachengeteka pane isina-kuchengetedza gadziriro

3.29

Tamper uye mabhuku ekuchengetedza (TAMP)
32 x 32-bit backup marejista anochengetwa mune ese akaderera-simba modes uye zvakare muVBAT modhi. Dzinogona kushandiswa kuchengetedza data rakadzama sezvo zvirimo zvadzivirirwa neamper discovery circuit.
Nomwe tamper mapini ekuisa uye mashanu tamper mapini ekubuda anowanikwa kune anti-tampkuwanikwa kwe. Zvekunze tamper pini dzinogona kugadzirwa kuti dzionekwe kumucheto, mupendero uye nhanho, kutariswa kwemazinga nekusefa, kana inoshanda t.amper iyo inowedzera nhanho yekuchengetedza nekutarisa otomatiki kuti tampmapini haazarurwe kunze kana kupfupikiswa.
TAMP maficha makuru · 32 backup marejista (TAMP_BKPxR) inoshandiswa muRTC domain yasara
powered-on neVBAT kana VDD simba radzimwa · 12 tampmapini aripo (zvinomwe zvinopinza uye zvishanu zvabuda) · Chero tampkuwonekwa kunogona kugadzira RTC nguvaamp chiitiko. · Chero tamper kuonekwa kunodzima marejista ekuchengetedza. · TrustZone rutsigiro:
Tamper yakachengeteka kana isina-yakachengeteka gadziriso Backup inonyoresa kumisikidzwa munzvimbo nhatu dzinogadziriswa-saizi:
. imwe yekuverenga / kunyora nzvimbo yakachengeteka. imwe nyora yakachengeteka / verenga isina-yakachengeteka nzvimbo. imwe yekuverenga/kunyora isina-yakachengeteka nzvimbo · Monotonic counter

3.30

Inter-integrated circuit interfaces (I2C1, I2C2, I2C3, I2C4, I2C5)
Midziyo yacho inonyudza shanu I2C interfaces.
Iyo I2C bhazi interface inobata kutaurirana pakati peSTM32MP133C/F uye seriyeri I2C bhazi. Iyo inodzora ese I2C bhazi-chaiyo kutevedzana, protocol, arbitration uye nguva.

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Iyo I2C peripheral inotsigira: · I2C-bhazi yakatarwa uye mushandisi bhuku rev. 5 kuenderana:
Muranda uye tenzi modes, multimaster kugona Standard-mode (Sm), ine bitrate inosvika 100 kbit/s Fast-mode (Fm), ine bitrate inosvika 400 kbit/s Fast-mode Plus (Fm+), ine bitrate inosvika 1 Mbit/s uye 20 mA inobuda dhiraivha I/Os 7-bit 10-bit kero ye7-bit kero ye2.0-bit kero uye XNUMX-bit kero. uye bata nguva Optional wachi kutambanudza · Sistimu manejimendi bhazi (SMBus) yakatarwa rev XNUMX kuenderana: Hardware PEC (packet kukanganisa kutarisa) kugadzirwa uye kusimbiswa neACK.
control Kero resolution protocol (ARP) inotsigira SMBus alert · Power system management protocol (PMBusTM) yakatarwa rev 1.1 kuenderana · Yakazvimirira wachi: sarudzo yeakazvimirira wachi masosi inobvumira iyo I2C yekutaurirana kumhanya kuti ive yakazvimirira kubva kuPCLK reprogramming · Wakeup kubva kuStop mode pane kero match · Programmable analog uye digital noise mafirita · 1-by DMA mafirita.
I2C3, I2C4 uye I2C5 inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.

3.31

Universal synchronous asynchronous receiver transmitter (USART1, UART2, UART3, UART6 uye UART4, UART5, UART7, UART8)
Iwo maturusi ane mana akamisikidzwa universal synchronous receiver transmitters (USART1, USART2, USART3 uye USART6) uye mana epasirese asynchronous receiver transmitters (UART4, UART5, UART7 uye UART8). Tarisa kutafura iri pazasi kuti uwane pfupiso yeUSARTx uye UARTx maficha.
Aya mainterface anopa asynchronous kutaurirana, IrDA SIR ENDEC tsigiro, multiprocessor kutaurirana modhi, single-waya hafu-duplex yekutaurirana modhi uye ine LIN master/muranda kugona. Ivo vanopa Hardware manejimendi eiyo CTS uye RTS masaini, uye RS485 Mutyairi Inogonesa. Vanokwanisa kutaurirana nekumhanya kunosvika 13 Mbit/s.
USART1, UART2, USART3 uye USART6 inopawo Smartcard modhi (ISO 7816 inoenderana) uye SPI-yakafanana nekugona kutaurirana.
Yese USART ine wachi domain yakazvimirira kubva kuCPU wachi, ichibvumira iyo USARTx kumutsa STM32MP133C/F kubva kuStop mode uchishandisa baudrates kusvika ku200 Kbaud. Zviitiko zvekumuka kubva kuStop mode zvinorongwa uye zvinogona kuva:
· tanga kuona zvishoma
· chero yakagamuchirwa data furemu
· imwe yakarongwa data furemu

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Yese USART interfaces inogona kushumirwa neDMA controller.

Tafura 5. UART / UART maitiro

UART modes/maficha(1)

UART1/2/3/6

UART4/5/7/8

Hardware kuyerera kudzora kwemodem

Kuenderera mberi kutaurirana uchishandisa DMA

Multiprocessor kutaurirana

Synchronous SPI mode (tenzi/muranda)

–

Smartcard mode

–

Single-waya hafu-duplex kutaurirana IrDA SIR ENDEC block

LIN mode

Dual wachi domain uye wakeup kubva yakaderera simba modhi

Receiver timeout kukanganisa kutaurirana kweModbus

Auto baud chiyero kuona

Mutyairi Enable

UART data kureba

7, 8 uye 9 zvishoma

1. X = inotsigirwa.

USART1 uye USART2 inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.

3.32

Serial peripheral interfaces (SPI1, SPI2, SPI3, SPI4, SPI5) inter- integrated sound interfaces (I2S1, I2S2, I2S3, I2S4)
Midziyo iyi ine maSPI anosvika mashanu (SPI2S1, SPI2S2, SPI2S3, SPI2S4, uye SPI5) inobvumira kutaurirana kusvika ku50 Mbit/s mune master uye varanda modes, muhafu-duplex, fullduplex uye simplex modes. Iyo 3-bit prescaler inopa masere master mode frequency uye furemu inogadziriswa kubva pa4 kusvika ku16 bits. Yese SPI interfaces inotsigira NSS pulse mode, TI modhi, hardware CRC kuverenga uye kuwanda kwe8-bit yakamisikidzwa Rx uye Tx FIFOs ine DMA kugona.
I2S1, I2S2, I2S3, uye I2S4 zvakapetwa neSPI1, SPI2, SPI3 uye SPI4. Anogona kushandiswa mune master kana muranda mode, mune yakazara-duplex uye hafu-duplex nzira dzekukurukurirana, uye inogona kugadzirwa kuti ishande ine 16- kana 32-bit resolution seyekupinda kana kubuda chiteshi. Audio sampLing frequency kubva 8 kHz kusvika 192 kHz inotsigirwa. Ese maI2S anopindirana anotsigira kuwanda kwe8-bit yakamisikidzwa Rx uye Tx FIFOs ine DMA inokwanisa.
SPI4 uye SPI5 inogona kutsanangurwa (muETZPC) seinowanikwa nesoftware yakachengeteka chete.

3.33

Serial audio interfaces (SAI1, SAI2)
Iwo maturusi akadzamisa maSAI maviri anobvumira dhizaini yeakawanda stereo kana mono audio protocol

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seI2S, LSB kana MSB-yakarurama, PCM/DSP, TDM kana AC'97. Iyo SPDIF inobuda inowanikwa kana iyo odhiyo block yakagadziriswa semupepeti. Kuunza iyi nhanho yekuchinjika uye kugadzirisazve, SAI yega yega ine maviri akazvimirira odhiyo sub-blocks. Imwe neimwe block ine yayo wachi jenareta uye I / O mutsara controller. Audio sampLing frequency kusvika 192 kHz inotsigirwa. Pamusoro pezvo, anosvika maikorofoni masere anogona kutsigirwa nekutenda kune yakamisikidzwa PDM interface. Iyo SAI inogona kushanda mune tenzi kana nhapwa kumisikidzwa. Iwo maodhiyo madiki-mabhuraki anogona kunge ari anogashira kana transmitter uye anogona kushanda anoenderana kana asynchronously (nekuremekedza kune imwe). Iyo SAI inogona kubatanidzwa nemamwe maSAI kuti ishande pamwe chete.

3.34

SPDIF inogamuchira interface (SPDIFRX)
Iyo SPDIFRX yakagadzirirwa kugamuchira S/PDIF kuyerera kunoenderana neIEC-60958 uye IEC-61937. Aya mazinga anotsigira akareruka stereo hova kusvika kumusoro sample rate, uye yakamanikidzwa yakawanda-channel yakatenderedza ruzha, senge inotsanangurwa neDolby kana DTS (kusvika 5.1).
Iyo SPDIFRX mikuru maficha ndeaya anotevera: · Kusvika kune mana ekuisa aripo · Otomatiki chiratidzo cheyero yekuona · Maximum chiratidzo mwero: 12.288 MHz · Stereo rwizi kubva 32 kusvika 192 kHz inotsigirwa · Tsigiro yeaudio IEC-60958 uye IEC-61937, kushandiswa kwevatengi · Parity bit manejimendi · Kukurukurirana uchishandisa DMA yeaudio.ampzvishoma · Kukurukurirana uchishandisa DMA yekudzora uye ruzivo rwemushandisi chiteshi · Kukanganisa kugona
Iyo SPDIFRX inogamuchira inopa ese anodiwa maficha kuti aone chiyero chechiratidzo, uye decode iri kuuya data rwizi. Mushandisi anogona kusarudza iyo inodiwa SPDIF yekuisa, uye kana chiratidzo chechokwadi chinowanikwa, iyo SPDIFRX inodzokororaampinosiya chiratidzo chirikuuya, inosarudza rwizi rweManchester, uye inoziva mafuremu, mafuremu madiki uye anovhara zvinhu. Iyo SPDIFRX inoendesa kuCPU decoded data, uye yakabatana mamiriro mireza.
Iyo SPDIFRX inopawo chiratidzo chinonzi spdif_frame_sync, chinochinja paS/PDIF sub-frame chiyero chinoshandiswa kuverengera iyo chaiyo s.ample chiyero chewachi drift algorithms.

3.35

Chengetedza dhijitari yekupinda/inobuditsa MultiMediaCard interfaces (SDMMC1, SDMMC2)
Maviri akachengeteka edhijitari ekuisa / kubuda MultiMediaCard interfaces (SDMMC) inopa chinongedzo pakati peAHB bhazi uye SD memori makadhi, SDIO makadhi uye MMC zvishandiso.
Zvimiro zveSDMMC zvinosanganisira zvinotevera: · Kutevedza neEmbedded MultiMediaCard System Specification Version 5.1
Kadhi rutsigiro rwematatu akasiyana databus modes: 1-bit (default), 4-bit uye 8-bit.

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(HS200 SDMMC_CK sipidhi inogumira kusvika pakakwirira inobvumirwa I/O kumhanya)(HS400 haitsigirwe)
· Kuenderana kwakazara nemavhezheni apfuura eMultiMediaCards (kumashure kuenderana)
· Kuteerera kwakazara neSD memori kadhi yakatsanangurwa vhezheni 4.1 (SDR104 SDMMC_CK yekumhanyisa inogumira kune yakanyanya kubvumidzwa I/O kumhanya, SPI modhi uye UHS-II modhi haina kutsigirwa)
· Kuteera kwakazara neSDIO kadhi yakatarwa vhezheni 4.0 Kadhi rutsigiro rwemhando mbiri dzakasiyana dzedatabus: 1-bit (default) uye 4-bit (SDR104 SDMMC_CK yekumhanya inogumira kune yakanyanya kubvumidzwa I/O kumhanya, SPI modhi uye UHS-II modhi haina kutsigirwa)
Kuendesa data kusvika ku208 Mbyte/s ye8-bit modhi (zvichienderana nepamusoro inobvumidzwa I/O kumhanya)
· Dhata uye kubuda kwemirairo kunogonesa masaini kudzora ekunze bidirectional driver
· Yakazvitsaurira DMA controller yakanyudzwa muSDMMC host interface, ichibvumira yakakwira-kumhanya kutamiswa pakati peiyo interface neSRAM.
· IDMA yakabatana runyorwa rutsigiro
· Yakatsaurirwa magetsi emagetsi, VDDSD1 uye VDDSD2 yeSDMMC1 uye SDMMC2 zvakateerana, ichibvisa kudiwa kweiyo level-shifter yekuisa pane SD kadhi interface mune UHS-I modhi.
Mamwe maGPIO chete eSDMMC1 neSDMMC2 anowanikwa pane yakatsaurirwa VDDSD1 kana VDDSD2 pini yekupa. Izvo zvikamu zveiyo default boot GPIOs yeSDMMC1 uye SDMMC2 (SDMMC1: PC[12:8], PD[2], SDMMC2: PB[15,14,4,3], PE3, PG6). Anogona kuzivikanwa mune imwe tafura yebasa nemasaini ane "_VSD1" kana "_VSD2" suffix.
Imwe neimwe SDMMC inosanganiswa nekunonoka block (DLYBSD) inobvumira kutsigirwa kweiyo yekunze data frequency pamusoro pe100 MHz.
Ose maviri SDMMC maficha ane chengetedzo yekumisikidza zviteshi.

3.36

Controller area network (FDCAN1, FDCAN2)
Iyo controller area network (CAN) subsystem ine maviri CAN modules, yakagovaniswa meseji RAM memory uye wachi calibration unit.
Ose maCAN modules (FDCAN1 neFDCAN2) anowirirana neISO 11898-1 (CAN protocol specification version 2.0 chikamu A, B) uye CAN FD protocol specification version 1.0.
A 10-Kbyte meseji RAM memory inoshandisa mafirita, igashira maFIFO, igashira mabhafa, fambisa chiitiko maFIFO uye kuendesa mabhafa (pamwe nezvinokonzeresa zveTTCAN). Iyi meseji RAM yakagovaniswa pakati peiyo FDCAN1 uye FDCAN2 modules.
Iyo yakajairika wachi calibration unit ndeyekusarudza. Inogona kushandiswa kugadzira wachi yakarongedzerwa kune ese FDCAN1 uye FDCAN2 kubva kuHSI yemukati RC oscillator uye PLL, nekuongorora CAN mameseji anogamuchirwa neFDCAN1.

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3.37

Universal serial bhazi yakakwira-kumhanya inotambira (USBH)
Midziyo yacho inomisikidza imwe USB yakakwira-kumhanya inotambira (kusvika ku480 Mbit/s) ine madoko maviri emuviri. USBH inotsigira ese ari maviri akaderera, akazara-kumhanya (OHCI) pamwe neakakwira-kumhanya (EHCI) mashandiro akazvimiririra pachiteshi chega chega. Inobatanidza ma-transceivers maviri anogona kushandiswa kune yakaderera-speed (1.2 Mbit / s), yakazara-speed (12 Mbit / s) kana yepamusoro-speed operation (480 Mbit / s). Yechipiri yepamusoro-kumhanya transceiver yakagovaniswa neOTG yakakwira-kumhanya.
Iyo USBH inoenderana neiyo USB 2.0 yakatarwa. Iwo ma-USBH anodzora anoda wachi dzakatsaurwa dzinogadzirwa nePLL mukati me USB yakakwira-kumhanya PHY.

3.38

USB pa-iyo-kuenda yakakwira-kumhanya (OTG)
Iwo maturusi akanyudza imwe USB OTG yakakwira-kumhanya (kusvika ku480 Mbit/s) mudziyo/host/OTG peripheral. OTG inotsigira ese ari maviri akazara-kumhanya uye akakwira-kumhanya mashandiro. Iyo transceiver yekumhanya-mhanya (480 Mbit / s) inogovaniswa neiyo USB Host yechipiri port.
Iyo USB OTG HS inoenderana neiyo USB 2.0 yakatarwa uye neiyo OTG 2.0 yakatarwa. Iyo ine software-inogadziriswa endpoint yekumisikidza uye inotsigira kumisa / kutangazve. Iwo ma USB OTG anodzora anoda yakatsaurirwa 48 MHz wachi iyo inogadzirwa nePLL mukati meRCC kana mukati me USB yakakwira-kumhanya PHY.
Iyo USB OTG HS maficha makuru akanyorwa pazasi: · Yakasanganiswa Rx neTx FIFO saizi ye4 Kbyte ine dynamic FIFO sizing · SRP (session chikumbiro protocol) uye HNP (host negotiation protocol) rutsigiro · Eight bidirectional endpoints · 16 host channels with periodic OUT support · Software configurable to OTG1.3 operations of OTG2.0. LPM (link power management) tsigiro · Battery charging specification revision 2.0 support · HS OTG PHY support · Internal USB DMA · HNP/SNP/IP mukati (hapana chinodiwa chero chinopikisa chekunze) · Kune OTG/Host modes, switch yemagetsi inodiwa kana mabhazi-powered midziyo iripo.
zvakabatana.
Iyo USB OTG yekumisikidza chiteshi inogona kuchengetedzwa.

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3.39

Gigabit Ethernet MAC interfaces (ETH1, ETH2)
Zvishandiso zvinopa maviri IEEE-802.3-2002-inoenderana gigabit media access controllers (GMAC) yeEthernet LAN kutaurirana kuburikidza neindasitiri-yakajairwa yepakati-yakazvimiririra interface (MII), yakaderedzwa yepakati-yakazvimiririra interface (RMII), kana yakaderedzwa gigabit yepakati-yakazvimiririra interface (RGMII).
Iyo michina inoda yekunze yemuviri interface mudziyo (PHY) yekubatanidza kune yepanyama LAN bhazi (yakamonyoroka-pairi, fiber, nezvimwewo). Iyo PHY yakabatana nechiteshi chemidziyo uchishandisa masaini gumi nemanomwe eMII, masaini manomwe eRMII, kana gumi nematatu masaini eRGMII, uye inogona kuvharwa uchishandisa iyo 17 MHz (MII, RMII, RGMII) kana 7 MHz (RGMII) kubva kuSTM13MP25C/F kana kubva kuPHY.
Midziyo iyi inosanganisira zvinotevera: · Mashandisirwo emodhi uye PHY nzvimbo
10-, 100-, uye 1000-Mbit/s mareti ekufambisa dhata Tsigiro yezvese zvizere-duplex uye hafu-duplex mashandiro MII, RMII uye RGMII PHY interfaces · Kugadziridza kutonga Multi-layer Packet kusefa: MAC kusefa pane sosi (SA) uye kwekuenda (DA)
kero ine yakakwana uye hashi sefa, VLAN tag-yakavakirwa kusefa ine yakakwana uye hashi sefa, Layer 3 kusefa paIP sosi (SA) kana kwainoenda (DA) kero, Layer 4 kusefa pane sosi (SP) kana kwainoenda (DP) chiteshi Kaviri VLAN kugadzirisa: kuiswa kweanosvika maviri VLAN. tags munzira yekufambisa, tag kusefa munzira yekugamuchira IEEE 1588-2008/PTPv2 tsigiro Inotsigira network manhamba ane RMON/MIB counters (RFC2819/RFC2665) · Hardware offload processing Preamble uye kutanga-kwe-frame data (SFD) kuisa kana kudzima Kutendeseka checksum offload injini yeIP musoro / ICUMP transloader injini yeIP musoro / ICUMP uye TCP. gamuchira checksum kuverenga uye kuenzanisa otomatiki ARP chikumbiro mhinduro nemudziyo MAC kero TCP segmentation: otomatiki kupatsanurwa kwehombe kuendesa TCP pakiti mumapaketi madiki akawanda · Yakaderera-simba modhi Energy inoshanda Ethernet (yakajairwa IEEE 802.3az-2010) Remote wakeup packet uye AMD Magic Packet TM kuona.
Ose ETH1 uye ETH2 anogona kurongwa seakachengeteka. Kana yakachengeteka, kutengeserana pamusoro peiyo AXI interface kwakachengeteka, uye marejista ekugadzirisa anogona kungogadziriswa chete nekuwana kwakachengeteka.

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3.40

Debug infrastructure
Iwo maturusi anopa anotevera debug uye kutsvaga maficha kutsigira software kuvandudza uye system yekubatanidza: · Breakpoint debugging · Code execution yekutsvaga · Software instrumentation · JTAG debug port · Serial-wire debug port · Trigger input and output · Trace port · Arm CoreSight debug and trace parts
Iyo debug inogona kudzorwa kuburikidza neJTAG/ serial-waya debug yekupinda chiteshi, uchishandisa indasitiri yakajairwa debugging maturusi.
Iyo trace port inobvumira data kutorwa kuti itore matanda uye kuongororwa.
Kupinda kwedebug kunzvimbo dzakachengeteka kunogoneswa nemasaini echokwadi muBSEC.

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Pinout, tsananguro yepini uye mamwe mabasa

Mufananidzo 5. STM32MP133C/F LFBGA289 vhoti

VSS

PA9

PD10

PB7

PE7

PD5

PE8

PG4

PH9

PH13

PC7

PB9

PB14

PG6

PD2

PC9

VSS

PD3

PF5

PD14

PE12

PE1

PE9

PH14

PE10

PF1

PF3

PC6

PB15

PB4

PC10

PC12

DDR_DQ4 DDR_DQ0

PB6

PH12

PE14

PE13

PD8

PD12

PD15

VSS

PG7

PB5

PB3

VDDSD1

PF0

PC11

DDR_DQ1

DDR_ DQS0N

DDR_ DQS0P

PB8

PD6

VSS

PE11

PD1

PE0

PG0

PE15

PB12

PB10

VDDSD2

VSS

PE3

PC8

DDR_ DQM0

DDR_DQ5 DDR_DQ3

PG9

PD11

PA12

PD0

VSS

PA15

PD4

PD9

PF2

PB13

PH10

VDDQ_ DDR

DDR_DQ2 DDR_DQ6 DDR_DQ7 DDR_A5

DDR_ RESETN

PG10

PG5

PG8

PH2

PH8

VDDCPU

VDD

VDDCPU VDDCPU

VDD

VDDQ_ DDR

VSS

DDR_A13

VSS

DDR_A9

DDR_A2

PF9

PF6

PF10

PG15

PF8

VDD

VSS

VDDQ_ DDR

DDR_BA2 DDR_A7

DDR_A3

DDR_A0 DDR_BA0

PH11

PI3

PH7

PB2

PE4

VDDCPU

VSS

VDDCORE VDDCORE VDDCORE

VSS

VDDQ_ DDR

DDR_WEN

VSS

DDR_ODT DDR_CSN

DDR_ RASN

PD13

VBAT

PI2

VSS_PLL VDD_PLL VDDCPU

VSS

VDDCORE

VSS

VDDCORE

VSS

VDDQ_ DDR

VDDCORE DDR_A10

DDR_ CASN

DDR_ CLKP

DDR_ CLKN

PC14OSC32_IN

PC15OSC32_
OUT

VSS

PC13

PI1

VDD

VSS

VDDCORE VDDCORE VDDCORE

VSS

VDDQ_ DDR

DDR_A11 DDR_CKE DDR_A1 DDR_A15 DDR_A12

PE2

PF4

PH6

PI0

PG3

VDD

VSS

VDDQ_ DDR

DDR_ATO

DDR_ DTO0

DDR_A8 DDR_BA1 DDR_A14

PF7

PA8

PG11

VDD_ANA VSS_ANA

VDD

VDDQ_ DDR

DDR_ VREF

DDR_A4

VSS

DDR_ DTO1

DDR_A6

PE6

PG1

PD7

VSS

PB11

PF13

VSSA

PA3

NJTRST

VSS_USB VDDA1V1_

REG

VDDQ_ DDR

PWR_LP

DDR_ DQM1

DDR_ DQ10

DDR_DQ8 DDR_ZQ

PH0OSC_IN

PH1OSC_OUT

PA13

PF14

PA2

VREF-

VDDA

PG13

PG14

VDD3V3_ USBHS

VSS

PI5-BOOT1 VSS_PLL2 PWR_ON

DDR_ DQ11

DDR_ DQ13

DDR_DQ9

PG2

PH3

PWR_CPU _ON

PA1

VSS

VREF+

PC5

VSS

VDD

PF15

VDDA1V8_ REG

PI6-BOOT2

VDD_PLL2

PH5

DDR_ DQ12

DDR_ DQS1N

DDR_ DQS1P

PG12

PA11

PC0

PF12

PC3

PF11

PB1

PA6

PE5

PDR_ON USB_DP2

PA14

USB_DP1

BYPASS_ REG1V8

PH4

DDR_ DQ15

DDR_ DQ14

VSS

PA7

PA0

PA5

PA4

PC4

PB0

PC1

PC2

NRST

USB_DM2

USB_ RREF

USB_DM1 PI4-BOOT0

PA10

PI7

VSS

MSv65067V5

Mufananidzo uri pamusoro unoratidza pasuru yepamusoro view.

DS13875 Rev 5

49/219
97

Pinout, tsananguro yepini uye mamwe mabasa

STM32MP133C/F

Mufananidzo 6. STM32MP133C/F TFBGA289 ballout

VSS

PD4

PE9

PG0

PD15

PE15

PB12

PF1

PC7

PC6

PF0

PB14

VDDSD2 VDDSD1 DDR_DQ4 DDR_DQ0

VSS

PE12

PD8

PE0

PD5

PD9

PH14

PF2

VSS

PF3

PB13

PB3

PE3

PC12

VSS

DDR_DQ1

DDR_ DQS0N

DDR_ DQS0P

PE13

PD1

PE1

PE7

VSS

VDD

PE10

PG7

PG4

PB9

PH10

PC11

PC8

DDR_DQ2

DDR_ DQM0

DDR_DQ3 DDR_DQ5

PF5

PA9

PD10

VDDCPU

PB7

VDDCPU

PD12

VDDCPU

PH9

VDD

PB15

VDD

VSS

VDDQ_ DDR

DDR_ RESETN

DDR_DQ7 DDR_DQ6

PD0

PE14

VSS

PE11

VDDCPU

VSS

PA15

VSS

PH13

VSS

PB4

VSS

VDDQ_ DDR

VSS

VDDQ_ DDR

VSS

DDR_A13

PH8

PA12

VDD

VDDCPU

VSS

VDDCORE

PD14

PE8

PB5

VDDCORE

PC10

VDDCORE

VSS

VDDQ_ DDR

DDR_A7

DDR_A5

DDR_A9

PD11

PH2

PB6

PB8

PG9

PD3

PH12

PG15

PD6

PB10

PD2

PC9

DDR_A2 DDR_BA2 DDR_A3

DDR_A0 DDR_ODT

PG5

PG10

PF8

VDDCPU

VSS

VDDCORE

PH11

PI3

PF9

PG6

BYPASS_ REG1V8

VDDCORE

VSS

VDDQ_ DDR

DDR_BA0 DDR_CSN DDR_WEN

J VDD_PLL VSS_PLL

PG8

PI2

VBAT

PH6

PF7

PA8

PF12

VDD

VDDA1V8_ REG

PA10

DDR_ VREF

DDR_ RASN

DDR_A10

VSS

DDR_ CASN

PE4

PF10

PB2

VDD

VSS

VDDCORE

PA13

PA1

PC4

NRST

VSS_PLL2 VDDCORE

VSS

VDDQ_ DDR

DDR_A15

DDR_ CLKP

DDR_ CLKN

PF6

VSS

PH7

VDD_ANA VSS_ANA

PG12

PA0

PF11

PE5

PF15

VDD_PLL2

PH5

DDR_CKE DDR_A12 DDR_A1 DDR_A11 DDR_A14

PC14OSC32_IN

PC15OSC32_
OUT

PC13

VDD

VSS

PB11

PA5

PB0

VDDCORE

USB_ RREF

PI6-BOOT2 VDDCORE

VSS

VDDQ_ DDR

DDR_A6

DDR_A8 DDR_BA1

PD13

VSS

PI0

PI1

PA11

VSS

PA4

PB1

VSS

PI5-BOOT1

VSS

VDDQ_ DDR

VSS

VDDQ_ DDR

VSS

DDR_ATO

PH0OSC_IN

PH1OSC_OUT

PF4

PG1

VSS

VDD

PC3

PC5

VDD

PI4-BOOT0

VDD

VSS

VDDQ_ DDR

DDR_A4 DDR_ZQ DDR_DQ8

PG11

PE6

PD7

PWR_ CPU_ON

PA2

PA7

PC1

PA6

PG13

NJTRST

PA14

VSS

PWR_ON

DDR_ DQM1

DDR_ DQ12

DDR_ DQ11

DDR_DQ9

PE2

PH3

PF13

PC0

VSSA

VREF-

PA3

PG14

USB_DP2

VSS

VSS_ USBHS

USB_DP1

PH4

DDR_ DQ13

DDR_ DQ14

DDR_ DQS1P

DDR_ DQS1N

VSS

PG3

PG2

PF14

VDDA

VREF+

PDR_ON

PC2

USB_DM2

VDDA1V1_ REG

VDD3V3_ USBHS

USB_DM1

PI7

Mufananidzo uri pamusoro unoratidza pasuru yepamusoro view.

PWR_LP

DDR_ DQ15

DDR_ DQ10

VSS

MSv67512V3

50/219

DS13875 Rev 5

STM32MP133C/F

Pinout, tsananguro yepini uye mamwe mabasa

Mufananidzo 7. STM32MP133C/F TFBGA320 ballout
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

VSS

PA9

PE13 PE12

PD12

PG0

PE15

PG7

PH13

PF3

PB9

PF0

PC10 pc

PC9

VSS

PD0

PE11

PF5

PA15

PD8

PE0

PE9

PH14

PE8

PG4

PF1

VSS

PB5

PC6

PB15 PB14

PE3

PC11

DDR_ DQ4

DDR_ DQ1

DDR_ DQ0

PB6

PD3

PE14 PD14

PD1

PB7

PD4

PD5

PD9

PE10 PB12

PH9

PC7

PB3

VDD SD2

PB4

PG6

PC8

PD2

DDR_ DDR_ DQS0P DQS0N

PB8

PD6

PH12

PD10

PE7

PF2

PB13

VSS

DDR_ DQ2

DDR_ DQ5

DDR_ DQM0

PH2

PH8

VSS

VDD CPU

PE1

PD15

VDD CPU

VSS

VDD

PB10

PH10

VDDQ_ DDR

VSS

VDD SD1

DDR_ DQ3

DDR_ DQ6

PF8

PG9

PD11 PA12

VSS

DDR_ DQ7

DDR_ A5

VSS

PF6

PG10

PG5

VDD CPU

PE4

PF10 PG15

PG8

PH7

PD13

PB2

PF9

VDD CPU

VSS

VDD

VDD CPU

VDD CORE

VSS

VDD

VSS

VDDQ_ DDR

VSS

VDD

VSS

VDD CORE

VSS

VDD

VDD CORE

VDDQ_ DDR

DDR_ A13

DDR_ A2

DDR_ A9

DDR_ RESET
N

DDR_ BA2

DDR_ A3

DDR_ A0

DDR_ A7

DDR_ BA0

DDR_ CSN

DDR_ ODT

VSS_ PLL

VDD_ PLL

PH11

VDD CPU

PC15-

VBAT OSC32 PI3

VSS

_OUT

PC14-

VSS OSC32 PC13

_IN

VDD

PE2

PF4

PH6

PI2

VDD CPU
VDD CORE
VSS
VDD

VSS

VDD CORE

VSS

VDD CORE

VSS

VDD

VDD CORE

VSS

VDD

VDD CORE

VDDQ_ DDR
VSS
VDDQ_ DDR
VDD CORE

VDDQ_ DDR

DDR_ WEN

DDR_ RASN

VSS

DDR_ A10

DDR_ CASN

DDR_ CLKN

VDDQ_ DDR

DDR_ A12

DDR_ CLKP

DDR_ A15

DDR_ A11

DDR_ A14

DDR_ CKE

DDR_ A1

PA8

PF7

PI1

PI0

VSS

DDR_ DTO1

DDR_ ATO

DDR_ A8

DDR_ BA1

PG1

PG11

PH3

VDD

VSS

VDD

VDD CORE

VSS

VDD

VDD CORE

VSS

VDDQ_ DDR

DDR_ A4

DDR_ ZQ

DDR_ A6

VSS

PE6

PH0OSC_IN

PA13

VSS

DDR_ VREF

DDR_ DQ10

DDR_ DQ8

VSS

PH1OSC_ OUT

VSS_ ANA

VSS

VDD

VDDA VSSA

PA6

VSS

VDD CORE

VSS

VDD VDDQ_ CORE DDR

VSS

PWR_ ON

DDR_ DQ13

DDR_ DQ9

PD7

VDD_ ANA

PG2

PA7

VREF-

NJ TRST

VDDA1 V1_ REG

VSS

PWR_ DDR_ DDR_ LP DQS1P DQS1N

PWR_

PG3

PG12 CPU_ PF13

PC0

PC3 VREF+ PB0

PA3

PE5

VDD

USB_ RREF

PA14

VDD 3V3_ USBHS

VDDA1 V8_ REG

VSS

BYPAS S_REG
1V8

PH5

DDR_ DQ12

DDR_ DQ11

DDR_ DQM1

PA11

PF14

PA0

PA2

PA5

PF11

PC4

PB1

PC1

PG14

NRST

PF15

USB_ VSS_

PI6-

USB_

PI4-

VDD_

DM2 USBHS BOOT2 DP1 BOOT0 PLL2

PH4

DDR_ DQ15

DDR_ DQ14

VSS

PB11

PA1

PF12

PA4

PC5

PG13

PC2

PDR_ ON

USB_ DP2

PI5-

USB_

BOOT1 DM1

VSS_ PLL2

PA10

PI7

VSS

Mufananidzo uri pamusoro unoratidza pasuru yepamusoro view.

MSv65068V5

DS13875 Rev 5

51/219
97

Pinout, tsananguro yepini uye mamwe mabasa

STM32MP133C/F

Tafura 6. Ngano / zvipfupiso zvinoshandiswa mutafura yepinout

Zita

Kudimbudzira

Tsanangudzo

Pin zita Pin type
I / O chimiro
Notes Mamwe mabasa Mamwe mabasa

Kunze kwekunge zvatsanangurwa neimwe nzira, basa repini panguva uye mushure mekugadzirisa patsva rakafanana nezita repini chairo

Supply pin

Nyora pini chete

Pini yekubuda chete

I/O

Pini yekupinza/inoburitsa

Analog kana yakakosha level pini

FT (U/D/PD) 5 V inoshivirira I/O (ine yakagadziriswa kudhonza-kumusoro / kudhonza-pasi / inogoneka kudhonzera pasi)

DDR

1.5 V, 1.35 V kana 1.2 VI/O yeDDR3, DDR3L, LPDDR2/LPDDR3 interface

Analogi chiratidzo

RST

Gadzirisa pini ine isina kusimba yekudhonza-up resistor

_f(1) _a(2) _u(3) _h(4)

Sarudzo yeFT I/Os I2C FM+ sarudzo Analog sarudzo (inopihwa neVDDA yeanalog chikamu cheI/O) USB sarudzo (inopihwa neVDD3V3_USBxx yechikamu cheUSB cheI/O) Kubuda kwekumhanya kwe1.8V typ. VDD (yeSPI, SDMMC, QUADSPI, TRACE)

_vh(5)

Yakanyanya-yepamusoro-kumhanya sarudzo ye1.8V typ. VDD (yeETH, SPI, SDMMC, QUADSPI, TRACE)

Kunze kwekunge zvatsanangurwa neimwe nzira nenoti, ese maI/O anoiswa seanoyangarara ekuisa panguva uye mushure mekugadzirisazve

Mabasa akasarudzwa kuburikidza neGPIOx_AFR marejista

Mabasa akasarudzwa zvakananga / anogoneswa kuburikidza neperipheral register

. FT_fvh, FT_vh, FT_ha, FT_vha 1. Maumbirwo eI/O muTebhu 7 anoti: FT_vh, FT_vha, FT_fvh

52/219

DS13875 Rev 5

STM32MP133C/F

Pinout, tsananguro yepini uye mamwe mabasa

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

K10 F6 U14 A2 D2 A2 A1 A1 T5 M6 F3 U7
D4 E4 B2
B2 D1 B3 B1 G6 C2
C3 E2 C3 F6 D4 E7 E4 E1 B1
C2 G7 D3
C1 G3 C1

VDDCORE S

–

PA9

I/O FT_h

VSS VDD

–

PE11

I/O FT_vh

PF5

I/O FT_h

PD3

I/O FT_f

PE14

I/O FT_h

VDDCPU

–

PD0

Ini/O FT

PH12

I/O FT_fh

PB6

I/O FT_h

–

TIM1_CH2, I2C3_SMBA,

–

DFSDM1_DATIN0, USART1_TX, UART4_TX,

FMC_NWAIT(bhutu)

–

TIM1_CH2,

USART2_CTS/USART2_NSS,

SAI1_D2,

–

SPI4_MOSI/I2S4_SDO, SAI1_FS_A, USART6_CK,

ETH2_MII_TX_ER,

ETH1_MII_TX_ER,

FMC_D8(boot)/FMC_AD8

–

TRACED12, DFSDM1_CKIN0, I2C1_SMBA, FMC_A5

TIM2_CH1,

–

USART2_CTS/USART2_NSS, DFSDM1_CKOUT, I2C1_SDA,

SAI1_D3, FMC_CLK

TIM1_BKIN, SAI1_D4,

UART8_RTS/UART8_DE,

–

QUADSPI_BK1_NCS,

QUADSPI_BK2_IO2,

FMC_D11(boot)/FMC_AD11

–

SAI1_MCLK_A, SAI1_CK1,

–

FDCAN1_RX,

FMC_D2(boot)/FMC_AD2

UART2_TX, TIM5_CH3,

DFSDM1_CKIN1, I2C3_SCL,

–

SPI5_MOSI, SAI1_SCK_A, QUADSPI_BK2_IO2,

SAI1_CK2, ETH1_MII_CRS,

FMC_A6

TRACED6, TIM16_CH1N,

TIM4_CH1, TIM8_CH1,

–

UART1_TX, SAI1_CK2, QUADSPI_BK1_NCS,

ETH2_MDIO, FMC_NE3,

HDP6

–
–
–
TAMP_IN6 -
–
–

DS13875 Rev 5

53/219
97

Pinout, tsananguro yepini uye mamwe mabasa

STM32MP133C/F

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

A17 A17 T17 M7 – J13 D2 G9 D2 F5 F1 E3 D1 G4 D1
E3 F2 F4 F8 D6 E10 F4 G2 E2 C8 B8 T21 E2 G1 F3
E1 G5 F2 G5 H3 F1 M8 – M5

VSS VDD PD6 PH8 PB8
PA12 VDDCPU
PH2 VSS PD11
PG9 PF8 VDD

–

Ini/O FT

I/O FT_fh

I/O FT_f

I/O FT_h

–

I/O FT_h

–

I/O FT_h

I/O FT_f

I/O FT_h

–

TIM16_CH1N, SAI1_D1, SAI1_SD_A, UART4_TX(bhutu)

TRACED9, TIM5_ETR,

–

USART2_RX, I2C3_SDA,

FMC_A8, HDP2

TIM16_CH1, TIM4_CH3,

I2C1_SCL, I2C3_SCL,

–

DFSDM1_DATIN1,

UART4_RX, SAI1_D1,

FMC_D13(boot)/FMC_AD13

TIM1_ETR, SAI2_MCLK_A,

USART1_RTS/USART1_DE,

–

ETH2_MII_RX_DV/ETH2_

RGMII_RX_CTL/ETH2_RMII_

CRS_DV, FMC_A7

–

LPTIM1_IN2, UART7_TX,

QUADSPI_BK2_IO0(bhutu),

–

ETH2_MII_CRS,

ETH1_MII_CRS, FMC_NE4,

ETH2_RGMII_CLK125

–

LPTIM2_IN2, I2C4_SMBA,

USART3_CTS/USART3_NSS,

SPDIFX_IN0,

–

QUADSPI_BK1_IO2,

ETH2_RGMII_CLK125,

FMC_CLE(bhutu)/FMC_A16,

UART7_RX

DBTRGO, I2C2_SDA,

–

USART6_RX, SPDIFRX_IN3, FDCAN1_RX, FMC_NE2,

FMC_NCE(bhutu)

TIM16_CH1N, TIM4_CH3,

–

TIM8_CH3, SAI1_SCK_B, USART6_TX, TIM13_CH1,

QUADSPI_BK1_IO0(bhutu)

–

–
–
WKUP1
–

54/219

DS13875 Rev 5

STM32MP133C/F

Pinout, tsananguro yepini uye mamwe mabasa

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

F3 J3 H5
F9 D8 G5 F2 H1 G3 G4 G8 H4
F1 H2 G2 D3 B14 U5 G3 K2 H3 H8 F10 G2 L1 G1 D12 C5 U6 M9 K4 N7 G1 H9 J5

PG8

I/O FT_h

VDDCPU PG5

–

I/O FT_h

PG15

I/O FT_h

PG10

I/O FT_h

VSS

–

PF10

I/O FT_h

VDDCORE S

–

PF6

I/O FT_vh

VSS VDD

–

PF9

I/O FT_h

TIM2_CH1, TIM8_ETR,

SPI5_MISO, SAI1_MCLK_B,

USART3_RTS/USART3_DE,

–

SPDIFX_IN2,

QUADSPI_BK2_IO2,

QUADSPI_BK1_IO3,

FMC_NE2, ETH2_CLK

–

TIM17_CH1, ETH2_MDC, FMC_A15

USART6_CTS/USART6_NSS,

–

UART7_CTS, QUADSPI_BK1_IO1,

ETH2_PHY_INTN

SPI5_SCK, SAI1_SD_B,

–

UART8_CTS, FDCAN1_TX, QUADSPI_BK2_IO1(bhutu),

FMC_NE3

–

TIM16_BKIN, SAI1_D3, TIM8_BKIN, SPI5_NSS, – USART6_RTS/USART6_DE, UART7_RTS/UART7_DE,
QUADSPI_CLK(bhutu)

–

TIM16_CH1, SPI5_NSS,

UART7_RX (bhutu),

–

QUADSPI_BK1_IO2, ETH2_MII_TX_EN/ETH2_

RGMII_TX_CTL/ETH2_RMII_

TX_EN

–

TIM17_CH1N, TIM1_CH1,

DFSDM1_CKIN3, SAI1_D4,

–

UART7_CTS, UART8_RX, TIM14_CH1,

QUADSPI_BK1_IO1(bhutu),

QUADSPI_BK2_IO3, FMC_A9

TAMP_IN4
–
TAMP_IN1 -

DS13875 Rev 5

55/219
97

Pinout, tsananguro yepini uye mamwe mabasa

STM32MP133C/F

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

H5 K1 H2 H6 E5 G7 H4 K3 J3 E5 D13 U11 H3 L3 J1
H1 H7 K3
J1 N1 J2 J5 J1 K2 J4 J2 K1 H2 H8 L4 K4 M3 M3

PE4 VDDCPU
PB2 VSS PH7
PH11
PD13 VDD_PLL VSS_PLL
PI3 PC13

I/O FT_h

–

I/O FT_h

–

I/O FT_fh

I/O FT_h

–

Ini/O FT

SPI5_MISO, SAI1_D2,

DFSDM1_DATIN3,

TIM15_CH1N, I2S_CKIN,

–

SAI1_FS_A, UART7_RTS/UART7_DE,

–

UART8_TX,

QUADSPI_BK2_NCS,

FMC_NCE2, FMC_A25

–

RTC_OUT2, SAI1_D1,

I2S_CKIN, SAI1_SD_A,

–

UART4_RX,

QUADSPI_BK1_NCS(bhutu),

ETH2_MDIO, FMC_A6

TAMP_IN7

–

SAI2_FS_B, I2C3_SDA,

SPI5_SCK,

–

QUADSPI_BK2_IO3, ETH2_MII_TX_CLK,

–

ETH1_MII_TX_CLK,

QUADSPI_BK1_IO3

SPI5_NSS, TIM5_CH2,

SAI2_SD_A,

SPI2_NSS/I2S2_WS,

–

I2C4_SCL, USART6_RX, QUADSPI_BK2_IO0,

–

ETH2_MII_RX_CLK/ETH2_

RGMII_RX_CLK/ETH2_RMII_

REF_CLK, FMC_A12

LPTIM2_ETR, TIM4_CH2,

TIM8_CH2, SAI1_CK1,

–

SAI1_MCLK_A, USART1_RX, QUADSPI_BK1_IO3,

–

QUADSPI_BK2_IO2,

FMC_A18

–

(1)

SPDIFX_IN3,

TAMP_IN4/TAMP_

ETH1_MII_RX_ER

OUT5, WKUP2

RTC_OUT1/RTC_TS/

(1)

–

RTC_LSCO, TAMP_IN1/TAMP_

OUT2, WKUP3

56/219

DS13875 Rev 5

STM32MP133C/F

Pinout, tsananguro yepini uye mamwe mabasa

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

J3 J4 N5

PI2

Ini/O FT

(1)

SPDIFX_IN2

TAMP_IN3/TAMP_ OUT4, WKUP5

K5 N4 P4

PI1

Ini/O FT

(1)

SPDIFX_IN1

RTC_OUT2/RTC_ LSCO,
TAMP_IN2/TAMP_ OUT3, WKUP4

F13 L2 U13

VSS

–

J2 J5 L2

VBAT

–

L4 N3 P5

PI0

Ini/O FT

(1)

SPDIFX_IN0

TAMP_IN8/TAMP_ OUT1

K2 M2

PC15OSC32_OUT

I/O

(1)

–

OSC32_OUT

F15 N2 U16

VSS

–

K1 M1 M2

PC14OSC32_IN

I/O

(1)

–

OSC32_IN

G7 E3 V16

VSS

–

H9 K6 N15 VDDCORE S

–

M10 M4 N9

VDD

–

G8 E6 W16

VSS

–

USART2_RX,

L2 P3 N2

PF4

I/O FT_h

–

ETH2_MII_RXD0/ETH2_ RGMII_RXD0/ETH2_RMII_

–

RXD0, FMC_A4

MCO1, SAI2_MCLK_A,

TIM8_BKIN2, I2C4_SDA,

SPI5_MISO, SAI2_CK1,

M2 J8 P2

PA8

I/O FT_fh -

USART1_CK, SPI2_MOSI/I2S2_SDO,

–

OTG_HS_SOF,

ETH2_MII_RXD3/ETH2_

RGMII_RXD3, FMC_A21

TRACECLK, TIM2_ETR,

I2C4_SCL, SPI5_MOSI,

SAI1_FS_B,

L1 T1 N1

PE2

I/O FT_fh

–

USART6_RTS/USART6_DE, SDIFRX_IN1,

–

ETH2_MII_RXD1/ETH2_

RGMII_RXD1/ETH2_RMII_

RXD1, FMC_A23

DS13875 Rev 5

57/219
97

Pinout, tsananguro yepini uye mamwe mabasa

STM32MP133C/F

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

M1 J7 P3

PF7

I/O FT_vh -

M3 R1 R2

PG11

I/O FT_vh -

L3 J6 N3

PH6

I/O FT_fh -

N2 P4 R1

PG1

I/O FT_vh -

M11 – N12

VDD

–

N1 R2 T2

PE6

I/O FT_vh -

P1 P1 T3 PH0-OSC_IN I/O FT

–

G9 U1 N11

VSS

–

P2 P2 U2 PH1-OSC_OUT I/O FT

–

R2 T2 R3

PH3

I/O FT_fh -

M5 L5 U3 VSS_ANA S

–

TIM17_CH1, UART7_TX(bhutu),
UART4_CTS, ETH1_RGMII_CLK125, ETH2_MII_TXD0/ETH2_ RGMII_TXD0/ETH2_RMII_
TXD0, FMC_A18
SAI2_D3, I2S2_MCK, USART3_TX, UART4_TX, ETH2_MII_TXD1/ETH2_ RGMII_TXD1/ETH2_RMII_
TXD1, FMC_A24
TIM12_CH1, USART2_CK, I2C5_SDA,
SPI2_SCK/I2S2_CK, QUADSPI_BK1_IO2,
ETH1_PHY_INTN, ETH1_MII_RX_ER, ETH2_MII_RXD2/ETH2_
RGMII_RXD2, QUADSPI_BK1_NCS
LPTIM1_ETR, TIM4_ETR, SAI2_FS_A, I2C2_SMBA,
SPI2_MISO/I2S2_SDI, SAI2_D2, FDCAN2_TX, ETH2_MII_TXD2/ETH2_ RGMII_TXD2, FMC_NBL0
–
MCO2, TIM1_BKIN2, SAI2_SCK_B, TIM15_CH2, I2C3_SMBA, SAI1_SCK_B, UART4_RTS/UART4_DE,
ETH2_MII_TXD3/ETH2_ RGMII_TXD3, FMC_A22
–
–
–
I2C3_SCL, SPI5_MOSI, QUADSPI_BK2_IO1, ETH1_MII_COL, ETH2_MII_COL, QUADSPI_BK1_IO0
–

–
–
–
OSC_IN OSC_OUT -

58/219

DS13875 Rev 5

STM32MP133C/F

Pinout, tsananguro yepini uye mamwe mabasa

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

L5 U2 W1

PG3

I/O FT_fvh -

TIM8_BKIN2, I2C2_SDA, SAI2_SD_B, FDCAN2_RX, ETH2_RGMII_GTX_CLK,
ETH1_MDIO, FMC_A13

M4 L4 V2 VDD_ANA S

–

R1 U3 V3

PG2

Ini/O FT

–

MCO2, TIM8_BKIN, SAI2_MCLK_B, ETH1_MDC

T1 L6 W2

PG12

Ini/O FT

LPTIM1_IN1, SAI2_SCK_A,

SAI2_CK2,

USART6_RTS/USART6_DE,

USART3_CTS,

–

ETH2_PHY_INTN,

ETH1_PHY_INTN,

ETH2_MII_RX_DV/ETH2_

RGMII_RX_CTL/ETH2_RMII_

CRS_DV

F7 P6 R5

VDD

–

G10 E8 T1

VSS

–

N3 R3 V1

MCO1, USART2_CK,

I2C2_SCL, I2C3_SDA,

SPDIFX_IN0,

PD7

I/O FT_fh

–

ETH1_MII_RX_CLK/ETH1_ RGMII_RX_CLK/ETH1_RMII_

REF_CLK,

QUADSPI_BK1_IO2,

FMC_NE1

P3 K7 T4

PA13

Ini/O FT

–

DBTRGO, DBTRGI, MCO1, UART4_TX

R3 R4 W3 PWR_CPU_ON O FT

–

T2 N5 Y1

PA11

I/O FT_f

TIM1_CH4, I2C5_SCL,

SPI2_NSS/I2S2_WS,

USART1_CTS/USART1_NSS,

–

ETH2_MII_RXD1/ETH2_

RGMII_RXD1/ETH2_RMII_

RXD1, ETH1_CLK,

ETH2_CLK

N5 M6 AA2

PB11

TIM2_CH4, LPTIM1_OUT,

I2C5_SMBA, USART3_RX,

I/O FT_vh -

ETH1_MII_TX_EN/ETH1_

RGMII_TX_CTL/ETH1_RMII_

TX_EN

–
–
–
BOOTFAILN -
–

DS13875 Rev 5

59/219
97

Pinout, tsananguro yepini uye mamwe mabasa

STM32MP133C/F

Pin Number

Tafura 7. STM32MP133C/F tsananguro dzebhora (inoenderera)

Bhora mabasa

Pini zita (basa mushure
gadzirisa)

Mamwe mabasa

LFBGA289 TFBGA289 TFBGA320
Pini mhando I/O chimiro
Notes

P4 U4

PF14(JTCK/SW CLK)

I/O

(2)

U3 L7 Y3

PA0

I/O FT_a -

JTCK/SWCLK
TIM2_CH1, TIM5_CH1, TIM8_ETR, TIM15_BKIN, SAI1_SD_B, UART5_TX,
ETH1_MII_CRS, ETH2_MII_CRS

N6 T3 W4

PF13

TIM2_ETR, SAI1_MCLK_B,

I/O FT_a -

DFSDM1_DATIN3,

UART2_TX, UART5_RX

G11 E10 P7

F10 -

–

R4 K8 AA3

P5 R5 Y4 U4 M7 Y5

VSS VDD PA1
PA2
PA5

–

I/O FT_a

I/O FT_a I/O FT_a

–

TIM2_CH2, TIM5_CH2, LPTIM3_OUT, TIM15_CH1N,
DFSDM1_CKIN0, – USART2_RTS/USART2_DE,
ETH1_MII_RX_CLK/ETH1_ RGMII_RX_CLK/ETH1_RMII_
REF_CLK

TIM2_CH3, TIM5_CH3, – LPTIM4_OUT, TIM15_CH1,
UART2_TX, ETH1_MDIO

TIM2_CH1/TIM2_ETR,

USART2_CK, TIM8_CH1N,

–

SAI1_D1, SPI1_NSS/I2S1_WS,

SAI1_SD_A, ETH1_PPS_OUT,

ETH2_PPS_OUT

T3 T4 W5

SAI1_SCK_A, SAI1_CK2,

PC0

I/O FT_ha -

I2S1_MCK, SPI1_MOSI/I2S1_SDO,

UART1_TX

T4 J9 AA4
R6 U6 W7 P7 U5 U8 P6 T6 V8

PF12

I/O FT_vha –

VREF+

–

VDDA

–

VREF-

–

SPI1_NSS/I2S1_WS, SAI1_SD_A, UART4_TX,
ETH1_MII_TX_ER, ETH1_RGMII_CLK125
–
–
–

–
ADC1_INP7, ADC1_INN3, ADC2_INP7, ADC2_INN3 ADC1_INP11, ADC1_INN10, ADC2_INP11, ADC2_INN10
–
ADC1_INP3, ADC2_INP3
ADC1_INP1, ADC2_INP1
ADC1_INP2
ADC1_INP0, ADC1_INN1, ADC2_INP0, ADC2_INN1, TAMP_IN3
ADC1_INP6, ADC1_INN2
–

60/219

DS13875 Rev 5

STM3

Zvinyorwa / Zvishandiso

STMicroelectronics STM32MP133C F 32-bit Arm Cortex-A7 1GHz MPU [pdf] Bhuku reMushandisi
STM32MP133C F 32-bit Arm Cortex-A7 1GHz MPU, STM32MP133C, F 32-bit Arm Cortex-A7 1GHz MPU, Arm Cortex-A7 1GHz MPU, 1GHz, MPU

References

User Manual

STMicroelectronics STM32MP133C F 32-bit Arm Cortex-A7 1GHz MPU

Zvinotsanangurwa

Arm Cortex-A7 Subsystem

Ndangariro

DDR Controller

FAQs

Zvinyorwa / Zvishandiso

References

Siya mhinduro

Kanzura mhinduro