intel FPGA Programmable Acceleration Card N3000 User Guide
Nhanganyaya
Background
Iyo Intel FPGA Programmable Acceleration Card N3000 mune virtualized radio access network (vRAN) inoda rutsigiro rweIEEE1588v2 sePrecision Time Protocol (PTP) Telecom Slave Clocks (T-TSC) kuronga mabasa esoftware nenzira kwayo. Iyo Intel Ethernet Controller XL710 muIntel® FPGA PAC N3000 inopa iyo IEEE1588v2 rutsigiro. Nekudaro, iyo FPGA data nzira inounza jitter inokanganisa kuita kwePTP. Kuwedzera wachi inoonekera (T-TC) dunhu rinogonesa iyo Intel FPGA PAC N3000 kutsiva iyo FPGA yemukati latency uye kuderedza mhedzisiro yejitter, iyo inobvumira iyo T-TSC kufungidzira iyo Grandmaster's Nguva yeZuva (ToD) zvakanaka.
Chinangwa
Iyi miedzo inosimbisa kushandiswa kweIntel FPGA PAC N3000 semuranda weIEEE1588v2 muOpen Radio Access Network (O-RAN). Gwaro iri rinotsanangura:
- Test setup
- Verification process
- Kuongororwa kwekuita kweakajeka wachi meshini muFPGA nzira yeIntel FPGA PAC N3000.
- PTP kuita kweIntel FPGA PAC N3000 Kuita kweIntel FPGA PAC N3000 inotsigira wachi inoonekera ndeye.
zvichienzaniswa neIntel FPGA PAC N3000 isina kujeka wachi pamwe neimwe Ethernet kadhi XXV710 pasi pemamiriro akasiyana-siyana emigwagwa uye PTP zvigadziriso.
Zvimiro uye Zvisingakwanisi
Izvo zvimiro uye zvipimo zvekusimbisa zveIntel FPGA PAC N3000 IEEE1588v2 tsigiro ndeiyi inotevera:
- Software stack yakashandiswa: Linux PTP Project (PTP4l)
- Inotsigira inotevera telecom profiles:
- 1588v2 (default)
- G. 8265.1
- G. 8275.1
- Inotsigira maviri-nhanho PTP muranda wachi.
Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, uye mamwe maIntel mamaki zviratidzo zveIntel Corporation kana vatsigiri vayo. Intel inobvumidza kuita kwayo FPGA uye semiconductor zvigadzirwa kune zvazvino zvirevo zvinoenderana neIntel's standard waranti, asi inochengetera kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi. *Mamwe mazita nemhando zvinogona kunzi ndezvevamwe.
- Inotsigira kupera-kusvika-kumagumo multicast mode.
- Inotsigira PTP meseji yekuchinjana frequency kusvika ku128 Hz.
- Uku ndiko kudzikisira kwechirongwa chekusimbisa uye akashandira Grandmaster. PTP magadzirirwo akakwira kupfuura 128 mapaketi pasekondi yePTP mameseji anogona kuitika.
- Nekuda kwekugumira kweCisco* Nexus* 93180YC-FX switch yakashandiswa mukuseta yekusimbisa, mhedzisiro yekuita pasi peiperf3 traffic mamiriro inoreva PTP meseji shanduko ye8 Hz.
- Encapsulation rutsigiro:
- Kutakura pamusoro peL2 (raw Ethernet) uye L3 (UDP/IPv4/IPv6)
Cherechedza: Mugwaro iri, mibairo yese inoshandisa imwechete 25Gbps Ethernet link.
- Kutakura pamusoro peL2 (raw Ethernet) uye L3 (UDP/IPv4/IPv6)
Zvishandiso uye Mavhezheni eMutyairi
Zvishandiso | Version |
BIOS | Intel Server Board S2600WF 00.01.0013 |
OS | CentOS 7.6 |
Kernel | kernel-rt-3.10.0-693.2.2.rt56.623.el7.src. |
Data Plane Development Kit (DPDK) | 18.08 |
Intel C Compiler | 19.0.3 |
Intel XL710 Driver (i40e mutyairi) | 2.8.432.9.21 |
PTP4l | 2.0 |
IxExplorer | 8.51.1800.7 EA-Patch1 |
lperf3 | 3.0.11 |
trafgen | Netsniff-ng 0.6.6 Toolkit |
IXIA Traffic Test
Yekutanga seti yePTP performance mabhenji yeIntel FPGA PAC N3000 inoshandisa IXIA* mhinduro yetiweki uye PTP yekuenderana bvunzo. Iyo IXIA XGS2 chassis bhokisi inosanganisira IXIA 40 PORT NOVUS-R100GE8Q28 kadhi uye IxExplorer inopa graphical interface yekumisikidza chaiyo PTP Grandmaster kuDUT (Intel FPGA PAC N3000) pamusoro peiyo imwechete 25 Gbps yakananga Ethernet yekubatanidza. Iyo block dhizaini pazasi inoratidza yakanangwa yekuyedza topology yeIXIA-yakavakirwa mabhenji. Mhedzisiro yese inoshandisa IXIA-yakagadzirwa traffic kune ingress traffic bvunzo uye shandisa iyo trafgen chishandiso paIntel FPGA PAC N3000 host kune egress traffic traffic, uko iyo ingress kana egress direction inogara ichibva pamaonero eDUT (Intel FPGA PAC N3000 ) muenzi. Muzviitiko zvese izvi, avhareji traffic rate ndeye 24 Gbps. Iyi bvunzo yekumisikidza inopa maitiro ekutanga ePTP kuita kweIntel FPGA PAC N3000 ine T-TC meshini yakagoneswa, pamwe nekuienzanisa neiyo isiri-TC Intel FPGA PAC N3000 fekitori mufananidzo pasi peITU-T G.8275.1 PTP pro.file.
Topology yeIntel FPGA PAC N3000 Traffic Miedzo pasi peIXIA Virtual Grandmaster
IXIA Traffic Test Result
Ongororo inotevera inobata kuita kwePTP kweTC-inogonesa Intel FPGA PAC N3000 pasi pekupinda uye egress traffic traffic. Muchikamu chino, iyo PTP profile G.8275.1 yakagamuchirwa pabvunzo dzese dzetraffic uye kuunganidzwa kwedata.
Hukuru hwe Master Offset
Mufananidzo unotevera unoratidza ukuru hwemaster offset inocherechedzwa nePTP4l muranda mutengi weIntel FPGA PAC N3000 host sebasa renguva yakapfuura pasi pekupinda, egress uye bidirectional traffic (avhareji ye24.4Gbps).
Mean Path Kunonoka (MPD)
Nhamba inotevera inoratidza kunonoka kwenzira, sekuverengerwa nemuranda wePTP4 anoshandisa Intel FPGA PAC N3000 setiweki interface kadhi, kune bvunzo yakafanana neiyo iri pamusoro. Iyo yakazara nguva yeimwe neimwe yeatatu bvunzo dzetraffic angangoita maawa gumi nematanhatu.
Tafura inotevera inonyora kuongororwa kwenhamba yebvunzo nhatu dzetraffic. Pasi pemutoro wetraffic padhuze nechiteshi chechiteshi, muranda wePTP4l anoshandisa Intel FPGA PAC N3000 inochengetedza chikamu chayo kugadziridza kuIXIA's virtual sekuru mukati memakumi mashanu nenhatu ns kune ese bvunzo dzetraffic. Mukuwedzera, iyo yakajairwa kutsauka kweiyo master offset ukuru iri pazasi 53 ns.
Statistical Details pamusoro pePTP Performance
G.8275.1 PTP Profile | Ingress Traffic (24Gbps) | Egress Traffic (24Gbps) | Bidirectional Traffic (24Gbps) |
RMS | 6.35 ns | 8.4 ns | 9.2 ns |
StdDev (ye abs(max) offset) | 3.68 ns | 3.78 ns | 4.5 ns |
StdDev (yeMPD) | 1.78 ns | 2.1 ns | 2.38 ns |
Max offset | 36 ns | 33 ns | 53 ns |
Nhamba dzinotevera dzinomiririra ukuru hwemaster offset uye nzira inononoka (MPD), pasi pe16-awa yakareba 24 Gbps bidirectional traffic test yePTP encapsulations yakasiyana. Magirafu ekuruboshwe munhamba idzi anoreva mabhenji ePTP pasi peIPv4/UDP encapsulation, nepo PTP messaging encapsulation yemagirafu ekurudyi iri muL2 (raw Ethernet). Iyo PTP4l yevaranda kuita yakafanana, iyo yakaipisisa-yenyaya master offset ukuru ndeye 53 ns uye 45 ns ye IPv4 / UDP uye L2 encapsulation, zvichiteerana. Muyero wekutsauka kwehukuru hwekubvisa ndeye 4.49 ns uye 4.55 ns ye IPv4/UDP uye L2 encapsulation, zvichiteerana.
Hukuru hwe Master Offset
Iyi inotevera nhamba inoratidza ukuru hwemaster offset pasi pe24 Gbps bidirectional traffic, IPv4 (kuruboshwe) uye L2 (kurudyi) encapsulation, G8275.1 Profile.
Mean Path Kunonoka (MPD)
Nhamba inotevera inoratidza kunonoka nzira yeIntel FPGA PAC N3000 host PTP4l muranda pasi pe24 Gbps bidirectional traffic, IPv4 (kuruboshwe) uye L2 (kurudyi) encapsulation, G8275.1 Profile.
Izvo zviyero zvakakwana zveMPD haisi chiratidzo chakajeka chePTP kuwirirana, sezvo zvichienderana netambo refu, data path latency nezvimwe zvakadaro; zvisinei, kutarisa pasi peMPD kusiyana (2.381 ns uye 2.377 ns ye IPv4 uye L2 kesi, zvichiteerana) inoita kuti zvive pachena kuti PTP MPD kuverenga inogara yakarurama kumativi ose maviri encapsulations. Iyo inosimbisa kuenderana kwePTP mashandiro pane ese ari maviri encapsulation modes. Shanduko yedanho muMPD yakaverengerwa mugirafu yeL2 (mumufananidzo uri pamusoro, girafu rekurudyi) imhaka yekuwedzera kweiyo traffic inoshandiswa. Chekutanga, chiteshi hachina basa (MPD rms iri 55.3 ns), ipapo ingress traffic inoshandiswa (yechipiri incremental nhanho, MPD rms i85.44 ns), inoteverwa nekumwe chete egress traffic, zvichikonzera yakaverengerwa MPD ye108.98 ns. Nhamba dzinotevera dzinofukidza ukuru hweiyo master offset uye yakaverengerwa MPD yebidirectional traffic bvunzo inoshandiswa kune ese PTP4l muranda achishandisa Intel FPGA PAC N3000 ine T-TC michina, pamwe nekune imwe inoshandisa Intel FPGA PACN3000 isina TC. functionality. Iyo T-TC Intel FPGA PAC N3000 bvunzo (orenji) inotanga kubva nguva zero, nepo PTP bvunzo inoshandisa iyo isiri-TC Intel FPGA PAC N3000 (yebhuruu) inotanga kutenderera T = 2300 masekondi.
Hukuru hwe Master Offset
Nhamba inotevera inoratidza ukuru hwemaster offset pasi peIngress traffic (24 Gbps), ine uye isina TTC rutsigiro, G.8275.1 Profile.
Mumufananidzo uri pamusoro, kuita kwePTP kweTC-inogonesa Intel FPGA PAC N3000 pasi petraffic kwakafanana neiyo isiri-TC Intel FPGA PAC N3000 kwemasekonzi mazana maviri nemakumi matatu ekutanga. Kubudirira kweiyo T-TC mashini muIntel FPGA PAC N2300 inoratidzirwa muchikamu chebvunzo (mushure meiyo 3000th yechipiri) apo yakaenzana traffic traffic inoiswa kune inotarisana nemakadhi ese ari maviri. Saizvozvo mumufananidzo uri pazasi, iyo MPD kuverenga inocherechedzwa pamberi uye mushure mekushandisa traffic pachiteshi. Kubudirira kweT-TC nzira inosimbiswa mukubhadhara nguva yekugara kwemapakiti iyo iri packet latency kuburikidza neFPGA nzira pakati pe2300G ne25G MACs.
Mean Path Kunonoka (MPD)
Nhamba inotevera inoratidza kunonoka kwenzira yeIntel FPGA PAC N3000 host PTP4l muranda pasi peIngress traffic (24 Gbps), ine uye isina T-TC rutsigiro, G.8275.1 Profile.
Nhamba idzi dzinoratidza PTP4l muranda's servo algorithm, nekuda kwekugadziriswa kwenguva yekugara kweTC, tinoona misiyano midiki muavhareji nzira yekunonoka kuverenga. Naizvozvo, kukanganisa kwekunonoka kushanduka pane master offset kufungidzira kunoderedzwa. Tafura inotevera inonyora kuongororwa kwenhamba pakuita kwePTP, iyo inosanganisira iyo RMS uye kutsauka kwakajairwa kweiyo master offset, kutsauka kwakajairwa kwekunonoka nzira yekunonoka, pamwe neakanyanya-nyaya master offset yeIntel FPGA PAC N3000 ine uye isina T- TC rutsigiro.
Statistical Details paPTP Performance Under Ingress Traffic
Ingress Traffic (24Gbps) G.8275.1 PTP Profile | Intel FPGA PAC N3000 ine T-TC | Intel FPGA PAC N3000 isina T-TC |
RMS | 6.34 ns | 40.5 ns |
StdDev (ye abs(max) offset) | 3.65 ns | 15.5 ns |
StdDev (yeMPD) | 1.79 ns | 18.1 ns |
Max offset | 34 ns | 143 ns |
Kuenzanisa kwakananga iyo TC-inotsigirwa Intel FPGA PAC N3000 kune iyo isiri-TC vhezheni.
Inoratidza kuti kuita kwePTP kuri 4x kusvika 6x yakaderera maererano nechero nhamba
metrics (yakanyanya-kesi, RMS kana yakajairwa kutsauka kwe master offset). Iyo yakaipisisa-nyaya
master offset yeG.8275.1 PTP kumisikidza yeT-TC Intel FPGA PAC N3000 is 34
ns pasi pe ingress traffic mamiriro pamuganhu wechiteshi bandwidth (24.4Gbps).
lperf3 Traffic Test
Ichi chikamu chinotsanangura iyo iperf3 traffic benchmarking bvunzo kuti uwedzere kuongorora kuita kwePTP kweIntel FPGA PAC N3000. Iyo iperf3 chishandiso chakashandiswa kutevedzera inoshanda traffic mamiriro. Iyo network topology yeiyo iperf3 traffic mabhenji, inoratidzwa pamufananidzo pazasi, inosanganisira kubatana kwemaseva maviri, imwe neimwe ichishandisa kadhi reDUT (Intel FPGA PAC N3000 uye XXV710), kuCisco Nexus 93180YC FX switch. Iyo Cisco switch inoita seBoundary Clock (T-BC) pakati pevaranda vaviri veDUT PTP neCalnex Paragon-NEO Grandmaster.
Network Topology yeIntel FPGA PAC N3000 lperf3 Traffic Test
Iyo PTP4l inobuda pane yega yega DUT mauto inopa data kuyerwa kwekuita kwePTP kune yega yega mudziyo wenhapwa mukuseta (Intel FPGA PAC N3000 uye XXV710). Kune iperf3 traffic test, zvinotevera mamiriro uye zvigadziriso zvinoshanda kune ese magirafu uye ongororo yekushanda:
- 17 Gbps yakaunganidzwa bandwidth yetraffic (zvese TCP neUDP), ingave egress kana ingress kana bidirectional kuIntel FPGA PAC N3000.
- IPv4 encapsulation yemapaketi ePTP, nekuda kwekumisikidza kumisa paCisco Nexus 93180YC-FX switch.
- PTP meseji yekuchinjana mwero inogumira pa8 mapaketi/sekondi, nekuda kwekumisikidzwa kwekugadzirisa paCisco Nexus 93180YC-FX switch.
perf3 Traffic Test Result
Ongororo inotevera inobata mashandiro eIntel FPGA PAC N3000 uye XXV710 kadhi, ese ari maviri panguva imwe chete achiita senge network interface kadhi yePTP varanda (T-TSC) iyo Calnex Paragon NEO Grandmaster kuburikidza neT-BC Cisco switch.
Nhamba dzinotevera dzinoratidza ukuru hwemaster offset uye MPD nekufamba kwenguva kune matatu akasiyana bvunzo dzetraffic uchishandisa Intel FPGA PAC N3000 ine T-TC uye XXV710 kadhi. Mune ese makadhi, bidirectional traffic ine yakakura mhedzisiro paPTP4l kuita. Nguva dzekuyedzwa kwetraffic dzakareba maawa gumi. Munhamba dzinotevera, muswe wegirafu unoisa poindi panguva iyo traffic inomira uye ukuru hwePTP master offset inodzika kusvika kune yakaderera nhanho, nekuda kweiyo isina basa chiteshi.
Hukuru hwe Master Offset yeIntel FPGA PAC N3000
Iyi inotevera nhamba inoratidza nzira inononoka yeIntel FPGA PAC N3000 ine T TC, pasi pekupinda, egress uye bidirectional iperf3 traffic.
Zvinoreva Nzira Kunonoka (MPD) yeIntel FPGA PAC N3000
Iyi inotevera nhamba inoratidza nzira inononoka yeIntel FPGA PAC N3000 ine T TC, pasi pekupinda, egress uye bidirectional iperf3 traffic.
Hukuru hweMaster Offset yeXXV710
Nhamba inotevera inoratidza ukuru hwemaster offset yeXXV710, pasi pekupinda, egress uye bidirectional iperf3 traffic.
Mean Path Delay (MPD) yeXXV710
Nhamba inotevera inoratidza kunonoka kwenzira yeXXV710, pasi pekupinda, egress uye bidirectional iperf3 traffic.
Nezve Intel FPGA PAC N3000 PTP mashandiro, yakaipisisa-kesi master offset pasi pechero traffic mamiriro ari mukati me90 ns. Ndichiri pasi peiyo bidirectional traffic mamiriro, iyo RMS yeIntel FPGA PAC N3000 master offset iri nani 5.6x pane imwe yeXXV710 kadhi.
Intel FPGA PAC N3000 | XXV710 Kadhi | |||||
Ingress Traffic10G | Egress Traffic 18G | Bidirectional Traffic18G | Ingress Traffic18G | Egress Traffic 10G | Bidirectional Traffic18G | |
RMS | 27.6 ns | 14.2 ns | 27.2 ns | 93.96 ns | 164.2 ns | 154.7 ns |
StdDev (ye abs(max) offset) | 9.8 ns | 8.7 ns | 14.6 ns | 61.2 ns | 123.8 ns | 100 ns |
StdDev (yeMPD) | 21.6 ns | 9.2 ns | 20.6 ns | 55.58 ns | 55.3 ns | 75.9 ns |
Max offset | 84 ns | 62 ns | 90 ns | 474 ns | 1,106 ns | 958 ns |
Zvikurukuru, iyo master offset yeIntel FPGA PAC N3000 ine yakaderera mwero kutsauka,
kanenge 5x pasi peiyo XXV710 kadhi, zvinoreva kuti fungidziro yePTP ye
Grandmaster wachi hainyanyi kunzwa kune latency kana ruzha mutsauko pasi pe traffic mu
Intel FPGA PAC N3000.
Kana ichienzaniswa neIXIA Traffic Test Result iri papeji 5, iyo yakaipisisa-kesi hukuru hwe
iyo tenzi inogadzirisa neT-TC inogonesa Intel FPGA PAC N3000 inotaridzika kumusoro. Besides
mutsauko wetiweki topology uye chiteshi bandwidths, izvi zvinokonzerwa neIntel
FPGA PAC N3000 iri kutorwa pasi peG.8275.1 PTP profile (16 Hz sync rate), nepo
iyo sync meseji mwero mune iyi kesi inomanikidzwa pamapaketi masere pasekondi.
Hukuru hweMaster Offset Kuenzanisa
Iyi inotevera nhamba inoratidza hukuru hwe master offset kuenzanisa pasi pe bidirectional iperf3 traffic.
Kureva Nzira Kunonoka (MPD) Kuenzanisa
Mufananidzo unotevera unoratidza nzira inononoka kuenzanisa pasi pe bidirectional iperf3 traffic.
Kuita kwepamusoro kwePTP kweIntel FPGA PAC N3000, kana ichienzaniswa neXXV710 kadhi, kunotsigirwawo nekutsauka kuri pachena kweiyo yakaverengerwa nzira kunonoka (MPD) yeXXV710 uye Intel FPGA PAC N3000 mune yega yega yakanangwa traffic traffic test, ye example bidirectional iperf3 traffic. Regedza kukosha kwekureva mune imwe neimwe yeMPD kesi, inogona kuve yakasiyana nekuda kwezvikonzero zvinoverengeka, senge akasiyana tambo dzeEthernet uye akasiyana musimboti latency. Iwo akacherechedzwa mutsauko uye spike mumakoshero eXXV710 kadhi haipo muIntel FPGA PAC N3000.
RMS ye8 Inotevedzana Master Offset Kuenzanisa
Mhedziso
Iyo data yeFPGA nzira pakati peQSFP28 (25G MAC) neIntel XL710 (40G MAC) inowedzera shanduko yepakiti latency iyo inokanganisa kurongeka kweiyo PTP Muranda. Kuwedzera iyo Transparent Clock (T-TC) rutsigiro muFPGA yakapfava logic yeIntel FPGA PAC N3000 inopa muripo weiyi packet latency nekuwedzera nguva yekugara mundima yekururamisa yakavharirwa mameseji ePTP. Mhedzisiro yacho inosimbisa kuti T-TC nzira inovandudza kuita kweiyo PTP4l muranda.
Zvakare, iyo IXIA Traffic Test Result iri papeji 5 inoratidza kuti T-TC inotsigira muFPGA data nzira inosimudzira kuita kwePTP neinenge 4x, kana ichienzaniswa neIntel FPGA PAC N3000 isina T-TC rutsigiro. Iyo Intel FPGA PAC N3000 ine T-TC inopa yakaipisisa-nyaya master offset yemakumi mashanu nenhatu ns pasi pe ingress, egress kana bidirectional traffic mitoro pamuganho wechiteshi simba (53 Gbps). Nekudaro, nerutsigiro rweT-TC, iyo Intel FPGA PAC N25 PTP mashandiro ari ese ari maviri echokwadi uye haadiki kune ruzha mutsauko.
Mulperf3 Traffic Test pane peji 10, kuita kwePTP kweIntel FPGA PAC N3000 ine T-TC inogoneswa inofananidzwa neXXV710 kadhi. Muedzo uyu wakatora iyo PTP4l data kune ese ari maviri evaranda wachi pasi pekupinda kana egress traffic inotsinhaniswa pakati pemauto maviri eIntel FPGA PAC N3000 uye XXV710 kadhi. Iyo yakaipisisa-yenyaya master offset yakaonekwa muIntel FPGA PAC N3000 ingangoita 5x yakaderera pane iyo XXV710 kadhi. Zvakare, kutsauka kwakajairwa kweakabatwa offset kunoratidzawo kuti T-TC rutsigiro rweIntel FPGA PAC N3000 inobvumira kufungidzira kwakapfava kwewachi yaGrandmaster.
Kuti uenderere mberi nekusimbisa kuita kwePTP kweIntel FPGA PAC N3000, zvingangoita bvunzo sarudzo dzinosanganisira:
- Kusimbiswa pasi peakasiyana PTP profiles uye meseji mitengo yeanopfuura imwe Ethernet link.
- Ongororo yelperf3 Muedzo weTraffic pane peji 10 ine switch yepamberi inobvumira yakakwirira PTP meseji mareti.
- Kuongororwa kwekushanda kweT-SC uye nguva yayo yePTP yechokwadi pasi peG.8273.2 Conformance Testing.
Gwaro Revision Nhoroondo yeIEEE 1588 V2 Muedzo
Gwaro Version | Kuchinja |
2020.05.30 | Kusunungurwa kwekutanga. |
Zvinyorwa / Zvishandiso
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Intel FPGA Programmable Acceleration Card N3000 [pdf] Bhuku reMushandisi FPGA Programmable Acceleration Card, N3000, Programmable Acceleration Card N3000, FPGA Programmable Acceleration Card N3000, FPGA, IEEE 1588 V2 Test |