Intel FPGA Programmable Acceleration Card N3000 User Guide

Selelekela

Ka morao

Intel FPGA Programmable Acceleration Card N3000 ho netweke ea phihlello ea seea-le-moea (vRAN) e hloka tšehetso bakeng sa IEEE1588v2 joalo ka Precision Time Protocol (PTP) Telecom Slave Clocks (T-TSC) ho hlophisa mesebetsi ea software ka nepo. Intel Ethernet Controller XL710 ho Intel® FPGA PAC N3000 e fana ka tšehetso ea IEEE1588v2. Leha ho le joalo, tsela ea data ea FPGA e hlahisa jitter e amang ts'ebetso ea PTP. Ho kenyelletsa potoloho ea oache e pepeneneng (T-TC) ho nolofalletsa Intel FPGA PAC N3000 ho lefella latency ea eona ea kahare ea FPGA le ho fokotsa litlamorao tsa jitter, e lumellang T-TSC ho lekanya Nako ea Letsatsi la Grandmaster (ToD) ka nepo.

Sepheo

Liteko tsena li tiisa ts'ebeliso ea Intel FPGA PAC N3000 joalo ka lekhoba la IEEE1588v2 ho Open Radio Access Network (O-RAN). Tokomane ena e hlalosa:

• Etsa liteko
• Mokhoa oa ho netefatsa
• Tekolo ea ts'ebetso ea mochini oa oache o hlakileng tseleng ea FPGA ea Intel FPGA PAC N3000.
• Ts'ebetso ea PTP ea Intel FPGA PAC N3000 Ts'ebetso ea Intel FPGA PAC N3000 e ts'ehetsang oache e pepeneneng ke
  ha e bapisoa le Intel FPGA PAC N3000 ntle le oache e bonaletsang hammoho le karete e 'ngoe ea Ethernet XXV710 tlasa maemo a fapaneng a sephethephethe le tlhophiso ea PTP.

Likarolo le Mefokolo

Likarolo le meeli ea netefatso bakeng sa tšehetso ea Intel FPGA PAC N3000 IEEE1588v2 li tjena:

• Software stack e sebelisitsoeng: Linux PTP Project (PTP4l)
• E ts'ehetsa telecom pro e latelangfiles:
  •  1588v2 (ea kamehla)
  • G. 8265.1
  • G. 8275.1
• E ts'ehetsa oache ea makhoba ea PTP ea mehato e 'meli.

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel, empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso. *Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

• E ts'ehetsa mokhoa oa ho etsa lipapatso tse ngata ho isa qetellong.
• E ts'ehetsa khafetsa phapanyetsano ea melaetsa ea PTP ho fihla ho 128 Hz.
  • Ena ke moeli oa moralo oa netefatso mme o hiriloe Grandmaster. Litlhophiso tsa PTP tse phahameng ho feta lipakete tse 128 ka motsotsoana bakeng sa melaetsa ea PTP li ka khoneha.
• Ka lebaka la mefokolo ea switch ea Cisco* Nexus* 93180YC-FX e sebelisitsoeng ho setang netefatso, liphetho tsa ts'ebetso tlasa maemo a sephethephethe a iperf3 li bua ka sekhahla sa phapanyetsano ea molaetsa oa PTP ea 8 Hz.
• Tšehetso ea encapsulation:
  • Lipalangoang ka L2 (Ethernet e tala) le L3 (UDP/IPv4/IPv6)
    Hlokomela: Tokomaneng ena, liphetho tsohle li sebelisa sehokelo se le seng sa 25Gbps Ethernet.

Lisebelisoa le Liphetolelo tsa Driver

Lisebelisoa	Phetolelo
BIOS	Intel Server Board S2600WF 00.01.0013
OS	CentOS 7.6
Kernel	kernel-rt-3.10.0-693.2.2.rt56.623.el7.src.
Data Plane Development Kit (DPDK)	18.08
Intel C Compiler	19.0.3
Mokhanni oa Intel XL710 (mokhanni oa i40e)	2.8.432.9.21
PTP4l	2.0
IxExplorer	8.51.1800.7 EA-Patch1
lperf3	3.0.11
trafgen	Netsniff-ng 0.6.6 Toolkit

 Teko ea Sephethephethe ea IXIA

Sehlopha sa pele sa litekanyetso tsa ts'ebetso ea PTP bakeng sa Intel FPGA PAC N3000 se sebelisa tharollo ea IXIA * bakeng sa tlhahlobo ea khokahano ea marang-rang le PTP. Lebokose la chassis la IXIA XGS2 le kenyelletsa karete ea IXIA 40 PORT NOVUS-R100GE8Q28 le IxExplorer e fanang ka sebopeho sa graphical bakeng sa ho theha PTP Grandmaster ea sebele ho DUT (Intel FPGA PAC N3000) holim'a khokahanyo e le 'ngoe ea 25 Gbps e tobileng ea Ethernet. Setšoantšo sa block se ka tlase se bonts'a topology ea tlhahlobo e lebisitsoeng bakeng sa li-benchmarks tse thehiloeng ho IXIA. Liphetho tsohle li sebelisa sephethephethe se hlahisoang ke IXIA bakeng sa liteko tsa sephethephethe sa ingress le ho sebelisa sesebelisoa sa trafgen ho moamoheli oa Intel FPGA PAC N3000 bakeng sa liteko tsa sephethephethe sa egress, moo tataiso ea ingress kapa egress e lulang e le ponong ea DUT (Intel FPGA PAC N3000 ) moamoheli. Maemong ana ka bobeli, sekhahla sa sephethephethe se tloaelehileng ke 24 Gbps. Seta sena sa teko se fana ka sebopeho sa mantlha sa ts'ebetso ea PTP ea Intel FPGA PAC N3000 ka mochini oa T-TC o lumelletsoeng, hammoho le ho e bapisa le setšoantšo sa feme seo e seng sa TC Intel FPGA PAC N3000 tlasa ITU-T G.8275.1 PTP pro.file.

Topology bakeng sa Liteko tsa Sephethephethe sa Intel FPGA PAC N3000 tlasa IXIA Virtual Grandmaster

Sephetho sa Teko ea Sephethephethe sa IXIA

Tlhahlobo e latelang e nka ts'ebetso ea PTP ea Intel FPGA PAC N3000 e nolofalitsoeng ke TC tlas'a maemo a sephethephethe a ingress le egress. Karolong ena, PTP profile G.8275.1 e amohetsoe bakeng sa liteko tsohle tsa sephethephethe le pokello ea lintlha.

Boholo ba Master Offset

Palo e latelang e bonts'a boholo ba master offset e hlokometsoeng ke moreki oa makhoba oa PTP4l oa moamoheli oa Intel FPGA PAC N3000 e le ts'ebetso ea nako e fetileng tlasa sephethephethe sa ingress, egress le bidirectional (karolelano ea 24.4Gbps).

Mean Path Delay (MPD)

Setšoantšo se latelang se bontša ho lieha ha tsela e bolelang, joalokaha ho baloa ke lekhoba la PTP4 le sebelisang Intel FPGA PAC N3000 e le karete ea marang-rang ea marang-rang, bakeng sa teko e tšoanang le ea setšoantšo se ka holimo. Nako eohle ea liteko tse tharo tsa sephethephethe ke bonyane lihora tse 16.

Lethathamo le latelang le thathamisa tlhahlobo ea lipalo-palo ea liteko tse tharo tsa sephethephethe. Tlas'a mojaro oa sephethe-phethe o haufi le matla a seteishene, lekhoba la PTP4l le sebelisang Intel FPGA PAC N3000 le boloka karolo ea lona ea ho fihla ho IXIA's grandmaster ka hare ho 53 ns bakeng sa liteko tsohle tsa sephethephethe. Ho phaella moo, kheloha e tloaelehileng ea boholo ba offset ea master e ka tlase ho 5 ns.

Lintlha tsa Lipalopalo mabapi le Ts'ebetso ea PTP

G.8275.1 PTP Profile	Ingress Traffic (24Gbps)	Egress Traffic (24Gbps)	Bidirectional Traffic (24Gbps)
RMS	6.35 ns	8.4 ns	9.2 ns
StdDev (ea abs(max) offset)	3.68 ns	3.78 ns	4.5 ns
StdDev (ea MPD)	1.78 ns	2.1 ns	2.38 ns
Max offset	36 ns	33 ns	53 ns

 

Lipalo tse latelang li emela boholo ba master offset le ho lieha ha tsela (MPD), tlas'a tlhahlobo ea sephethephethe ea 16 Gbps ea lihora tse 24 bakeng sa li-encapsulations tse fapaneng tsa PTP. Li-graph tsa ka ho le letšehali lipalo-palo tsena li bua ka li-benchmarks tsa PTP tlas'a IPv4 / UDP encapsulation, ha melaetsa ea PTP e kenyelletsang li-graph tse nepahetseng e le L2 (Ethernet e tala). Ts'ebetso ea makhoba ea PTP4l e ts'oana hantle, boholo bo bobe ka ho fetesisa ba master offset ke 53 ns le 45 ns bakeng sa IPv4 / UDP le L2 encapsulation, ka ho latellana. Phapang e tloaelehileng ea magnitude offset ke 4.49 ns le 4.55 ns bakeng sa IPv4/UDP le L2 encapsulation, ka ho latellana.

Boholo ba Master Offset

Setšoantšo se latelang se bontša boholo ba master offset tlas'a 24 Gbps bidirectional traffic, IPv4 (ka ho le letšehali) le L2 (ka ho le letona) encapsulation, G8275.1 Profile.

Mean Path Delay (MPD)

Setšoantšo se latelang se bontša ho lieha ha tsela ea Intel FPGA PAC N3000 lekhoba la PTP4l tlas'a sephethephethe sa 24 Gbps, IPv4 (ka ho le letšehali) le L2 (ka ho le letona) encapsulation, G8275.1 Pro.file.

Litekanyetso tse feletseng tsa MPD hase pontšo e hlakileng ea ho tsitsa ha PTP, kaha ho itšetlehile ka lithapo tsa bolelele, latency ea tsela ea data joalo-joalo; leha ho le joalo, ho sheba mefuta e tlaase ea MPD (2.381 ns le 2.377 ns bakeng sa nyeoe ea IPv4 le L2, ka ho latellana) e hlakisa hore palo ea PTP MPD e nepahetse ka mokhoa o tsitsitseng ho pholletsa le li-encapsulations ka bobeli. E netefatsa ts'ebetso ea ts'ebetso ea PTP ho pholletsa le mekhoa e 'meli ea encapsulation. Phetoho ea boemo ho MPD e baloang ho graph ea L2 (setšoantšong se ka holimo, kerafo e nepahetseng) e bakoa ke phello e ntseng e eketseha ea sephethephethe se sebelisoang. Taba ea pele, mocha ha o sebetse (MPD rms ke 55.3 ns), ebe sephethephethe sa ingress se sebelisoa (mohato oa bobeli oa ho eketseha, MPD rms ke 85.44 ns), e lateloa ke sephethephethe sa nako e le 'ngoe, se hlahisang MPD e baloang ea 108.98 ns. Lipalo tse latelang li koahela boholo ba master offset le MPD e baliloeng ea teko ea sephethephethe ea bidirectional e sebelisitsoeng ho lekhoba la PTP4l ka bobeli le sebelisa Intel FPGA PAC N3000 e nang le mochine oa T-TC, hammoho le ho e 'ngoe e sebelisang Intel FPGA PACN3000 ntle le TC. tshebetso. Liteko tsa T-TC Intel FPGA PAC N3000 (lamunu) li qala ho tloha ka nako ea zero, ha tlhahlobo ea PTP e sebelisang non-TC Intel FPGA PAC N3000 (blue) e qala ho pota T = 2300 metsotsoana.

Boholo ba Master Offset

Setšoantšo se latelang se bontša boholo ba master offset tlas'a Ingress traffic (24 Gbps), ka tšehetso ea TTC le ntle le eona, G.8275.1 Profile.

Setšoantšong se ka holimo, ts'ebetso ea PTP ea TC-enabled Intel FPGA PAC N3000 tlas'a sephethephethe e tšoana le e seng TC Intel FPGA PAC N3000 bakeng sa metsotsoana ea pele ea 2300. Ts'ebetso ea ts'ebetso ea T-TC ho Intel FPGA PAC N3000 e totobatsoa karolong ea teko (kamora metsotsoana ea 2300) moo sephethephethe se lekanang se sebelisoa ho li-interface tsa likarete ka bobeli. Ka mokhoa o ts'oanang setšoantšong se ka tlase, lipalo tsa MPD li hlokomeloa pele le ka mor'a ho sebelisa sephethephethe seteisheneng. Katleho ea mochine oa T-TC e totobatsoa ka ho lefella nako ea ho lula ha lipakete e leng latency ea pakete ka tsela ea FPGA pakeng tsa 25G le 40G MACs.

Mean Path Delay (MPD)

Setšoantšo se latelang se bontša tieho e bolelang ea Intel FPGA PAC N3000 host PTP4l lekhoba tlas'a Ingress traffic (24 Gbps), ka tšehetso ea T-TC le ntle le eona, G.8275.1 Profile.

Lipalo tsena li bontša algorithm ea servo ea lekhoba la PTP4l, ka lebaka la tokiso ea nako ea bolulo ea TC, re bona phapang e nyane ka lipalo tse tloaelehileng tsa ho lieha ho tsamaea. Ka hona, phello ea ho feto-fetoha ha tieho ho khakanyo ea master offset e fokotsehile. Tafole e latelang e thathamisa tlhahlobo ea lipalo-palo mabapi le ts'ebetso ea PTP, e kenyelletsang RMS le ho kheloha ho tloaelehileng ha master offset, ho kheloha ho tloaelehileng ha tieho ea tsela e bolelang, hammoho le boemo bo bobe ka ho fetisisa ba master offset bakeng sa Intel FPGA PAC N3000 e nang le T- ntle le T- Tšehetso ea TC.

Lintlha tsa Lipalo-palo mabapi le Ts'ebetso ea PTP Tlas'a Sephethephethe sa Ingress

Ingress Traffic (24Gbps) G.8275.1 PTP Profile	Intel FPGA PAC N3000 e nang le T-TC	Intel FPGA PAC N3000 ntle le T-TC
RMS	6.34 ns	40.5 ns
StdDev (ea abs(max) offset)	3.65 ns	15.5 ns
StdDev (ea MPD)	1.79 ns	18.1 ns
Max offset	34 ns	143 ns

Papiso e tobileng ea Intel FPGA PAC N3000 e tšehelitsoeng ke TC le mofuta oo e seng oa TC.
E bonts'a hore ts'ebetso ea PTP e tlase ho 4x ho isa ho 6x mabapi le lipalo-palo life kapa life
metrics (maemo a mabe ka ho fetesisa, RMS kapa ho kheloha ho tloaelehileng ha master offset). Boemo bo bobe ka ho fetisisa
master offset bakeng sa tlhophiso ea G.8275.1 PTP ea T-TC Intel FPGA PAC N3000 is 34
ns tlas'a maemo a sephethephethe a kenang moeling oa bandwidth ea kanal (24.4Gbps).

lperf3 Teko ea Sephethephethe

Karolo ena e hlalosa teko ea benchmarking ea sephethephethe sa iperf3 ho tsoela pele ho lekola ts'ebetso ea PTP ea Intel FPGA PAC N3000. Sesebelisoa sa iperf3 se sebelisitsoe ho etsisa maemo a sephethephethe a sebetsang. Topology ea marang-rang ea li-benchmark tsa sephethephethe sa iperf3, se bontšitsoeng setšoantšong se ka tlase, se kenyelletsa khokahano ea li-server tse peli, e 'ngoe le e' ngoe e sebelisa karete ea DUT (Intel FPGA PAC N3000 le XXV710), ho Cisco Nexus 93180YC FX switch. Cisco switch e sebetsa joalo ka Moeli oa Clock (T-BC) lipakeng tsa makhoba a mabeli a DUT PTP le Calnex Paragon-NEO Grandmaster.

Network Topology bakeng sa Intel FPGA PAC N3000 lperf3 Teko ea Sephethephethe

Tlhahiso ea PTP4l ho e 'ngoe le e 'ngoe ea mabotho a DUT e fana ka litekanyo tsa data tsa ts'ebetso ea PTP bakeng sa sesebelisoa se seng le se seng sa lekhoba se setang (Intel FPGA PAC N3000 le XXV710). Bakeng sa tlhahlobo ea sephethephethe sa iperf3, maemo a latelang le litlhophiso li sebetsa ho li-graph tsohle le tlhahlobo ea ts'ebetso:

• 17 Gbps e kopantsoeng ea bandwidth ea sephethephethe (TCP le UDP ka bobeli), ebang ke egress kapa ingress kapa bidirectional ho Intel FPGA PAC N3000.
• IPv4 encapsulation ea lipakete tsa PTP, ka lebaka la meeli ea tlhophiso ho Cisco Nexus 93180YC-FX switch.
• Sekhahla sa phapanyetsano ea molaetsa oa PTP se lekanyelitsoe ho lipakete tse 8/motsotsoana, ka lebaka la meeli ea tlhophiso ho Cisco Nexus 93180YC-FX switch.

perf3 Sephetho sa Teko ea Sephethephethe

Tlhahlobo e latelang e hapa ts'ebetso ea karete ea Intel FPGA PAC N3000 le XXV710, ka bobeli li sebetsa e le karete ea khokahano ea marang-rang ea makhoba a PTP (T-TSC) Calnex Paragon NEO Grandmaster ka T-BC Cisco switch.

Lipalo tse latelang li bonts'a boholo ba master offset le MPD ha nako e ntse e feta bakeng sa liteko tse tharo tse fapaneng tsa sephethephethe ho sebelisa Intel FPGA PAC N3000 e nang le karete ea T-TC le XXV710. Ka likarete tsena ka bobeli, sephethephethe sa bidirectional se na le phello e kholo ho ts'ebetso ea PTP4l. Nako ea teko ea sephethephethe ke lihora tse 10. Lipalong tse latelang, mohatla oa graph o tšoaea ntlha ka nako moo sephethephethe se emisang 'me boholo ba PTP master offset bo theohela maemong a eona a tlase, ka lebaka la mocha o sa sebetseng.

Boholo ba Master Offset bakeng sa Intel FPGA PAC N3000

Palo e latelang e bonts'a tieho ea tsela e bolelang bakeng sa Intel FPGA PAC N3000 e nang le T TC, tlas'a ingress, egress le bidirectional iperf3 sephethephethe.

Mean Path Delay (MPD) bakeng sa Intel FPGA PAC N3000

Palo e latelang e bonts'a tieho ea tsela e bolelang bakeng sa Intel FPGA PAC N3000 e nang le T TC, tlas'a ingress, egress le bidirectional iperf3 sephethephethe.

Boholo ba Master Offset bakeng sa XXV710

Setšoantšo se latelang se bontša boholo ba master offset bakeng sa XXV710, tlas'a ingress, egress le bidirectional iperf3 sephethephethe.

Mean Path Delay (MPD) bakeng sa XXV710

Setšoantšo se latelang se bontša tieho e bolelang bakeng sa XXV710, tlas'a ingress, egress le bidirectional iperf3 sephethephethe.

Mabapi le ts'ebetso ea Intel FPGA PAC N3000 PTP, maemo a mabe ka ho fetesisa a maemong afe kapa afe a sephethe-phethe a ka hare ho 90 ns. Ha e ntse e le tlas'a maemo a tšoanang a litsela tse peli, RMS ea Intel FPGA PAC N3000 master offset e molemo ka 5.6x ho feta ea karete ea XXV710.

	Intel FPGA PAC N3000			Karete ea XXV710
	Sephethephethe sa Ingress10G	Egress Traffic 18G	Sephethephethe sa Bidirectional18G	Sephethephethe sa Ingress18G	Egress Traffic 10G	Sephethephethe sa Bidirectional18G
RMS	27.6 ns	14.2 ns	27.2 ns	93.96 ns	164.2 ns	154.7 ns
StdDev(ea abs(max) offset)	9.8 ns	8.7 ns	14.6 ns	61.2 ns	123.8 ns	100 ns
StdDev (ea MPD)	21.6 ns	9.2 ns	20.6 ns	55.58 ns	55.3 ns	75.9 ns
Max offset	84 ns	62 ns	90 ns	474 ns	1,106 ns	958 ns

Haholo-holo, master offset ea Intel FPGA PAC N3000 e na le phapang e tlase ea maemo,
bonyane 5x ka tlase ho karete ea XXV710, e bolela hore palo ea PTP ea
Oache ea Grandmaster ha e amehe haholo ho latency kapa lerata le fapaneng tlas'a sephethephethe
Intel FPGA PAC N3000.
Ha e bapisoa le Sephetho sa Teko ea Sephethephethe sa IXIA leqepheng la 5, boholo bo bobe ka ho fetisisa ba
the master offset e nang le T-TC e nolofalitsoeng Intel FPGA PAC N3000 e bonahala e phahame. Ntle ho moo
liphapang tsa topology ea marang-rang le li-bandwidth tsa channel, sena se bakoa ke Intel
FPGA PAC N3000 e hapuoe tlasa G.8275.1 PTP profile (16 Hz sync rate), ha a ntse a
sekhahla sa molaetsa oa sync tabeng ena se thibetsoe ho lipakete tse 8 motsotsoana.

Boholo ba Papiso ea Master Offset

Setšoantšo se latelang se bontša boholo ba papiso ea master offset tlas'a bidirectional iperf3 sephethephethe.

Ho Bolela Path Path (MPD) Papiso

Setšoantšo se latelang se bontša papiso ea ho lieha ha tsela e bolelang tlas'a sephethephethe sa iperf3.

Ts'ebetso e phahameng ea PTP ea Intel FPGA PAC N3000, ha e bapisoa le karete ea XXV710, e boetse e tšehetsoa ke ho kheloha ho hoholo hoa ho lieha ha tsela e lekantsoeng (MPD) bakeng sa XXV710 le Intel FPGA PAC N3000 tekong e 'ngoe le e 'ngoe e lebisitsoeng ea sephethephethe. mohlalaample bidirectional iperf3 traffic. Hlokomoloha boleng bo bolelang nyeoeng ka 'ngoe ea MPD, e ka fapanang ka lebaka la mabaka a mangata, joalo ka likhoele tse fapaneng tsa Ethernet le latency e fapaneng ea mantlha. Phapang e bonoang le spike ea boleng ba karete ea XXV710 ha e eo ho Intel FPGA PAC N3000.

RMS ea 8 E latellanang Papiso ea Master Offset

Qetello

Tsela ea data ea FPGA pakeng tsa QSFP28 (25G MAC) le Intel XL710 (40G MAC) e eketsa latency ea pakete e fapaneng e amang ho nepahala ha ho lekanyetsoa ha Lekhoba la PTP. Ho kenyelletsa tšehetso ea Transparent Clock (T-TC) ho FPGA logic e bonolo ea Intel FPGA PAC N3000 e fana ka matšeliso a latency ea pakete ena ka ho kenyelletsa nako ea eona ea ho lula lebaleng la tokiso ea melaetsa ea PTP e kentsoeng. Liphetho li tiisa hore mochine oa T-TC o ntlafatsa ts'ebetso e nepahetseng ea lekhoba la PTP4l.

Hape, Sephetho sa Teko ea Sephethephethe sa IXIA leqepheng la 5 se bontša hore ts'ehetso ea T-TC tseleng ea data ea FPGA e ntlafatsa ts'ebetso ea PTP ka bonyane 4x, ha e bapisoa le Intel FPGA PAC N3000 ntle le tšehetso ea T-TC. Intel FPGA PAC N3000 e nang le T-TC e fana ka ts'ebetso e mpe ka ho fetesisa ea 53 ns tlas'a meroalo ea sephethephethe e kenang, e kenang kapa e habeli moeling oa matla a mocha (25 Gbps). Kahoo, ka ts'ehetso ea T-TC, ts'ebetso ea Intel FPGA PAC N3000 PTP e nepahetse haholoanyane ebile ha e na monyetla oa ho fetoha lerata.

Tekong ea lperf3 ea Sephethephethe leqepheng la 10, ts'ebetso ea PTP ea Intel FPGA PAC N3000 e nang le T-TC e nolofalitsoeng e bapisoa le karete ea XXV710. Teko ena e ile ea hapa lintlha tsa PTP4l bakeng sa lioache tse peli tsa makhoba tlas'a sephethephethe sa ingress kapa egress se fapanyetsanoang pakeng tsa mabotho a mabeli a Intel FPGA PAC N3000 le XXV710 card. Boemo bo bobe ka ho fetesisa bo bonoang ho Intel FPGA PAC N3000 bonyane bo tlase ka 5x ho feta karete ea XXV710. Hape, ho kheloha ho tloaelehileng ha li-offsets tse hapuoeng ho boetse ho paka hore tšehetso ea T-TC ea Intel FPGA PAC N3000 e lumella khakanyo e bonolo ea oache ea Grandmaster.

Ho netefatsa ts'ebetso ea PTP ea Intel FPGA PAC N3000, likhetho tse ka bang teng tsa liteko li kenyelletsa:

• Netefatso tlasa PTP e fapaneng profiles le litefiso tsa melaetsa bakeng sa lihokelo tse fetang bonngoe tsa Ethernet.
• Tekolo ea Teko ea lperf3 ea Sephethephethe leqepheng la 10 ka switch e tsoetseng pele haholo e lumellang litefiso tse phahameng tsa melaetsa ea PTP.
• Tlhahlobo ea ts'ebetso ea T-SC le ho nepahala ha nako ea PTP tlas'a Teko ea G.8273.2 Conformance.

Nalane ea Phetoho ea Litokomane bakeng sa Teko ea IEEE 1588 V2

 

Tokomane Phetolelo	Liphetoho
2020.05.30	Tokollo ea pele.

 

Litokomane / Lisebelisoa

Intel FPGA Programmable Acceleration Card N3000 [pdf] Bukana ea Mosebelisi FPGA Programmable Acceleration Card, N3000, Programmable Acceleration Card N3000, FPGA Programmable Acceleration Card N3000, FPGA, IEEE 1588 V2 Test

Litšupiso

• Bukana ea Mosebelisi