Intel FPGA Programmable Acceleration Card N3000 User Guide
Intel FPGA Programmable Acceleration Card N3000

Mawu Oyamba

Mbiri

Intel FPGA Programmable Acceleration Card N3000 mu netiweki yofikira pawailesi (vRAN) imafuna thandizo la IEEE1588v2 ngati Precision Time Protocol (PTP) Telecom Slave Clocks (T-TSC) kuti ikonzekere ntchito zamapulogalamu moyenera. Intel Ethernet Controller XL710 mu Intel® FPGA PAC N3000 imapereka chithandizo cha IEEE1588v2. Komabe, njira ya data ya FPGA imayambitsa jitter yomwe imakhudza magwiridwe antchito a PTP. Kuwonjezera wotchi yowonekera (T-TC) kumathandizira Intel FPGA PAC N3000 kulipira FPGA mkati mwake ndikuchepetsa zotsatira za jitter, zomwe zimalola T-TSC kuyerekeza ndi Grandmaster's Time of Day (ToD) bwino.

Cholinga

Mayesowa amatsimikizira kugwiritsa ntchito Intel FPGA PAC N3000 ngati kapolo wa IEEE1588v2 mu Open Radio Access Network (O-RAN). Chikalatachi chikufotokoza:

  • Kukonzekera koyesa
  • Njira yotsimikizira
  • Kuwunika kwa magwiridwe antchito a wotchi yowonekera munjira ya FPGA ya Intel FPGA PAC N3000
  • Kuchita kwa PTP kwa Intel FPGA PAC N3000 Kuchita kwa Intel FPGA PAC N3000 kumathandizira wotchi yowonekera ndi
    poyerekeza ndi Intel FPGA PAC N3000 yopanda wotchi yowonekera komanso khadi ina ya Ethernet XXV710 pansi pamikhalidwe yosiyanasiyana yamagalimoto ndi masanjidwe a PTP.

Mbali ndi Zochepa

Zomwe zili ndi zoletsa zovomerezeka za Intel FPGA PAC N3000 IEEE1588v2 thandizo ndi izi:

  • Mapulogalamu ogwiritsidwa ntchito: Linux PTP Project (PTP4l)
  • Imathandizira zotsatirazi telecom profiles:
    •  1588v2 (zofikira)
    • G. 8265.1
    • G. 8275.1
  • Imathandizira wotchi ya kapolo ya PTP yokhala ndi magawo awiri.

Malingaliro a kampani Intel Corporation Maumwini onse ndi otetezedwa. Intel, logo ya Intel, ndi zizindikiro zina za Intel ndi zizindikiro za Intel Corporation kapena mabungwe ake. Intel imatsimikizira kugwira ntchito kwa FPGA yake ndi zida za semiconductor malinga ndi zomwe zili pano malinga ndi chitsimikizo cha Intel, koma ili ndi ufulu wosintha zinthu ndi ntchito zilizonse nthawi iliyonse popanda kuzindikira. Intel sakhala ndi udindo kapena udindo chifukwa cha kugwiritsa ntchito kapena kugwiritsa ntchito zidziwitso zilizonse, malonda, kapena ntchito zomwe zafotokozedwa pano kupatula monga momwe Intel adavomerezera momveka bwino. Makasitomala a Intel amalangizidwa kuti apeze mtundu waposachedwa kwambiri wamakina a chipangizocho asanadalire zidziwitso zilizonse zosindikizidwa komanso asanayike maoda azinthu kapena ntchito. *Mayina ena ndi mtundu zitha kunenedwa kuti ndi za ena.

  • Imathandizira kumapeto mpaka kumapeto kwa ma multicast.
  • Imathandizira kusinthana kwa mauthenga a PTP mpaka 128 Hz.
    • Uku ndikuchepetsa kwa dongosolo lovomerezeka ndikulemba ntchito Grandmaster. Kukonzekera kwa PTP kuposa mapaketi 128 pamphindikati pa mauthenga a PTP kungakhale kotheka.
  • Chifukwa cha malire a switch ya Cisco* Nexus* 93180YC-FX yomwe imagwiritsidwa ntchito pokhazikitsa zotsimikizira, zotsatira zake pamayendedwe a iperf3 zimanena za kusintha kwa uthenga wa PTP wa 8 Hz.
  • Thandizo la Encapsulation:
    • Kuyendetsa pa L2 (yaiwisi Efaneti) ndi L3 (UDP/IPv4/IPv6)
      Zindikirani: M'chikalatachi, zotsatira zonse zimagwiritsa ntchito ulalo umodzi wa 25Gbps Ethernet.

Zida ndi Mabaibulo Oyendetsa

Zida Baibulo
BIOS Intel Server Board S2600WF 00.01.0013
OS CentOS 7.6
Kernel kernel-rt-3.10.0-693.2.2.rt56.623.el7.src.
Data Plane Development Kit (DPDK) 18.08
Intel C Compiler 19.0.3
Intel XL710 Driver (dalaivala wa i40e) 2.8.432.9.21
Chithunzi cha PTP4l 2.0
IxExplorer 8.51.1800.7 EA-Patch1
lperf3 3.0.11
trafgen Netsniff-ng 0.6.6 Toolkit

 Mayeso a Magalimoto a IXIA

Seti yoyamba ya ma benchmarks a PTP a Intel FPGA PAC N3000 imagwiritsa ntchito njira ya IXIA* poyesa ma network ndi PTP. Bokosi la IXIA XGS2 chassis limaphatikizapo IXIA 40 PORT NOVUS-R100GE8Q28 khadi ndi IxExplorer yomwe imapereka mawonekedwe owonetserako kukhazikitsa PTP Grandmaster ku DUT (Intel FPGA PAC N3000) pamtundu umodzi wa 25 Gbps wolunjika pa Ethernet. Chithunzi cha block pansipa chikuwonetsa topology yoyezetsa yomwe ikuyang'aniridwa ndi ma benchmarks a IXIA. Zotsatira zonse zimagwiritsa ntchito kuchuluka kwa magalimoto opangidwa ndi IXIA pamayeso olowera magalimoto ndikugwiritsa ntchito chida cha trafgen pa Intel FPGA PAC N3000 host poyesa mayeso amtundu wa egress, komwe kulowera kapena kulowera nthawi zonse kumakhala kochokera ku DUT (Intel FPGA PAC N3000 ) wolandira. Muzochitika zonsezi, kuchuluka kwa magalimoto ndi 24 Gbps. Kukonzekera koyesereraku kumapereka mawonekedwe oyambira a PTP ya Intel FPGA PAC N3000 yokhala ndi makina a T-TC, komanso kuyerekeza ndi chithunzi chafakitole chomwe si cha Intel FPGA PAC N3000 pansi pa ITU-T G.8275.1 PTP profile.

Topology ya Intel FPGA PAC N3000 Mayeso a Traffic pansi pa IXIA Virtual Grandmaster

Topology ya Intel FPGA PAC N3000 Mayeso a Traffic pansi pa IXIA Virtual Grandmaster

Zotsatira za Mayendedwe a Magalimoto a IXIA

Kuwunika kotsatiraku kukuwonetsa magwiridwe antchito a PTP a Intel FPGA PAC N3000 yothandizidwa ndi TC pansi pamayendedwe olowera ndikuyenda. Mu gawo ili, PTP profile G.8275.1 yavomerezedwa pamayeso onse amgalimoto ndi kusonkhanitsa deta.

Kukula kwa Master Offset

Chithunzi chotsatirachi chikuwonetsa kukula kwa master offset omwe amawonedwa ndi kasitomala wa PTP4l wa Intel FPGA PAC N3000 wokhala ngati ntchito yanthawi yayitali pansi pa ingress, egress and bidirectional traffic (average throughput of 24.4Gbps).

Kukula kwa Master Offset

Mean Path Delay (MPD)

Chithunzi chotsatirachi chikuwonetsa kuchedwa kwa njira, monga momwe adawerengera kapolo wa PTP4 yemwe amagwiritsa ntchito Intel FPGA PAC N3000 ngati khadi yolumikizira maukonde, pamayeso omwewo monga chithunzi pamwambapa. Kutalika konse kwa mayeso atatu aliwonse amgalimoto ndi osachepera maola 16.

Mean Path Delay (MPD)

Gome lotsatirali likuwonetsa kusanthula kwamayendedwe atatu. Pansi pa kuchuluka kwa magalimoto pafupi ndi kuchuluka kwa mayendedwe, kapolo wa PTP4l yemwe amagwiritsa ntchito Intel FPGA PAC N3000 amasunga gawo lake kupita kwa agogo a IXIA mkati mwa 53 ns pamayesero onse amgalimoto. Kuphatikiza apo, kupatuka kokhazikika kwa kukula kwa master offset kuli pansi pa 5 ns.

Tsatanetsatane wa Statistical pa PTP Performance

 G.8275.1 PTP Profile Ingress Traffic (24Gbps) Egress Traffic (24Gbps) Bidirectional Traffic (24Gbps)
Mtengo wa RMS 6.35 ns 8.4 ns 9.2 ns
StdDev (ya abs(max) offset) 3.68 ns 3.78 ns 4.5 ns
StdDev (ya MPD) 1.78 ns 2.1 ns 2.38 ns
Max kuchepetsa 36 ns 33 ns 53 ns

 

Ziwerengero zotsatirazi zikuyimira kukula kwa master offset ndi mean path delay (MPD), pansi pa 16-hour long 24 Gbps bidirectional traffic test for different PTP encapsulations. Ma grafu akumanzere mu ziwerengerozi amatchula zizindikiro za PTP pansi pa IPv4 / UDP encapsulation, pamene mauthenga a PTP a ma graph olondola ali mu L2 (yaiwisi Ethernet). Magwiridwe a akapolo a PTP4l ndi ofanana, kukula koyipa kwambiri kwa master offset ndi 53 ns ndi 45 ns kwa IPv4/UDP ndi L2 encapsulation, motsatana. Kupatuka kokhazikika kwa magnitude offset ndi 4.49 ns ndi 4.55 ns kwa IPv4/UDP ndi L2 encapsulation, motsatana.

Kukula kwa Master Offset

Chithunzi chotsatira chikuwonetsa kukula kwa master offset pansi pa 24 Gbps bidirectional traffic, IPv4 (kumanzere) ndi L2 (kumanja) encapsulation, G8275.1 Profile.
Kukula kwa Master Offset

Mean Path Delay (MPD)

Chithunzi chotsatirachi chikuwonetsa kuchedwa kwa njira ya Intel FPGA PAC N3000 yolandila kapolo wa PTP4l pansi pa 24 Gbps bidirectional traffic, IPv4 (kumanzere) ndi L2 (kumanja) encapsulation, G8275.1 Profile.
Mean Path Delay (MPD)

Mfundo zenizeni za MPD sizikuwonetseratu zomveka za PTP, chifukwa zimadalira zingwe zautali, njira ya data latency ndi zina zotero; komabe, kuyang'ana kusiyana kochepa kwa MPD (2.381 ns ndi 2.377 ns kwa IPv4 ndi L2 kesi, motsatira) kumasonyeza kuti kuwerengera kwa PTP MPD kumakhala kolondola nthawi zonse pazitsulo zonse ziwiri. Imatsimikizira kusasinthika kwa magwiridwe antchito a PTP m'njira zonse ziwiri za encapsulation. Kusintha kwa mulingo mu MPD yowerengeka mu graph ya L2 (pa chithunzi pamwambapa, chithunzi chakumanja) ndi chifukwa cha kuchuluka kwa magalimoto omwe agwiritsidwa ntchito. Choyamba, njirayo ndi yopanda ntchito (MPD rms ndi 55.3 ns), ndiye kuti ingress traffic imagwiritsidwa ntchito (gawo lachiwiri lowonjezera, MPD rms ndi 85.44 ns), kutsatiridwa ndi magalimoto omwe amapita nthawi imodzi, zomwe zimapangitsa kuti MPD iwerengedwe ya 108.98 ns. Ziwerengero zotsatirazi zikukuta kukula kwa master offset ndi MPD yowerengeka ya mayeso amayendedwe apawiri omwe amagwiritsidwa ntchito kwa kapolo wa PTP4l pogwiritsa ntchito Intel FPGA PAC N3000 yokhala ndi makina a T-TC, komanso ina yomwe imagwiritsa ntchito Intel FPGA PACN3000 popanda TC. magwiridwe antchito. Mayeso a T-TC Intel FPGA PAC N3000 (lalanje) amayamba kuchokera ku zero, pomwe mayeso a PTP omwe amagwiritsa ntchito si TC Intel FPGA PAC N3000 (buluu) amayamba mozungulira T = 2300 masekondi.

Kukula kwa Master Offset

Chithunzi chotsatirachi chikuwonetsa kukula kwa master offset pansi pa Ingress traffic (24 Gbps), mothandizidwa ndi TTC, G.8275.1 Pro.file.
Kukula kwa Master Offset

Pachithunzi pamwambapa, machitidwe a PTP a Intel FPGA PAC N3000 yothandizidwa ndi TC pansi pa magalimoto ndi ofanana ndi omwe si a TC Intel FPGA PAC N3000 kwa masekondi 2300 oyambirira. Kuchita bwino kwa makina a T-TC mu Intel FPGA PAC N3000 kumawonetsedwa mu gawo la mayeso (pambuyo pa sekondi ya 2300) pomwe kuchuluka kwa magalimoto kumagwiritsidwa ntchito polumikizira makhadi onsewa. Momwemonso pachithunzichi, kuwerengera kwa MPD kumawonedwa isanayambe komanso itatha kugwiritsa ntchito kuchuluka kwa magalimoto panjira. Kuchita bwino kwa makina a T-TC kumawonekera polipira nthawi yokhalamo mapaketi omwe ndi latency ya paketi kudzera munjira ya FPGA pakati pa 25G ndi 40G MACs.

Mean Path Delay (MPD)

Chithunzi chotsatirachi chikuwonetsa kuchedwa kwa Intel FPGA PAC N3000 Host PTP4l kapolo pansi pa Ingress traffic (24 Gbps), mothandizidwa ndi T-TC, G.8275.1 Pro.file.
Mean Path Delay (MPD)

Ziwerengerozi zikuwonetsa servo aligorivimu ya PTP4l kapolo, chifukwa cha kuwongolera kwa nthawi yokhazikika ya TC, tikuwona kusiyana kwakung'ono pakati pa mawerengedwe ochedwa njira. Chifukwa chake, zotsatira za kusinthasintha kwachedwa pakuyerekeza kwa master offset kumachepetsedwa. Gome lotsatirali likuwonetsa kusanthula kwa magwiridwe antchito a PTP, omwe akuphatikiza RMS ndi kupatuka kokhazikika kwa master offset, kupatuka koyenera kwa kuchedwa kwa njira, komanso kuwongolera koyipa kwambiri kwa Intel FPGA PAC N3000 yokhala ndi T- komanso popanda T- TC thandizo.

Tsatanetsatane wa Statistical pa PTP Performance Under Ingress Traffic

Ingress Traffic (24Gbps) G.8275.1 PTP Profile Intel FPGA PAC N3000 yokhala ndi T-TC Intel FPGA PAC N3000 yopanda T-TC
Mtengo wa RMS 6.34 ns 40.5 ns
StdDev (ya abs(max) offset) 3.65 ns 15.5 ns
StdDev (ya MPD) 1.79 ns 18.1 ns
Max kuchepetsa 34 ns 143 ns

Kuyerekeza kwachindunji kwa Intel FPGA PAC N3000 yothandizidwa ndi TC ndi mtundu womwe si wa TC
Zikuwonetsa kuti magwiridwe antchito a PTP ndi 4x mpaka 6x kutsika potengera ziwerengero zilizonse
metrics (zoyipa kwambiri, RMS kapena kupatuka kokhazikika kwa master offset). Choyipa kwambiri
master offset pakusintha kwa G.8275.1 PTP kwa T-TC Intel FPGA PAC N3000 ndi 34
ns pansi pamayendedwe olowera pamalire a bandwidth (24.4Gbps).

lperf3 Mayeso a Magalimoto

Gawoli likufotokoza za kuyesa kwa iperf3 kwa traffic kuti muwunikirenso momwe PTP imagwirira ntchito pa Intel FPGA PAC N3000. Chida cha iperf3 chagwiritsidwa ntchito kutengera momwe magalimoto akuyendera. Maonekedwe a netiweki a iperf3 traffic benchmarks, yowonetsedwa pachithunzi pansipa, ikuphatikiza kulumikizana kwa ma seva awiri, iliyonse pogwiritsa ntchito khadi ya DUT (Intel FPGA PAC N3000 ndi XXV710), kupita ku Cisco Nexus 93180YC FX switch. Kusintha kwa Cisco kumachita ngati Boundary Clock (T-BC) pakati pa akapolo awiri a DUT PTP ndi Calnex Paragon-NEO Grandmaster.

Network Topology ya Intel FPGA PAC N3000 lperf3 Traffic Test

Network Topology ya Intel FPGA PAC N3000 lperf3 Traffic Test

Kutulutsa kwa PTP4l pagulu lililonse la gulu la DUT kumapereka miyeso ya data ya momwe PTP imagwirira ntchito pa chipangizo chilichonse chaukapolo chomwe chakhazikitsidwa (Intel FPGA PAC N3000 ndi XXV710). Pakuyesa kwa magalimoto a iperf3, mikhalidwe ndi masinthidwe otsatirawa amagwira ntchito pazithunzi zonse ndi kusanthula magwiridwe antchito:

  • 17 Gbps ophatikizana bandwidth (onse TCP ndi UDP), mwina egress kapena ingress kapena bidirectional ku Intel FPGA PAC N3000.
  • IPv4 encapsulation ya mapaketi a PTP, chifukwa chochepetsa kasinthidwe pa Cisco Nexus 93180YC-FX switch.
  • Kusinthana kwa uthenga wa PTP kumangokhala mapaketi 8/sekondi, chifukwa choletsa kusintha kwa Cisco Nexus 93180YC-FX.

perf3 Zotsatira Zoyesa Magalimoto

Kuwunika kotsatiraku kukuwonetsa magwiridwe antchito a Intel FPGA PAC N3000 ndi XXV710 khadi, onse nthawi imodzi akuchita ngati khadi yolumikizira netiweki ya akapolo a PTP (T-TSC) Calnex Paragon NEO Grandmaster kudzera pa switch ya T-BC Cisco.

Ziwerengero zotsatirazi zikuwonetsa kukula kwa master offset ndi MPD pakapita nthawi pamayeso atatu osiyanasiyana amagalimoto pogwiritsa ntchito Intel FPGA PAC N3000 yokhala ndi T-TC ndi XXV710 khadi. M'makhadi onsewa, maulendo apawiri amakhudza kwambiri ntchito ya PTP4l. Nthawi zoyeserera zamagalimoto ndi maola 10. M'ziwerengero zotsatirazi, mchira wa graph umasonyeza nthawi yomwe magalimoto amayima ndipo kukula kwa PTP master offset kumatsikira kumunsi kwake, chifukwa cha njira yopanda ntchito.

Kukula kwa Master Offset kwa Intel FPGA PAC N3000

Chithunzi chotsatirachi chikuwonetsa kuchedwa kwa njira ya Intel FPGA PAC N3000 yokhala ndi T TC, pansi pa ingress, egress ndi bidirectional iperf3 traffic.
Kukula kwa Master Offset kwa Intel FPGA PAC N3000

Mean Path Delay (MPD) ya Intel FPGA PAC N3000

Chithunzi chotsatirachi chikuwonetsa kuchedwa kwa njira ya Intel FPGA PAC N3000 yokhala ndi T TC, pansi pa ingress, egress ndi bidirectional iperf3 traffic.
Mean Path Delay (MPD) ya Intel FPGA PAC N3000

Kukula kwa Master Offset kwa XXV710

Chithunzi chotsatira chikuwonetsa kukula kwa master offset kwa XXV710, pansi pa ingress, egress ndi bidirectional iperf3 traffic.
Kukula kwa Master Offset kwa XXV710

Mean Path Delay (MPD) ya XXV710

Chithunzi chotsatirachi chikuwonetsa kuchedwa kwa njira ya XXV710, pansi pa ingress, egress ndi bidirectional iperf3 traffic.
Mean Path Delay (MPD) ya XXV710

Ponena za magwiridwe antchito a Intel FPGA PAC N3000 PTP, kuwongolera koyipa kwambiri pamayendedwe aliwonse kuli mkati mwa 90 ns. Munthawi yamayendedwe omwewo, RMS ya Intel FPGA PAC N3000 master offset ndi 5.6x yabwinoko kuposa ya XXV710 khadi.

  Intel FPGA PAC N3000 Chithunzi cha XXV710
Magalimoto a Ingress10g pa Egress Traffic 18G Magalimoto Awiri Awiri18g pa Magalimoto a Ingress18g pa Egress Traffic 10G Magalimoto Awiri Awiri18g pa
Mtengo wa RMS 27.6 ns 14.2 ns 27.2 ns 93.96 ns 164.2 ns 154.7 ns
StdDev (ya abs(max) offset) 9.8 ns 8.7 ns 14.6 ns 61.2 ns 123.8 ns 100 ns
StdDev (ya MPD) 21.6 ns 9.2 ns 20.6 ns 55.58 ns 55.3 ns 75.9 ns
Max kuchepetsa 84 ns 62 ns 90 ns 474 ns 1,106 ns 958 ns

Makamaka, master offset ya Intel FPGA PAC N3000 ili ndi zolakwika zochepa,
osachepera 5x kuchepera pa khadi la XXV710, zikutanthauza kuti kuyandikira kwa PTP kwa
Wotchi ya Grandmaster simakhudzidwa kwambiri ndi latency kapena kusiyanasiyana kwaphokoso pansi pa traffic mu
Intel FPGA PAC N3000.
Poyerekeza ndi IXIA Traffic Test Result patsamba 5, kuchuluka koyipitsitsa kwa
The master offset ndi T-TC yothandiza Intel FPGA PAC N3000 ikuwoneka yokwezeka. Komanso
kusiyana kwa ma network topology ndi ma channel bandwidths, izi ndi chifukwa cha Intel
FPGA PAC N3000 ikugwidwa pansi pa G.8275.1 PTP profile (16 Hz kulunzanitsa mlingo), pamene
kuchuluka kwa uthenga wolunzanitsa pankhaniyi ndipaketi 8 pamphindikati.

Kukula kwa Master Offset Comparison

Chithunzi chotsatira chikuwonetsa kukula kwa kuyerekeza kwa master offset pansi pa bidirectional iperf3 traffic.

Kukula kwa Master Offset Comparison

Mean Path Delay (MPD) Kuyerekeza

Chithunzi chotsatira chikuwonetsa njira yochepetsera kuyerekeza pansi pamayendedwe apawiri iperf3.
Mean Path Delay (MPD) Kuyerekeza

Kuchita kwapamwamba kwa PTP kwa Intel FPGA PAC N3000, poyerekeza ndi khadi ya XXV710, kumathandizidwanso ndi kupatuka kwapamwamba kwa kuchedwa kwa njira yowerengetsera (MPD) ya XXV710 ndi Intel FPGA PAC N3000 pamayesero aliwonse omwe amayesedwa, chifukwa Example bidirectional iperf3 traffic. Musanyalanyaze mtengo wamtengo wapatali pamtundu uliwonse wa MPD, womwe ukhoza kukhala wosiyana chifukwa cha zifukwa zingapo, monga zingwe zosiyana za Efaneti ndi zosiyana siyana zapakati. Kusiyana komwe kumawonedwa ndi kukwera kwamitengo ya XXV710 khadi palibe mu Intel FPGA PAC N3000.

RMS ya 8 Consecutive Master Offset Comparison

RMS ya 8 Consecutive Master Offset Comparison

Mapeto

Njira ya data ya FPGA pakati pa QSFP28 (25G MAC) ndi Intel XL710 (40G MAC) imawonjezera packet latency yomwe imakhudza kuyerekezera kulondola kwa PTP Slave. Kuonjezera chithandizo cha Transparent Clock (T-TC) mu FPGA zofewa zomveka za Intel FPGA PAC N3000 kumapereka chipukuta misozi ya paketiyi powonjezera nthawi yake yokhala m'malo owongolera mauthenga a PTP. Zotsatira zimatsimikizira kuti njira ya T-TC imathandizira kulondola kwa kapolo wa PTP4l.

Komanso, IXIA Traffic Test Result patsamba 5 ikuwonetsa kuti kuthandizira kwa T-TC munjira ya data ya FPGA kumakulitsa magwiridwe antchito a PTP ndi osachepera 4x, poyerekeza ndi Intel FPGA PAC N3000 popanda thandizo la T-TC. Intel FPGA PAC N3000 yokhala ndi T-TC imapereka mwayi wopambana kwambiri wa 53 ns pansi pa ingress, egress kapena bidirectional traffic loads pamalire a channel capacity (25 Gbps). Chifukwa chake, mothandizidwa ndi T-TC, magwiridwe antchito a Intel FPGA PAC N3000 PTP ndi olondola komanso osakonda kusiyanasiyana kwaphokoso.

Mu lperf3 Traffic Test patsamba 10, magwiridwe antchito a PTP a Intel FPGA PAC N3000 yokhala ndi T-TC yothandizidwa amafananizidwa ndi khadi ya XXV710. Mayesowa adajambula deta ya PTP4l ya mawotchi onse a akapolo pansi pa ingress kapena egress traffic yomwe imasinthidwa pakati pa makamu awiri a Intel FPGA PAC N3000 ndi XXV710 khadi. Kuwongolera koyipa kwambiri komwe kumawonedwa mu Intel FPGA PAC N3000 ndikochepera 5x kutsika kuposa khadi ya XXV710. Komanso, kupatuka kwanthawi zonse kwazomwe zidagwidwa kumatsimikiziranso kuti thandizo la T-TC la Intel FPGA PAC N3000 limalola kuyandikira koloko kwa wotchi ya Grandmaster.

Kuti mutsimikizirenso magwiridwe antchito a PTP a Intel FPGA PAC N3000, zosankha zomwe zingayesedwe zikuphatikiza:

  • Kutsimikizika pansi pamitundu yosiyanasiyana ya PTPfiles ndi mitengo ya mauthenga kwa maulalo opitilira Efaneti amodzi.
  • Kuunikira kwa lperf3 Mayeso a Magalimoto patsamba 10 ndi masiwichi apamwamba kwambiri omwe amalola kuti uthenga wa PTP ukhale wapamwamba.
  • Kuunikira kwa magwiridwe antchito a T-SC ndi kulondola kwa nthawi ya PTP pansi pa G.8273.2 Conformance Testing.

Mbiri Yokonzanso Zolemba pa Mayeso a IEEE 1588 V2

 

Chikalata Baibulo Zosintha
2020.05.30 Kutulutsidwa koyamba.

 

Zolemba / Zothandizira

Intel FPGA Programmable Acceleration Card N3000 [pdf] Buku Logwiritsa Ntchito
FPGA Programmable Acceleration Card, N3000, Programmable Acceleration Card N3000, FPGA Programmable Acceleration Card N3000, FPGA, IEEE 1588 V2 Test

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