Microsemi SmartFusion2 SoC FPGA Code Shadowing mai le SPI Flash i le DDR Memory

Upu Tomua

Faamoemoega
O lenei demo e mo SmartFusion®2 system-on-chip (SoC) field programmable gate array (FPGA) masini. O lo'o tu'uina mai ai fa'atonuga i le fa'aogaina o le mamanu fa'atatau.

Tagata Fa'amoemoe
O lenei fa'ata'ita'iga ta'iala e fa'amoemoe mo:

• FPGA mamanu
• Fa'ailoga fa'apipi'i
• Fa'atonu-tulaga faiga

Fa'asinomaga
Va'ai mea nei web itulau mo se lisi atoatoa ma faʻaonaponei o faʻamaumauga o masini SmartFusion2:
http://www.microsemi.com/products/fpga-soc/soc-fpga/smartfusion2#documentation

O pepa nei o lo'o tu'uina atu i lenei ta'iala fa'ata'ita'iga.

• UG0331: SmartFusion2 Microcontroller Subsystem Guide Guide
• SmartFusion2 System Builder Taiala mo Tagata Fa'aoga

SmartFusion2 SoC FPGA - Faʻailoga Faʻailoga mai le SPI Flash i le DDR Memory

Folasaga

O lenei mamanu faʻataʻitaʻiga o loʻo faʻaalia ai SmartFusion2 SoC FPGA masini mo le faʻaogaina o le code mai le faʻaogaina o le telefoni feaveaʻi (SPI) e faʻaluaina faʻamaumauga faʻamaumauga (DDR) synchronous dynamic random access memory (SDRAM) ma le faʻatinoina o le code mai le DDR SDRAM.
O le ata 1 o loʻo faʻaalia ai le pito i luga o le poloka poloka faʻataʻitaʻiga mo le ata lafoia mai le SPI flash device i le DDR memory.

Ata 1 • Fa'afanua Poloka Tulaga Maualuga

Fa'ailoga fa'ailoga o se metotia fa'apolopolo lea e fa'aaogaina e fa'ata'ita'i ai se ata mai manatuaga i fafo, vave, ma fe'avea'i (DRAM). O le fa'agasologa o le kopiina o le code mai le manatua e le fa'afefeteina i le manatua fa'aletonu mo le fa'atinoina.

E mana'omia le fa'aataina o le code pe a le lagolagoina e le manatua e le fa'afefeteina e feso'ota'i ma se processor le avanoa fa'afuase'i i le code mo le fa'atinoina-i-nofoaga, po'o le le lava o le manatua avanoa fa'afuase'i. I faʻatinoga faʻapitoa, o le saoasaoa o le faʻatinoga e mafai ona faʻaleleia e ala i le faʻaogaina o le code, lea e kopiina ai le code i le maualuga maualuga o le RAM mo le faʻatinoina vave.

Fa'amaumauga o fa'amaumauga ta'itasi (SDR)/DDR SDRAM e fa'aaogaina i tusi talosaga e iai se ata fa'atino tele ma e mana'omia ai le fa'atinoga maualuga. E masani lava, o ata lapopoa e mafai ona teuina i totonu o le mafaufau e le faʻafefe, e pei o le NAND flash poʻo le SPI flash, ma kopiina i le mafaufau faʻafefe, e pei o le SDR/DDR SDRAM memory, i le mana mo le faʻatinoina.

SmartFusion2 SoC FPGA masini fa'apipi'i fa'atupulaga fa'avae FPGA ie, o le ARM® Cortex®-M3 fa'agaioiga, ma feso'ota'iga feso'ota'iga maualuga i luga o le pu e tasi. O fa'atonuga manatua maualuga i totonu o masini SmartFusion2 SoC FPGA e fa'aoga e fa'afeso'ota'i ma manatuaga DDR2/DDR3/LPDDR fafo. O manatuaga DDR2/DDR3 e mafai ona fa'agaioia i le saoasaoa maualuga o le 333 MHz. O le Cortex-M3 processor e mafai ona faʻatautaia saʻo faatonuga mai fafo DDR memory e ala i le microcontroller subsystem (MSS) DDR (MDDR). O le FPGA cache controller ma le MSS DDR bridge e faʻatautaia le tafe o faʻamatalaga mo se faʻatinoga sili atu.

Fuafuaga Manaoga
Siata 1 o loʻo faʻaalia ai manaʻoga mo lenei faʻataʻitaʻiga.

Laulau 1 • Fuafuaga Manaomia

Fuafuaga Manaomia	Fa'amatalaga
Meafaigaluega Manaomia
SmartFusion2 Atina'e Atina'e Kit: • 12 V fetuutuunai • FlashPro5 • USB A i le Mini – B uaea USB	Rev A pe mulimuli ane
Desktop po'o le Laptop	Windows XP SP2 Operating System – 32-bit/64-bit Windows 7 Operating System – 32-bit/64-bit
Polokalama Manaoga
Libero® System-on-Chip (SoC)	v11.7
Polokalame Polokalama FlashPro	v11.7
SoftConsole	v3.4 SP1*
PC Avetaavale	USB i avetaavale UART
Microsoft .NET Framework 4 client mo le tatalaina o GUI demo	_
Fa'aaliga: *Mo lenei aʻoaʻoga, ua faʻaaogaina SoftConsole v3.4 SP1. Mo le fa'aogaina o SoftConsole v4.0, va'ai le TU0546: SoftConsole v4.0 ma Libero SoC v11.7 Aoaoga.

Fa'ata'ita'iga Fuafuaga
Folasaga
Le mamanu demo files o loʻo avanoa mo le download mai le auala o loʻo i lalo i le Micro semi webnofoaga:
http://soc.microsemi.com/download/rsc/?f=m2s_dg0386_liberov11p7_df

Le mamanu demo filee aofia ai:

• Poloketi Libero SoC
• polokalame STAPL files
• GUI fa'atino
• Sample talosaga ata
• Fa'asinomaga feso'ota'iga
• Fa'atonuga DDR files
• Faitau.txt file

Va'ai le readme.txt file saunia i le mamanu files mo le fa'atulagaga atoa o fa'amaumauga.

Fa'amatalaga
O lenei faʻataʻitaʻiga faʻataʻitaʻiga o loʻo faʻaogaina ai le faʻataʻitaʻiga o le faʻaogaina o le ata o le talosaga mai le DDR memory. O lenei mamanu o lo'o tu'uina atu ai fo'i feso'ota'iga talimalo i luga ole SmartFusion2 SoC FPGA multi-mode universal asynchronous/synchronous receiver/transmitter (MMUART) e utaina ai le ata fa'atino fa'atatau ile SPI flash e feso'ota'i ile MSS SPI0 interface.
O le faʻailoga code e faʻatinoina i auala nei e lua:

1. Tele-stage fa'aulu auala faiga fa'aoga le Cortex-M3 processor
2. Metotia fa'aa'e afi masini fa'aaoga le ie FPGA

Tele-Stagu Metotia Fa'agasologa Fa'avae
O le ata talosaga o loʻo faʻatautaia mai i fafo DDR manatua i le lua o loʻo mulimuli maitage:

• O le Cortex-M3 processor e faʻapipiʻiina le faʻapipiʻiina o le seevae vaivai mai le manatua e le faʻafefeteina (eNVM), lea e faʻatino ai le faʻaliliuina o ata mai le SPI flash device i le DDR memory.
• O le Cortex-M3 processor e faʻauluina le ata talosaga mai le DDR memory.

O lenei mamanu o loʻo faʻaaogaina se polokalame faʻapipiʻi e utaina ai le ata faʻatinoina o le talosaga mai le SPI flash device i le DDR memory mo le faʻatinoina. O le polokalame bootloader o loʻo tamoʻe mai le eNVM e oso i le faʻatonuga o loʻo teuina i le DDR memory pe a maeʻa ona kopiina le ata o le talosaga i le DDR memory.
Ata 2 o lo'o fa'aalia ai le fa'ata'ita'iga o poloka poloka o le fa'ata'ita'iga.

Ata 2 • Fa'ailoga Fa'ailoga – Tele Stage Fa'aosoina Fa'asologa Fa'ata'ita'iga Poloka Ata

O le MDDR ua fa'atulagaina mo DDR3 e fa'agaoioi i le 320 MHz. “Faaopoopoga: DDR3 Configurations” i le itulau e 22 o loo faaalia ai le faatulagaga o le DDR3. DDR ua fa'atulagaina a'o le'i fa'atinoina le fa'ailoga autu.

Fa'ameamea
O le bootloader e faʻatino galuega nei:

1. O le kopiina o le ata o le talosaga mai le SPI flash memory i le DDR memory.
2. Toe fa'aleleia le tuatusi DDR manatua amata mai le 0xA0000000 i le 0x00000000 e ala i le fa'atulagaina o le DDR_CR system register.
3. Amataina le Cortex-M3 processor stack pointer e tusa ai ma le faʻaoga faʻatatau. O le nofoaga muamua o le laulau fa'ata'ita'i fa'atatau o lo'o i ai le tau fa'ailoga fa'aputu. O lo'o avanoa le laulau ve'a ole fa'atatauga e amata ile tuatusi 0x00000000.
4. O lo'o utaina le fata o polokalame (PC) e toe fa'afo'i ai le fa'atonu o le fa'atonuga mo le fa'atinoina o le ata fa'atatau o le talosaga mai le DDR memory. Toe fa'afo'i le fa'atonu o le talosaga fa'atatau o lo'o avanoa ile laulau ve'a ile tuatusi 0x00000004.
   Ata 3 o lo'o fa'aalia ai le fa'ata'ita'iga mamanu.
   Ata 3 • Fa'asologa o Fuafuaga mo Multi-Stagu Metotia Fa'agasologa Fa'avae
   

Metotia Fa'aa'e Meafaigaluega Fa'aa'oa
I lenei metotia, o le Cortex-M3 e faʻapipiʻi saʻo ai le faʻataʻitaʻiga o le faʻataʻitaʻiga mai manatuaga DDR i fafo. E kopiina e le masini ta'avale masini le ata o le talosaga mai le SPI flash device i le DDR memory, a'o le'i tatalaina le Cortex-M3 processor reset. A maeʻa ona tuʻuina atu le seti, o le Cortex-M3 processor e faʻasolo saʻo mai le DDR memory. O lenei metotia e manaʻomia ai le itiiti ifo o le taimi faʻapipiʻi nai lo le tele-stage fa'auluina fa'agasologa aua e 'alo'ese ai le tele o seevae stages ma kopi ata talosaga i le DDR manatua i se taimi itiiti.

O lenei fa'ata'ita'iga fa'ata'ita'iga o lo'o fa'aogaina ai le fa'aogaina o le afi i le ie FPGA e kopi ai le ata fa'atinoina o le talosaga mai le SPI flash i le DDR memory mo le fa'atinoina. O lenei mamanu o loʻo faʻaaogaina ai le SPI flash loader, lea e mafai ona faʻatinoina e le Cortex-M3 processor e faʻapipiʻi ai le faʻaogaina o le ata faʻaogaina i totonu o le masini moli SPI e faʻaaoga ai le faʻaogaina o le talimalo i luga o SmartFusion2 SoC FPGA MMUART_0. Ole DIP switch1 ile SmartFusion2 Advanced Development Kit e mafai ona fa'aoga e filifili ai pe fa'apolokalame le SPI flash device pe fa'atino le code mai le DDR memory.

Afai o loʻo maua le faʻaoga faʻatinoina i le masini moli SPI, o le faʻailoga faʻafefe mai le SPI flash device i le DDR memory e amata ile masini eletise. O le afi taʻavale e amataina le MDDR, kopi le ata mai le SPI flash device i le DDR memory, ma toe faʻapipiʻi le DDR memory space i le 0x00000000 e ala i le teuina o le Cortex-M3 processor i le toe setiina. A maeʻa ona faʻasaʻo e le afi afi le Cortex-M3 reset, o le Cortex-M3 e faʻatino le faʻaoga faʻatatau mai le DDR memory.

O le FIC_0 o loʻo faʻapipiʻiina i le Slave mode e maua ai le MSS SPI_0 mai le FPGA fabric AHB master. O le MDDR AXI interface (DDR_FIC) e mafai ona maua le DDR memory mai le FPGA fabric AXI master.

Ata 4 o lo'o fa'aalia ai le fa'ata'ita'iga o poloka poloka o le fa'ata'ita'iga.
Ata 4 • Fa'ailoga Fa'ailoga - Fa'ata'ita'iga Fa'ata'ita'i Fa'ata'ita'i Fa'ata'ita'i Fa'ata'ita'i Poloka a le Meafaigaluega Boot Engine

Inisinia Fa'amau
O le vaega tele lea o le faʻataʻitaʻiga faʻataʻitaʻiga o loʻo kopiina le ata talosaga mai le SPI flash device i le DDR memory. O le afi afi e faia galuega nei:

1. Amataina le MDDR mo le mauaina o le DDR3 i le 320 MHz e ala i le teuina o le Cortex-M3 processor i le toe setiina.
2. O le kopiina o le ata o le talosaga mai le SPI flash memory device i le DDR memory e faʻaaoga ai le matai AXI i le ie FPGA e ala i le MDDR AXI interface.
3. Toe fa'ailogaina le DDR memory amata tuatusi mai le 0xA0000000 i le 0x00000000 e ala i le tusi i le DDR_CR system register.
4. Faʻasaʻo le seti i le Cortex-M3 processor e faʻaulu mai le DDR memory.

Ata 5 o lo'o fa'aalia ai le fa'ata'ita'iga fa'ata'ita'iga.
Ata 5 • Fa'afanua Poloka Tulaga Maualuga

Ata 6 • Fuafuaga Fa'asolo mo Metotia Fa'aa'e Meafaigaluega

Fausiaina o Ata Fa'atatau mo le DDR Memory
O se ata e mafai ona faʻatinoina mai le DDR memory e manaʻomia e faʻatautaia ai le demo. Fa'aaoga le fa'amatalaga feso'ota'iga "production-execute-in-place-externalDDR.ld". file e aofia ai i le mamanu files e fausia le ata talosaga. Le faʻamatalaga fesoʻotaʻiga file fa'amatala le tuatusi DDR manatua amata o le 0x00000000 talu mai le bootloader/boot engine e fa'atino ai le DDR memory remapping mai le 0xA0000000 i le 0x00000000. O le linker script e fatuina ai se ata talosaga ma faatonuga, faʻamatalaga, ma vaega BSS i le manatua o lona tuatusi amata o le 0x00000000. Ose moli-emitting diode faigofie (LED) emo, taimi ma fesuia'i fa'avae fa'atupu fa'alavelave fa'aoga ata file ua saunia mo lenei demo.

SPI Flash Loader
O le SPI flash loader o loʻo faʻatinoina e faʻapipiʻi ai le SPI flash memory i luga o le laupapa ma le faʻataʻitaʻiga faʻaoga faʻaoga mai le PC talimalo e ala i le MMUART_0 interface. O le Cortex-M3 processor e fai se pa'u mo fa'amatalaga o lo'o o'o mai i luga o le MMUART_0 ma fa'amataina le DMA lautele (PDMA) e tusi ai fa'amaumauga fa'asalaina i le SPI flash e ala i le MSS_SPI0.

Fa'atino le Demo
O loʻo faʻaalia e le faʻataʻitaʻiga pe faʻafefea ona utaina le ata talosaga i le SPI flash ma faʻatino lena ata talosaga mai manatuaga DDR fafo. E maua ai se example ata talosaga “sample_image_DDR3.bin”. O lenei ata o loʻo faʻaalia ai feʻau faʻafeiloaʻi ma le taimi faʻalavelave faʻalavelave i luga o le faʻamafanafanaga ma emo le LED1 i le LED8 ile SmartFusion2 Advanced Development Kit. Ina ia va'ai i le GPIO fa'alavelave fe'au i luga o le fa'amafanafanaga fa'asologa, fetaomi SW2 po'o SW3 ki.

Fa'atulaga le Fa'ata'ita'iga Design
O laasaga nei o loʻo faʻamatalaina pe faʻapefea ona seti le demo mo SmartFusion2 Advanced Development Kit board:

1. Faʻafesoʻotaʻi le Host PC i le J33 Connector e faʻaaoga ai le USB A i le mini-B cable. O le USB i UART alalaupapa avetaavale e otometi lava ona iloa. Fa'amaonia pe o faia le su'esu'ega i le pule o masini e pei ona fa'aalia i le Ata 7.
2. Afai e le otometi ona iloa avetaavale USB, faʻapipiʻi le avetaavale USB.
3. Mo feso'ota'iga fa'asologa fa'asolosolo e ala i le FTDI mini USB cable, fa'apipi'i le aveta'avale FTDI D2XX. La'u mai aveta'avale ma fa'apipi'i ta'iala mai:
   http://www.microsemi.com/soc/documents/CDM_2.08.24_WHQL_Certified.zip.
   Ata 7 • USB i UART Bridge Aveta'avale
   
4. Faʻafesoʻotaʻi le au osooso i luga o le SmartFusion2 Advanced Development Kit laupapa, e pei ona faʻaalia i le Laulau 2.
   Lapata'iga: Fa'aoti le ki o le sapalai eletise, SW7 a'o fa'afeso'ota'i mea osooso.
   Laulau 2 • SmartFusion2 Advanced Development Kit Jumper Settings

   Tagata osooso	Pin (Mai)	Pin (I)	Fa'amatalaga
   D116, D353, D354, D54	1	2	O tulaga ia e le mafai ona osooso a le Advanced Development Kit Board. Ia mautinoa o lo'o fa'atulaga lelei nei mea osooso.
   J123	2	3
   J124, J121, J32	1	2	JTAG polokalame e ala ile FTDI
   J118, J119	1	2	Polokalama SPI Flash

5. I le SmartFusion2 Advanced Development Kit, faʻafesoʻotaʻi le eletise i le fesoʻotaʻiga J42.
   Ata 8. o lo'o fa'aalia ai le fa'atulagaina o le laupapa mo le fa'aogaina o le fa'ailoga fa'ailoga mai le SPI flash i le DDR3 demo i le SmartFusion2 Advanced Development Kit.
   Ata 8 • SmartFusion2 Seti Atina'e Atina'e
   

SPI Flash Loader ma Code Shadowing Demo GUI
O le GUI e manaʻomia e faʻatautaia ai le faʻataʻitaʻiga faʻataʻitaʻiga. SPI Flash Loader ma Code Shadowing Demo GUI o se faʻaoga faigofie faʻaoga faʻaoga e tamoʻe i luga o le PC talimalo e faʻapipiʻi le SPI flash ma faʻatautaia le faʻataʻitaʻiga faʻataʻitaʻiga i luga o le SmartFusion2 Advanced Development Kit. UART ose feso'ota'iga feso'ota'iga i le va o le PC talimalo ma le SmartFusion2 Advanced Development Kit. E maua ai fo'i le vaega o le Serial Console e lolomi ai fe'au debug na maua mai le talosaga i luga o le UART interface.
Ata 9. fa'aalia le SPI Flash Loader ma Code Shadowing Demo Window.
Ata 9 • SPI Flash Loader ma Code Shadowing Demo Window

E lagolagoina e le GUI vaega nei:

• Polokalama SPI Flash: Polokalama le ata file i totonu ole moli SPI.
• Polokalama ma Code Shadowing mai le SPI Flash i le DDR: Polokalama le ata file i totonu o le SPI flash, kopi i le DDR memory, ma fa'ae'e le ata mai le DDR memory.
• Polokalama ma Code Shadowing mai le SPI Flash i le SDR: Polokalama le ata file i totonu o le SPI flash, kopi i le SDR memory, ma fa'aa'e le ata mai le SDR memory.
• Code Shadowing to DDR: Kopi le ata o lo'o iai file mai le SPI moli i le DDR manatua ma seevae le ata mai le DDR manatua.
• Fa'ailoga Fa'ailoga i le SDR: Kopi le ata o lo'o iai file mai le SPI flash i le SDR manatua ma seevae le ata mai le SDR manatua. Kiliki Fesoasoani mo nisi fa'amatalaga ile GUI.

Fa'atino le Fa'ata'ita'iga Design mo Multi-Stagu Metotia Fa'agasologa Fa'avae
O laasaga nei o loʻo faʻamatalaina pe faʻafefea ona faʻatino le mamanu faʻataʻitaʻiga mo le tele-stagauala faiga fa'avae:

1. Su'e le ki o le sapalai eletise, SW7.
2. Polokalama le SmarFusion2 SoC FPGA masini ma le polokalame file saunia i le mamanu files (SF2_CodeShadowing_DDR3_DF\Polokalame Files\ MultiStageBoot_meothod\CodeShadowing_top.stp e faʻaaoga ai le FlashPro design software).
3. Tatala le SPI Flash Loader ma le Code Shadowing Demo GUI e mafai ona fa'atinoina file avanoa i le mamanu files (SF2_CodeShadowing_DDR3_DF\GUI Executable\SF2_FlashLoader.exe).
4. Filifili le taulaga COM talafeagai (lea e faasino i ai le USB Serial drivers) mai le COM Port drop-down list.
5. Kiliki Feso'ota'i. A uma ona faʻamauina le fesoʻotaʻiga, Fesoʻotaʻi suiga i le Disconnect.
6. Kiliki Su'esu'e e filifili ai le mea muamuaample ata fa'atinoina file saunia ma le mamanu files
   (SF2_CodeShadowing_DDR3_DF/Sample Fa'aoga Ata/sample_image_DDR3.bin).
   Fa'aaliga: Ina ia fa'atupuina le talone ata talosaga file, taga'i i le “Faaopoopoga: Fausiaina o Talone Fa'atino File” i le itulau e 25.
7. Taofi le tuatusi amata ole SPI flash memory e le mafai ile 0x00000000.
8. Filifili le Polokalama ma Code Shadowing mai le SPI Flash i le DDR filifiliga.
9. Kiliki Amata e pei ona faʻaalia i le Ata 10 e faʻapipiʻi ai le ata faʻatinoina i le SPI flash ma faʻailoga ata mai le DDR memory.
   Ata 10 • Amataina le Demo
   
10. Afai o le SmartFusion2 SoC FPGA masini e faʻapipiʻiina i se STAPL file lea e le o faʻatulagaina le MDDR mo le DDR memory ona faʻaalia lea o se feʻau sese, e pei ona faʻaalia i le Ata 11.
    Ata 11 • Sese Meafaigaluega po'o le Filifiliga Feau
    
11. O le vaega o le Serial Console i luga o le GUI o loʻo faʻaalia ai feʻau debug ma amata faʻapipiʻi le SPI flash i le solo manuia o le SPI flash. Ata 12 o lo'o fa'aalia ai le tulaga o le SPI flash writing
    Ata 12 • Uiga Fa'amu
    
12. I luga o le polokalame o le SPI flash ma le manuia, o le bootloader o loʻo taʻavale i luga o SmartFusion2 SoC FPGA e kopiina le ata talosaga mai le SPI flash i le DDR memory ma faʻaofuofu le ata talosaga. Afai o le ata ua tuuina atu sample_image_DDR3.bin ua filifilia, o le faʻamafanafanaga faʻasalalau o loʻo faʻaalia ai feʻau faʻafeiloaʻi, faʻafesoʻotaʻi faʻalavelave ma faʻalavelave taimi savali e pei ona faʻaalia i le Ata 13 i le itulau 18 ma le Ata 14 i le itulau 18. O loʻo faʻaalia se mamanu LED i le LED1 i le LED8 i le SmartFusion2 Advanced Development Pusa.
13. Oomi le SW2 ma le SW3 ki e va'ai ai fe'au fa'alavelave i luga ole fa'amafanafanaga.
    Ata 13 • Fa'agaoioi le Ata Fa'atatauga Fa'atatau mai le DDR3 Memory
    Ata 14 • Taimi ma Feau Fa'alavelave ile Serial Console
    

Fa'agaoioi le Fuafuaga Metotia o Metotia Fa'aa'e Meafaigaluega
O laasaga nei o loʻo faʻamatalaina pe faʻafefea ona faʻagaoioia le faʻaogaina o le masini faʻapipiʻi meafaigaluega:

1. Su'e le ki o le sapalai eletise, SW7.
2. Polokalama le SmarFusion2 SoC FPGA masini ma le polokalame file saunia i le mamanu files (SF2_CodeShadowing_DDR3_DF\Polokalame
   Files\HWBootEngine_method\CodeShadowing_Fabric.stp fa'aoga le FlashPro design software).
3. E fa'apolokalame le SPI Flash fai le DIP sui SW5-1 i le ON tulaga. O lenei filifiliga e faʻaosoina ai Cortex-M3 mai le eNVM. Oomi le SW6 e toe setiina le masini SmartFusion2.
4. Tatala le SPI Flash Loader ma le Code Shadowing Demo GUI e mafai ona fa'atinoina file avanoa i le mamanu files (SF2_CodeShadowing_DDR3_DF\GUI Executable\SF2_FlashLoader.exe).
5. Filifili le taulaga COM talafeagai (lea e faasino i ai le USB Serial drivers) mai le COM Port drop-down list.
6. Kiliki Feso'ota'i. A uma ona faʻamauina le fesoʻotaʻiga, Fesoʻotaʻi suiga i le Disconnect.
7. Kiliki Su'esu'e e filifili ai le mea muamuaample ata fa'atinoina file saunia ma le mamanu files
   (SF2_CodeShadowing_DDR3_DF/Sample Fa'aoga Ata/sample_image_DDR3.bin).
   Fa'aaliga: Ina ia fa'atupuina le talone ata talosaga file, taga'i i le “Faaopoopoga: Fausiaina o Talone Fa'atino File” i le itulau e 25.
8. Filifili Hardware Boot Engine filifiliga i Code Shadowing Method.
9. Filifili le Polokalame SPI Flash filifiliga mai Filifiliga lisi.
10. Kiliki Amata, e pei ona faʻaalia i le Ata 15 e faʻapipiʻi ai le ata faʻatinoina ile SPI flash.
    Ata 15 • Amataina le Demo
    
11. O le vaega Serial Console i luga o le GUI o loʻo faʻaalia ai feʻau debug ma le tulaga o le SPI flash writing, e pei ona faʻaalia i le Ata 16.
    Ata 16 • Uiga Fa'amu
    
12. A mae'a fa'apolokalame lelei le moli SPI, sui le sui DIP SW5-1 ile tulaga OFF. O lenei filifiliga e faʻaosoina ai le Cortex-M3 processor mai le DDR memory.
13. Oomi le SW6 e toe setiina le masini SmartFusion2. E kopiina e le afi afi le ata talosaga mai le SPI flash i le DDR memory ma faʻasaʻo le toe setiina i Cortex-M3, lea e faʻaulu ai le ata talosaga mai le DDR memory. Afai o le ata ua tuuina atu “sample_image_DDR3.bin” o loʻo utaina i le SPI flash, o le faʻamafanafanaga faʻasalalau e faʻaalia ai savali faʻafeiloaʻi, faʻafesoʻotaʻi faʻalavelave (oomi SW2 poʻo SW3) ma savali faʻalavelave faʻafuaseʻi e pei ona faʻaalia i le Ata 17 ma o loʻo faʻaalia se mamanu LED i le LED1 i le LED8 i luga o le SmartFusion2 Advanced. Pusa Atina'e.
    Ata 17 • Fa'agaoioi le Ata Fa'atatauga Fa'atatau mai le DDR3 Memory
    

Fa'ai'uga
O lenei demo o loʻo faʻaalia ai le gafatia o le SmartFusion2 SoC FPGA masini e faʻafesoʻotaʻi ma le DDR memory ma faʻataʻitaʻiina le ata faʻatinoina mai le DDR memory e ala i le paoloina o le code mai le SPI flash memory device. O loʻo faʻaalia ai foʻi ni auala se lua o le faʻaogaina o le faʻaogaina o tulafono ile SmartFusion2 masini.

Fa'aopoopo: DDR3 Configurations

O fa'atusa nei o lo'o fa'aalia ai le fa'atulagaina o le DDR3.
Ata 18 • Fa'atonu Fa'atonu a le DDR

Ata 19 • Fa'atulagaina o le Fa'avaeina o le DDR Memory

Ata 20 • Fa'atulagaina o Taimi Fa'amanatu DDR

Fa'aopoopo: Fausiaina Talone Fa'atino File

O le talone fa'atino file e mana'omia le fa'apolokalameina o le SPI flash mo le fa'agaioia o le fa'ata'ita'iga fa'aata. Le fa'atupuina o le talone fa'atino file mai le “sample_image_DDR3” Soft Console, fai laasaga nei:

1. Fausia le Poloketi Soft Console fa'atasi ai ma le feso'ota'iga tusitusiga fa'atino-fa'atino-i-nofoaga-i fafo DDR.
2. Fa'aopoopo le auala fa'apipi'i Soft Console, mo fa'ata'ita'igaample, C:\Microsemi\Libero_v11.7\SoftConsole\Sourcery-G++\bin, i le 'Environment Variables' e pei ona fa'aalia i le Ata 21.
   Ata 21 • Fa'aopoopoina o le Ala Fa'apipi'i Malu
   
3. Kiliki faalua le vaega file Bin-File-Generator.bat o loʻo i:
   SoftConsole/CodeShadowing_MSS_CM3/Sample_image_DDR3 faila, e pei ona faʻaalia i le Ata 22.
   Ata 22 • Pin File Galue
   
4. O le Bin-File-Generator faia sample_image_DDR3.bin file.

Toe Iloilo Tala'aga

O le siata o lo'o i lalo o lo'o fa'aalia ai suiga taua na faia i lenei pepa mo toe iloiloga ta'itasi.

Toe Iloiloga	Suiga
Toe Iloiloga 7 (Mati 2016)	Fa'afou le pepa mo Libero SoC v11.7 fa'amatu'u polokalama (SAR 77816).
Toe Iloiloga 6 (Oketopa 2015)	Fa'afou le pepa mo Libero SoC v11.6 fa'amatu'u polokalama (SAR 72424).
Toe Iloiloga 5 (Setema 2014)	Fa'afou le pepa mo Libero SoC v11.4 fa'amatu'u polokalama (SAR 60592).
Toe Iloiloga 4 (Me 2014)	Fa'afou le pepa mo Libero SoC 11.3 fa'amalologa polokalama (SAR 56851).
Toe Iloiloga 3 (Tesema 2013)	Fa'afou le pepa mo Libero SoC v11.2 fa'amatu'u polokalama (SAR 53019).
Toe Iloiloga 2 (Me 2013)	Fa'afou le pepa mo Libero SoC v11.0 fa'amatu'u polokalama (SAR 47552).
Toe Iloiloga 1 (Mati 2013)	Fa'afou le pepa mo Libero SoC v11.0 beta SP1 fa'asa'olotoina polokalama (SAR 45068).

Lagolago oloa

O le Microsemi SoC Products Group e lagolagoina ana oloa i auaunaga lagolago eseese, e aofia ai Auaunaga Fa'atau, Tagata Fa'atau Fesoasoani Fesoasoani, a webnofoaga, meli faaeletonika, ma ofisa faatau i le lalolagi atoa. O lenei fa'aopoopoga o lo'o iai fa'amatalaga e uiga i le fa'afeso'ota'ia o le Microsemi SoC Products Group ma le fa'aogaina o nei auaunaga lagolago.

Auaunaga i tagata
Fa'afeso'ota'i Auaunaga Fa'atau mo le lagolago o oloa e le fa'apitoa, e pei o le tau o oloa, fa'aleleia o oloa, fa'afouga fa'amatalaga, tulaga oka, ma le fa'atagaina.

• Mai Amerika i Matu, valaau 800.262.1060
• Mai le lalolagi atoa, valaau 650.318.4460
• Fax, mai so'o se mea i le lalolagi, 408.643.6913

Nofoaga Fesoasoani Lagolago Tagata Fa'atau
O le Microsemi SoC Products Group o lo'o fa'afaigaluegaina lana Customer Technical Support Center ma ni inisinia tomai e mafai ona fesoasoani i le taliina o au meafaigaluega, polokalama, ma fesili mamanu e uiga i Microsemi SoC Products. E fa'aalu e le Customer Technical Support Center le tele o le taimi e fai ai fa'amatalaga talosaga, tali i fesili masani fa'ata'amilosaga mamanu, fa'amaumauga o fa'amatalaga ua iloa, ma fesili eseese. O lea, ae e te leʻi faʻafesoʻotaʻi i matou, faʻamolemole asiasi i matou punaoa i luga ole laiga. E foliga mai ua uma ona matou taliina au fesili.

Lagolago Fa'atekinisi

Mo Microsemi SoC Products Support, asiasi
http://www.microsemi.com/products/fpga-soc/design-support/fpga-soc-support.

Webnofoaga
E mafai ona e su'esu'eina le tele o fa'amatalaga fa'apitoa ma fa'amatalaga fa'apitoa i luga ole itulau ole Microsemi SoC Products Group, ile http://www.microsemi.com/products/fpga-soc/fpga-and-soc.

Fa'afeso'ota'i le Customer Technical Support Center
O lo'o galulue fa'ainisinia maualuluga i le Technical Support Center. E mafai ona fa'afeso'ota'i le Ofisa Lagolago Fa'apitoa e ala ile imeli po'o le Microsemi SoC Products Group webnofoaga.

imeli
E mafai ona e fa'afeso'ota'i au fesili fa'apitoa i la matou tuatusi imeli ma toe maua tali ile imeli, fax, po'o le telefoni. E le gata i lea, afai e i ai ni ou faʻafitauli mamanu, e mafai ona e imeli lau mamanu files ia maua fesoasoani. Matou te mata'ituina pea le tala imeli i le aso atoa. A lafo mai lau talosaga ia i matou, faamolemole ia mautinoa e aofia ai lou igoa atoa, igoa o le kamupani, ma au faʻamatalaga faʻafesoʻotaʻi mo le faʻatinoina lelei o lau talosaga.
Ole tuatusi imeli lagolago fa'apitoa ole soc_tech@microsemi.com.

O'u Mataupu
E mafai e tagata fa'atau a le Microsemi SoC Products Group ona tu'uina atu ma siaki mataupu fa'apitoa i luga ole laiga e ala ile alu ile My Cases.

I fafo o le US
O tagata fa'atau e mana'omia se fesoasoani i fafo atu o sone taimi a Amerika e mafai ona fa'afeso'ota'i le lagolago fa'apitoa e ala ile imeli (soc_tech@microsemi.com) pe faʻafesoʻotaʻi se ofisa faʻatau i le lotoifale. Asiasi About Us mo lisi o ofisa fa'atau ma feso'ota'iga fa'apisinisi.

Lagolago Fa'atekinisi ITAR
Mo fesoasoani fa'apitoa i RH ma RT FPGA o lo'o fa'atulafonoina e International Traffic in Arms Regulations (ITAR), fa'afeso'ota'i mai soc_tech@microsemi.com. I le isi itu, i totonu o O'u Matā'upu, filifili le Ioe i le lisi pa'ū ITAR. Mo se lisi atoa ole ITAR-regulated Microsemi FPGAs, asiasi ile ITAR web itulau.

Microsemi Corporate Headquarters
One Enterprise, Aliso Viejo,
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© 2016 Microsemi Corporation.
Ua taofia aia tatau uma. Microsemi ma le Microsemi logo o fa'ailoga fa'atau a le Microsemi Corporation.
O isi fa'ailoga tau fefa'ataua'iga uma ma fa'ailoga tautua o meatotino a latou tagata e ona.

O le Microsemi Corporation (Nasdaq: MSCC) e ofoina atu se faʻamatalaga atoatoa o semiconductor ma faʻaogaina fofo mo fesoʻotaʻiga, puipuiga & saogalemu, aerospace ma maketi tau pisinisi. O oloa e aofia ai le maualuga-fa'atinoga ma le fa'ama'a'aina o le analog fa'afefiloi-fa'ailoga fa'atasi, FPGAs, SoCs ma ASICs; oloa tau pulega; taimi ma masini fa'amaopoopo ma sa'o taimi fofo, fa'atulagaina tulaga o le lalolagi mo le taimi; masini e gaosia ai leo; RF fofo; vaega eseese; atina'e teuina ma feso'ota'iga fofo, tekinolosi saogalemu ma scalable anti-tamper oloa; fofo Ethernet; Malosiaga-i-Ethernet ICs ma vaeluagalemu; fa'apea fo'i ma agava'a ma 'au'aunaga fa'aaganu'u. Microsemi o loʻo faʻauluulu i Aliso Viejo, Calif, ma e tusa ma le 4,800 tagata faigaluega i le lalolagi atoa. A'oa'o atili ile www.microsemi.com.

Microsemi e le faia se faʻamaonia, faʻatusa, poʻo se faʻamaoniga e uiga i faʻamatalaga o loʻo i ai i totonu poʻo le talafeagai o ana oloa ma auaunaga mo soʻo se faʻamoemoega faapitoa, e le faʻatagaina foi e Microsemi soʻo se noataga soʻo se mea e tupu mai i le talosaga poʻo le faʻaogaina o soʻo se oloa poʻo se matagaluega. O oloa faʻatau atu i lalo ma soʻo se isi oloa faʻatau atu e Microsemi ua faʻatapulaʻaina suʻega ma e le tatau ona faʻaogaina faʻatasi ma masini faʻapitoa poʻo talosaga. Soʻo se faʻamatalaga faʻatinoga e talitonuina e faʻatuatuaina ae e leʻo faʻamaonia, ma e tatau i le Faʻatau ona faʻatinoina ma faʻamaeʻaina uma faʻatinoga ma isi suʻega o oloa, naʻo ia ma faʻatasi ma, pe faʻapipiʻi i totonu, soʻo se mea e gata ai. E le tatau i le tagata faʻatau ona faʻalagolago i soʻo se faʻamatalaga ma faʻamatalaga faʻatinoga poʻo faʻasologa na tuʻuina mai e Microsemi. O le matafaioi a le Fa'atau e fuafua tuto'atasi le talafeagai o so'o se oloa ma fa'ata'ita'i ma fa'amaonia tutusa. O faʻamatalaga na tuʻuina atu e Microsemi i lalo o loʻo tuʻuina atu "e pei ona i ai, o fea oi ai" ma faʻaletonu uma, ma o le lamatiaga atoa e fesoʻotaʻi ma ia faʻamatalaga o loʻo i ai atoa ma le Faʻatau. Microsemi e le tuʻuina atu, manino pe faʻamaonia, i soʻo se pati soʻo se aia tatau pateni, laisene, poʻo soʻo se isi aia tatau IP, pe faʻatatau i ia faʻamatalaga lava ia poʻo soʻo se mea e faʻamatalaina e ia faʻamatalaga. O faʻamatalaga o loʻo tuʻuina atu i totonu o lenei pepa e faʻatatau ia Microsemi, ma Microsemi faʻaagaga le aia tatau e faia ai soʻo se suiga i faʻamatalaga i totonu o lenei pepa poʻo soʻo se oloa ma auaunaga i soo se taimi e aunoa ma se faʻaaliga.

Pepa / Punaoa

Microsemi SmartFusion2 SoC FPGA Code Shadowing mai le SPI Flash i le DDR Memory [pdf] Tusi Lesona a le Pule SmartFusion2 SoC FPGA Code Fa'aoloolo mai le SPI Flash i le DDR Memory, SmartFusion2 SoC, FPGA Code Fa'aali mai le SPI Flash i le DDR Memory, Flash i le DDR Memory

Fa'asinomaga

• Tusi Taiala