Microsemi SmartFusion2 SoC FPGA Code Shadowing lati SPI Flash to DDR Memory

Àsọyé

Idi
demo yii wa fun SmartFusion®2 eto-on-chip (SoC) awọn ẹrọ ẹnu-ọna eto eto (FPGA). O pese awọn ilana lori bi o ṣe le lo apẹrẹ itọkasi ti o baamu.

Olugbo ti a pinnu
Itọsọna demo yii jẹ ipinnu fun:

• FPGA apẹẹrẹ
• Awọn apẹẹrẹ ti a fi sii
• Awọn apẹẹrẹ eto-ipele

Awọn itọkasi
Wo atẹle naa web oju-iwe fun pipe ati atokọ imudojuiwọn ti awọn iwe ohun elo SmartFusion2:
http://www.microsemi.com/products/fpga-soc/soc-fpga/smartfusion2#documentation

Awọn iwe aṣẹ wọnyi ni a tọka si ninu itọsọna demo yii.

• UG0331: SmartFusion2 Microcontroller Subsystem User Itọsọna
• SmartFusion2 System Akole olumulo Itọsọna

SmartFusion2 SoC FPGA – Ojiji koodu lati SPI Flash si DDR Memory

Ọrọ Iṣaaju

Eleyi demo oniru fihan SmartFusion2 SoC FPGA ẹrọ agbara fun koodu shadowing lati ni tẹlentẹle agbeegbe ni wiwo (SPI) filasi iranti ẹrọ lati ė data oṣuwọn (DDR) amuṣiṣẹpọ ìmúdàgba ID wiwọle iranti (SDRAM) ati ṣiṣe awọn koodu lati DDR SDRAM.
olusin 1 fihan awọn oke-ipele Àkọsílẹ aworan atọka fun koodu shadowing lati SPI filasi ẹrọ to DDR iranti.

olusin 1 • Top-Level Block aworan atọka

Ojiji koodu jẹ ọna gbigbe ti o lo lati ṣiṣe aworan kan lati ita, yiyara, ati awọn iranti iyipada (DRAM). O jẹ ilana ti didakọ koodu lati iranti ti kii ṣe iyipada si iranti iyipada fun ipaniyan.

Ojiji koodu ti wa ni ti beere nigbati awọn ti kii-iyipada iranti ni nkan ṣe pẹlu a isise ko ni atilẹyin ID wiwọle si koodu fun ṣiṣẹ-ni ibi, tabi nibẹ ni insufficient ti kii-iyipada ID wiwọle iranti. Ninu awọn ohun elo to ṣe pataki, iyara ipaniyan le ni ilọsiwaju nipasẹ ojiji koodu, nibiti a ti daakọ koodu si Ramu ti o ga julọ fun ipaniyan yiyara.

Oṣuwọn data ẹyọkan (SDR)/DDR SDRAM awọn iranti ni a lo ninu awọn ohun elo ti o ni aworan ṣiṣe ohun elo nla ati nilo iṣẹ ṣiṣe ti o ga julọ. Ni deede, awọn aworan ṣiṣe ti o tobi ti wa ni ipamọ ni iranti ti kii ṣe iyipada, gẹgẹbi filasi NAND tabi filasi SPI, ati daakọ si iranti iyipada, gẹgẹbi SDR/DDR SDRAM iranti, ni agbara soke fun ipaniyan.

Awọn ẹrọ SmartFusion2 SoC FPGA ṣepọ aṣọ FPGA ti o da filasi iran kẹrin, ero isise ARM® Cortex®-M3, ati awọn atọkun ibaraẹnisọrọ iṣẹ ṣiṣe giga lori chirún kan. Awọn oludari iranti iyara giga ninu awọn ẹrọ SmartFusion2 SoC FPGA ni a lo lati ni wiwo pẹlu awọn iranti DDR2/DDR3/LPDDR ita. Awọn iranti DDR2/DDR3 le ṣiṣẹ ni iyara ti o pọju ti 333 MHz. Kotesi-M3 ero isise le taara ṣiṣe awọn ilana lati ita DDR iranti nipasẹ awọn microcontroller subsystem (MSS) DDR (MDDR). Adarí kaṣe FPGA ati afara MSS DDR mu sisan data fun iṣẹ ṣiṣe to dara julọ.

Apẹrẹ Awọn ibeere
Tabili 1 fihan awọn ibeere apẹrẹ fun demo yii.

Table 1 • Design awọn ibeere

Design awọn ibeere	Apejuwe
Hardware Awọn ibeere
Ohun elo Idagbasoke Ilọsiwaju SmartFusion2: • 12 V ohun ti nmu badọgba • FlashPro5 USB A si Mini – B okun USB	Rev A tabi nigbamii
Ojú-iṣẹ tabi Kọǹpútà alágbèéká	Windows XP SP2 Eto Sisẹ – 32-bit/64-bit Windows 7 System Operating System – 32-bit/64-bit
Software ibeere
Eto Libero® lori Chip (SoC)	v11.7
FlashPro siseto Software	v11.7
SoftConsole	v3.4 SP1*
PC Awakọ	USB to UART awakọ
Microsoft .NET Framework 4 klient fun ifilọlẹ demo GUI	_
Akiyesi: * Fun ikẹkọ yii, SoftConsole v3.4 SP1 lo. Fun lilo SoftConsole v4.0, wo awọn TU0546: SoftConsole v4.0 ati Libero SoC v11.7 Tutorial.

Ririnkiri Design
Ọrọ Iṣaaju
Apẹrẹ demo files wa o si wa fun download lati awọn wọnyi ona ni Micro ologbele webojula:
http://soc.microsemi.com/download/rsc/?f=m2s_dg0386_liberov11p7_df

Apẹrẹ demo files pẹlu:

• Libero SoC ise agbese
• STAPL siseto files
• GUI ṣiṣẹ
• Sample elo images
• Awọn iwe afọwọkọ Linker
• DDR iṣeto ni files
• Ka iwe.txt file

Wo readme.txt file pese ni apẹrẹ files fun pipe liana be.

Apejuwe
Apẹrẹ demo yii n ṣe ilana ilana ojiji koodu lati bata aworan ohun elo lati iranti DDR. Apẹrẹ yii tun pese wiwo agbalejo lori SmartFusion2 SoC FPGA multi-mode fun gbogbo asynchronous/ olugba amuṣiṣẹpọ / Atagba (MMUART) lati gbe ohun elo ibi-afẹde ti o ṣee ṣe aworan sinu filasi SPI ti o sopọ si wiwo MSS SPI0.
Ojiji koodu ti wa ni imuse ni awọn ọna meji wọnyi:

1. Olona-stage bata ilana ọna lilo Cortex-M3 isise
2. Hardware bata engine ọna lilo awọn FPGA fabric

Olona-Stage Boot Ilana Ọna
Awọn ohun elo image ti wa ni ṣiṣe lati ita DDR ìrántí ninu awọn wọnyi meji bata stages:

• Cortex-M3 ero isise bata bata bata bata asọ lati inu iranti ti kii ṣe iyipada (eNVM), eyiti o ṣe gbigbe aworan koodu lati ẹrọ filasi SPI si iranti DDR.
• Cortex-M3 ero isise bata aworan ohun elo lati iranti DDR.

Apẹrẹ yii n ṣe eto bootloader kan lati fifuye aworan ti o le ṣe ohun elo ibi-afẹde lati ẹrọ filasi SPI si iranti DDR fun ipaniyan. Eto bootloader ti nṣiṣẹ lati eNVM fo si ohun elo ibi-afẹde ti o fipamọ sinu iranti DDR lẹhin ti a daakọ aworan ohun elo ibi-afẹde si iranti DDR.
olusin 2 fihan awọn alaye Àkọsílẹ aworan atọka ti demo oniru.

Olusin 2 • Koodu ojiji – Multi Stage Boot Ilana Ririnkiri Àkọsílẹ aworan atọka

A tunto MDDR fun DDR3 lati ṣiṣẹ ni 320 MHz. "Afikun: Awọn atunto DDR3" loju iwe 22 fihan awọn eto iṣeto ni DDR3. DDR ti wa ni tunto ṣaaju ṣiṣe koodu ohun elo akọkọ.

Bootloader
bootloader ṣe awọn iṣẹ wọnyi:

1. Didaakọ aworan ohun elo ibi-afẹde lati iranti filasi SPI si iranti DDR.
2. Remapping DDR iranti ti o bere adirẹsi lati 0xA0000000 to 0x00000000 nipa tito leto DDR_CR eto Forukọsilẹ.
3. Bibẹrẹ itọka akopọ ero isise Cortex-M3 gẹgẹbi ohun elo ibi-afẹde. Ipo akọkọ ti tabili fekito ohun elo ibi-afẹde ni iye itọka akopọ. Tabili fekito ti ohun elo ibi-afẹde wa ti o bẹrẹ lati adirẹsi 0x00000000.
4. Ikojọpọ counter eto (PC) lati tun oluṣakoso ohun elo ibi-afẹde fun ṣiṣe aworan ohun elo ibi-afẹde lati iranti DDR. Olutọju atunto ohun elo ibi-afẹde wa ni tabili vector ni adirẹsi 0x00000004.
   olusin 3 fihan demo oniru.
   Nọmba 3 • Ṣiṣan Apẹrẹ fun Multi-Stage Boot Ilana Ọna
   

Hardware Boot Engine Ọna
Ni ọna yii, Cortex-M3 taara bata aworan ohun elo ibi-afẹde lati awọn iranti DDR ita. Ẹnjini bata hardware daakọ aworan ohun elo lati inu ẹrọ filasi SPI si iranti DDR, ṣaaju ki o to dasile atunṣe ero isise Cortex-M3. Lẹhin itusilẹ atunto, ero isise Cortex-M3 bata taara lati iranti DDR. Ọna yii nilo akoko bata-soke diẹ sii ju ọpọlọpọ-stage bata ilana bi o ti yago fun ọpọ bata stages ati idaako ohun elo image to DDR iranti ni kere akoko.

Apẹrẹ demo yii ṣe imuse ọgbọn engine bata ni aṣọ FPGA lati daakọ aworan ti o le ṣe ohun elo ibi-afẹde lati filasi SPI si iranti DDR fun ipaniyan. Apẹrẹ yii tun ṣe imuse agberu filasi SPI, eyiti o le ṣe nipasẹ ero isise Cortex-M3 lati gbe aworan ti o ṣee ṣe ohun elo ibi-afẹde sinu ẹrọ filasi SPI nipa lilo wiwo agbalejo ti a pese lori SmartFusion2 SoC FPGA MMUART_0. DIP yipada1 lori SmartFusion2 Apo Idagbasoke Ilọsiwaju ni a le lo lati yan boya lati ṣe eto ẹrọ filasi SPI tabi lati ṣiṣẹ koodu lati iranti DDR.

Ti ohun elo ibi-afẹde ti o ṣiṣẹ wa ni ẹrọ filasi SPI, ojiji koodu lati ẹrọ filasi SPI si iranti DDR ti bẹrẹ lori agbara ẹrọ. Ẹrọ bata naa ṣe ipilẹṣẹ MDDR, daakọ Aworan lati ẹrọ filasi SPI si iranti DDR, o si ṣe atunkọ aaye iranti DDR si 0x00000000 nipa titọju ero isise Cortex-M3 ni ipilẹ. Lẹhin ti ẹrọ bata ṣe idasilẹ atunṣe Cortex-M3, Cortex-M3 ṣe ohun elo ibi-afẹde lati iranti DDR.

FIC_0 ti wa ni atunto ni ipo Ẹrú lati wọle si MSS SPI_0 lati FPGA fabric AHB oga. Ni wiwo MDDR AXI (DDR_FIC) ti ṣiṣẹ lati wọle si iranti DDR lati ọdọ FPGA fabric AXI titunto si.

olusin 4 fihan awọn alaye Àkọsílẹ aworan atọka ti demo oniru.
olusin 4 • Code Shadowing – Hardware Boot Engine Ririnkiri Digram aworan atọka

Bata Engine
Eyi ni apakan pataki ti demo ojiji koodu ti o daakọ aworan ohun elo lati ẹrọ filasi SPI si iranti DDR. Ẹrọ bata n ṣe awọn iṣẹ wọnyi:

1. Bibẹrẹ MDR fun iraye si DDR3 ni 320 MHz nipa titọju ero isise Cortex-M3 ni ipilẹ.
2. Didaakọ aworan ohun elo ibi-afẹde lati ẹrọ iranti filasi SPI si iranti DDR ni lilo oluwa AXI ninu aṣọ FPGA nipasẹ wiwo MDDR AXI.
3. Remapping DDR iranti ti o bere adirẹsi lati 0xA0000000 to 0x00000000 nipa kikọ si DDR_CR eto Forukọsilẹ.
4. Itusilẹ atunto si ero isise Cortex-M3 lati bata lati iranti DDR.

olusin 5 fihan demo oniru sisan.
olusin 5 • Top-Level Block aworan atọka

olusin 6 • Apẹrẹ Sisan fun Hardware Boot Engine Ọna

Ṣiṣẹda Àkọlé elo Image fun DDR Memory
Aworan ti o le ṣe lati iranti DDR ni a nilo lati ṣiṣẹ demo. Lo apejuwe ọna asopọ “production-execute-in-place-externalDDR.ld”. file ti o wa ninu apẹrẹ files lati kọ aworan ohun elo. Apejuwe linker file n ṣalaye adirẹsi ibẹrẹ iranti DDR bi 0x00000000 nitori ẹrọ bootloader / bata ẹrọ ṣe atunṣe iranti DDR lati 0xA0000000 si 0x00000000. Iwe afọwọkọ ọna asopọ ṣẹda aworan ohun elo pẹlu awọn ilana, data, ati awọn apakan BSS ni iranti eyiti adirẹsi ibẹrẹ rẹ jẹ 0x00000000. Diode didan ina ti o rọrun (LED) ti n paju, aago ati aworan ohun elo iran idalọwọduro orisun iyipada file ti pese fun demo yii.

SPI Flash agberu
Agberu filasi SPI ti wa ni imuse lati gbe iranti filasi SPI lori-ọkọ pẹlu aworan ohun elo ibi-afẹde ti o ṣiṣẹ lati ọdọ PC agbalejo nipasẹ wiwo MMUART_0. Awọn ero isise Cortex-M3 ṣe ifipamọ kan fun data ti nbọ lori wiwo MMUART_0 ati pe o bẹrẹ agbeegbe DMA (PDMA) lati kọ data ifipamọ sinu filasi SPI nipasẹ MSS_SPI0.

Nṣiṣẹ Ririnkiri
demo naa fihan bi o ṣe le gbe aworan ohun elo sinu filasi SPI ati ṣiṣẹ aworan ohun elo yẹn lati awọn iranti DDR ita. O pese ohun Mofiample aworan elo “sample_image_DDR3.bin”. Aworan yii ṣe afihan awọn ifiranṣẹ itẹwọgba ati ifiranṣẹ idalọwọduro aago lori console tẹlentẹle ati ki o pa LED1 si LED8 lori Apo Idagbasoke Ilọsiwaju SmartFusion2. Lati wo awọn ifiranṣẹ GPIO da gbigbi lori console tẹlentẹle, tẹ SW2 tabi SW3 yipada.

Ṣiṣeto Apẹrẹ Ririnkiri
Awọn igbesẹ wọnyi ṣe apejuwe bi o ṣe le ṣeto demo fun igbimọ Apo Idagbasoke Ilọsiwaju SmartFusion2:

1. So PC ogun pọ mọ J33 Asopọmọra nipa lilo USB A si okun mini-B. USB si UART awakọ afara ti wa ni wiwa laifọwọyi. Daju boya wiwa naa ba wa ninu oluṣakoso ẹrọ bi o ṣe han ni Nọmba 7.
2. Ti a ko ba rii awakọ USB laifọwọyi, fi awakọ USB sii.
3. Fun ibaraẹnisọrọ ebute ni tẹlentẹle nipasẹ okun USB mini FTDI, fi awakọ FTDI D2XX sori ẹrọ. Ṣe igbasilẹ awakọ ati itọsọna fifi sori ẹrọ lati:
   http://www.microsemi.com/soc/documents/CDM_2.08.24_WHQL_Certified.zip.
   olusin 7 • USB to UART Bridge Drivers
   
4. So awọn jumpers pọ sori igbimọ Apo Idagbasoke Ilọsiwaju SmartFusion2, bi o ṣe han ninu Tabili 2.
   Iṣọra: Yipada PA agbara ipese yipada, SW7 nigba ti pọ jumpers.
   Table 2 • SmartFusion2 To ti ni ilọsiwaju Development Apo Jumper Eto

   Jumper	Pin (Lati)	Pin (Si)	Comments
   J116, J353, J354, J54	1	2	Iwọnyi jẹ awọn eto jumper aiyipada ti Igbimọ Apo Idagbasoke Ilọsiwaju. Rii daju pe a ṣeto awọn jumpers ni ibamu.
   J123	2	3
   J124, J121, J32	1	2	JTAG siseto nipasẹ FTDI
   J118, J119	1	2	Siseto SPI Flash

5. Ninu Apo Idagbasoke Ilọsiwaju SmartFusion2, so ipese agbara pọ si asopo J42.
   olusin 8. fihan awọn ọkọ setup fun ṣiṣe awọn koodu ojiji lati SPI filasi to DDR3 demo lori SmartFusion2 To ti ni ilọsiwaju Development Apo.
   olusin 8 • SmartFusion2 Advanced Development Apo Oṣo
   

SPI Flash agberu ati koodu Shadowing Ririnkiri GUI
A nilo GUI lati ṣiṣẹ demo ojiji koodu. SPI Flash Loader ati koodu Shadowing Demo GUI jẹ wiwo olumulo ayaworan ti o rọrun ti o nṣiṣẹ lori PC agbalejo lati ṣe eto filasi SPI ati ṣiṣe demo ojiji koodu lori Apo Idagbasoke Ilọsiwaju SmartFusion2. UART jẹ ilana ibaraẹnisọrọ laarin PC agbalejo ati SmartFusion2 Apo Idagbasoke Ilọsiwaju. O tun pese apakan Console Serial lati tẹ sita awọn ifiranṣẹ yokokoro ti o gba lati inu ohun elo lori wiwo UART.
olusin 9. fihan SPI Flash Loader ati Code Shadowing Ririnkiri Window.
Olusin 9 • SPI Flash Loader ati Code Shadowing Ririnkiri Window

GUI ṣe atilẹyin awọn ẹya wọnyi:

• Eto SPI Flash: Awọn eto aworan naa file sinu SPI filasi.
• Eto ati ojiji koodu lati SPI Flash si DDR: Awọn eto aworan naa file sinu SPI filasi, daakọ ti o si awọn DDR iranti, ati bata aworan lati DDR iranti.
• Eto ati ojiji koodu lati SPI Flash si SDR: Awọn eto aworan naa file sinu filasi SPI, daakọ si iranti SDR, ati bata aworan lati iranti SDR.
• Code Shadowing to DDR: Da awọn ti wa tẹlẹ image file lati SPI filasi to DDR iranti ati orunkun aworan lati DDR iranti.
• Ojiji koodu si SDR: Daakọ aworan ti o wa tẹlẹ file lati SPI filasi si iranti SDR ati bata aworan lati iranti SDR. Tẹ Iranlọwọ fun alaye diẹ sii lori GUI.

Ṣiṣe Apẹrẹ Ririnkiri fun Multi-Stage Boot Ilana Ọna
Awọn igbesẹ atẹle yii ṣe apejuwe bi o ṣe le ṣiṣe apẹrẹ demo fun ọpọlọpọ-stage bata ilana:

1. Yipada ON yipada ipese agbara, SW7.
2. Ṣe eto ẹrọ SmarFusion2 SoC FPGA pẹlu siseto file pese ni apẹrẹ files (SF2_CodeShadowing_DDR3_DF \ Eto Files\MultiStageBoot_meothodCodeShadowing_top.stp lilo sọfitiwia apẹrẹ FlashPro).
3. Lọlẹ SPI Flash Loader ati koodu Shadowing Demo GUI ṣiṣe file wa ninu apẹrẹ files (SF2_CodeShadowing_DDR3_DF \ GUI Executable \ SF2_FlashLoader.exe).
4. Yan ibudo COM ti o yẹ (si eyiti awọn awakọ USB Serial ti tọka si) lati atokọ jabọ-silẹ Port Port.
5. Tẹ Sopọ. Lẹhin ti iṣeto asopọ, So awọn ayipada pọ si Ge asopọ.
6. Tẹ Kiri lati yan example afojusun executable image file pese pẹlu oniru files
   (SF2_CodeShadowing_DDR3_DF/Sample Ohun elo Images/sample_image_DDR3.bin).
   Akiyesi: Lati ṣe ina ohun elo bin bin file, wo “Afikun: Ti ipilẹṣẹ Executable Bin File” loju iwe 25.
7. Tọju adirẹsi ibẹrẹ ti iranti filasi SPI bi aiyipada ni 0x00000000.
8. Yan Eto ati Shadowing koodu lati SPI Flash si aṣayan DDR.
9. Tẹ Bẹrẹ bi o ṣe han ni Nọmba 10 lati gbe aworan ti o ṣiṣẹ sinu filasi SPI ati ojiji koodu lati iranti DDR.
   olusin 10 • Bibẹrẹ Ririnkiri naa
   
10. Ti ẹrọ SmartFusion2 SoC FPGA ti ni eto pẹlu STAPL kan file ninu eyiti a ko tunto MDR fun iranti DDR lẹhinna o fihan ifiranṣẹ aṣiṣe, bi o ṣe han ni Nọmba 11.
    Nọmba 11 • Ẹrọ ti ko tọ tabi Ifiranṣẹ Aṣayan
    
11. Apakan Console Serial lori GUI ṣe afihan awọn ifiranṣẹ yokokoro ati bẹrẹ siseto filasi SPI lori piparẹ filaṣi SPI ni aṣeyọri. Nọmba 12 fihan ipo ti kikọ filasi SPI
    olusin 12 • Filaṣi Loading
    
12. Lori siseto filasi SPI ni aṣeyọri, bootloader nṣiṣẹ lori SmartFusion2 SoC FPGA daakọ aworan ohun elo lati filasi SPI si iranti DDR ati bata aworan ohun elo naa. Ti aworan ti a pese sample_image_DDR3.bin ti yan, ni tẹlentẹle console fihan awọn kaabo awọn ifiranṣẹ, yipada da gbigbi ati aago gbigbi awọn ifiranṣẹ bi o han ni Figure 13 loju iwe 18 ati Figure 14 loju iwe 18. A nṣiṣẹ LED Àpẹẹrẹ ti han lori LED1 to LED8 lori SmartFusion2 To ti ni ilọsiwaju Development Kit.
13. Tẹ awọn iyipada SW2 ati SW3 lati wo awọn ifiranṣẹ idalọwọduro lori console tẹlentẹle.
    olusin 13 • Ṣiṣe Aworan Ohun elo Àkọlé lati DDR3 Memory
    Nọmba 14 • Aago ati Awọn ifiranṣẹ Idilọwọ ni Tẹlentẹle Console
    

Nṣiṣẹ Hardware Boot Engine Ọna Apẹrẹ
Awọn igbesẹ wọnyi ṣe apejuwe bi o ṣe le ṣiṣe apẹrẹ ọna ẹrọ bata ohun elo:

1. Yipada ON yipada ipese agbara, SW7.
2. Ṣe eto ẹrọ SmarFusion2 SoC FPGA pẹlu siseto file pese ni apẹrẹ files (SF2_CodeShadowing_DDR3_DF \ Eto
   Files \ HWBootEngine_method \ CodeShadowing_Fabric.stp lilo FlashPro oniru software).
3. Lati ṣe eto Flash Flash SPI ṣe DIP yipada SW5-1 si ipo ON. Aṣayan yii ṣe lati bata Cortex-M3 lati eNVM. Tẹ SW6 lati tun SmartFusion2 ẹrọ.
4. Lọlẹ SPI Flash Loader ati koodu Shadowing Demo GUI ṣiṣe file wa ninu apẹrẹ files (SF2_CodeShadowing_DDR3_DF \ GUI Executable \ SF2_FlashLoader.exe).
5. Yan ibudo COM ti o yẹ (si eyiti awọn awakọ USB Serial ti tọka si) lati atokọ jabọ-silẹ Port Port.
6. Tẹ Sopọ. Lẹhin ti iṣeto asopọ, So awọn ayipada pọ si Ge asopọ.
7. Tẹ Kiri lati yan example afojusun executable image file pese pẹlu oniru files
   (SF2_CodeShadowing_DDR3_DF/Sample Ohun elo Images/sample_image_DDR3.bin).
   Akiyesi: Lati ṣe ina ohun elo bin bin file, wo “Afikun: Ti ipilẹṣẹ Executable Bin File” loju iwe 25.
8. Yan Hardware Boot Engine aṣayan ni Ọna Shadowing Code.
9. Yan Eto SPI Flash aṣayan lati inu akojọ aṣayan.
10. Tẹ Bẹrẹ, bi o ṣe han ni Nọmba 15 lati gbe aworan ti o le ṣiṣẹ sinu filasi SPI.
    olusin 15 • Bibẹrẹ Ririnkiri naa
    
11. Apakan Console Serial lori GUI ṣe afihan awọn ifiranṣẹ yokokoro ati ipo kikọ filaṣi SPI, bi o ṣe han ni Nọmba 16.
    olusin 16 • Filaṣi Loading
    
12. Lẹhin siseto filasi SPI ni aṣeyọri, yi DIP yipada SW5-1 si ipo PA. Yiyan yi mu ki a bata Cortex-M3 ero isise lati DDR iranti.
13. Tẹ SW6 lati tun SmartFusion2 ẹrọ. Enjini bata daakọ aworan ohun elo lati filasi SPI si iranti DDR ati awọn idasilẹ tun pada si Cortex-M3, eyiti o ṣe bata aworan ohun elo lati iranti DDR. Ti aworan ti a pese “sample_image_DDR3.bin" ti wa ni ti kojọpọ to SPI filasi, ni tẹlentẹle console fihan awọn kaabo awọn ifiranṣẹ, yipada da gbigbi (tẹ SW2 tabi SW3) ati aago da gbigbi awọn ifiranṣẹ bi o han ni Figure 17 ati ki o kan nṣiṣẹ LED Àpẹẹrẹ ti han lori LED1 to LED8 lori SmartFusion2 To ti ni ilọsiwaju. Idagbasoke Apo.
    olusin 17 • Ṣiṣe Aworan Ohun elo Àkọlé lati DDR3 Memory
    

Ipari
demo yii fihan agbara ti SmartFusion2 SoC FPGA ẹrọ lati ni wiwo pẹlu iranti DDR ati lati ṣiṣẹ aworan ti o ṣiṣẹ lati iranti DDR nipasẹ ojiji koodu lati ẹrọ iranti filasi SPI. O tun fihan awọn ọna meji ti imuse ojiji koodu lori ẹrọ SmartFusion2.

Àfikún: DDR3 atunto

Awọn nọmba wọnyi fihan awọn eto iṣeto ni DDR3.
olusin 18 • General DDR iṣeto ni Eto

olusin 19 • DDR Memory Initialization Eto

olusin 20 • DDR Memory Time Eto

Àfikún: Ti o npese Executable Bin File

Awọn executable bin file O nilo lati ṣe eto filasi SPI fun ṣiṣe demo ojiji koodu. Lati se ina awọn executable bin file lati "sample_image_DDR3” Asọ Console, ṣe awọn igbesẹ wọnyi:

1. Kọ iṣẹ akanṣe Asọ Console pẹlu iṣelọpọ iwe afọwọkọ linker-ṣiṣẹ-ni-ibi-ita DDR.
2. Ṣafikun ọna fifi sori ẹrọ Console Soft, fun example, C: \ Microsemi \ Libero_v11.7 \ SoftConsole \ Sourcery-G ++ \ bin, si awọn 'Ayika oniyipada' bi han ni Figure 21.
   olusin 21 • Fifi Rirọ Console Fifi sori Ona
   
3. Tẹ ipele lẹẹmeji file Bin-File-Generator.bat be ni:
   SoftConsole/CodeShadowing_MSS_CM3/Sample_image_DDR3 folda, bi o ṣe han ni Nọmba 22.
   olusin 22 • Bin File monomono
   
4. Bin-File-Apilẹṣẹ ṣẹda sample_image_DDR3.bin file.

Àtúnyẹwò History

Tabili ti o tẹle n ṣe afihan awọn ayipada pataki ti a ṣe ninu iwe yii fun atunyẹwo kọọkan.

Àtúnyẹwò	Awọn iyipada
Atunyẹwo 7 (Oṣu Kẹta ọdun 2016)	Ṣe imudojuiwọn iwe-ipamọ fun idasilẹ sọfitiwia Libero SoC v11.7 (SAR 77816).
Atunyẹwo 6 (Oṣu Kẹwa Ọdun 2015)	Ṣe imudojuiwọn iwe-ipamọ fun idasilẹ sọfitiwia Libero SoC v11.6 (SAR 72424).
Atunyẹwo 5 (Oṣu Kẹsan ọdun 2014)	Ṣe imudojuiwọn iwe-ipamọ fun idasilẹ sọfitiwia Libero SoC v11.4 (SAR 60592).
Atunyẹwo 4 (Oṣu karun ọdun 2014)	Ṣe imudojuiwọn iwe-ipamọ fun idasilẹ sọfitiwia Libero SoC 11.3 (SAR 56851).
Atunyẹwo 3 (Oṣu Keji ọdun 2013)	Ṣe imudojuiwọn iwe-ipamọ fun idasilẹ sọfitiwia Libero SoC v11.2 (SAR 53019).
Atunyẹwo 2 (Oṣu karun ọdun 2013)	Ṣe imudojuiwọn iwe-ipamọ fun idasilẹ sọfitiwia Libero SoC v11.0 (SAR 47552).
Atunyẹwo 1 (Oṣu Kẹta ọdun 2013)	Ṣe imudojuiwọn iwe-ipamọ fun Libero SoC v11.0 beta SP1 itusilẹ sọfitiwia (SAR 45068).

Ọja Support

Microsemi SoC Products Group ṣe atilẹyin awọn ọja rẹ pẹlu ọpọlọpọ awọn iṣẹ atilẹyin, pẹlu Iṣẹ alabara, Ile-iṣẹ Atilẹyin Imọ-ẹrọ Onibara, a webojula, itanna mail, ati ni agbaye tita ifiweranṣẹ. Àfikún yii ni alaye nipa kikan si Microsemi SoC Products Group ati lilo awọn iṣẹ atilẹyin wọnyi.

Iṣẹ onibara
Kan si Iṣẹ Onibara fun atilẹyin ọja ti kii ṣe imọ-ẹrọ, gẹgẹbi idiyele ọja, awọn iṣagbega ọja, alaye imudojuiwọn, ipo aṣẹ, ati aṣẹ.

• Lati North America, pe 800.262.1060
• Lati iyoku agbaye, pe 650.318.4460
• Faksi, lati nibikibi ninu aye, 408.643.6913

Onibara Technical Support Center
Ẹgbẹ Microsemi SoC Products Group ṣiṣẹ Ile-iṣẹ Atilẹyin Imọ-ẹrọ Onibara rẹ pẹlu awọn onimọ-ẹrọ ti o ni oye ti o le ṣe iranlọwọ dahun ohun elo rẹ, sọfitiwia, ati awọn ibeere apẹrẹ nipa Awọn ọja SoC Microsemi. Ile-iṣẹ Atilẹyin Imọ-ẹrọ Onibara n lo akoko nla ṣiṣẹda awọn akọsilẹ ohun elo, awọn idahun si awọn ibeere ọmọ apẹrẹ ti o wọpọ, iwe ti awọn ọran ti a mọ, ati ọpọlọpọ awọn FAQs. Nitorinaa, ṣaaju ki o to kan si wa, jọwọ ṣabẹwo si awọn orisun ori ayelujara wa. O ṣeese pupọ pe a ti dahun awọn ibeere rẹ tẹlẹ.

Oluranlowo lati tun nkan se

Fun Atilẹyin Awọn ọja Microsemi SoC, ṣabẹwo
http://www.microsemi.com/products/fpga-soc/design-support/fpga-soc-support.

Webojula
O le ṣawari lori ọpọlọpọ awọn alaye imọ-ẹrọ ati ti kii ṣe imọ-ẹrọ lori oju-iwe ile Microsemi SoC Products Group, ni http://www.microsemi.com/products/fpga-soc/fpga-and-soc.

Kan si Ile-iṣẹ Atilẹyin Imọ-ẹrọ Onibara
Awọn onimọ-ẹrọ ti o ni oye ga julọ oṣiṣẹ Ile-iṣẹ Atilẹyin Imọ-ẹrọ. Ile-iṣẹ Atilẹyin Imọ-ẹrọ le kan si nipasẹ imeeli tabi nipasẹ Microsemi SoC Products Group webojula.

Imeeli
O le ṣe ibasọrọ awọn ibeere imọ-ẹrọ rẹ si adirẹsi imeeli wa ati gba awọn idahun pada nipasẹ imeeli, fax, tabi foonu. Paapaa, ti o ba ni awọn iṣoro apẹrẹ, o le imeeli apẹrẹ rẹ files lati gba iranlọwọ. A nigbagbogbo bojuto awọn iroyin imeeli jakejado awọn ọjọ. Nigbati o ba nfi ibeere rẹ ranṣẹ si wa, jọwọ rii daju pe o ni orukọ kikun rẹ, orukọ ile-iṣẹ, ati alaye olubasọrọ rẹ fun ṣiṣe daradara ti ibeere rẹ.
Adirẹsi imeeli atilẹyin imọ-ẹrọ jẹ soc_tech@microsemi.com.

Awọn ọran Mi
Awọn alabara Ẹgbẹ Awọn ọja Microsemi SoC le fi silẹ ati tọpa awọn ọran imọ-ẹrọ lori ayelujara nipa lilọ si Awọn ọran Mi.

Ita awọn US
Awọn alabara ti o nilo iranlọwọ ni ita awọn agbegbe akoko AMẸRIKA le kan si atilẹyin imọ-ẹrọ nipasẹ imeeli (soc_tech@microsemi.com) tabi kan si ọfiisi tita agbegbe kan. Ṣabẹwo Nipa Wa fun awọn atokọ ọfiisi tita ati awọn olubasọrọ ajọ.

ITAR Imọ Support
Fun atilẹyin imọ ẹrọ lori awọn RH ati RT FPGA ti o jẹ ilana nipasẹ International Traffic in Arms Regulations (ITAR), kan si wa nipasẹ soc_tech@microsemi.com. Ni omiiran, laarin Awọn ọran Mi, yan Bẹẹni ninu atokọ jabọ-silẹ ITAR. Fun atokọ pipe ti Awọn FPGA Microsemi ti ITAR ti ṣe ilana, ṣabẹwo si ITAR web oju-iwe.

Ile-iṣẹ Ile-iṣẹ Microsemi
Idawọle kan, Aliso Viejo,
CA 92656 AMẸRIKA
Laarin AMẸRIKA: +1 (800)
713-4113 Ita awọn
USA: +1 949-380-6100
Tita: +1 949-380-6136
Faksi: +1 949-215-4996
Imeeli: sales.support@microsemi.com
© 2016 Microsemi Corporation.
Gbogbo awọn ẹtọ wa ni ipamọ. Microsemi ati aami Microsemi jẹ aami-iṣowo ti Microsemi Corporation.
Gbogbo awọn aami-išowo miiran ati awọn ami iṣẹ jẹ ohun-ini awọn oniwun wọn.

Microsemi Corporation (Nasdaq: MSCC) nfunni ni akojọpọ okeerẹ ti semikondokito ati awọn solusan eto fun awọn ibaraẹnisọrọ, aabo & aabo, afẹfẹ ati awọn ọja ile-iṣẹ. Awọn ọja pẹlu iṣẹ-giga ati ipanilara-lile afọwọṣe idapọ-ifihan agbara iṣọpọ awọn iyika, FPGAs, SoCs ati ASICs; awọn ọja iṣakoso agbara; akoko ati awọn ẹrọ amuṣiṣẹpọ ati awọn ojutu akoko deede, ṣeto ipilẹ agbaye fun akoko; awọn ẹrọ ṣiṣe ohun; Awọn solusan RF; ọtọ irinše; ibi ipamọ ile-iṣẹ ati awọn solusan ibaraẹnisọrọ, awọn imọ-ẹrọ aabo ati anti-t ti iwọnamper awọn ọja; Awọn solusan Ethernet; Agbara-lori-Ethernet ICs ati awọn agbedemeji; bi daradara bi aṣa oniru agbara ati awọn iṣẹ. Microsemi wa ni ile-iṣẹ ni Aliso Viejo, Calif, ati pe o ni awọn oṣiṣẹ 4,800 ni agbaye. Kọ ẹkọ diẹ sii ni www.microsemi.com.

Microsemi ko ṣe atilẹyin ọja, aṣoju, tabi iṣeduro nipa alaye ti o wa ninu rẹ tabi ibamu ti awọn ọja ati iṣẹ rẹ fun eyikeyi idi kan, tabi Microsemi ko gba eyikeyi gbese ohunkohun ti o waye lati inu ohun elo tabi lilo eyikeyi ọja tabi Circuit. Awọn ọja ti o ta ni isalẹ ati eyikeyi awọn ọja miiran ti o ta nipasẹ Microsemi ti wa labẹ idanwo to lopin ati pe ko yẹ ki o lo ni apapo pẹlu awọn ohun elo pataki-pataki tabi awọn ohun elo. Eyikeyi awọn pato iṣẹ ṣiṣe ni a gbagbọ pe o gbẹkẹle ṣugbọn ko rii daju, ati Olura gbọdọ ṣe ati pari gbogbo iṣẹ ati idanwo miiran ti awọn ọja, nikan ati papọ pẹlu, tabi fi sori ẹrọ ni, eyikeyi awọn ọja-ipari. Olura ko le gbarale eyikeyi data ati awọn pato iṣẹ tabi awọn aye ti a pese nipasẹ Microsemi. O jẹ ojuṣe Olura lati pinnu ni ominira ti ibamu ti awọn ọja eyikeyi ati lati ṣe idanwo ati rii daju kanna. Alaye ti o pese nipasẹ Microsemi nibi ni a pese “bi o ti jẹ, nibo ni” ati pẹlu gbogbo awọn aṣiṣe, ati pe gbogbo eewu ti o ni nkan ṣe pẹlu iru alaye jẹ patapata pẹlu Olura. Microsemi ko funni, ni gbangba tabi ni aiṣedeede, si eyikeyi ẹgbẹ eyikeyi awọn ẹtọ itọsi, awọn iwe-aṣẹ, tabi eyikeyi awọn ẹtọ IP eyikeyi, boya pẹlu iyi si iru alaye funrararẹ tabi ohunkohun ti a ṣalaye nipasẹ iru alaye. Alaye ti a pese ninu iwe yii jẹ ohun-ini si Microsemi, ati pe Microsemi ni ẹtọ lati ṣe eyikeyi awọn ayipada si alaye ninu iwe yii tabi si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi.

Awọn iwe aṣẹ / Awọn orisun

Microsemi SmartFusion2 SoC FPGA Code Shadowing lati SPI Flash to DDR Memory [pdf] Afọwọkọ eni SmartFusion2 SoC FPGA Code Shadowing lati SPI Flash si DDR Memory, SmartFusion2 SoC, FPGA Code Shadowing lati SPI Flash to DDR Memory, Filaṣi si DDR Memory

Awọn itọkasi

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