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Fa'aoga Taialaintel Fronthaul Compression FPGA IP

Fronthaul Compression FPGA IP

Fronthaul Compression Intel® FPGA IP User Guide
Fa'afou mo Intel® Quartus® Prime
Design Suite: 21.4 IP
Fa'aliliuga: 1.0.1

E uiga i le Fronthaul Compression Intel® FPGA IP

O le Fronthaul Compression IP e aofia ai le faʻamalosi ma le faʻaleagaina mo faʻamatalaga U-vaalele IQ. E fa'atatau e le afi fa'amalosi le µ-law po'o le poloka poloka fa'a'ave'aveina fa'amaufa'ailoga e fa'atatau i luga o fa'amatalaga fa'apipi'i fa'amaumauga (udCompHdr). O lenei IP o loʻo faʻaogaina le Avalon streaming interface mo faʻamatalaga IQ, faʻailoga o le alalaupapa, ma mo metadata ma faʻailoga pito i tua, ma Avalon faʻafanua faʻafanua mo le puleaina ma le resitalaina o tulaga (CSRs).
O fa'afanua IP o lo'o fa'apipi'iina IQs ma le fa'amaufa'ailoga o fa'amaumauga a le tagata fa'aoga (udCompParam) e tusa ai ma le fa'atulagaina o le fa'atulagaga o le uta o le vaega o lo'o fa'amaonia i le fa'amatalaga O-RAN O-RAN Fronthaul Control, User and Synchronization Plane Version 3.0 Aperila 2020 (O-RAN-WG4.CUS .0-v03.00). Avalon streaming sink ma punaoa faʻamatalaga lautele lautele o le 128-bits mo le faʻaoga faʻaoga ma 64 bits mo le felauaiga felauaiga e lagolago ai le maualuga compressoin ratio o le 2:1.
Fa'amatalaga Fa'atatau
O-RAN webnofoaga
1.1. Fronthaul Compression Intel® FPGA IP Features

  • -tulafono ma poloka opeopea-point compression ma decompression
  • IQ lautele 8-bit i le 16-bit
  • Fa'atonuga ma le malosi o le fa'asologa o le U-vaalele IQ ma le fa'aulu fa'apipi'i
  • Pepa vaega tele (pe afai o lo'o ola le O-RAN)

1.2. Fronthaul Compression Intel® FPGA IP Device Support Family
O lo'o ofoina atu e Intel ia tulaga lagolago mo masini mo Intel FPGA IP:

  • Lagolago muamua-o loʻo avanoa le IP mo faʻataʻitaʻiga ma tuʻufaʻatasiga mo lenei aiga masini. polokalame FPGA file (.pof) lagolago e le o avanoa mo Quartus Prime Pro Stratix 10 Edition Beta software ma o lea e le mafai ona faʻamaonia le tapunia o taimi IP. O fa'ata'ita'iga taimi e aofia ai fa'amatalaga fa'ainisinia muamua o fa'atuai e fa'atatau i fa'amatalaga vave pe a uma le fa'atulagaina. O fa'ata'ita'iga o taimi e mafai ona suia a'o fa'aleleia atili e le su'ega silicon le fa'amaopoopo i le va o le silikoni moni ma fa'ata'ita'iga taimi. E mafai ona e fa'aogaina lenei IP autu mo su'esu'ega fa'akomepiuta ma le fa'aogaina o puna'oa, fa'ata'ita'iga, pinout, su'esu'ega o le latency system, su'esu'ega taimi fa'avae (paipa fa'asoa tupe), ma le fuafuaga fa'aliliu I/O (lautele o fa'amaumauga, loloto le loloto, fefa'ataua'iga tulaga I/O. ).
  • Lagolago muamua-Intel faʻamaonia le IP autu ma faʻataʻitaʻiga taimi muamua mo lenei aiga masini. O le IP autu e faʻamalieina manaʻoga uma, ae atonu o loʻo faʻaauau pea suʻesuʻega taimi mo le aiga masini. E mafai ona e faʻaaogaina i mamanu gaosiga ma le faʻaeteete.
  • Lagolago mulimuli-E faʻamaonia e Intel le IP ma faʻataʻitaʻiga taimi mulimuli mo lenei aiga masini. O le IP e fetaui uma galuega ma taimi manaʻomia mo le aiga masini. E mafai ona e faʻaaogaina i mamanu gaosiga.

Laulau 1. Fronthaul Compression IP Device Support Family

Aiga masini Lagolago
Intel® Agilex™ (E-tile) Muamua
Intel Agilex (F-tile) Agai i luma
Intel Arria® 10 Mulimuli
Intel Stratix® 10 (Na'o masini H-, ma E-tile) Mulimuli
Isi aiga masini Leai se lagolago

Laulau 2. Fa'ailoga Saosaoa e Lagolagoina Masini

Aiga masini Vasega Saosaoa o Ie FPGA
Intel Agilex 3
Intel Arria 10 2
Intel Stratix 10 2

1.3. Fa'amatalaga Fa'amatalaga mo le Fronthaul Compression Intel FPGA IP
Intel FPGA IP versions e fetaui ma le Intel Quartus® Prime Design Suite versions software seia oo i le v19.1. Amata ile Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP o loʻo iai se polokalame faʻaliliu fou.
Ole numera ole Intel FPGA IP (XYZ) e mafai ona suia ile Intel Quartus Prime software version. Se suiga i:

  • X o loʻo faʻaalia se toe iloiloga tele o le IP. Afai e te faʻafouina le polokalama Intel Quartus Prime, e tatau ona e toe faʻafouina le IP.
  • Y faʻaalia le IP e aofia ai foliga fou. Toe fa'afouina lau IP e fa'aofi ai nei foliga fou.
  • O le Z o loʻo faʻaalia ai le IP e aofia ai suiga laiti. Toe fa'afouina lau IP e fa'aofi ai nei suiga.

Laulau 3. Fronthaul Compression IP Release Information

Aitema Fa'amatalaga
Fa'aliliuga 1.0.1
Aso fa'amalolo Fepuari 2022
Fa'atonu code IP-FH-COMP

1.4. Fronthaul Compression Performance ma le Fa'aogaina o Punaoa
O punaoa o le IP o loʻo tulimataʻia se masini Intel Agilex, Intel Arria 10 masini, ma le Intel Stratix 10 masini.
Fuafuaga 4. Faiga Fa'apipi'i Fronthaul ma Fa'aoga Punaoa
O fa'amaumauga uma e mo le fa'amalosi ma le decompression fa'amatalaga fa'amatalaga IP

Meafaigaluega IP ALM Resitala fa'atatau M20K
  Peraimeri Lua
Intel Agilex Poloka-opeopea nofoaga 14,969 25,689 6,093 0
µ-tulafono 22,704 39,078 7,896 0
Poloka-opeopea ma µ-tulafono 23,739 41,447 8,722 0
Poloka-opeopea vaega, µ-tulafono, ma le lautele lautele IQ 23,928 41,438 8,633 0
Intel Arria 10 Poloka-opeopea nofoaga 12,403 16,156 5,228 0
µ-tulafono 18,606 23,617 5,886 0
Poloka-opeopea ma µ-tulafono 19,538 24,650 6,140 0
Poloka-opeopea vaega, µ-tulafono, ma le lautele lautele IQ 19,675 24,668 6,141 0
Intel Stratix 10 Poloka-opeopea nofoaga 16,852 30,548 7,265 0
µ-tulafono 24,528 44,325 8,080 0
Poloka-opeopea ma µ-tulafono 25,690 47,357 8,858 0
Poloka-opeopea vaega, µ-tulafono, ma le lautele lautele IQ 25,897 47,289 8,559 0

Amata i le Fronthaul Compression Intel FPGA IP

Faʻamatalaina le faʻapipiʻiina, faʻavasegaina, faʻataʻitaʻiga, ma le amataina o le Fronthaul Compression IP.
2.1. Mauaina, Fa'apipi'i, ma Laiseneina ole Fronthaul Compression IP
O le Fronthaul Compression IP o se Intel FPGA IP faʻalautele e le o aofia ai ma le Intel Quartus Prime faʻamalolo.

  1. Fausia se My Intel account pe afai e leai sau.
  2. Ulufale e maua ai le Self-Service Licensing Center (SSLC).
  3. Fa'atau le Fronthaul Compression IP.
  4. I luga o le SSLC itulau, kiliki Run mo le IP. O le SSLC e tuʻuina atu se pusa faʻasalalauga faʻapipiʻi e taʻitaʻia ai lau faʻapipiʻiina o le IP.
  5. Faʻapipiʻi i le nofoaga tutusa e pei o le Intel Quartus Prime folder.

Laulau 5. Nofoaga Fa'apipi'i Fa'apipi'i i luma

Nofoaga Polokalama Fa'avae
:\intelFPGA_pro\\quartus\ip \altera_cloud Intel Quartus Prime Pro Edition Pupuni *
:/intelFPGA_pro// quartus/ip/altera_cloud Intel Quartus Prime Pro Edition Linux*

Ata 1. Fronthaul Compression IP Fa'apipi'i Fa'atonuga Fa'atonuga Fa'atonuga fa'apipi'i Intel Quartus Prime

intel Fronthaul Compression FPGA IP fig 7
Ole Fronthaul Compression Intel FPGA IP ua aliali mai nei ile IP Catalog.
Fa'amatalaga Fa'atatau

  • Intel FPGA webnofoaga
  • Nofoaga mo Laisene mo le Laisene (SSLC)

2.2. Fa'asalaina ole Fronthaul Compression IP
Fa'anofo vave lau fesuiaiga masani IP ile IP Parameter Editor.

  1. Fausia se poloketi Intel Quartus Prime Pro Edition e tu'ufa'atasia ai lau IP autu.
    a. I le Intel Quartus Prime Pro Edition, kiliki File Fou Project Wizard e fatu ai se poloketi fou Intel Quartus Prime, po'o File Tatala Poloketi e tatala ai se poloketi Quartus Prime. E fa'atonu oe e le wizard e fa'ailoa se masini.
    e. Fa'ailoa mai le aiga masini e fetaui ma tulaga mana'omia o le fa'avavevave mo le IP.
    i. Kiliki Fa'auma.
  2. I le IP Catalog, filifili Fronthaul Compression Intel FPGA IP. Ua aliali mai le fa'amalama New IP Variation.
  3. Fa'ailoa se igoa pito i luga mo lau suiga fou masani IP. E fa'asaoina e le fa'atonu fa'amaufa'ailoga le fa'atulagaina o suiga o le IP ile a file igoa .ip.
  4. Kiliki OK. E aliali mai le fa'atonu fa'amaufa'ailoga.
    intel Fronthaul Compression FPGA IP fig 6Ata 2. Fronthaul Compression IP Parameter Editor
  5. Fa'ama'oti fa'amau mo lau fesuiaiga IP. Va'ai i Parameters mo fa'amatalaga e uiga i fa'ailoga IP patino.
  6. Kiliki le Design Example tab ma faʻamaʻoti faʻamaufaʻailoga mo lau mamanu example.
    intel Fronthaul Compression FPGA IP fig 5Ata 3. Fuafuaga Example Parameter Editor
  7. Kiliki Fausia HDL. O lo'o fa'aalia le Pusa talanoaga o Tupulaga.
  8. Fa'ailoa galuega file filifiliga o tupulaga, ona kiliki lea o le Fausia. Ole fesuiaiga ole IP files fa'atupu e tusa ai ma au fa'amatalaga.
  9. Kiliki Fa'auma. E fa'aopoopo e le fa'atonu fa'amaufa'ailoga le pito i luga .ip file i le galuega o lo'o iai otometi. Afai e uunaia oe e faaopoopo ma le lima le .ip file i le poloketi, kiliki Project Add/Remove Files i Poloketi e fa'aopoopo le file.
  10. A mae'a ona fa'atupu ma fa'anatinati lau fesuiaiga o le IP, fai ni pine talafeagai e fa'afeso'ota'i ports ma fa'atulaga so'o se ta'iala RTL talafeagai.

2.2.1. Fronthaul Compression IP Parameter
Laulau 6. Fronthaul Compression IP Parameters

Igoa Tulaga Taua

Fa'amatalaga

Fa'atonuga o fa'amaumauga TX ma RX, TX naʻo, RX naʻo Filifili TX mo le faʻamalosi; RX mo le decompression.
Auala fa'amalosi BFP, mu-Law, poʻo le BFP ma le mu-Law Filifili poloka poloka opeopea, µ-tulafono, poʻo mea uma e lua.
Metadata lautele 0 (Tape Metadata Taulaga), 32, 64, 96, 128 (bit) Fa'ailoa mai le si'osi'omaga o le pasi metadata (fa'amaumauga e le'i fa'amauina).
Fa'ataga le lautele IQ fa'alautele Ki pe pe Fa'aola mo le IqWidth lagolago o le 8-bit i le 16-bit.
Tape mo le IqWidth lagolago o le 9, 12, 14 ma le 16-bits.
O-RAN tausisia Ki pe pe Ki'i e mulimuli i fa'afanua ORAN IP mo metadata uafu ma fa'amautu metadata fa'ailo aoga mo ulutala vaega ta'itasi. O le IP e lagolagoina na'o metadata lautele 128-bit. E lagolagoina e le IP le vaega e tasi ma le tele o vaega i le pusa. Metadata e aoga i vaega taʻitasi ma metadata faʻamaonia faʻamaonia.
Tape ina ia fa'aoga e le IP metadata e fai ma fa'ailoga alalaupapa e aunoa ma se fa'afanua mana'omia (fa'ata'ita'iga: U-vaalele numPrb ua fa'apea 0). E lagolagoina e le IP le lautele o metadata o le 0 (Fa'agata Metadata Ports), 32, 64, 96, 128 bits. E lagolagoina e le IP se vaega e tasi ile pusa. Metadata e na'o le tasi le aoga i le metadata faʻamaonia faʻamaonia mo pepa taʻitasi.

2.3. Fausia IP File Fauga
O le polokalama Intel Quartus Prime Pro Edition e fa'atupuina ai le fa'auluuluga o le IP file fausaga.
Laulau 7. Fausia IP Files

File Igoa

Fa'amatalaga

<lau_ip>.ip Le fa'atulagaina o le Platform Designer po'o le suiga maualuga o le IP file.lau_ip> o le igoa lea e te tu'uina atu ai lau fesuiaiga IP.
<lau_ip>.cmp Le VHDL Component Declaration (.cmp) file ose tusitusiga file o lo'o iai fa'amatalaga fa'alotoifale ma fa'auigaga e mafai ona e fa'aogaina ile VHDL design files.
<lau_ip>.html O se lipoti o loʻo i ai faʻamatalaga fesoʻotaʻiga, o se faʻafanua manatua e faʻaalia ai le tuatusi o pologa taʻitasi e faʻatatau i matai taʻitasi e fesoʻotaʻi i ai, ma tofitofiga.
<lau_ip>_tupulaga.rpt IP po'o le Platform Designer generation log file. O se aotelega o fe'au i le taimi o le fausiaina o IP.
<lau_ip>.qgsimc Lisi fa'ata'ita'iga fa'ata'ita'iga e lagolago ai le fa'atupuina fa'aopoopo.
<lau_ip>.qgsynthc Lisi fa'asologa fa'aopoopo e lagolago ai le fa'atupuina fa'aopoopo.
<lau_ip>.qip O loʻo i ai faʻamatalaga manaʻomia uma e uiga i le vaega IP e tuʻufaʻatasia ma tuʻufaʻatasia le vaega IP i le polokalama Intel Quartus Prime.
<lau_ip>.sopcinfo Fa'amatala feso'ota'iga ma fa'aputuga vaega o le IP i totonu o lau fa'atulagaina o le Platform Designer. E mafai ona e fa'avasegaina mea o lo'o i totonu e maua ai mana'oga pe a e atia'e masini komepiuta mo vaega IP.
Meafaigaluega pito i lalo e pei o le Nios® II mea faigaluega filifili fa'aoga lenei file. O le .sopcinfo file ma le faiga.h file gaosia mo le filifili meafaigaluega Nios II e aofia ai faʻamatalaga faʻafanua tuatusi mo pologa taʻitasi e fesoʻotaʻi ma matai taʻitasi e maua le pologa. E eseese matai e ono iai se faafanua ese o tuatusi e maua ai se vaega o pologa.
<lau_ip>.csv O loʻo i ai faʻamatalaga e uiga i le faʻaleleia tulaga o le vaega IP.
<lau_ip>.bsf O se Faailoga Poloka File (.bsf) fa'atusa o le fesuiaiga o le IP mo le fa'aoga ile Intel Quartus Prime Block Diagram Files (.bdf).
<lau_ip>.spd Manaomia fa'aoga file mo ip-make-simscript e faʻatupu ai faʻataʻitaʻiga tusitusiga mo simulators lagolagoina. O le .spd file o lo'o i ai se lisi o files gaosia mo faʻataʻitaʻiga, faʻatasi ai ma faʻamatalaga e uiga i manatuaga e mafai ona e amataina.
<lau_ip>.ppf Le Fuafuaga Pin File (.ppf) teu le uafu ma node tofitofiga mo vaega IP na faia mo le faaaogaina ma le Fuafuaga Pin.
<lau_ip>_bb.v E mafai ona e fa'aogaina le Verilog black-box (_bb.v) file e pei o se ta'utinoga module gaogao mo le fa'aoga o se pusa uliuli.
<lau_ip>_inst.v po'o le _inst.vhd HDL example faʻataʻitaʻiga faʻataʻitaʻiga. E mafai ona e kopi ma faapipii mea o loʻo i totonu o lenei mea file i lau HDL file e faʻaalia le suiga o le IP.
<lau_ip>.v pelau_ip>.vhd HDL files e fa'apena fa'ata'ita'i ta'iala ta'itasi po'o le tamaititi IP autu mo le tu'ufa'atasiga po'o le fa'ata'ita'iga.
faufautua/ O lo'o iai se fa'ata'ita'iga ModelSim* msim_setup.tcl e fa'atutu ma fa'atino se fa'ata'ita'iga.
synopsys/vcs/ synopsys/vcsmx/ O lo'o iai se atigi script vcs_setup.sh e fa'atutu ma fa'atino se VCS* fa'ata'ita'iga.
O lo'o iai se atigi tusitusiga vcsmx_setup.sh ma synopsys_ sim.setup file e fa'atutu ma fa'atino se fa'ata'ita'iga VCS MX*.
fa'alogona/ O lo'o iai se atigi tusitusiga ncsim_setup.sh ma isi seti files e fa'atutu ma fa'atino se fa'ata'ita'iga NCSIM*.
aldec/ O lo'o iai se atigi tusitusiga rivierapro_setup.sh e fa'atulaga ma fa'agasolo ai se fa'ata'ita'iga Aldec*.
xcelium/ O lo'o iai se atigi tusitusiga xcelium_setup.sh ma isi seti files e fa'atutu ma fa'atino se fa'ata'ita'iga Xcelium*.
submodules/ E iai le HDL files mo submodules autu IP.
<tamaiti IP cores>/ Mo fa'atonuga autu ole IP a tamaiti, e fa'atupuina e le Platform Designer synth/ma le sim/sub-directories.

Fronthaul Compression IP Fa'amatalaga Fa'atino

Ata 4. O le Fronthaul Compression IP e aofia ai le faʻamalosi ma le faʻamalo. Fronthaul Compression IP Block Diagramintel Fronthaul Compression FPGA IP fig 4

Compression ma Decompression
O se poloka poloka e fa'atatau i le fa'agaoioiga e fa'atupuina le suiga sili ona lelei mo se poloka puna'oa e 12 elemene puna'oa (REs). O le poloka e faʻaitiitia ai le paʻu tele, aemaise lava mo le maualalo.amplitu samples. O le mea lea, e faʻaitiitia ai le tele o le vector magnitude (EVM) lea e faʻapipiʻi ai. O le algorithm compression e toetoe lava a tutoatasi mai le tau o le mana. Fa'apea ole fa'aoga lavelave samples o le x = x1 + jxQ, o le maualuga maualuga o le tau o vaega moni ma mafaufauga mo le poloka punaoa o le:
intel Fronthaul Compression FPGA IP fig 3O le i ai o le tau maualuga maualuga mo le poloka punaoa, o le faʻatusatusaga o loʻo i lalo e fuafua ai le tau o le suiga agavale ua tuʻuina atu i lena poloka punaoa:intel Fronthaul Compression FPGA IP fig 2O le bitWidth o le lautele o le fa'aoga.
O le IP e lagolagoina fua fa'atatau o le 8, 9, 10, 11, 12, 13, 14, 15, 16.
Mu-Law Compression ma Decompression
O lo'o fa'aogaina e le algorithm le metotia fa'atusatusaina o le Mu-law, lea e fa'aoga lautele ai le fa'amalosi tautala. O lenei metotia e pasi atu ai le fa'ailoga e le'i fa'apipi'iina, x, e ala i se compressor o lo'o iai le galuega, f(x), a'o le'i fa'ata'amilomilo ma tipi-truncation. O le metotia e auina atu faʻamaumauga faʻapipiʻi, y, i luga o le faʻaoga. O fa'amatalaga na maua e pasi atu i se galuega fa'alauteleina (o le fa'afeagai lea o le compressor, F-1(y).
Fa'ata'ita'iga 1. O galuega fa'apipi'i ma decompressor
intel Fronthaul Compression FPGA IP fig 1O le Mu-law IQ compression algorithm e mulimuli i le O-RAN faʻamatalaga.
Fa'amatalaga Fa'atatau
O-RAN webnofoaga
3.1. Fronthaul Compression IP faailoilo
Faʻafesoʻotaʻi ma pulea le IP.
Uati ma Toe Toe Fa'ailoga Fa'ailoga =
Laulau 8. Uati ma Toe Toe Fa'ailoga Fa'ailoga

Igoa Faailoga Bitwidth Fa'atonuga

Fa'amatalaga

tx_clk 1 Ulufale Uati transmitter.
Ole taimi ole uati ole 390.625 MHz mo le 25 Gbps ma le 156.25MHz mo le 10 Gbps. O fa'ailoga uma o feso'ota'iga feso'ota'iga e feso'ota'i ma lenei uati.
rx_clk 1 Ulufale Uati talia.
Ole taimi ole uati ole 390.625 MHz mo le 25 Gbps ma le 156.25MHz mo le 10 Gbps. O fa'ailoga uma o feso'ota'iga e tali atu e fa'atasi ma lenei uati.
csr_clk 1 Ulufale Uati mo le CSR interface. Ole taimi ole uati ole 100 MHz.
tx_rst_n 1 Ulufale Toe fa'aagaioia maualalo mo feso'ota'iga feso'ota'iga feso'ota'i ma tx_clk.
rx_rst_n 1 Ulufale Toe setiina maualalo gaogao mo le tali fa'afeso'ota'i fa'atasi ma rx_clk.
csr_rst_n 1 Ulufale Toe fa'aleleia maualalo mo le CSR feso'ota'iga fa'atasi i le csr_clk.

Fa'asalalau Fa'ailoga Fa'afeso'ota'i
Laulau 9. Fa'asalalauina Fa'ailoga Fa'afeso'ota'i
O ituaiga faailo uma e le'i fa'ailogaina.

Igoa Faailoga

Bitwidth Fa'atonuga

Fa'amatalaga

tx_avst_source_valid 1 Tuuina atu Pe a fa'ailoa mai, fa'ailoa mai o lo'o maua fa'amatalaga aoga ile avst_source_data.
tx_avst_source_data 64 Tuuina atu PRB fanua e aofia ai udCompParam, iSample ma qSample. O lo'o tu'ufa'atasia vaega ole vaega ole PRB ile vaega muamua ole fanua PRB.
tx_avst_source_startofpacket 1 Tuuina atu Fa'ailoa le paita muamua o se fa'avaa.
tx_avst_source_endofpacket 1 Tuuina atu Fa'ailoaina le pa'i mulimuli o se fa'avaa.
tx_avst_source_ready 1 Ulufale Pe a fa'amaonia, fa'ailoa mai ua sauni le vaega o felauaiga e talia fa'amaumauga. readyLatency = 0 mo lenei atinaʻe.
tx_avst_source_empty 3 Tuuina atu Fa'ailoa mai le aofa'i o bytes gaogao i luga o avst_source_data pe a fa'ailoa avst_source_endofpacket.
tx_udcomphdr_o 8 Tuuina atu Fa'auluulu fa'amau fa'amaumauga a tagata. Fa'atasi ma tx_avst_source_valid.
Fa'amatala le auala fa'amalosi ma le lautele o le IQ
mo faʻamatalaga faʻaoga i se vaega faʻamatalaga.
• [7:4] : udIqWidth
• 16 mo ​​le udIqWidth=0, a leai e tutusa ma le udIqWidth e,g,:
— 0000b o lona uiga o le I ma le Q e ta'i 16 bits le lautele;
— 0001b o lona uiga o le I ma le Q e ta'i 1 bit le lautele;
— 1111b o lona uiga o le I ma le Q e ta'i 15 bits le lautele
• [3:0] : udCompMeth
- 0000b - leai se faʻamalosi
— 0001b – poloka-opeopea nofoaga
— 0011b – µ-tulafono
- isi - fa'aagaga mo metotia i le lumana'i.
tx_metadata_o METADATA_WIDTH Tuuina atu E fa'ailoa mai ai le alavai ma e le fa'apipi'i.
Fa'atasi ma tx_avst_source_valid. E mafai ona fetuutuunai bitwidth METADATA_WIDTH.
A e ki O-RAN tausisia, faasino i Laulau 13 i le itulau e 17. Pe a e tape O-RAN tausisia, o lenei faailo e naʻo le aoga pe a tx_avst_source_startofpacket e 1. tx_metadata_o e leai se faʻailoga aoga ma faʻaaoga le tx_avst_source_valid e faʻaalia ai le taamilosaga aoga.
E le avanoa pe a e filifilia 0 Fa'agata Taulaga Metadata mo Metadata lautele.

Maua Fa'ailoga Fa'asinoala Femalagaa'i
Fuafuaga 10. Maua Fa'ailoga Fa'afeso'ota'i Va'aiga
Leai se backpressure i lenei fa'aoga. Avalon e tafe mai ai faailo gaogao e le mana'omia i lenei atina'e aua e leai lava.

Igoa Faailoga Bitwidth Fa'atonuga

Fa'amatalaga

rx_avst_sink_valid 1 Ulufale Pe a faʻamaonia, faʻaalia faʻamatalaga aoga o loʻo avanoa ile avst_sink_data.
Leai se fa'ailoga avst_sink_ready i lenei fa'aoga.
rx_avst_sink_data 64 Ulufale PRB fanua e aofia ai udCompParam, iSample ma qSample. O lo'o tu'ufa'atasia vaega ole vaega ole PRB ile vaega muamua ole fanua PRB.
rx_avst_sink_startofpacket 1 Ulufale Fa'ailoa le paita muamua o se fa'avaa.
rx_avst_sink_endofpacket 1 Ulufale Fa'ailoaina le pa'i mulimuli o se fa'avaa.
rx_avst_sink_error 1 Ulufale A faʻamaonia i le taamilosaga tutusa e pei o le avst_sink_endofpacket, e faʻaalia ai le pusa o loʻo i ai nei o se pusa sese
rx_udcomphdr_i 8 Ulufale Fa'auluulu fa'amau fa'amaumauga a tagata. Fa'atasi ma rx_metadata_valid_i.
Fa'amatala le auala fa'apipi'i ma le IQ bit lautele mo fa'amatalaga fa'aoga i totonu o se vaega fa'amaumauga.
• [7:4] : udIqWidth
• 16 mo ​​udIqWidth=0, a leai e tutusa ma udIqWidth. eg
— 0000b o lona uiga o le I ma le Q e ta'i 16 bits le lautele;
— 0001b o lona uiga o le I ma le Q e ta'i 1 bit le lautele;
— 1111b o lona uiga o le I ma le Q e ta'i 15 bits le lautele
• [3:0] : udCompMeth
- 0000b - leai se faʻamalosi
— 0001b – poloka poloka opeopea
— 0011b – µ-tulafono
- isi - fa'aagaga mo metotia i le lumana'i.
rx_metadata_i METADATA_WIDTH Ulufale Fa'ailoga alavai e le'i fa'apipi'iina.
rx_metadata_i fa'ailoga e aoga pe a fa'amaonia rx_metadata_valid_i, fa'atasi ma rx_avst_sink_valid.
E mafai ona fetuutuunai bitwidth METADATA_WIDTH.
A e ki O-RAN tausisia, faasino i Laupapa 15 i le itulau 18.
A e tape O-RAN tausisia, o lenei rx_metadata_i faailo e na'o le aoga pe a tutusa uma le rx_metadata_valid_i ma le rx_avst_sink_startofpacket i le 1. E le maua pe a e filifilia 0 Fa'agata Taulaga Metadata mo Metadata lautele.
rx_metadata_valid_i 1 Ulufale Fa'ailoa mai o ulutala (rx_udcomphdr_i ma rx_metadata_i) e aoga. Fa'atasi ma le rx_avst_sink_valid. Fa'ailoga fa'amalosi. Mo le feso'ota'iga i tua O-RAN, fa'ailoa le rx_metadata_valid_i pe afai o le IP o lo'o iai fa'aulutala masani masani IE ma toe fai vaega IEs. I le tu'uina atu o vaega fou poloka punaoa fa'aletino (PRB) fanua i rx_avst_sink_data, saunia vaega fou IEs i rx_metadata_i fa'aoga fa'atasi ma rx_metadata_valid_i.

Fa'asalalau Fa'ailoga Fa'amatalaga Fa'aaogā
Fuafuaga 11. Fa'asalalau Fa'ailoga Fa'amatalaga Fa'aaogā

Igoa Faailoga

Bitwidth Fa'atonuga

Fa'amatalaga

tx_avst_sink_valid 1 Ulufale Pe a fa'ailoa mai, fa'ailoa mai o lo'o avanoa avanoa PRB i lenei fa'aoga.
Pe a fa'agaioi i le fa'agasolo ala, fa'amautinoa e leai se fa'ailo fa'amanino i le va o le amataga o le ato ma le fa'ai'uga o le pepa.
tx_avst_sink_data 128 Ulufale Fa'amatalaga mai le fa'asologa o talosaga ile fa'asologa o feso'ota'iga byte.
tx_avst_sink_startofpacket 1 Ulufale Fa'ailoa le PRB byte muamua o se afifi
tx_avst_sink_endofpacket 1 Ulufale Fa'ailoa le PRB byte mulimuli o se afifi
tx_avst_sink_ready 1 Tuuina atu Pe a faʻamaonia, faʻaalia le O-RAN IP ua sauni e talia faʻamatalaga mai le faʻaoga faʻaoga. readyLatency = 0 mo lenei atinaʻe
tx_udcomphdr_i 8 Ulufale Fa'auluulu fa'amau fa'amaumauga a tagata. Fa'atasi ma tx_avst_sink_valid.
Fa'amatala le auala fa'apipi'i ma le IQ bit lautele mo fa'amatalaga fa'aoga i totonu o se vaega fa'amaumauga.
• [7:4] : udIqWidth
• 16 mo ​​udIqWidth=0, a leai e tutusa ma udIqWidth. eg
— 0000b o lona uiga o le I ma le Q e ta'i 16 bits le lautele;
— 0001b o lona uiga o le I ma le Q e ta'i 1 bit le lautele;
— 1111b o lona uiga o le I ma le Q e ta'i 15 bits le lautele
• [3:0] : udCompMeth
- 0000b - leai se faʻamalosi
— 0001b – poloka-opeopea nofoaga
— 0011b – µ-tulafono
- isi - fa'aagaga mo metotia i le lumana'i.
tx_metadata_i METADATA_WIDTH Ulufale E fa'ailoa mai ai le alavai ma e le fa'apipi'i. Fa'atasi ma tx_avst_sink_valid.
E mafai ona fetuutuunai bitwidth METADATA_WIDTH.
A e ki O-RAN tausisia, faasino i Laupapa 13 i le itulau 17.
A e tape O-RAN tausisia, e na'o le aoga lenei faailo pe a tutusa le tx_avst_sink_startofpacket ma le 1.
tx_metadata_i e leai se fa'ailoga aoga ma fa'aoga
tx_avst_sink_valid e faailoa ai le taamilosaga aoga.
E le avanoa pe a e filifilia 0 Fa'agata Taulaga Metadata mo Metadata lautele.

Maua Fa'ailoga Fa'amatalaga Fa'aaogā
Laulau 12. Maua Fa'ailoga Fa'amatalaga Fa'aaogā

Igoa Faailoga

Bitwidth Fa'atonuga

Fa'amatalaga

rx_avst_source_valid 1 Tuuina atu Pe a fa'ailoa mai, fa'ailoa mai o lo'o avanoa avanoa PRB i lenei fa'aoga.
Leai se fa'ailoga avst_source_ready i lenei fa'aoga.
rx_avst_source_data 128 Tuuina atu Fa'amatalaga i le fa'asologa o talosaga ile fa'asologa o feso'ota'iga byte.
rx_avst_source_startofpacket 1 Tuuina atu Fa'ailoa mai le PRB byte muamua o se afifi
rx_avst_source_endofpacket 1 Tuuina atu Fa'ailoa le PRB byte mulimuli o se afifi
rx_avst_source_error 1 Tuuina atu Fa'ailoa mai o lo'o i ai fa'aletonu le afifi
rx_udcomphdr_o 8 Tuuina atu Fa'auluulu fa'amau fa'amaumauga a tagata. Fa'atasi ma le rx_avst_source_valid.
Fa'amatala le auala fa'apipi'i ma le IQ bit lautele mo fa'amatalaga fa'aoga i totonu o se vaega fa'amaumauga.
• [7:4] : udIqWidth
• 16 mo ​​udIqWidth=0, a leai e tutusa ma udIqWidth. eg
— 0000b o lona uiga o le I ma le Q e ta'i 16 bits le lautele;
— 0001b o lona uiga o le I ma le Q e ta'i 1 bit le lautele;
— 1111b o lona uiga o le I ma le Q e ta'i 15 bits le lautele
• [3:0] : udCompMeth
- 0000b - leai se faʻamalosi
— 0001b – poloka poloka opeopea (BFP)
— 0011b – µ-tulafono
- isi - fa'aagaga mo metotia i le lumana'i.
rx_metadata_o METADATA_WIDTH Tuuina atu Fa'ailoga alavai e le'i fa'apipi'iina.
rx_metadata_o fa'ailoga e aoga pe a fa'amaonia rx_metadata_valid_o, fa'atasi ma rx_avst_source_valid.
E mafai ona fetuutuunai bitwidth METADATA_WIDTH. A e ki O-RAN tausisia, faasino i Laulau 14 i le itulau 18.
A e tape O-RAN tausisia, rx_metadata_o e na'o le aoga pe a tutusa le rx_metadata_valid_o 1.
E le avanoa pe a e filifilia 0 Fa'agata Taulaga Metadata mo Metadata lautele.
rx_metadata_valid_o 1 Tuuina atu Fa'ailoa mai o ulutala (rx_udcomphdr_o ma
rx_metadata_o) e aoga.
rx_metadata_valid_o o lo'o fa'amaonia pe a aoga le rx_metadata_o, fa'atasi ma le rx_avst_source_valid.

Fa'afanua Metadata mo le O-RAN Fa'asagaga i tua
Laulau 13. tx_metadata_i 128-bit fa'aoga

Igoa Faailoga

Bitwidth Fa'atonuga Fa'amatalaga

Fa'afanua Metadata

Fa'apolopolo 16 Ulufale Fa'apolopolo. tx_metadata_i[127:112]
tx_u_size 16 Ulufale U-vaalele lapo'a pepa i paita mo le fa'aaoso ala. tx_metadata_i[111:96]
tx_u_seq_id 16 Ulufale SeqID o le afifi, lea e maua mai le ulutala felauaiga eCPRI. tx_metadata_i[95:80]
tx_u_pc_id 16 Ulufale PCID mo felauaiga eCPRI ma RoEflowId
mo le leitio i luga ole ethernet (RoE) felauaiga.
tx_metadata_i[79:64]
Fa'apolopolo 4 Ulufale Fa'apolopolo. tx_metadata_i[63:60]
tx_u_dataDirection 1 Ulufale gNB fa'amatalaga fa'amatalaga.
Tulaga tau aogā: {0b=Rx (fa'atusa le tu'uina atu), 1b=Tx (ie la'u mai)}
tx_metadata_i[59]
tx_u_filterIndex 4 Ulufale Fa'amatala se fa'asino i le fa'amama ala e fa'aoga i le va o fa'amatalaga IQ ma le ea.
Va'aiga tau: {0000b-1111b}
tx_metadata_i[58:55]
tx_u_frameId 8 Ulufale Ose fata mo 10 ms faavaa (vaitaimi afifi 2.56 sekone), fa'apitoa frameId= numera fa'avaa modulo 256.
Va'aiga tau: {0000 0000b-1111 1111b}
tx_metadata_i[54:47]
tx_u_subframeId 4 Ulufale Ose fata mo 1 ms subframes i totonu ole 10 ms faavaa. Va'aiga tau: {0000b-1111b} tx_metadata_i[46:43]
tx_u_slotID 6 Ulufale O lenei fa'ailoga o le numera avanoa i totonu o le 1 ms subframe. O avanoa uma i totonu o le subframe e tasi e faitaulia e lenei parakalafa.
Va'aiga tau: {00 0000b-00 1111b=slotID, 01 0000b-11 1111b=Fa'asao}
tx_metadata_i[42:37]
tx_u_symbolid 6 Ulufale Fa'ailoa se numera fa'ailoga i totonu o se avanoa. Va'aiga tau: {00 0000b-11 1111b} tx_metadata_i[36:31]
tx_u_sectionId 12 Ulufale O lo'o fa'afanua e le sectionID vaega o fa'amatalaga U-va'alele i le fe'au C-va'alele (ma le Ituaiga Vaega) e feso'ota'i ma fa'amaumauga.
Va'aiga tau: {0000 0000 0000b-11111111 1111b}
tx_metadata_i[30:19]
tx_u_rb 1 Ulufale Fa'ailoga poloka punaoa.
Fa'ailoa pe fa'aoga uma poloka punaoa po'o isi poloka punaoa uma o lo'o fa'aogaina.
Tulaga tau aogā: {0b=pola puna'oa uma e fa'aogaina; 1b=o isi poloka punaoa uma na faʻaaogaina}
tx_metadata_i[18]
tx_u_startPrb 10 Ulufale Ole PRB amata ole vaega ole va'alele fa'aoga.
Va'aiga tau: {00 0000 0000b-11 1111 1111b}
tx_metadata_i[17:8]
tx_u_numPrb 8 Ulufale Fa'amatala le PRB o lo'o aoga ai le vaega o fa'amatalaga va'alele. tx_metadata_i[7:0]
      Va'aiga tau: {0000 0001b-1111 1111b, 0000 0000b = PRB uma i le va'ava'a fa'ata'ita'i (SCS) ma le fa'asalalauga fa'asalalau }  
tx_u_udCompHdr 8 Ulufale Fa'amatala le auala fa'apipi'i ma le IQ bit lautele o fa'amatalaga fa'aoga i se vaega fa'amaumauga. Va'aiga tau: {0000 0000b-1111 1111b} N/A (tx_udcomphdr_i)

Laulau 14. rx_metadata_valid_i/o

Igoa Faailoga

Bitwidth Fa'atonuga Fa'amatalaga

Fa'afanua Metadata

rx_sec_hdr_valid 1 Tuuina atu A o le rx_sec_hdr_valid o le 1, o le U-vaalele vaega faʻamaumauga e aoga.
E aoga fa'aulutala masani IE pe a fa'ailoa mai le rx_sec_hdr_valid, fa'atasi ma le avst_sink_u_startofpacket ma le avst_sink_u_valid.
E aoga vaega IEs pe a fai le rx_sec_hdr_valid, fa'atasi ma le avst_sink_u_valid.
I le tu'uina atu o vaega fou PRB fanua i avst_sink_u_data, saunia vaega fou IEs ma rx_sec_hdr_valid fa'amaonia.
rx_metadata_valid_o

Laulau 15. rx_metadata_o 128-bit galuega faatino

Igoa Faailoga Bitwidth Fa'atonuga Fa'amatalaga

Fa'afanua Metadata

Fa'apolopolo 32 Tuuina atu Fa'apolopolo. rx_metadata_o[127:96]
rx_u_seq_id 16 Tuuina atu SeqID o le afifi, lea e maua mai le ulutala felauaiga eCPRI. rx_metadata_o[95:80]
rx_u_pc_id 16 Tuuina atu PCID mo eCPRI felauaiga ma RoEflowId mo RoE felauaiga rx_metadata_o[79:64]
fa'apolopolo 4 Tuuina atu Fa'apolopolo. rx_metadata_o[63:60]
rx_u_dataDirection 1 Tuuina atu gNB fa'amatalaga fa'amatalaga. Tulaga tau aogā: {0b=Rx (fa'atusa le tu'uina atu), 1b=Tx (ie la'u mai)} rx_metadata_o[59]
rx_u_filterIndex 4 Tuuina atu Fa'amatala se fa'asino i le fa'amama ala e fa'aoga i le va o fa'amatalaga IQ ma fa'aoga ea.
Va'aiga tau: {0000b-1111b}
rx_metadata_o[58:55]
rx_u_frameId 8 Tuuina atu Ose fata mo fa'avaa 10 ms (vaitaimi afifi 2.56 sekone), fa'apitoa frameId= numera fa'avaa modulo 256. Va'aiga tau: {0000 0000b-1111 1111b} rx_metadata_o[54:47]
rx_u_subframeId 4 Tuuina atu Ose fata mo 1ms subframes i totonu ole 10ms frame. Va'aiga tau: {0000b-1111b} rx_metadata_o[46:43]
rx_u_slotID 6 Tuuina atu Ole numera ole avanoa ile 1ms subframe. O avanoa uma i totonu o le subframe e tasi e faitaulia e lenei parakalafa. Va'aiga tau: {00 0000b-00 1111b=slotID, 01 0000b-111111b=Fa'asao} rx_metadata_o[42:37]
rx_u_symbolid 6 Tuuina atu Fa'ailoa se numera fa'ailoga i totonu o se avanoa.
Va'aiga tau: {00 0000b-11 1111b}
rx_metadata_o[36:31]
rx_u_sectionId 12 Tuuina atu O lo'o fa'afanua e le sectionID vaega o fa'amatalaga U-va'alele i le fe'au C-va'alele (ma le Ituaiga Vaega) e feso'ota'i ma fa'amaumauga.
Va'aiga tau: {0000 0000 0000b-1111 1111 1111b}
rx_metadata_o[30:19]
rx_u_rb 1 Tuuina atu Fa'ailoga poloka punaoa.
Fa'ailoa mai pe fa'aoga poloka uma punaoa po'o isi punaoa uma e fa'aoga.
Tulaga tau aogā: {0b=pola puna'oa uma e fa'aogaina; 1b=o isi poloka punaoa uma na faʻaaogaina}
rx_metadata_o[18]
rx_u_startPrb 10 Tuuina atu Ole PRB amata ole vaega ole va'alele fa'aoga.
Va'aiga tau: {00 0000 0000b-11 1111 1111b}
rx_metadata_o[17:8]
rx_u_numPrb 8 Tuuina atu Fa'amatala le PRB o lo'o aoga ai le vaega o fa'amatalaga va'alele.
Va'aiga tau: {0000 0001b-1111 1111b, 0000 0000b = PRB uma i totonu o le SCS fa'apitoa ma le fa'alava o le fe'avea'i }
rx_metadata_o[7:0]
rx_u_udCompHdr 8 Tuuina atu Fa'amatala le auala fa'apipi'i ma le IQ bit lautele o fa'amatalaga fa'aoga i se vaega fa'amaumauga.
Va'aiga tau: {0000 0000b-1111 1111b}
N/A (rx_udcomphdr_o)

CSR Interface Signals
Laulau 16. CSR Fa'ailoga Fa'asinomaga

Igoa Faailoga Bit Lautele Fa'atonuga

Fa'amatalaga

csr_address 16 Ulufale Tuatusi resitala fa'atulagaina.
csr_tusi 1 Ulufale Fa'atonu tusi resitala mafai.
csr_writedata 32 Ulufale Fa'atonu tusi resitala tusi fa'amaumauga.
csr_readdata 32 Tuuina atu Fa'amatalaga faitau tusi resitala.
csr_read 1 Ulufale Fa'atonu tusi resitala faitau mafai.
csr_readdatavalid 1 Tuuina atu Fa'atonu tusi resitala faitau fa'amatalaga aoga.
csr_waitrequest 1 Tuuina atu Fa'atonu resitala talosaga fa'atali.

Fronthaul Compression IP Resitala

Pulea ma mataʻituina galuega faʻapipiʻi fronthaul e ala i le faʻatonutonuina ma le faʻaogaina o tulaga.
Laulau 17. Resitala Faafanua

CSR_ADDRESS (Word Offset) Resitala Igoa
0x0 compression_mode
0x1 tx_error
0x2 rx_error

Laulau 18. compression_mode Resitala

Bit Lautele Fa'amatalaga Avanoa

HW Toe Seti Tau

31:9 Fa'apolopolo RO 0x0
8:8 Faiga fa'atino:
• O le 1'b0 o le faiga fa'amalosi
• 1'b1 ole faiga fa'amalosi malosi
RW 0x0
7:0 Ulutala fa'apipi'i fa'amaumauga a tagata fa'aoga tumau:
• 7:4 o le udIqWidth
- 4'b0000 o le 16 bits
- 4'b1111 o le 15 bits
— :
- 4'b0001 o le 1 bit
• 3:0 o le udCompMeth
- 4'b0000 e leai se faʻamalosi
— 4'b0001 o le poloka o lo'o fa'afefeteina
— 4'b0011 o le µ-tulafono
• O isi ua faapolopolo
RW 0x0

Laulau 19. tx Resitala Sese

Bit Lautele Fa'amatalaga Avanoa

HW Toe Seti Tau

31:2 Fa'apolopolo RO 0x0
1:1 E le aoga IqWidth. E seti e le IP le Iqwidth i le 0 (16-bit Iqwidth) pe afai e iloa le Iqwidth le aoga pe le lagolagoina. RW1C 0x0
0:0 Le aoga auala fa'apipi'i. O le IP e lafoaʻi le afifi. RW1C 0x0

Laulau 20. rx Resitala Fa'aletonu

Bit Lautele Fa'amatalaga Avanoa

HW Toe Seti Tau

31:8 Fa'apolopolo RO 0x0
1:1 E le aoga IqWidth. O le IP e lafoaʻi le afifi. RW1C 0x0
0:0 Le aoga auala fa'apipi'i. O le IP e setiina le auala faʻapipiʻi i le auala faʻapipiʻi e le mafai ona lagolagoina:
• Na'o le poloka fa'afefeteina na'o le mea: fa'aletonu ile poloka-fa'opeopea.
• Na'o le μ-law ua mafai: fa'aletonu i le μ-tulafono.
• Fa'aagaoio uma le poloka-opeopea ma le μ-tulafono: fa'aletonu ile poloka-fa'apeopea.
RW1C 0x0

Fronthaul Compression Intel FPGA IPs User Guide Archive

Mo lomiga lata mai ma muamua o lenei pepa, taga'i ile: Fronthaul Compression Intel FPGA IP User Guide. Afai e le o lisiina se IP po'o se polokalama faakomepiuta, e fa'aoga le ta'iala mo le IP muamua po'o le polokalama faakomepiuta.

Tala Fa'asolopito o Fa'amaumauga mo le Fronthaul Compression Intel FPGA IP User Guide

Fa'amatalaga Fa'amaumauga

Intel Quartus Prime Version IP Version

Suiga

2022.08.08 21.4 1.0.1 Fa'asa'o le lautele metadata 0 i le 0 (Fa'agata Metadata Taulaga).
2022.03.22 21.4 1.0.1 • Fa'amatalaga fa'ailoga ua fesuia'i:
— tx_avst_sink_data ma tx_avst_source_data
— rx_avst_sink_data ma rx_avst_source_data
• Faaopoopo Masini Lagolago Vasega Saosaoa laulau
• Faaopoopo Fa'atinoga ma le Fa'aaogaina o Punaoa
2021.12.07 21.3 1.0.0 Fa'afou le fa'atonuga code.
2021.11.23 21.3 1.0.0 Fa'asalalauga muamua.

Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel, ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie i ai i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel ina ia maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua. *O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.

intel logointel Fronthaul Compression FPGA IP icon 2 Faʻasinomaga Faʻainitaneti
intel Fronthaul Compression FPGA IP icon 1 Lauina Manatu
ID: 709301
UG-20346
Fa'aliliuga: 2022.08.08
ISO 9001:2015 Resitala

Pepa / Punaoa

intel Fronthaul Compression FPGA IP [pdf] Taiala mo Tagata Fa'aoga
Fronthaul Compression FPGA IP, Fronthaul, Compression FPGA IP, FPGA IP
intel Fronthaul Compression FPGA IP [pdf] Taiala mo Tagata Fa'aoga
UG-20346, 709301, Fronthaul Compression FPGA IP, Fronthaul FPGA IP, Compression FPGA IP, FPGA IP

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