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Wogwiritsa NtchitoIntel Fronthaul Compression FPGA IP

Fronthaul Compression FPGA IP

Fronthaul Compression Intel® FPGA IP User Guide
Zasinthidwa kwa Intel® Quartus® Prime
Design Suite: 21.4 IP
Mtundu: 1.0.1

Za Fronthaul Compression Intel® FPGA IP

Fronthaul Compression IP imakhala ndi kuponderezana ndi kutsika kwa data ya U-ndege IQ. Injini yophatikizira imawerengera µ-lamulo kapena kutsekereza kwa malo oyandama kutengera mutu wa wogwiritsa ntchito data (udCompHdr). IP iyi imagwiritsa ntchito mawonekedwe osinthira a Avalon a data ya IQ, ma siginecha a conduit, ndi ma metadata ndi ma sigino am'mbali, ndi mawonekedwe a Avalon memory-mapped for control and status registry (CSRs).
Mamapu a IP adaphatikizira ma IQs ndi parameter ya compression data (udCompParam) malinga ndi gawo lamtundu wa payload wotchulidwa mu O-RAN specification O-RAN Fronthaul Control, User and Synchronization Plane Version 3.0 April 2020 (O-RAN-WG4.CUS .0-v03.00). Avalon Streaming sink ndi gwero mawonekedwe deta m'lifupi ndi 128-bits kwa mawonekedwe ntchito ndi 64 bits kwa mawonekedwe zoyendera kuthandizira pazipita compressoin chiŵerengero cha 2:1.
Zambiri Zogwirizana
O-RAN webmalo
1.1. Fronthaul Compression Intel® FPGA IP Features

  • -Law and block yoyandama-point compression ndi decompression
  • IQ m'lifupi 8-bit mpaka 16-bit
  • Kukonzekera kosasunthika komanso kosinthika kwa mtundu wa U-ndege IQ ndi mutu wopondereza
  • Paketi ya Multisections (ngati O-RAN Compliant yayatsidwa)

1.2. Fronthaul Compression Intel® FPGA IP Chipangizo Thandizo la Banja
Intel imapereka magawo otsatirawa othandizira chipangizo cha Intel FPGA IP:

  • Thandizo lotsogola-IP ikupezeka kuti iyerekeze ndi kuphatikizira banja la chipangizochi. Pulogalamu ya FPGA file (.pof) chithandizo sichikupezeka pa pulogalamu ya Beta ya Quartus Prime Pro Stratix 10 Edition ndipo motero kutseka kwa nthawi ya IP sikungatsimikizidwe. Zitsanzo za nthawi zimaphatikizanso kuyerekezera koyambilira kwa uinjiniya kuchedwa kutengera zomwe zasinthidwa posachedwa. Mitundu yanthawi imatha kusintha pomwe kuyezetsa kwa silicon kumapangitsa kulumikizana pakati pa silicon yeniyeni ndi mitundu yanthawi. Mutha kugwiritsa ntchito maziko a IP awa pamapangidwe adongosolo ndi maphunziro ogwiritsira ntchito zida, kuyerekezera, kuwunika, kuwunika kwanthawi yayitali, kuunika kwanthawi yoyambira (bajeti yamapaipi), ndi njira yosinthira I/O (m'lifupi mwanjira ya data, kuya kwakuya, miyeso ya I/O). ).
  • Thandizo loyambirira-Intel imatsimikizira IP core ndi mitundu yoyambira nthawi ya banja la chipangizochi. IP core imakwaniritsa zofunikira zonse, koma mwina ikuwunikabe nthawi ya banja la chipangizocho. Mutha kuzigwiritsa ntchito popanga mapangidwe mosamala.
  • Thandizo lomaliza-Intel imatsimikizira IP ndi mitundu yomaliza ya nthawi ya banja la chipangizochi. IP imakwaniritsa zofunikira zonse zogwirira ntchito komanso nthawi ya banja la chipangizocho. Mutha kuzigwiritsa ntchito pakupanga mapangidwe.

Table 1. Fronthaul Compression IP Chipangizo Thandizo la Banja

Chipangizo Banja Thandizo
Intel® Agilex™ (E-tile) Choyambirira
Intel Agilex (F-tile) Patsogolo
Intel Arria® 10 Chomaliza
Intel Stratix® 10 (H-, ndi zida za E-tile zokha) Chomaliza
Zida zina mabanja Palibe thandizo

Table 2. Chipangizo Anathandiza Speed ​​Maphunziro

Chipangizo Banja FPGA Fabric Speed ​​​​Giredi
Intel Agilex 3
Intel Arria 10 2
Intel Stratix 10 2

1.3. Kutulutsa Zambiri kwa Fronthaul Compression Intel FPGA IP
Mitundu ya Intel FPGA IP imafanana ndi mitundu ya Intel Quartus® Prime Design Suite mpaka v19.1. Kuyambira mu Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP ili ndi ndondomeko yatsopano yomasulira.
Nambala ya Intel FPGA IP (XYZ) imatha kusintha ndi mtundu uliwonse wa pulogalamu ya Intel Quartus Prime. Kusintha kwa:

  • X ikuwonetsa kukonzanso kwakukulu kwa IP. Mukasintha pulogalamu ya Intel Quartus Prime, muyenera kukonzanso IP.
  • Y akuwonetsa kuti IP ili ndi zatsopano. Panganinso IP yanu kuti muphatikizepo zatsopanozi.
  • Z ikuwonetsa kuti IP imaphatikizapo zosintha zazing'ono. Panganinso IP yanu kuti ikhale ndi zosinthazi.

Table 3. Fronthaul Compression IP Release Information

Kanthu Kufotokozera
Baibulo 1.0.1
Tsiku lotulutsa February 2022
Kodi oyitanitsa IP-FH-COMP

1.4. Fronthaul Compression Performance ndi Kugwiritsa Ntchito Zida
Zida za IP zolunjika pa chipangizo cha Intel Agilex, chipangizo cha Intel Arria 10, ndi chipangizo cha Intel Stratix 10.
Table 4. Fronthaul Compression Performance and Resource Use
Zolemba zonse ndi za compression ndi decompression data direction IP

Chipangizo IP Zithunzi za ALM Zolemba zomveka M20K
  Pulayimale Sekondale
Intel Agilex Malo oyandama 14,969 25,689 6,093 0
µ-lamulo 22,704 39,078 7,896 0
Malo oyandama ndi µ-lamulo 23,739 41,447 8,722 0
Malo oyandama, µ-lamulo, ndi kukula kwa IQ 23,928 41,438 8,633 0
Intel Arria 10 Malo oyandama 12,403 16,156 5,228 0
µ-lamulo 18,606 23,617 5,886 0
Malo oyandama ndi µ-lamulo 19,538 24,650 6,140 0
Malo oyandama, µ-lamulo, ndi kukula kwa IQ 19,675 24,668 6,141 0
Intel Stratix 10 Malo oyandama 16,852 30,548 7,265 0
µ-lamulo 24,528 44,325 8,080 0
Malo oyandama ndi µ-lamulo 25,690 47,357 8,858 0
Malo oyandama, µ-lamulo, ndi kukula kwa IQ 25,897 47,289 8,559 0

Kuyamba ndi Fronthaul Compression Intel FPGA IP

Kufotokozera kukhazikitsa, parameterizing, kuyerekezera, ndi kuyambitsa kwa Fronthaul Compression IP.
2.1. Kupeza, Kuyika, ndi Kupereka Chilolezo cha Fronthaul Compression IP
Fronthaul Compression IP ndi Intel FPGA IP yowonjezera yomwe siyikuphatikizidwa ndi Intel Quartus Prime kumasulidwa.

  1. Pangani akaunti yanga ya Intel ngati mulibe.
  2. Lowani kuti mulowe ku Self-Service Licensing Center (SSLC).
  3. Gulani Fronthaul Compression IP.
  4. Patsamba la SSLC, dinani Thamangani IP. SSLC imapereka bokosi la zokambirana kuti likuwongolereni kuyika kwanu IP.
  5. Ikani kumalo omwewo monga Intel Quartus Prime foda.

Table 5. Fronthaul Compression Installation Malo

Malo Mapulogalamu nsanja
:\intelFPGA_pro\\quartus\ip \altera_cloud Intel Quartus Prime Pro Edition Mawindo
:/intelFPGA_pro//quartus/ip/altera_cloud Intel Quartus Prime Pro Edition Linux *

Chithunzi 1. Fronthaul Compression IP Installation Directory Structure Intel Quartus Prime installation directory

Intel Fronthaul Compression FPGA IP mkuyu 7
The Fronthaul Compression Intel FPGA IP tsopano ikuwonekera mu IP Catalog.
Zambiri Zogwirizana

  • Intel FPGA webmalo
  • Self-Service Licensing Center (SSLC)

2.2. Parameterizing ya Fronthaul Compression IP
Konzani mwachangu kusintha kwanu kwa IP mu IP Parameter Editor.

  1. Pangani pulojekiti ya Intel Quartus Prime Pro Edition momwe mungaphatikizire IP core yanu.
    a. Mu Intel Quartus Prime Pro Edition, dinani File New Project Wizard kuti apange pulojekiti yatsopano ya Intel Quartus Prime, kapena File Open Project kuti mutsegule pulojekiti yomwe ilipo ya Quartus Prime. Wizard imakulimbikitsani kuti mutchule chipangizo.
    b. Tchulani gulu la chipangizo chomwe chikukwaniritsa zofunikira za giredi ya liwiro la IP.
    c. Dinani Malizani.
  2. Mu Gulu la IP, sankhani Fronthaul Compression Intel FPGA IP. Zenera la New IP Variation likuwonekera.
  3. Tchulani dzina lapamwamba lamitundu yanu yatsopano ya IP. Mkonzi wa parameter amasunga zosintha za IP mu a file dzina .ip.
  4. Dinani Chabwino. The parameter editor ikuwonekera.
    Intel Fronthaul Compression FPGA IP mkuyu 6Chithunzi 2. Fronthaul Compression IP Parameter Editor
  5. Tchulani magawo a kusintha kwanu kwa IP. Onani ku Parameters kuti mudziwe zambiri za magawo ena a IP.
  6. Dinani Design Exampleta ndikulongosola magawo a kapangidwe kanu kakaleample.
    Intel Fronthaul Compression FPGA IP mkuyu 5Chithunzi 3. Design Exampndi Parameter Editor
  7. Dinani Pangani HDL. The Generation dialog box ikuwonekera.
  8. Nenani zomwe zatuluka file kupanga zosankha, ndiyeno dinani Pangani. Kusintha kwa IP files kupanga molingana ndi zomwe mukufuna.
  9. Dinani Malizani. Mkonzi wa parameter amawonjezera pamwamba .ip file ku polojekiti yamakono basi. Ngati mwapemphedwa kuti muwonjezere pamanja .ip file ku polojekitiyo, dinani Project Add/Chotsani Files mu Project kuwonjezera ma file.
  10. Mukapanga ndikukhazikitsa ma IP anu, pangani ma pini oyenerera kuti mulumikizane ndi madoko ndikukhazikitsa magawo oyenera a RTL pazochitika zilizonse.

2.2.1. Fronthaul Compression IP Parameters
Table 6. Fronthaul Compression IP Parameters

Dzina Makhalidwe Ovomerezeka

Kufotokozera

Mayendedwe a data TX ndi RX, TX okha, RX okha Sankhani TX kwa psinjika; RX kwa decompression.
Compress njira BFP, mu-Law, kapena BFP ndi mu-Law Sankhani chipika choyandama, µ-lamulo, kapena zonse ziwiri.
Kuchuluka kwa metadata 0 (Zimitsani Madoko a Metadata), 32, 64, 96, 128 (bit) Tchulani kukula pang'ono kwa basi ya metadata (data yosakanizidwa).
Yambitsani kukula kwa IQ Kutsegula kapena kutseka Yatsani kwa IqWidth yothandizidwa ya 8-bit mpaka 16-bit.
Zimitsani kwa IqWidth yothandizidwa ya 9, 12, 14 ndi 16-bits.
O-RAN amagwirizana Kutsegula kapena kutseka Yatsani kutsatira mapu a ORAN IP a doko la metadata ndikutsimikizira metadata yovomerezeka pamutu uliwonse. IP imathandizira 128-bit wide metadata yokha. IP imathandizira gawo limodzi ndi magawo angapo pa paketi. Metadata ndiyovomerezeka pagawo lililonse ndi chidziwitso chovomerezeka cha metadata.
Zimitsani kuti IP igwiritse ntchito metadata ngati siginecha yodutsa popanda kufunikira kwa mapu (mwachitsanzo: U-ndege numPrb imaganiziridwa kuti 0). IP imathandizira kukula kwa metadata kwa 0 (Disable Metadata Ports), 32, 64, 96, 128 bits. IP imathandizira gawo limodzi pa paketi. Metadata imagwira ntchito kamodzi kokha pazidziwitso zovomerezeka za metadata pa paketi iliyonse.

2.3. IP yopangidwa File Kapangidwe
Pulogalamu ya Intel Quartus Prime Pro Edition imapanga zotulutsa za IP zotsatirazi file kapangidwe.
Table 7. IP yopangidwa Files

File Dzina

Kufotokozera

<wanu_ip> .ip Dongosolo la Platform Designer kapena kusiyanasiyana kwapamwamba kwa IP file.wanu_ip> ndi dzina lomwe mumapereka kusintha kwanu kwa IP.
<wanu_ip>.cmp The VHDL Component Declaration (.cmp) file ndi malemba file yomwe ili ndi matanthauzidwe am'deralo ndi madoko omwe mungagwiritse ntchito popanga VHDL files.
<wanu_ip>.html Lipoti lomwe lili ndi chidziwitso cholumikizira, mapu okumbukira omwe akuwonetsa adilesi ya kapolo aliyense polemekeza mbuye aliyense komwe amalumikizidwa, ndi magawo omwe amaperekedwa.
<wanu_ip>_generation.rpt Pulogalamu ya IP kapena Platform Designer file. Chidule cha mauthenga pa nthawi ya IP.
<wanu_ip>.qgsimc Imatchula magawo oyerekeza kuti athandizire kusinthika kowonjezereka.
<wanu_ip>.qgsynthc Imatchula magawo a kaphatikizidwe kuti athandizire kusinthika kowonjezereka.
<wanu_ip> .qip Lili ndi zonse zofunika za gawo la IP kuti muphatikize ndikuphatikiza gawo la IP mu pulogalamu ya Intel Quartus Prime.
<wanu_ip>.sopcinfo Imafotokoza zolumikizirana ndi magawo a IP mu dongosolo lanu la Platform Designer. Mutha kusanthula zomwe zili mkati mwake kuti mupeze zofunika mukapanga ma driver a mapulogalamu a zigawo za IP.
Zida zotsika monga chida cha Nios® II zimagwiritsa ntchito izi file. The .sopcinfo file ndi dongosolo.h file zopangira zida za Nios II zimaphatikizapo zambiri zamaadiresi za kapolo aliyense wachibale kwa mbuye aliyense yemwe amapeza kapolo. Mabwana osiyanasiyana amatha kukhala ndi mapu aadiresi osiyanasiyana kuti athe kupeza gawo linalake la akapolo.
<wanu_ip>.csv Lili ndi zambiri zakukweza kwa gawo la IP.
<wanu_ip>.bsf Chizindikiro cha Block File (.bsf) choyimira chamitundu yosiyanasiyana ya IP kuti igwiritsidwe ntchito mu Intel Quartus Prime Block Diagram Files (.bdf).
<wanu_ip>.spd Zofunikira file kwa ip-make-simscript kuti apange zolemba zofananira za oyeserera othandizira. The .spd file lili ndi mndandanda wa files amapangidwa kuti ayesedwe, komanso zambiri zamakumbukiro zomwe mutha kuyambitsa.
<wanu_ip>.ppf Pin Planner File (.ppf) imasunga madoko ndi ma node agawo a IP opangidwa kuti agwiritsidwe ntchito ndi Pin Planner.
<wanu_ip>_bb.v Mutha kugwiritsa ntchito Verilog black-box (_bb.v) file monga chilengezo chopanda kanthu cha module kuti chigwiritsidwe ntchito ngati bokosi lakuda.
<wanu_ip>_inst.v kapena _inst.vhd Zithunzi za HDLampndi instantiation template. Mutha kukopera ndi kumata zomwe zili mu izi file mu HDL yanu file yambitsani kusintha kwa IP.
<wanu_ip>.v kapenawanu_ip>.vhd HDL files omwe amakhazikitsa submodule iliyonse kapena IP ya mwana pa kaphatikizidwe kapena kuyerekezera.
mphunzitsi/ Muli ModelSim* script msim_setup.tcl kuti muyike ndikuyendetsa kayeseleledwe.
synopys/vcs/synopsy/vcsmx/ Muli ndi chipolopolo vcs_setup.sh kuti muyike ndikuyendetsa kayesedwe ka VCS*.
Muli ndi chipolopolo vcsmx_setup.sh ndi synopsy_ sim.setup file kukhazikitsa ndikuyendetsa kayesedwe ka VCS MX*.
kulira/ Muli ndi chipolopolo ncsim_setup.sh ndi khwekhwe lina files kukhazikitsa ndikuyendetsa kayesedwe ka NCSIM*.
aldec/ Muli ndi chipolopolo cha rivierapro_setup.sh chokhazikitsa ndikuyendetsa kayesedwe ka Aldec*.
xcelium/ Muli ndi chipolopolo xcelium_setup.sh ndi khwekhwe lina files kukhazikitsa ndikuyendetsa kayeseleledwe ka Xcelium*.
ma submodule/ Muli HDL files kwa ma submodule apakati a IP.
<mwana IP cores>/ Pa chikwatu chilichonse chopangidwa ndi ana a IP, Platform Designer amapanga ma synth/ ndi sim/ sub-directories.

Fronthaul Compression IP Functional Description

Chithunzi 4. The Fronthaul Compression IP imaphatikizapo kuponderezana ndi kusokoneza. Fronthaul Compression IP Block DiagramIntel Fronthaul Compression FPGA IP mkuyu 4

Compress ndi Decompression
Chida chosinthira chokhazikika chokhazikika pa block block chimapanga masinthidwe abwino kwambiri azinthu 12 zothandizira (REs). Chotchinga chimachepetsa phokoso la quantization, makamaka kwa otsika-ampmawu samples. Chifukwa chake, imachepetsa kukula kwa vector magnitude (EVM) yomwe compression imayambitsa. The aligorivimu compression pafupifupi wodziyimira pawokha mtengo mphamvu. Kungotengera zovuta zolowetsa samples ndi x = x1 + jxQ, mtengo wokwanira wazinthu zenizeni komanso zongoyerekeza za block block ndi:
Intel Fronthaul Compression FPGA IP mkuyu 3Pokhala ndi mtengo wokwanira wokwanira wa block block, equation yotsatirayi imatsimikizira mtengo wosinthira kumanzere womwe waperekedwa ku block block:Intel Fronthaul Compression FPGA IP mkuyu 2Pomwe bitWidth ndi m'lifupi mwake.
IP imathandizira ma compression ratios a 8, 9, 10, 11, 12, 13, 14, 15, 16.
Mu-Law Compression and Decompression
Algorithm imagwiritsa ntchito njira yofananira ya Mu-law, yomwe kuphatikizika kwamawu kumagwiritsa ntchito kwambiri. Njirayi imadutsa chizindikiro chosakanizidwa, x, kudzera pa kompresa yokhala ndi ntchito, f(x), isanazungulire ndi kutsika pang'ono. Njirayi imatumiza deta yothinikizidwa, y, pa mawonekedwe. Deta yomwe idalandiridwa imadutsa ntchito yokulirakulira (yomwe ndi yotsutsana ndi kompresa, F-1 (y) Njirayi imatulutsanso deta yosakanizidwa ndi zolakwika zochepa zowerengera.
Equation 1. Compressor ndi decompressor ntchito
Intel Fronthaul Compression FPGA IP mkuyu 1The Mu-law IQ compression algorithm ikutsatira ndondomeko ya O-RAN.
Zambiri Zogwirizana
O-RAN webmalo
3.1. Fronthaul Compression IP Signals
Lumikizani ndikuwongolera IP.
Wotchi ndi Bwezeretsani Zizindikiro za Chiyankhulo =
Table 8. Clock ndi Bwezeretsani Zizindikiro za Interface

Dzina la Signal Bitwidth Mayendedwe

Kufotokozera

tx_clk 1 Zolowetsa Wotchi yotumiza.
Mafupipafupi a wotchi ndi 390.625 MHz kwa 25 Gbps ndi 156.25MHz kwa 10 Gbps. Zizindikiro zonse za ma transmitter zimayenderana ndi wotchi iyi.
rx_clk 1 Zolowetsa Wotchi yolandila.
Mafupipafupi a wotchi ndi 390.625 MHz kwa 25 Gbps ndi 156.25MHz kwa 10 Gbps. Zizindikiro zonse za mawonekedwe olandila ndi ofanana ndi wotchi iyi.
csr_clk 1 Zolowetsa Wotchi ya mawonekedwe a CSR. Mafupipafupi a wotchi ndi 100 MHz.
tx_rst_n 1 Zolowetsa Kukhazikitsanso kotsika kwa mawonekedwe a transmitter synchronous to tx_clk.
rx_rst_n 1 Zolowetsa Kukhazikitsanso kwapang'onopang'ono kwa mawonekedwe olandila olumikizana ndi rx_clk.
csr_rst_n 1 Zolowetsa Kukhazikitsanso kotsika kwa mawonekedwe a CSR ofanana ndi csr_clk.

Zizindikiro za Transmit Transport Interface
Table 9. Transmit Transport Interface Signs
Mitundu yonse ya ma siginecha ndi nambala yosaina.

Dzina la Signal

Bitwidth Mayendedwe

Kufotokozera

tx_avst_source_valid 1 Zotulutsa Zikanenedwa, zimasonyeza kuti deta yolondola ikupezeka pa avst_source_data.
tx_avst_source_data 64 Zotulutsa Minda ya PRB kuphatikiza udCompParam, iSampndi qsample. Gawo lotsatira minda ya PRB ilumikizidwa ndi gawo lapitalo la PRB.
tx_avst_source_startofpacket 1 Zotulutsa Imawonetsa baiti yoyamba ya chimango.
tx_avst_source_endofpacket 1 Zotulutsa Imawonetsa baiti yomaliza ya chimango.
tx_avst_source_ready 1 Zolowetsa Zikanenedwa, zimasonyeza kuti gawo la zoyendera ndilokonzeka kuvomereza deta. readyLatency = 0 pa mawonekedwe awa.
tx_avst_source_empty 3 Zotulutsa Imatchula kuchuluka kwa ma byte opanda kanthu pa avst_source_data pomwe avst_source_endofpacket imanenedwa.
tx_udcomphdr_o 8 Zotulutsa Wogwiritsa ntchito compression header field. Zolumikizana ndi tx_avst_source_valid.
Imatanthauzira njira yopondereza ndi IQ bit wide
kwa data ya ogwiritsa mu gawo la data.
• [7:4] : udIqWidth
• 16 ya udIqWidth=0, apo ayi ikufanana ndi udIqWidth e,g,:
- 0000b amatanthauza kuti ine ndi Q ndi 16 bits m'lifupi;
- 0001b amatanthauza kuti ine ndi Q ndi gawo limodzi la 1;
- 1111b amatanthauza kuti ine ndi Q ndi 15 bits m'lifupi
• [3:0] : udCompMeth
- 0000b - palibe kupanikizana
- 0001b - malo oyandama
- 0011b-µ-chilamulo
- zina - zosungidwa ku njira zamtsogolo.
tx_metadata_o METADATA_WIDTH Zotulutsa Mphatso yodutsa ndi ma conduit ndipo samapanikizidwa.
Zolumikizana ndi tx_avst_source_valid. Bitwidth yosinthika METADATA_WIDTH.
Mukayatsa O-RAN amagwirizana, kutanthauza Table 13 patsamba 17.Mukathimitsa O-RAN amagwirizana, chizindikirochi chimakhala chovomerezeka pokhapokha tx_avst_source_startofpacket ndi 1. tx_metadata_o ilibe chizindikiro chovomerezeka ndipo imagwiritsa ntchito tx_avst_source_valid kusonyeza kuzungulira koyenera.
Sizipezeka mukasankha 0 Letsani Madoko a Metadata za Kuchuluka kwa metadata.

Landirani Zizindikiro za Transport Interface
Table 10. Landirani Zizindikiro za Transport Interface Signs
Palibe backpressure pa mawonekedwe awa. Chizindikiro chopanda kanthu cha Avalon sikofunikira mu mawonekedwe awa chifukwa nthawi zonse amakhala ziro.

Dzina la Signal Bitwidth Mayendedwe

Kufotokozera

rx_avst_sink_valid 1 Zolowetsa Zikanenedwa, zimasonyeza kuti deta yolondola ikupezeka pa avst_sink_data.
Palibe chizindikiro cha avst_sink_ready pa mawonekedwe awa.
rx_avst_sink_data 64 Zolowetsa Minda ya PRB kuphatikiza udCompParam, iSampndi qsample. Gawo lotsatira minda ya PRB ilumikizidwa ndi gawo lapitalo la PRB.
rx_avst_sink_startofpacket 1 Zolowetsa Imawonetsa baiti yoyamba ya chimango.
rx_avst_sink_endofpacket 1 Zolowetsa Imawonetsa baiti yomaliza ya chimango.
rx_avst_sink_error 1 Zolowetsa Zikanenedwa mozungulira monga avst_sink_endofpacket, zikuwonetsa kuti paketi yomwe ilipo ndi paketi yolakwika.
rx_udcomphdr_i 8 Zolowetsa Wogwiritsa ntchito compression header field. Zolumikizana ndi rx_metadata_valid_i.
Zimatanthawuza njira yoponderezedwa ndi IQ bit width kwa deta ya wosuta mu gawo la deta.
• [7:4] : udIqWidth
• 16 ya udIqWidth=0, apo ayi ikufanana ndi udIqWidth. mwachitsanzo
- 0000b amatanthauza kuti ine ndi Q ndi 16 bits m'lifupi;
- 0001b amatanthauza kuti ine ndi Q ndi gawo limodzi la 1;
- 1111b amatanthauza kuti ine ndi Q ndi 15 bits m'lifupi
• [3:0] : udCompMeth
- 0000b - palibe kupanikizana
- 0001b - chipika choyandama
- 0011b-µ-chilamulo
- zina - zosungidwa ku njira zamtsogolo.
rx_metadata_i METADATA_WIDTH Zolowetsa Kudutsa kwa ngalande yosakanizidwa.
rx_metadata_i zizindikiro zimakhala zowona pamene rx_metadata_valid_i inenedwa, yofanana ndi rx_avst_sink_valid.
Bitwidth yosinthika METADATA_WIDTH.
Mukayatsa O-RAN amagwirizana, kutanthauza Table 15 patsamba 18.
Mukathimitsa O-RAN amagwirizana, chizindikiro ichi cha rx_metadata_i chimakhala chovomerezeka pokhapokha rx_metadata_valid_i ndi rx_avst_sink_startofpacket zofanana ndi 1. Sizipezeka mukasankha 0 Letsani Madoko a Metadata za Kuchuluka kwa metadata.
rx_metadata_valid_i 1 Zolowetsa Zikuwonetsa kuti mitu (rx_udcomphdr_i ndi rx_metadata_i) ndiyovomerezeka. Zolumikizana ndi rx_avst_sink_valid. Chizindikiro chokakamiza. Kuti mugwirizane ndi O-RAN kumbuyo, lembani rx_metadata_valid_i ngati IP ili ndi ma IE amutu ovomerezeka ndi magawo obwerezabwereza. Popereka magawo atsopano a physical resource block (PRB) mu rx_avst_sink_data, perekani magawo atsopano a IE mu rx_metadata_i zolowetsa pamodzi ndi rx_metadata_valid_i.

Transmit Application Interface Signals
Table 11. Transmit Application Interface Signals

Dzina la Signal

Bitwidth Mayendedwe

Kufotokozera

tx_avst_sink_valid 1 Zolowetsa Zikanenedwa, zikuwonetsa kuti minda yovomerezeka ya PRB ilipo mu mawonekedwe awa.
Mukamagwiritsa ntchito njira yotsatsira, onetsetsani kuti palibe chizindikiro chovomerezeka pakati pa paketi yoyambira ndi kumapeto kwa paketi Chokhacho ndi pamene chizindikiro chokonzeka chachotsedwa.
tx_avst_sink_data 128 Zolowetsa Deta yochokera ku application layer mu network byte order.
tx_avst_sink_startofpacket 1 Zolowetsa Onetsani PRB byte yoyamba ya paketi
tx_avst_sink_endofpacket 1 Zolowetsa Onetsani PRB byte yomaliza ya paketi
tx_avst_sink_ready 1 Zotulutsa Zikanenedwa, zimasonyeza kuti O-RAN IP yakonzeka kuvomereza deta kuchokera ku mawonekedwe a ntchito. readyLatency = 0 pa mawonekedwe awa
tx_udcomphdr_i 8 Zolowetsa Wogwiritsa ntchito compression header field. Zolumikizana ndi tx_avst_sink_valid.
Zimatanthawuza njira yoponderezedwa ndi IQ bit width kwa deta ya wosuta mu gawo la deta.
• [7:4] : udIqWidth
• 16 ya udIqWidth=0, apo ayi ikufanana ndi udIqWidth. mwachitsanzo
- 0000b amatanthauza kuti ine ndi Q ndi 16 bits m'lifupi;
- 0001b amatanthauza kuti ine ndi Q ndi gawo limodzi la 1;
- 1111b amatanthauza kuti ine ndi Q ndi 15 bits m'lifupi
• [3:0] : udCompMeth
- 0000b - palibe kupanikizana
- 0001b - malo oyandama
- 0011b-µ-chilamulo
- zina - zosungidwa ku njira zamtsogolo.
tx_metadata_i METADATA_WIDTH Zolowetsa Mphatso yodutsa ndi ma conduit ndipo samapanikizidwa. Zolumikizana ndi tx_avst_sink_valid.
Bitwidth yosinthika METADATA_WIDTH.
Mukayatsa O-RAN amagwirizana, kutanthauza Table 13 patsamba 17.
Mukathimitsa O-RAN amagwirizana, chizindikirochi chimagwira ntchito pokhapokha tx_avst_sink_startofpacket ikufanana ndi 1.
tx_metadata_i ilibe chizindikiro chovomerezeka ndi ntchito
tx_avst_sink_valid kuwonetsa kuzungulira koyenera.
Sizipezeka mukasankha 0 Letsani Madoko a Metadata za Kuchuluka kwa metadata.

Landirani Zizindikiro Zogwiritsa Ntchito
Table 12. Landirani Zizindikiro Zogwiritsa Ntchito

Dzina la Signal

Bitwidth Mayendedwe

Kufotokozera

rx_avst_source_valid 1 Zotulutsa Zikanenedwa, zikuwonetsa kuti minda yovomerezeka ya PRB ilipo mu mawonekedwe awa.
Palibe chizindikiro cha avst_source_ready pa mawonekedwe awa.
rx_avst_source_data 128 Zotulutsa Data to application layer mu network byte order.
rx_avst_source_startofpacket 1 Zotulutsa Imawonetsa PRB byte yoyamba ya paketi
rx_avst_source_endofpacket 1 Zotulutsa Imawonetsa PRB byte yomaliza ya paketi
rx_avst_source_error 1 Zotulutsa Zikuwonetsa kuti mapaketi ali ndi zolakwika
rx_udcomphdr_o 8 Zotulutsa Wogwiritsa ntchito compression header field. Zolumikizana ndi rx_avst_source_valid.
Zimatanthawuza njira yoponderezedwa ndi IQ bit width kwa deta ya wosuta mu gawo la deta.
• [7:4] : udIqWidth
• 16 ya udIqWidth=0, apo ayi ikufanana ndi udIqWidth. mwachitsanzo
- 0000b amatanthauza kuti ine ndi Q ndi 16 bits m'lifupi;
- 0001b amatanthauza kuti ine ndi Q ndi gawo limodzi la 1;
- 1111b amatanthauza kuti ine ndi Q ndi 15 bits m'lifupi
• [3:0] : udCompMeth
- 0000b - palibe kupanikizana
- 0001b - block floating point (BFP)
- 0011b-µ-chilamulo
- zina - zosungidwa ku njira zamtsogolo.
rx_metadata_o METADATA_WIDTH Zotulutsa Kudutsa kwa ngalande yosakanizidwa.
rx_metadata_o zizindikiro zimakhala zowona pamene rx_metadata_valid_o atsimikiziridwa, kugwirizanitsa ndi rx_avst_source_valid.
Bitwidth yosinthika METADATA_WIDTH. Mukayatsa O-RAN amagwirizana, kutanthauza Table 14 patsamba 18.
Mukathimitsa O-RAN amagwirizana, rx_metadata_o ndiyovomerezeka pokhapokha rx_metadata_valid_o ikufanana ndi 1.
Sizipezeka mukasankha 0 Letsani Madoko a Metadata za Kuchuluka kwa metadata.
rx_metadata_valid_o 1 Zotulutsa Zikuwonetsa kuti mitu (rx_udcomphdr_o ndi
rx_metadata_o) ndizovomerezeka.
rx_metadata_valid_o imatsimikiziridwa pamene rx_metadata_o ili yovomerezeka, yofanana ndi rx_avst_source_valid.

Mapu a Metadata a O-RAN Backward Compatibility
Table 13. tx_metadata_i 128-bit kulowa

Dzina la Signal

Bitwidth Mayendedwe Kufotokozera

Mapu a Metadata

Zosungidwa 16 Zolowetsa Zosungidwa. tx_metadata_i[127:112]
tx_u_size 16 Zolowetsa Kukula kwa paketi ya U-ndege mu ma byte kuti muzitha kusuntha. tx_metadata_i[111:96]
tx_u_seq_id 16 Zolowetsa SeqID ya paketi, yomwe imachotsedwa pamutu wa zoyendera za eCPRI. tx_metadata_i[95:80]
tx_u_pc_id 16 Zolowetsa PCID ya eCPRI transport ndi RoEflowId
zoyendera pa wailesi ya ethernet (RoE).
tx_metadata_i[79:64]
Zosungidwa 4 Zolowetsa Zosungidwa. tx_metadata_i[63:60]
tx_u_dataDirection 1 Zolowetsa gNB data malangizo.
Kusiyanasiyana kwa mtengo: {0b=Rx (ie kukweza), 1b=Tx (ie kutsitsa)}
tx_metadata_i[59]
tx_u_filterIndex 4 Zolowetsa Imatanthawuza index ya tchanelo kuti igwiritsidwe ntchito pakati pa data ya IQ ndi mawonekedwe amlengalenga.
Mtundu wamtengo: {0000b-1111b}
tx_metadata_i[58:55]
tx_u_frameId 8 Zolowetsa Kauntala ya mafelemu 10 ms (nthawi yokulunga masekondi 2.56), makamaka frameId= frame number modulo 256.
Mtundu wamtengo: {0000 0000b-1111 1111b}
tx_metadata_i[54:47]
tx_u_subframeId 4 Zolowetsa Kauntala ya 1 ms subframes mkati mwa 10 ms chimango. Mtundu wamtengo: {0000b-1111b} tx_metadata_i[46:43]
tx_u_slotID 6 Zolowetsa Parameter iyi ndi nambala ya slot mkati mwa 1 ms subframe. Mipata yonse mu subframe imodzi imawerengedwa ndi chizindikiro ichi.
Mtundu wamtengo: {00 0000b-00 1111b=slotID, 01 0000b-11 1111b=Wosungidwa}
tx_metadata_i[42:37]
tx_u_symbolid 6 Zolowetsa Imazindikiritsa nambala yachizindikiro mkati mwa slot. Mtundu wamtengo: {00 0000b-11 1111b} tx_metadata_i[36:31]
tx_u_sectionId 12 Zolowetsa GawoID limayika magawo a data ya U-ndege kupita ku uthenga wofananira wa ndege ya C (ndi Mtundu wa Gawo) wokhudzana ndi datayo.
Mtundu wamtengo: {0000 0000 0000b-11111111 1111b}
tx_metadata_i[30:19]
tx_u_rb 1 Zolowetsa Resource block chizindikiro.
Onetsani ngati chipika chilichonse chikugwiritsidwa ntchito kapena chipika chilichonse chikugwiritsidwa ntchito.
Kusiyanasiyana kwa mtengo: {0b=chida chilichonse chogwiritsidwa ntchito; 1b=chida chilichonse chogwiritsidwa ntchito}
tx_metadata_i[18]
tx_u_startPrb 10 Zolowetsa PRB yoyambira ya gawo la data la ogwiritsa ntchito.
Mtundu wamtengo: {00 0000 0000b-11 1111 1111b}
tx_metadata_i[17:8]
tx_u_numPrb 8 Zolowetsa Tanthauzirani ma PRB pomwe gawo la data la ogwiritsa ntchito ndilovomerezeka. tx_metadata_i[7:0]
      Kusiyanasiyana kwa mtengo: {0000 0001b-1111 1111b, 0000 0000b = ma PRB onse mugawo lodziwika la wonyamulira (SCS) ndi bandwidth yonyamula }  
tx_u_udCompHdr 8 Zolowetsa Fotokozani njira yoponderezedwa ndi IQ pang'ono m'lifupi mwa data ya wosuta mu gawo la data. Mtundu wamtengo: {0000 0000b-1111 1111b} N/A (tx_udcomphdr_i)

Gulu 14. rx_metadata_valid_i/o

Dzina la Signal

Bitwidth Mayendedwe Kufotokozera

Mapu a Metadata

rx_sec_hdr_valid 1 Zotulutsa Pamene rx_sec_hdr_valid ndi 1, minda ya data ya U-ndege ndiyovomerezeka.
Ma IE a pamutu wamba amakhala ovomerezeka pamene rx_sec_hdr_valid anenedwa, amalumikizana ndi avst_sink_u_startofpacket ndi avst_sink_u_valid.
Ma IE agawo obwerezedwa amakhala ovomerezeka pamene rx_sec_hdr_valid atsimikiziridwa, kugwirizanitsa ndi avst_sink_u_valid.
Popereka magawo atsopano a PRB mu avst_sink_u_data, perekani magawo atsopano a IE okhala ndi rx_sec_hdr_valid yotsimikiziridwa.
rx_metadata_valid_o

Table 15. rx_metadata_o 128-bit kutulutsa

Dzina la Signal Bitwidth Mayendedwe Kufotokozera

Mapu a Metadata

Zosungidwa 32 Zotulutsa Zosungidwa. rx_metadata_o[127:96]
rx_u_seq_id 16 Zotulutsa SeqID ya paketi, yomwe imachotsedwa pamutu wa zoyendera za eCPRI. rx_metadata_o[95:80]
rx_u_pc_id 16 Zotulutsa PCID ya eCPRI transport ndi RoEflowId ya RoE transport rx_metadata_o[79:64]
zosungidwa 4 Zotulutsa Zosungidwa. rx_metadata_o[63:60]
rx_u_dataDirection 1 Zotulutsa gNB data malangizo. Kusiyanasiyana kwa mtengo: {0b=Rx (ie kukweza), 1b=Tx (ie kutsitsa)} rx_metadata_o[59]
rx_u_filterIndex 4 Zotulutsa Imatanthawuza index ya tchanelo kuti igwiritse ntchito pakati pa data ya IQ ndi mawonekedwe amlengalenga.
Mtundu wamtengo: {0000b-1111b}
rx_metadata_o[58:55]
rx_u_frameId 8 Zotulutsa Kauntala ya 10 ms mafelemu (nthawi yokulunga masekondi 2.56), makamaka frameId= chimango nambala modulo 256. Mtundu wamtengo: {0000 0000b-1111 1111b} rx_metadata_o[54:47]
rx_u_subframeId 4 Zotulutsa Kauntala ya 1ms subframes mkati mwa 10 ms chimango. Mtundu wamtengo: {0000b-1111b} rx_metadata_o[46:43]
rx_u_slotID 6 Zotulutsa Nambala ya slot mkati mwa subframe ya 1ms. Mipata yonse mu subframe imodzi imawerengedwa ndi chizindikiro ichi. Mtengo wamtengo: {00 0000b-00 1111b=slotID, 01 0000b-111111b=Wosungidwa} rx_metadata_o[42:37]
rx_u_symbolid 6 Zotulutsa Imazindikiritsa nambala yachizindikiro mkati mwa slot.
Mtundu wamtengo: {00 0000b-11 1111b}
rx_metadata_o[36:31]
rx_u_sectionId 12 Zotulutsa GawoID limayika magawo a data ya U-ndege kupita ku uthenga wofananira wa ndege ya C (ndi Mtundu wa Gawo) wokhudzana ndi datayo.
Mtundu wamtengo: {0000 0000 0000b-1111 1111 1111b}
rx_metadata_o[30:19]
rx_u_rb 1 Zotulutsa Resource block chizindikiro.
Imawonetsa ngati chipika chilichonse chikugwiritsidwa ntchito kapena china chilichonse chikugwiritsidwa ntchito.
Kusiyanasiyana kwa mtengo: {0b=chida chilichonse chogwiritsidwa ntchito; 1b=chida chilichonse chogwiritsidwa ntchito}
rx_metadata_o[18]
rx_u_startPrb 10 Zotulutsa PRB yoyambira ya gawo la data la ogwiritsa ntchito.
Mtundu wamtengo: {00 0000 0000b-11 1111 1111b}
rx_metadata_o[17:8]
rx_u_nambalaPrb 8 Zotulutsa Imatanthauzira ma PRB pomwe gawo la data la wogwiritsa ntchito ndilovomerezeka.
Kusiyanasiyana kwa mtengo: {0000 0001b-1111 1111b, 0000 0000b = ma PRB onse mu SCS ndi bandwidth yonyamula }
rx_metadata_o[7:0]
rx_u_udCompHdr 8 Zotulutsa Imatanthawuza njira yoponderezedwa ndi IQ pang'ono m'lifupi mwa data ya wosuta mu gawo la data.
Mtundu wamtengo: {0000 0000b-1111 1111b}
N/A (rx_udcomphdr_o)

Zizindikiro za CSR Interface
Table 16. CSR Interface Signals

Dzina la Signal Bit Width Mayendedwe

Kufotokozera

csr_address 16 Zolowetsa Adilesi yolembetsa yokonzekera.
csr_lemba 1 Zolowetsa Kaundula wa kasinthidwe kulemba yambitsani.
csr_writedata 32 Zolowetsa Zosintha zolembetsa zolemba.
csr_readdata 32 Zotulutsa Kaundula wa kasinthidwe amawerengedwa.
csr_werengani 1 Zolowetsa Kaundula wa kasinthidwe amawerengedwa.
csr_readdatavalid 1 Zotulutsa Kaundula wa kasinthidwe amawerenga zowona.
csr_waitrequest 1 Zotulutsa Pempho lodikirira kaundula wa kasinthidwe.

Fronthaul Compression IP Registers

Kuwongolera ndi kuyang'anira ntchito ya fronthaul compression pogwiritsa ntchito mawonekedwe ndi mawonekedwe.
Table 17. Lembani Mapu

CSR_ADDRESS (Wotsitsa Mawu) Register Dzina
0x0 pa compression_mode
0x1 pa tx_zolakwa
0x2 pa rx_error

Table 18. compression_mode Register

Bit Width Kufotokozera Kufikira

HW Bwezerani Mtengo

31:9 Zosungidwa RO 0x0 pa
8:8 Njira yogwirira ntchito:
• 1'b0 ndi static compression mode
• 1'b1 ndi dynamic mode compression
RW 0x0 pa
7:0 Pamutu wotsikira wa data wa ogwiritsa:
• 7:4 ndi udIqWidth
- 4'b0000 ndi 16 bits
- 4'b1111 ndi 15 bits
-:
4'b0001 ndi 1 pang'ono
• 3:0 ndi udCompMeth
- 4'b0000 palibe psinjika
- 4'b0001 ndi malo oyandama
- 4'b0011 ndi µ-lamulo
• Ena amasungidwa
RW 0x0 pa

Table 19. tx Kulembetsa Zolakwa

Bit Width Kufotokozera Kufikira

HW Bwezerani Mtengo

31:2 Zosungidwa RO 0x0 pa
1:1 IqWidth yolakwika. IP imayika Iqwidth kukhala 0 (16-bit Iqwidth) ngati ipeza Iqwidth yolakwika kapena yosagwirizana. Mtengo wa RW1C 0x0 pa
0:0 Njira yopondereza yolakwika. IP imagwetsa paketi. Mtengo wa RW1C 0x0 pa

Table 20. rx Kulembetsa Zolakwa

Bit Width Kufotokozera Kufikira

HW Bwezerani Mtengo

31:8 Zosungidwa RO 0x0 pa
1:1 IqWidth yolakwika. IP imagwetsa paketi. Mtengo wa RW1C 0x0 pa
0:0 Njira yopondereza yolakwika. IP imayika njira yopondereza kukhala njira yotsatirayi yotsatiridwa yotsatiridwa:
• Malo oyandama otsegula okha: okhazikika mpaka malo oyandama.
• Lamulo lokhazikitsidwa ndi μ lokha: losasinthika kukhala μ-law.
• Yayatsa nsonga yoyandama ndi μ-law: kusakhazikika pamalo oyandama.
Mtengo wa RW1C 0x0 pa

Fronthaul Compression Intel FPGA IPs User Guide Archive

Pamitundu yaposachedwa komanso yam'mbuyomu yachikalatachi, onani: Fronthaul Compression Intel FPGA IP User Guide. Ngati IP kapena pulogalamu ya pulogalamu sinalembedwe, chiwongolero cha ogwiritsa ntchito pa IP yam'mbuyomu kapena pulogalamu yamapulogalamu imagwira ntchito.

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Zosintha

2022.08.08 21.4 1.0.1 Metadata yokonzedwa m'lifupi mwake 0 mpaka 0 (Disable Metadata Ports).
2022.03.22 21.4 1.0.1 • Kufotokozera kwa ma siginosi osinthidwa:
— tx_avst_sink_data ndi tx_avst_source_data
— rx_avst_sink_data ndi rx_avst_source_data
• Wowonjezera Magiredi Othamanga Othandizidwa ndi Chipangizo tebulo
• Wowonjezera Magwiridwe ndi Kugwiritsa Ntchito Zida
2021.12.07 21.3 1.0.0 Khodi yoyitanitsa yosinthidwa.
2021.11.23 21.3 1.0.0 Kutulutsidwa koyamba.

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