I-AN 795 Isebenzisa Imihlahlandlela ye-10G
I-Ethernet Subsystem Esebenzisa I-Low Latency 10G MAC
Umhlahlandlela Womsebenzisi
I-AN 795 Isebenzisa Imihlahlandlela Ye-10G Ethernet Subsystem Esebenzisa I-Low Latency 10G MAC
AN 795: Ukusebenzisa Iziqondiso ze-10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC Intel FPGA® IP ku-Intel ® Arria® 10 Amadivayisi
Ukusebenzisa Imihlahlandlela ye-10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC Intel ® FPGA IP ku-Intel ® Arria® 10 Devices
Imihlahlandlela yokusebenzisa ikubonisa indlela yokusebenzisa i-Intel's Low Latency 10G Media Access Controller (MAC) kanye nama-PHY IPs.
Umfanekiso 1. Intel® Arria® 10 Low Latency Ethernet 10G MAC System
Ithebula 1. Intel® Arria® 10 Low Latency Ethernet 10G MAC Designs
Leli thebula libala yonke imiklamo ye-Intel ® Arria® 10 ye-Low Latency Ethernet 10G MAC Intel FPGA IP.
| I-Design Example | Okuhlukile kwe-MAC | I-PHY | Ikhithi Yokuthuthukisa |
| 10GBase-R Ethernet | 10G | I-PHY yomdabu | I-Intel Arria 10 GX Transceiver SI |
| 10GBase-R Imodi Yokubhalisa I-Ethernet |
10G | I-PHY yomdabu | I-Intel Arria 10 GX Transceiver SI |
| I-XAUI Ethernet | 10G | XAUI PHY | I-Intel Arria 10 GX FPGA |
| 1G/10G Ethernet | I-1G/10G | I-1G/10GbE kanye ne-10GBASE-KR PHY | I-Intel Arria 10 GX Transceiver SI |
| 1G/10G Ethernet nge-1588 | I-1G/10G | I-1G/10GbE kanye ne-10GBASE-KR PHY | I-Intel Arria 10 GX Transceiver SI |
| 10M/100M/1G/10G Ethernet | 10M/100M/1G/10G | I-1G/10GbE kanye ne-10GBASE-KR PHY | I-Intel Arria 10 GX Transceiver SI |
| 10M/100M/1G/10G Ethernet nge 1588 |
10M/100M/1G/10G | I-1G/10GbE kanye ne-10GBASE-KR PHY | I-Intel Arria 10 GX Transceiver SI |
| 1G/2.5G Ethernet | I-1G/2.5G | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
I-Intel Arria 10 GX Transceiver SI |
| 1G/2.5G Ethernet nge-1588 | I-1G/2.5G | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
I-Intel Arria 10 GX Transceiver SI |
| 1G/2.5G/10G Ethernet | 1G/2.5G/10G | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
I-Intel Arria 10 GX Transceiver SI |
| 10G USXGMII Ethernet | 1G/2.5G/5G/10G (USXGMII) | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
I-Intel Arria 10 GX Transceiver SI |
Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi.
*Amanye amagama namabhrendi angafunwa njengempahla yabanye.
1. Ukusebenzisa Iziqondiso ze-10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC Intel® FPGA IP kumadivayisi we-Intel® Arria® 10
683347 | 2020.10.28
Qaphela:
Ungafinyelela yonke imiklamo esohlwini ngomhleli wepharamitha ye-Low Latency Ethernet 10G MAC Intel® FPGA IP kusofthiwe ye-Intel Quartus Prime, ngaphandle kwedizayini yesithenjwa ye-XAUI Ethernet. Ungathola idizayini yesithenjwa ye-XAUI Ethernet eSitolo Sokuklama.
I-Intel inikeza ama-IP ahlukene we-MAC kanye ne-PHY we-10M kuya ku-1G Multi-rate Ethernet subsystems ukuze kuqinisekiswe ukuqaliswa okuvumelana nezimo. Ungakwazi ukufaka i-Low Latency Ethernet 10G MAC Intel FPGA IP nge-1G/2.5G/5G/10G Multi-rate Ethernet PHY, Intel Arria 10 1G/10GbE kanye ne-10GBASE-KR PHY, noma i-XAUI PHY ne-Intel Arria 10 Transceiver PHYver ukuhlinzeka ngezidingo ezahlukene zokuklama.
Ulwazi Oluhlobene
- I-Low Latency Ethernet 10G MAC Intel FPGA IP Umhlahlandlela Womsebenzisi
Inikeza ulwazi oluningiliziwe mayelana nokufaka ngokushesha kanye nokwenza ipharamitha kwe-MAC IP. - I-Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi
Inikeza ulwazi oluningiliziwe mayelana nokuqinisekisa kanye nokwenza ipharamitha komklamo we-MAC exampLes. - Intel Arria 10 Transceiver PHY Umhlahlandlela Womsebenzisi
Ihlinzeka ngolwazi oluningiliziwe mayelana nokuqinisekisa kanye nokwenza ipharamitha kwe-PHY IP. - I-Low Latency Ethernet 10G MAC Uhlu Lokuhlola Lokususa iphutha
- AN 699: Ukusebenzisa i-Altera Ethernet Design Toolkit
Le khithi yamathuluzi ikusiza ukuthi ulungiselele futhi usebenzise imiklamo yesithenjwa ye-Ethernet futhi ulungise noma yiziphi izinkinga ezihlobene ne-Ethernet. - I-Fault Tree Analysis ye-Low Latency 10G Inkinga Yedatha Yenkohlakalo ye-MAC
- I-Arria 10 Low Latency Ethernet 10G MAC kanye ne-XAUI PHY Reference Design
Inikeza files yomklamo wereferensi.
1.1. I-Low Latency Ethernet 10G MAC kanye ne-Intel Arria 10 Transceiver Native PHY Intel FPGA IPs
Ungakwazi ukumisa i-Intel Arria 10 Transceiver Native PHY Intel FPGA IP ukuze usebenzise i-10GBASE-R PHY ngesendlalelo esiqondile se-Ethernet esisebenza ngesilinganiso sedatha esingu-10.3125 Gbps njengoba kuchazwe Kusigaba 49 sokucaciswa kwe-IEEE 802.3-2008.
Lokhu kulungiselelwa kunikeza i-XGMII kuya ku-Low Latency Ethernet 10G MAC Intel FPGA IP futhi kusebenzisa isiteshi esisodwa esingu-10.3 Gbps PHY esihlinzeka ngoxhumano oluqondile kumojula yokubona ye-SFP+ kusetshenziswa ukucaciswa kukagesi kwe-SFI.
I-Intel inikeza ama-design amabili we-10GBASE-R Ethernet subsystem examples futhi ungakwazi ukukhiqiza le miklamo ngendlela enamandla usebenzisa isihleli sepharamitha yepharamitha ye-Low Latency Ethernet 10G MAC Intel FPGA IP. Amadizayini asekela ukulingisa okusebenzayo nokuhlolwa kwezingxenyekazi zekhompuyutha kumakhithi okuthuthukisa we-Intel aqokiwe.
Umfanekiso 2. Ukuvala Nokusetha Kabusha I-Low Latency Ethernet 10G MAC kanye ne-Intel Arria 10 Transceiver Native PHY ku-10GBASE-R Design Example
Umfanekiso 3. I-Clock and Setha Kabusha I-Low Latency Ethernet 10G MAC kanye ne-Intel Arria 10 Transceiver Native PHY ku-10GBASE-R Design Exampkanye neRejista Imodi inikwe amandla
Ulwazi Oluhlobene
I-Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi
Inikeza ulwazi oluningiliziwe mayelana nokuqinisekisa kanye nokwenza ipharamitha komklamo we-MAC exampLes.
1.2. I-Low Latency Ethernet 10G MAC kanye ne-XAUI PHY Intel FPGA IPs
I-XAUI PHY Intel FPGA IP inikeza i-XGMII kuya ku-Low Latency Ethernet 10G MAC Intel FPGA IP futhi isebenzisa imizila emine ngamunye ku-3.125 Gbps kusixhumi esibonakalayo se-PMD.
I-XAUI PHY iwukusetshenziswa kwesendlalelo esithile esibonakalayo sesixhumanisi se-10 Gigabit Ethernet esichazwe ekucacisweni kwe-IEEE 802.3ae-2008.
Ungathola idizayini yesithenjwa yesistimu engaphansi ye-10GbE esetshenziswe usebenzisa i-Low Latency Ethernet 10G MAC kanye ne-XAUI PHY Intel FPGA IPs esitolo sokuklama. Idizayini isekela ukulingisa okusebenzayo nokuhlolwa kwezingxenyekazi zekhompuyutha kukhithi yokuthuthukisa ye-Intel emisiwe.
Umfanekiso 4. Ukuvala Nokusetha Kabusha I-Low Latency Ethernet 10G MAC kanye ne-XAUI PHY Reference Design 
Ulwazi Oluhlobene
- I-Arria 10 Low Latency Ethernet 10G MAC kanye ne-XAUI PHY Reference Design
Inikeza files yomklamo wereferensi. - AN 794: I-Arria 10 Low Latency Ethernet 10G MAC kanye ne-XAUI PHY Reference Design
1.3. I-Low Latency Ethernet 10G MAC ne-1G/10GbE kanye ne-10GBASEKR PHY Intel Arria 10 FPGA IPs
I-1G/10GbE ne-10GBASE-KR PHY Intel Arria 10 FPGA IP inikeza i-MII, GMII ne-XGMII ku-Low Latency Ethernet 10G MAC Intel FPGA IP.
I-1G/10GbE kanye ne-10GBASE-KR PHY Intel Arria 10 FPGA IP isebenzisa i-singlechannel 10Mbps/100Mbps/1Gbps/10Gbps serial PHY. Imiklamo ihlinzeka ngoxhumano oluqondile kumamojula we-1G/10GbE wejubane elibili le-SFP+, i-10M–10GbE 10GBASE-T kanye ne-10M/100M/1G/10GbE 1000BASE-T kumadivayisi ethusi angaphandle e-PHY, noma izixhumanisi ze-chip-to-chip. Lawa ma-IP cores asekela amanani edatha angu-10Mbps/100Mbps/1Gbps/10Gbps alungisekayo.
I-Intel inikeza i-dual-speed 1G/10GbE kanye ne-multi-speed 10Mb/100Mb/1Gb/10GbE design examples futhi ungakwazi ukukhiqiza le miklamo ngokushintshashintshayo usebenzisa i-Low Latency
Umhleli wepharamitha we-Ethernet 10G MAC Intel FPGA IP. Amadizayini asekela ukulingisa okusebenzayo nokuhlolwa kwezingxenyekazi zekhompuyutha kukhithi yokuthuthukisa ye-Intel emisiwe.
Ukuqaliswa kwesistimu engaphansi ye-Ethernet enesivinini esikhulu kusetshenziswa i-1G/10GbE noma i-10GBASE-KR PHY Idizayini ye-Intel Arria 10 FPGA IP idinga imigoqo ye-SDC eyenziwa ngesandla yamawashi angaphakathi e-PHY IP kanye nokubamba okuwela isizinda sewashi. Bheka ku-altera_eth_top.sdc file kumklamo exampukuze ukwazi okwengeziwe mayelana newashi_elikhiqiziwe_elidingekayo, i-set_clock_groups kanye nemikhawulo ye-SDC ye-set_false_path.
Umfanekiso 5. I-Clock and Setha Kabusha I-Low Latency Ethernet 10G MAC ne-Intel Arria 10 1G/10GbE kanye ne-10GBASE-KR Design Example (Imodi ye-1G/10GbE)
Umfanekiso 6. I-Clock and Setha Kabusha I-Low Latency Ethernet 10G MAC ne-Intel Arria 10 1G/10GbE kanye ne-10GBASE-KR Design Example (10Mb/100Mb/1Gb/10GbE Imodi)
Ulwazi Oluhlobene
I-Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi
Inikeza ulwazi oluningiliziwe mayelana nokuqinisekisa kanye nokwenza ipharamitha komklamo we-MAC exampLes.
1.4. I-Low Latency Ethernet 10G MAC kanye ne-1G/2.5G/5G/10G MultiRate Ethernet PHY Intel FPGA IPs
I-1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP yamadivayisi we-Intel Arria 10 inikeza i-GMII ne-XGMII ku-Low Latency Ethernet 10G MAC Intel FPGA IP.
I-1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP yamadivayisi we-Intel Arria 10 isebenzisa isiteshi esisodwa esingu-1G/2.5G/5G/10Gbps uchungechunge lwe-PHY. Umklamo uhlinzeka ngoxhumano oluqondile ku-1G/2.5GbE amamojula axhumekayo we-SFP+ amabili esivinini, i-MGBASE-T kanye ne-NBASE-T yethusi yangaphandle ye-PHY yamadivayisi, noma izixhumanisi ze-chip-to-chip. Lawa ma-IP asekela amanani edatha e-1G/2.5G/5G/10Gbps alungisekayo.
I-Intel inikezela nge-double-speed 1G/2.5GbE, multi-speed 1G/2.5G/10GbE MGBASE-T, kanye ne-multispeed 1G/2.5G/5G/10GbE MGBASE-T ex designamples futhi ungakwazi ukukhiqiza le miklamo ngendlela enamandla usebenzisa isihleli sepharamitha yepharamitha ye-Low Latency Ethernet 10G MAC Intel FPGA IP. Amadizayini asekela ukulingisa okusebenzayo nokuhlolwa kwezingxenyekazi zekhompuyutha kukhithi yokuthuthukisa ye-Intel emisiwe.
Umfanekiso 7. I-Clock and Reset Scheme ye-Low Latency Ethernet 10G MAC kanye ne-1G/ 2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (Imodi ye-1G/2.5G)
Ngokusetshenziswa kwesistimu engaphansi kwe-1G/2.5G/1G/2.5G ye-multi-speed 10G/1GbE kanye ne-2.5G/5G/10GbE MBASE-T Ethernet kusetshenziswa i-10G/XNUMXG/XNUMXG/XNUMXG Multi-rate Ethernet PHY Intel FPGA IP, i-Intel incoma ukuthi ukopishe imojula yokuhlela kabusha i-transceiver (alt_mge_rcf. sv) enikezwe ne-ex designample. Le mojula ilungisa kabusha isivinini sesiteshi se-transceiver sisuka ku-1G siye ku-2.5G, noma siye ku-10G, futhi ngokuphambene nalokho.
Ukuqaliswa kwesistimu engaphansi ye-1G/2.5GbE kanye ne-1G/2.5G/10GbE MBASE-T Ethernet enamasivinini amaningi nakho kudinga izithiyo ze-SDC ezenziwa ngesandla zamawashi angaphakathi e-PHY IP
kanye nokubamba ukuwela isizinda sewashi. Bheka ku-altera_eth_top.sdc file kumklamo exampukuze ukwazi okwengeziwe mayelana newashi_elikhiqiziwe_elidingekayo, i-set_clock_groups kanye nemikhawulo ye-SDC ye-set_false_path.
Umfanekiso 8. I-Clock and Reset Scheme ye-Low Latency Ethernet 10G MAC kanye ne-1G/ 2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (Imodi ye-1G/2.5G/10GbE MBASE-T) 
Umfanekiso 9. I-Clock and Reset Scheme ye-Low Latency Ethernet 10G MAC kanye ne-1G/2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (1G/2.5G/5G/10GbE Imodi ye-NBASE-T)
Ulwazi Oluhlobene
I-Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi Ihlinzeka ngolwazi oluningiliziwe mayelana nokuqinisekisa nokubeka imingcele i-ex yedizayini ye-MACampLes.
1.5. Umlando Wokubuyekezwa Kombhalo we-AN 795: Ukusebenzisa Iziqondiso ze-10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC Intel FPGA IP ku-Intel Arria 10 Devices
| Inguqulo Yedokhumenti | Izinguquko |
| 2020.10.28 | • Iqanjwe kabusha njenge-Intel. • Iqanjwe kabusha idokhumenti ngokuthi AN 795: Ukusebenzisa Izinkombandlela ze-10G Ethernet Subsystem Isebenzisa I-Low Latency 10G MAC Intel FPGA IP ku-Intel Arria 10 Devices. |
| Usuku | Inguqulo | Izinguquko |
| February-17 | 2017.02.01 | Ukukhishwa kokuqala. |
AN 795: Ukusebenzisa Iziqondiso ze-10G Ethernet Subsystem Ukusebenzisa Okuphansi
I-Latency 10G MAC Intel ® FPGA IP kumadivayisi we-Intel® Arria® 10
I-Online Version
Thumela Impendulo
Inombolo yepholisi: 683347
Inguqulo: 2020.10.28
Amadokhumenti / Izinsiza
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I-intel AN 795 Ukusebenzisa Izinkombandlela ze-10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC [pdf] Umhlahlandlela Womsebenzisi I-AN 795 Implementing Guidelines for 10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC, AN 795, Implementation Guidelines for 10G Ethernet Subsystem Ukusebenzisa I-Low Latency 10G MAC, I-Ethernet Subsystem Esebenzisa I-Low Latency 10G MAC, I-Low Latency 10G MAC |
