intel AN 795 Awọn ilana imuṣe fun 10G Ethernet Subsystem Lilo Itọnisọna Olumulo 10G MAC Kekere

AN 795 Awọn ilana imuse fun 10G
Àjọlò Subsystem Lilo Low Lairi 10G MAC
Itọsọna olumulo

Awọn akoonu tọju

1 AN 795 Awọn Itọsọna imuṣe fun 10G Ethernet Subsystem Lilo Lairi Kekere 10G MAC

2 Ṣiṣe awọn Itọsọna fun 10G Ethernet Subsystem Lilo Low Latency 10G MAC Intel ® FPGA IP ni Intel ® Arria® 10 Devices

AN 795 Awọn Itọsọna imuṣe fun 10G Ethernet Subsystem Lilo Lairi Kekere 10G MAC

AN 795: Ṣiṣe Awọn Itọsọna fun 10G Ethernet Subsystem Lilo Low Latency 10G MAC Intel FPGA® IP ni Intel ® Arria® 10 Devices

Ṣiṣe awọn Itọsọna fun 10G Ethernet Subsystem Lilo Low Latency 10G MAC Intel ® FPGA IP ni Intel ® Arria® 10 Devices

Awọn itọnisọna imuse fihan ọ bi o ṣe le lo Alakoso Wiwọle Wiwọle Alailowaya Intel's Low Latency 10G (MAC) ati PHY IPs.
olusin 1. Intel® Arria® 10 Low Lairi àjọlò 10G Mac System

Table 1. Intel® Arria® 10 Low Lairi àjọlò 10G MAC awọn aṣa
Tabili yii ṣe atokọ gbogbo awọn apẹrẹ Intel ® Arria® 10 fun Low Latency Ethernet 10G MAC Intel FPGA IP.

Apẹrẹ Example	Mac Iyatọ	PHY	Idagbasoke Apo
10GBase-R àjọlò	10G	PHY abinibi	Intel Arria 10 GX Transceiver SI
Ipo Iforukọsilẹ 10GBase-R Àjọlò	10G	PHY abinibi	Intel Arria 10 GX Transceiver SI
XAUI àjọlò	10G	XAUI PHY	Intel Arria 10 GX FPGA
1G / 10G àjọlò	1G/10G	1G/10GbE ati 10GBASE-KR PHY	Intel Arria 10 GX Transceiver SI
1G/10G Ethernet pẹlu 1588	1G/10G	1G/10GbE ati 10GBASE-KR PHY	Intel Arria 10 GX Transceiver SI
10M / 100M / 1G / 10G àjọlò	10M/100M/1G/10G	1G/10GbE ati 10GBASE-KR PHY	Intel Arria 10 GX Transceiver SI
10M / 100M / 1G / 10G àjọlò pẹlu 1588	10M/100M/1G/10G	1G/10GbE ati 10GBASE-KR PHY	Intel Arria 10 GX Transceiver SI
1G / 2.5G àjọlò	1G/2.5G	1G/2.5G/5G/10G Olona-oṣuwọn àjọlò PHY	Intel Arria 10 GX Transceiver SI
1G/2.5G Ethernet pẹlu 1588	1G/2.5G	1G/2.5G/5G/10G Olona-oṣuwọn àjọlò PHY	Intel Arria 10 GX Transceiver SI
1G / 2.5G / 10G àjọlò	1G/2.5G/10G	1G/2.5G/5G/10G Olona-oṣuwọn àjọlò PHY	Intel Arria 10 GX Transceiver SI
10G USXGMII àjọlò	1G/2.5G/5G/10G (USXGMII)	1G/2.5G/5G/10G Olona-oṣuwọn àjọlò PHY	Intel Arria 10 GX Transceiver SI

Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ.
* Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.
1. Ṣiṣe Awọn Itọsọna fun 10G Ethernet Subsystem Lilo Low Latency 10G MAC Intel® FPGA IP ni Intel® Arria® 10 Devices
683347 | 2020.10.28
Akiyesi:
O le wọle si gbogbo awọn apẹrẹ ti a ṣe akojọ nipasẹ Low Latency Ethernet 10G MAC Intel® FPGA IP paramita olootu ni Intel Quartus Prime software, ayafi fun apẹrẹ itọkasi XAUI Ethernet. O le gba apẹrẹ itọkasi XAUI Ethernet lati Ile itaja Oniru.
Intel nfunni ni MAC lọtọ ati awọn IP PHY fun 10M si 1G Multi-oṣuwọn awọn ọna ṣiṣe Ethernet lati rii daju imuse rọ. O le ṣe imudara Low Latency Ethernet 10G MAC Intel FPGA IP pẹlu 1G/2.5G/5G/10G Multi-oṣuwọn Ethernet PHY, Intel Arria 10 1G/10GbE ati 10GBASE-KR PHY, tabi XAUI PHY ati Intel Arria 10 Transceiver Native PHY si ṣaajo yatọ si oniru awọn ibeere.
Alaye ti o jọmọ

Low Lairi àjọlò 10G MAC Intel FPGA IP Itọsọna olumulo
Pese alaye alaye nipa ese ati parameterizing MAC IP.
Low Lairi àjọlò 10G MAC Intel Arria 10 FPGA IP Design Eksample User Itọsọna
Pese alaye alaye nipa instantiating ati parameterizing MAC oniru examples.

Intel Arria 10 Transceiver PHY olumulo Itọsọna
Pese alaye ni kikun nipa imudara ese ati parameterizing PHY IP.
Kekere Alailowaya àjọlò 10G MAC yokokoro Ayẹwo

AN 699: Lilo Altera Ethernet Design Toolkit
Ohun elo irinṣẹ yii ṣe iranlọwọ fun ọ lati tunto ati ṣiṣe awọn apẹrẹ itọkasi Ethernet bii yokokoro eyikeyi awọn ọran ti o ni ibatan Ethernet.
Itupalẹ Igi Aṣiṣe fun Ọrọ Ibajẹ Data Irẹwẹsi 10G MAC

Arria 10 Low Latency Ethernet 10G MAC ati XAUI PHY Reference Design
Pese awọn files fun apẹrẹ itọkasi.

1.1. Kekere Ethernet 10G MAC ati Intel Arria 10 Transceiver Abinibi PHY Intel FPGA IPs
O le tunto Intel Arria 10 Transceiver Native PHY Intel FPGA IP lati ṣe imuse 10GBASE-R PHY pẹlu Ethernet kan pato Layer ti ara nṣiṣẹ ni 10.3125 Gbps data oṣuwọn bi telẹ ni Clause 49 ti awọn IEEE 802.3-2008 sipesifikesonu.
Iṣeto ni yii n pese XGMII si Low Latency Ethernet 10G MAC Intel FPGA IP ati imuse ikanni kan ṣoṣo 10.3 Gbps PHY ti n pese asopọ taara si module opiti SFP + nipa lilo sipesifikesonu itanna SFI.
Intel nfun meji 10GBASE-R àjọlò subsystem design examples ati pe o le ṣe ina awọn aṣa wọnyi ni agbara ni lilo Alailowaya Ethernet 10G MAC Intel FPGA IP olootu paramita. Awọn apẹrẹ naa ṣe atilẹyin kikopa iṣẹ ṣiṣe ati idanwo ohun elo lori awọn ohun elo idagbasoke Intel ti a yan.
Nọmba 2. Titiipa ati Eto Tunto fun Irẹwẹsi kekere Ethernet 10G MAC ati Intel Arria 10 Transceiver Native PHY ni 10GBASE-R Design Example

Nọmba 3. Titiipa ati Eto Tunto fun Irẹwẹsi kekere Ethernet 10G MAC ati Intel Arria 10 Transceiver Native PHY ni 10GBASE-R Design Example pẹlu Forukọsilẹ Ipo Ti ṣiṣẹ

Alaye ti o jọmọ
Low Lairi àjọlò 10G MAC Intel Arria 10 FPGA IP Design Eksample User Itọsọna
Pese alaye alaye nipa instantiating ati parameterizing MAC oniru examples.
1.2. Alailowaya Ethernet 10G MAC ati XAUI PHY Intel FPGA IPs
XAUI PHY Intel FPGA IP n pese XGMII kan si Low Latency Ethernet 10G MAC Intel FPGA IP ati imuse awọn ọna mẹrin kọọkan ni 3.125 Gbps ni wiwo PMD.
XAUI PHY jẹ imuse Layer ti ara kan pato ti ọna asopọ 10 Gigabit Ethernet ti a ṣalaye ni pato IEEE 802.3ae-2008.
O le gba apẹrẹ itọkasi fun eto abẹlẹ 10GbE ti a ṣe ni lilo Low Latency Ethernet 10G MAC ati XAUI PHY Intel FPGA IPs lati Ile itaja Apẹrẹ. Apẹrẹ ṣe atilẹyin kikopa iṣẹ ṣiṣe ati idanwo ohun elo lori ohun elo idagbasoke Intel ti a yan.
Ṣe nọmba 4. Titiipa ati Eto Tunto fun Ethernet Latency Low 10G MAC ati Apẹrẹ Itọkasi XAUI PHY

Alaye ti o jọmọ

Arria 10 Low Latency Ethernet 10G MAC ati XAUI PHY Reference Design
Pese awọn files fun apẹrẹ itọkasi.
AN 794: Arria 10 Low Latency Ethernet 10G MAC ati Apẹrẹ Itọkasi XAUI PHY

1.3. Kekere Ethernet 10G MAC ati 1G/10GbE ati 10GBASEKR PHY Intel Arria 10 FPGA IPs
1G/10GbE ati 10GBASE-KR PHY Intel Arria 10 FPGA IP pese MII, GMII ati XGMII si Low Latency Ethernet 10G MAC Intel FPGA IP.
1G/10GbE ati 10GBASE-KR PHY Intel Arria 10 FPGA IP ṣe imuse ikanni kan ṣoṣo 10Mbps/100Mbps/1Gbps/10Gbps ni tẹlentẹle PHY. Awọn apẹrẹ pese asopọ taara si 1G/10GbE iyara meji SFP + awọn modulu pluggable, 10M-10GbE 10GBASE-T ati 10M/100M/1G/10GbE 1000BASE-T Ejò ita awọn ẹrọ PHY, tabi awọn atọkun chip-to-chip. Awọn ohun kohun IP wọnyi ṣe atilẹyin atunto 10Mbps/100Mbps/1Gbps/10Gbps data awọn oṣuwọn.
Intel nfunni ni iyara-meji 1G/10GbE ati iyara pupọ 10Mb/100Mb/1Gb/10GbE apẹrẹ apẹẹrẹ.amples ati pe o le ṣe ina awọn aṣa wọnyi ni agbara nipa lilo Lairi Kekere
Àjọlò 10G MAC Intel FPGA IP paramita olootu. Awọn apẹrẹ ṣe atilẹyin kikopa iṣẹ ṣiṣe ati idanwo ohun elo lori ohun elo idagbasoke Intel ti a yan.
Imuse ọna ẹrọ Ethernet pupọ-iyara ni lilo 1G/10GbE tabi 10GBASE-KR PHY Intel Arria 10 FPGA IP apẹrẹ nbeere awọn idiwọ SDC afọwọṣe fun awọn aago PHY IP inu ati mimu iṣakoso agbegbe aago. Tọkasi altera_eth_top.sdc file ninu apẹrẹ examplati mọ siwaju si nipa awọn ti a beere create_generated_clock, set_clock_groups ati set_false_path SDC inira.
Nọmba 5. Titiipa ati Eto Tunto fun Irẹwẹsi kekere Ethernet 10G MAC ati Intel Arria 10 1G/10GbE ati 10GBASE-KR Design Example (Ipo 1G/10GbE)

Nọmba 6. Titiipa ati Eto Tunto fun Irẹwẹsi kekere Ethernet 10G MAC ati Intel Arria 10 1G/10GbE ati 10GBASE-KR Design Example (10Mb/100Mb/1Gb/10GbE Ipo)

Alaye ti o jọmọ
Low Lairi àjọlò 10G MAC Intel Arria 10 FPGA IP Design Eksample User Itọsọna
Pese alaye alaye nipa instantiating ati parameterizing MAC oniru examples.
1.4. Kekere Ethernet 10G MAC ati 1G/2.5G/5G/10G MultiRate Ethernet PHY Intel FPGA IPs
1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP fun awọn ẹrọ Intel Arria 10 pese GMII ati XGMII si Low Latency Ethernet 10G MAC Intel FPGA IP.
1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP fun awọn ẹrọ Intel Arria 10 ṣe imuse ikanni kan ṣoṣo 1G/2.5G/5G/10Gbps serial PHY. Apẹrẹ n pese asopọ taara si 1G/2.5GbE iyara meji SFP + awọn modulu pluggable, MGBASE-T ati NBASE-T Ejò ita awọn ẹrọ PHY, tabi awọn atọkun chip-si-chip. Awọn IP wọnyi ṣe atilẹyin atunto 1G/2.5G/5G/10Gbps awọn oṣuwọn data.
Intel nfun meji-iyara 1G/2.5GbE, olona-iyara 1G/2.5G/10GbE MGBASE-T, ati multispeed 1G/2.5G/5G/10GbE MGBASE-T design ex.amples ati pe o le ṣe ina awọn aṣa wọnyi ni agbara ni lilo Alailowaya Ethernet 10G MAC Intel FPGA IP olootu paramita. Awọn apẹrẹ ṣe atilẹyin kikopa iṣẹ ṣiṣe ati idanwo ohun elo lori ohun elo idagbasoke Intel ti a yan.
Ṣe nọmba 7. Titiipa ati Eto Tunto fun Ethernet Latency Low 10G MAC ati 1G/ 2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (Ipo 1G/2.5G)

Fun olona-iyara 1G/2.5GbE ati 1G/2.5G/10GbE MBASE-T àjọlò subsystem awọn imuṣẹ lilo 1G/2.5G/5G/10G Multi-oṣuwọn àjọlò PHY Intel FPGA IP, Intel sope o da awọn transceiver reconfiguration module (alt_mge_rcfg_a10. sv) pese pẹlu apẹrẹ example. Module yii ṣe atunto iyara ikanni transceiver lati 1G si 2.5G, tabi si 10G, ati ni idakeji.
1G/2.5GbE-iyara pupọ ati 1G/2.5G/10GbE MBASE-T Ethernet subsystem imuse tun nilo awọn ihamọ SDC afọwọṣe fun awọn aago PHY IP inu
ati aago ašẹ Líla mimu. Tọkasi altera_eth_top.sdc file ninu apẹrẹ examplati mọ siwaju si nipa awọn ti a beere create_generated_clock, set_clock_groups ati set_false_path SDC inira.
Ṣe nọmba 8. Titiipa ati Eto Tunto fun Ethernet Latency Low 10G MAC ati 1G/ 2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (1G/2.5G/10GbE MBASE-T Ipo) Ṣe nọmba 9. Titiipa ati Eto Tunto fun Irẹwẹsi kekere Ethernet 10G MAC ati 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (1G/2.5G/5G/10GbE NBASE-T Ipo)

Alaye ti o jọmọ
Low Lairi àjọlò 10G MAC Intel Arria 10 FPGA IP Design Eksample Itọsọna olumulo Pese alaye alaye nipa instantiating ati parameterizing MAC oniru examples.
1.5. Itan Atunyẹwo Iwe-ipamọ fun AN 795: Ṣiṣe Awọn Itọsọna fun 10G Ethernet Subsystem Lilo Low Latency 10G MAC Intel FPGA IP ni Intel Arria 10 Devices

Ẹya Iwe aṣẹ	Awọn iyipada
2020.10.28	• Rebranded bi Intel. • Tunrukọ iwe naa bi AN 795: Ṣiṣe Awọn Itọsọna fun 10G Ethernet Subsystem Lilo Low Latency 10G MAC Intel FPGA IP ni Intel Arria 10 Devices.