AN 795 Litaelo tsa Phethahatso bakeng sa 10G
Ethernet Subsystem e Sebelisang Low Latency 10G MAC
Bukana ea Mosebelisi
AN 795 Ho phethahatsa Tataiso bakeng sa 10G Ethernet Subsystem e Sebelisang Low Latency 10G MAC
AN 795: Ho phethahatsa Litaelo bakeng sa 10G Ethernet Subsystem Ho Sebelisa Low Latency 10G MAC Intel FPGA® IP ho Intel ® Arria® 10 Devices
Ho phethahatsa Litaelo tsa 10G Ethernet Subsystem Ho Sebelisa Low Latency 10G MAC Intel ® FPGA IP ho Intel ® Arria® 10 Devices
Litaelo tsa ts'ebetsong li u bontša mokhoa oa ho sebelisa Intel's Low Latency 10G Media Access Controller (MAC) le PHY IPs.
Setšoantšo sa 1. Intel® Arria® 10 Low Latency Ethernet 10G MAC System
Letlapa la 1. Intel® Arria® 10 Low Latency Ethernet 10G MAC Designs
Tafole ena e thathamisa meralo eohle ea Intel ® Arria® 10 bakeng sa Low Latency Ethernet 10G MAC Intel FPGA IP.
| Moqapi Example | Mefuta e fapaneng ea MAC | PHY | Ntlafatso Kit |
| 10GBase-R Ethernet | 10G | Native PHY | Intel Arria 10 GX Transceiver SI |
| 10GBase-R Mokhoa oa ho ngolisa Ethernet |
10G | Native PHY | Intel Arria 10 GX Transceiver SI |
| XAUI Ethernet | 10G | XAUI PHY | Intel Arria 10 GX FPGA |
| 1G/10G Ethernet | 1G/10G | 1G/10GbE le 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 1G/10G Ethernet e nang le 1588 | 1G/10G | 1G/10GbE le 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 10M/100M/1G/10G Ethernet | 10M/100M/1G/10G | 1G/10GbE le 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 10M/100M/1G/10G Ethernet le 1588 |
10M/100M/1G/10G | 1G/10GbE le 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 1G/2.5G Ethernet | 1G/2.5G | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
Intel Arria 10 GX Transceiver SI |
| 1G/2.5G Ethernet e nang le 1588 | 1G/2.5G | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
Intel Arria 10 GX Transceiver SI |
| 1G/2.5G/10G Ethernet | 1G/2.5G/10G | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
Intel Arria 10 GX Transceiver SI |
| 10G USXGMII Ethernet | 1G/2.5G/5G/10G (USXGMII) | 1G/2.5G/5G/10G Multi-rate Ethernet PHY |
Intel Arria 10 GX Transceiver SI |
Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel, empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba beha litaelo tsa lihlahisoa kapa lits'ebeletso.
*Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.
1. Ho phethahatsa Litaelo tsa 10G Ethernet Subsystem Ho Sebelisa Low Latency 10G MAC Intel® FPGA IP ho Intel® Arria® 10 Devices
683347 | 2020.10.28
Hlokomela:
U ka fihlella meralo eohle e thathamisitsoeng ka mohlophisi oa paramente ea Low Latency Ethernet 10G MAC Intel® FPGA IP ho Intel Quartus Prime software, ntle le moralo oa litšupiso oa XAUI Ethernet. U ka fumana moralo oa litšupiso oa XAUI Ethernet ho tsoa Lebenkeleng la Design.
Intel e fana ka li-IP tse arohaneng tsa MAC le PHY bakeng sa 10M ho isa ho 1G Multi-rate Ethernet subsystems ho netefatsa ts'ebetso e bonolo. O ka kenya Low Latency Ethernet 10G MAC Intel FPGA IP ka 1G/2.5G/5G/10G Multi-rate Ethernet PHY, Intel Arria 10 1G/10GbE le 10GBASE-KR PHY, kapa XAUI PHY le Intel Arria 10 Native PHYver ho Transceiver. hlokomela litlhoko tse fapaneng tsa moralo.
Lintlha Tse Amanang
- Low Latency Ethernet 10G MAC Intel FPGA IP User Guide
E fana ka lintlha tse qaqileng mabapi le ho instantiating le parameterizing IP ea MAC. - Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Bukana ea Mosebelisi
E fana ka lintlha tse qaqileng mabapi le ho instantiating le parameterizing moralo oa MAC examples. - Intel Arria 10 Transceiver PHY User Guide
E fana ka lintlha tse felletseng mabapi le ho kenya le ho etsa parametering ea PHY IP. - Low Latency Ethernet 10G MAC Debug Checklist
- AN 699: Ho sebelisa Altera Ethernet Design Toolkit
Setsi sena sa lisebelisoa se u thusa ho hlophisa le ho tsamaisa meralo ea litšupiso tsa Ethernet hammoho le ho lokisa mathata afe kapa afe a amanang le Ethernet. - Tlhahlobo ea Sefate sa Phoso bakeng sa Taba ea Low Latency 10G MAC Data Corruption Issue
- Arria 10 Low Latency Ethernet 10G MAC le XAUI PHY Reference Design
E fana ka files bakeng sa moralo oa litšupiso.
1.1. Low Latency Ethernet 10G MAC le Intel Arria 10 Transceiver Native PHY Intel FPGA IPs
O ka lokisa Intel Arria 10 Transceiver Native PHY Intel FPGA IP ho kenya ts'ebetsong 10GBASE-R PHY ka lesela le khethehileng la 'mele la Ethernet le sebetsang ka sekhahla sa data sa 10.3125 Gbps joalokaha se hlalositsoe ho Clause 49 ea IEEE 802.3-2008.
Tlhophiso ena e fana ka XGMII ho Low Latency Ethernet 10G MAC Intel FPGA IP 'me e sebelisa mocha o le mong oa 10.3 Gbps PHY o fanang ka khokahanyo e tobileng ho SFP + optical module e sebelisang lisebelisoa tsa motlakase tsa SFI.
Intel e fana ka meralo e 'meli ea 10GBASE-R Ethernet ea mohlalaamp'me u ka hlahisa meralo ena ka matla u sebelisa mohlophisi oa paramethara ea Low Latency Ethernet 10G MAC Intel FPGA IP. Meralo e ts'ehetsa papiso e sebetsang le tlhahlobo ea lisebelisoa ho lisebelisoa tse khethiloeng tsa Intel.
Setšoantšo sa 2. Ho koala le ho Seta Botjha Scheme bakeng sa Low Latency Ethernet 10G MAC le Intel Arria 10 Transceiver Native PHY ka 10GBASE-R Design Example
Setšoantšo sa 3. Ho koala le ho Seta Botjha Scheme bakeng sa Low Latency Ethernet 10G MAC le Intel Arria 10 Transceiver Native PHY ka 10GBASE-R Design Ex.ample ka Register Mokhoa o lumelletsoe
Lintlha Tse Amanang
Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Bukana ea Mosebelisi
E fana ka lintlha tse qaqileng mabapi le ho instantiating le parameterizing moralo oa MAC examples.
1.2. Low Latency Ethernet 10G MAC le XAUI PHY Intel FPGA IPs
XAUI PHY Intel FPGA IP e fana ka XGMII ho Low Latency Ethernet 10G MAC Intel FPGA IP mme e sebelisa litselana tse 'nè ho 3.125 Gbps ho sebopeho sa PMD.
XAUI PHY ke ts'ebetsong e ikhethileng ea 'mele ea sehokelo sa 10 Gigabit Ethernet se hlalositsoeng ho IEEE 802.3ae-2008.
U ka fumana moralo oa litšupiso bakeng sa sistimi e ka tlase ea 10GbE e kentsoeng ts'ebetsong u sebelisa Low Latency Ethernet 10G MAC le XAUI PHY Intel FPGA IPs ho tloha Design Store. Moralo o ts'ehetsa papiso e sebetsang le tlhahlobo ea lisebelisoa ho lisebelisoa tse khethiloeng tsa Intel.
Setšoantšo sa 4. Ho koala le ho tsosolosa Scheme bakeng sa Low Latency Ethernet 10G MAC le XAUI PHY Reference Design 
Lintlha Tse Amanang
- Arria 10 Low Latency Ethernet 10G MAC le XAUI PHY Reference Design
E fana ka files bakeng sa moralo oa litšupiso. - AN 794: Arria 10 Low Latency Ethernet 10G MAC le XAUI PHY Reference Design
1.3. Low Latency Ethernet 10G MAC le 1G/10GbE le 10GBASEKR PHY Intel Arria 10 FPGA IPs
1G/10GbE le 10GBASE-KR PHY Intel Arria 10 FPGA IP e fana ka MII, GMII le XGMII ho Low Latency Ethernet 10G MAC Intel FPGA IP.
1G/10GbE le 10GBASE-KR PHY Intel Arria 10 FPGA IP li kenya tšebetsong mocha o le mong 10Mbps/100Mbps/1Gbps/10Gbps serial PHY. Meetso e fana ka khokahanyo e tobileng ho 1G/10GbE dual speed SFP+ plugable modules, 10M–10GbE 10GBASE-T le 10M/100M/1G/10GbE 1000BASE-T lisebelisoa tsa PHY tsa koporo tse kantle, kapa li-interface tsa chip-to-chip. Li-cores tsena tsa IP li tšehetsa litekanyetso tsa data tsa 10Mbps/100Mbps/1Gbps/10Gbps tse ka lokisoang.
Intel e fana ka dual-speed 1G/10GbE le multi-speed 10Mb/100Mb/1Gb/10GbE ex designamp'me u ka hlahisa meralo ena ka matla u sebelisa Low Latency
Ethernet 10G MAC Intel FPGA IP parameter mohlophisi. Meralo e ts'ehetsa papiso e sebetsang le tlhahlobo ea lisebelisoa ho lisebelisoa tse khethiloeng tsa Intel.
Ts'ebetso ea subsystem ea Ethernet e nang le lebelo le fapaneng e sebelisang 1G/10GbE kapa 10GBASE-KR PHY Intel Arria 10 FPGA IP moralo o hloka lithibelo tsa letsoho tsa SDC bakeng sa lioache tsa IP tsa kahare tsa PHY le ho ts'oaroa ha domain domain. Sheba altera_eth_top.sdc file ka moralo example ho tseba haholoanyane ka li-crepes tse hlokahalang tsa create_generated_clock, set_clock_groups le set_false_path contraints SDC.
Setšoantšo sa 5. Ho koala le ho tsosolosa Scheme bakeng sa Low Latency Ethernet 10G MAC le Intel Arria 10 1G/10GbE le 10GBASE-KR Design Ex.ample (Mokhoa oa 1G/10GbE)
Setšoantšo sa 6. Ho koala le ho tsosolosa Scheme bakeng sa Low Latency Ethernet 10G MAC le Intel Arria 10 1G/10GbE le 10GBASE-KR Design Ex.ample (10Mb/100Mb/1Gb/10GbE Mokhoa)
Lintlha Tse Amanang
Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Bukana ea Mosebelisi
E fana ka lintlha tse qaqileng mabapi le ho instantiating le parameterizing moralo oa MAC examples.
1.4. Low Latency Ethernet 10G MAC le 1G/2.5G/5G/10G MultiRate Ethernet PHY Intel FPGA IPs
The 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP bakeng sa lisebelisoa tsa Intel Arria 10 e fana ka GMII le XGMII ho Low Latency Ethernet 10G MAC Intel FPGA IP.
The 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP bakeng sa lisebelisoa tsa Intel Arria 10 e sebelisa mochine o le mong oa 1G/2.5G/5G/10Gbps serial PHY. Moqapi o fana ka khokahanyo e tobileng ho li-module tsa 1G / 2.5GbE tse peli tsa lebelo la SFP + plugable, MGBASE-T le NBASE-T lisebelisoa tsa PHY tsa koporo tse ka ntle, kapa li-interfaces tsa chip-to-chip. Li-IP tsena li tšehetsa litekanyetso tsa data tsa 1G/2.5G/5G/10Gbps tse ka lokisoang hape.
Intel e fana ka dual-speed 1G/2.5GbE, multi-speed 1G/2.5G/10GbE MGBASE-T, le multispeed 1G/2.5G/5G/10GbE MGBASE-T khaleamp'me u ka hlahisa meralo ena ka matla u sebelisa mohlophisi oa paramethara ea Low Latency Ethernet 10G MAC Intel FPGA IP. Meralo e ts'ehetsa papiso e sebetsang le tlhahlobo ea lisebelisoa ho lisebelisoa tse khethiloeng tsa Intel.
Setšoantšo sa 7. Ho koala le ho tsosolosa Scheme bakeng sa Low Latency Ethernet 10G MAC le 1G/ 2.5G/5G/10G Multi-Rate Ethernet PHY Design Ex.ample (Mokhoa oa 1G/2.5G)
Bakeng sa lisebelisoa tse ngata tsa 1G/2.5GbE le 1G/2.5G/10GbE MBASE-T Ethernet tse sebelisang 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel FPGA IP, Intel e khothalletsa hore u kopitse mojule oa transceiver reconfiguration (alt_mge_rcf. sv) ho fanoe ka mohlala oa moraloample. Mojule ona o tsosolosa lebelo la mocha oa transceiver ho tloha 1G ho ea ho 2.5G, kapa ho 10G, le ka tsela e fapaneng.
Ts'ebetso ea li-subsystem tsa 1G/2.5GbE le 1G/2.5G/10GbE MBASE-T Ethernet e nang le lebelo le lengata e boetse e hloka lithibelo tsa letsoho tsa SDC bakeng sa lioache tsa IP tsa kahare tsa PHY.
le clock domain crossing handle. Sheba altera_eth_top.sdc file ka moralo example ho tseba haholoanyane ka li-crepes tse hlokahalang tsa create_generated_clock, set_clock_groups le set_false_path contraints SDC.
Setšoantšo sa 8. Ho koala le ho tsosolosa Scheme bakeng sa Low Latency Ethernet 10G MAC le 1G/ 2.5G/5G/10G Multi-Rate Ethernet PHY Design Ex.ample (1G/2.5G/10GbE MBASE-T Mode) 
Setšoantšo sa 9. Ho koala le ho tsosolosa Scheme bakeng sa Low Latency Ethernet 10G MAC le 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (1G/2.5G/5G/10GbE Mokhoa oa NBASE-T)
Lintlha Tse Amanang
Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design ExampLe Tataiso ea Mosebelisi E fana ka lintlha tse qaqileng mabapi le ho potlakisa le ho beakanya moralo oa MAC examples.
1.5. Nalane ea Tokomane ea Tokomane bakeng sa AN 795: Ho kenya Ts'ebetsong Litaelo tsa 10G Ethernet Subsystem Ho Sebelisa Low Latency 10G MAC Intel FPGA IP ho Intel Arria 10 Devices.
| Tokomane Version | Liphetoho |
| 2020.10.28 | • E rehiloe bocha joalo ka Intel. • E reha tokomane e ncha e le AN 795: Ho phethahatsa Litaelo tsa 10G Ethernet Subsystem Ho Sebelisa Low Latency 10G MAC Intel FPGA IP ho Intel Arria 10 Devices. |
| Letsatsi | Phetolelo | Liphetoho |
| Hlakola-17 | 2017.02.01 | Tokollo ea pele. |
AN 795: Ho phethahatsa Litaelo tsa 10G Ethernet Subsystem e Sebelisang Tlase
Latency 10G MAC Intel ® FPGA IP ho Intel® Arria® 10 Devices
Online Version
Romella Maikutlo
ID: 683347
Phetolelo: 2020.10.28
Litokomane / Lisebelisoa
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intel AN 795 Ho phethahatsa Tataiso ea 10G Ethernet Subsystem e Sebelisang Low Latency 10G MAC [pdf] Bukana ea Mosebelisi AN 795 Ts'ebetsong Litaelo tsa 10G Ethernet Subsystem Ho Sebelisa Low Latency 10G MAC, AN 795, Litaelo tsa Ts'ebetsong bakeng sa 10G Ethernet Subsystem e Sebelisang Low Latency 10G MAC, Ethernet Subsystem e Sebelisang Low Latency 10G MAC, Low Latency 10G MAC |
