AN 795 Nā Kūlana Hoʻokō no 10G
ʻO Ethernet Subsystem e hoʻohana ana i ka Low Latency 10G MAC
Ke alakaʻi hoʻohana
AN 795 Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka 10G MAC Latency haʻahaʻa.
AN 795: Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka Latency haʻahaʻa 10G MAC Intel FPGA® IP ma Intel ® Arria® 10 Devices
Ke hoʻokō nei i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka Latency haʻahaʻa 10G MAC Intel ® FPGA IP ma Intel ® Arria® 10 Devices
Hōʻike nā alakaʻi hoʻokō iā ʻoe pehea e hoʻohana ai i ka Intel's Low Latency 10G Media Access Controller (MAC) a me PHY IPs.
Kiʻi 1. Intel® Arria® 10 Low Latency Ethernet 10G MAC Pūnaehana
Papa 1. Intel® Arria® 10 Haʻahaʻa Latency Ethernet 10G MAC Hoʻolālā
Hōʻike kēia papa ʻaina i nā hoʻolālā Intel ® Arria® 10 āpau no Low Latency Ethernet 10G MAC Intel FPGA IP.
| Hoʻolālā Example | ʻAno MAC | PHY | Kit Hoʻomohala |
| 10GBase-R Ethernet | 10G | ʻŌiwi PHY | Intel Arria 10 GX Transceiver SI |
| 10GBase-R Kakau inoa Ethernet |
10G | ʻŌiwi PHY | Intel Arria 10 GX Transceiver SI |
| XAUI Ethernet | 10G | XAUI PHY | Intel Arria 10 GX FPGA |
| 1G/10G Ethernet | 1G/10G | 1G/10GbE a me 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 1G/10G Ethernet me 1588 | 1G/10G | 1G/10GbE a me 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 10M/100M/1G/10G Ethernet | 10M/100M/1G/10G | 1G/10GbE a me 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 10M/100M/1G/10G Ethernet me 1588 |
10M/100M/1G/10G | 1G/10GbE a me 10GBASE-KR PHY | Intel Arria 10 GX Transceiver SI |
| 1G/2.5G Ethernet | 1G/2.5G | 1G/2.5G/5G/10G PHY Ethernet helu nui |
Intel Arria 10 GX Transceiver SI |
| 1G/2.5G Ethernet me 1588 | 1G/2.5G | 1G/2.5G/5G/10G PHY Ethernet helu nui |
Intel Arria 10 GX Transceiver SI |
| 1G/2.5G/10G Ethernet | 1G/2.5G/10G | 1G/2.5G/5G/10G PHY Ethernet helu nui |
Intel Arria 10 GX Transceiver SI |
| 10G USXGMII Ethernet | 1G/2.5G/5G/10G (USXGMII) | 1G/2.5G/5G/10G PHY Ethernet helu nui |
Intel Arria 10 GX Transceiver SI |
Huina Intel. Ua mālama ʻia nā kuleana āpau. ʻO Intel, ka Intel logo, a me nā hōʻailona Intel ʻē aʻe he mau hōʻailona o Intel Corporation a i ʻole kāna mau lālā. Mālama ʻo Intel i ka hana o kāna mau huahana FPGA a me semiconductor i nā kikoʻī o kēia manawa e like me ka palapala hōʻoia maʻamau o Intel, akā aia ke kuleana e hoʻololi i nā huahana a me nā lawelawe i kēlā me kēia manawa me ka ʻole o ka hoʻolaha. ʻAʻole ʻo Intel i kuleana a i ʻole kuleana e puka mai ana mai ka noi a i ʻole ka hoʻohana ʻana i kekahi ʻike, huahana, a i ʻole lawelawe i wehewehe ʻia ma ʻaneʻi koe wale nō i ʻae ʻia ma ke kākau ʻana e Intel. Manaʻo ʻia nā mea kūʻai aku Intel e loaʻa i ka mana hou o nā kikoʻī o nā hāmeʻa ma mua o ka hilinaʻi ʻana i kekahi ʻike i paʻi ʻia a ma mua o ke kau ʻana i nā kauoha no nā huahana a i ʻole nā lawelawe.
* Hiki ke koi ʻia nā inoa a me nā hōʻailona ʻē aʻe ma ke ʻano he waiwai o nā poʻe ʻē aʻe.
1. Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka haʻahaʻa haʻahaʻa 10G MAC Intel® FPGA IP ma Intel® Arria® 10 Device
683347 | 2020.10.28
Nānā:
Hiki iā ʻoe ke komo i nā hoʻolālā papa inoa a pau ma o ka Low Latency Ethernet 10G MAC Intel® FPGA IP parameter hoʻoponopono ma ka polokalamu Intel Quartus Prime, koe wale no ka hoʻolālā kuhikuhi XAUI Ethernet. Hiki iā ʻoe ke kiʻi i ka hoʻolālā kuhikuhi XAUI Ethernet mai ka hale kūʻai Design.
Hāʻawi ʻo Intel i nā IP ʻokoʻa MAC a me PHY no ka 10M a 1G Multi-rate Ethernet subsystems e hōʻoia i ka hoʻokō maʻalahi. Hiki iā ʻoe ke hoʻomaka koke i ka Low Latency Ethernet 10G MAC Intel FPGA IP me 1G/2.5G/5G/10G Multi-rate Ethernet PHY, Intel Arria 10 1G/10GbE a me 10GBASE-KR PHY, a i ʻole XAUI PHY a me Intel Arria 10 Transceiver Native PHY i mālama i nā koi hoʻolālā like ʻole.
ʻIke pili
- Haʻahaʻa Latency Ethernet 10G MAC Intel FPGA IP alakaʻi hoʻohana
Hāʻawi i ka ʻike kikoʻī e pili ana i ka instantiating a me ka hoʻohālikelike ʻana i ka MAC IP. - Haʻahaʻa Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example alakaʻi hoʻohana
Hāʻawi i ka ʻike kikoʻī e pili ana i ka instantiating a me ka hoʻohālikelike ʻana i ka hoʻolālā MAC examples. - Intel Arria 10 Transceiver PHY alakaʻi hoʻohana
Hāʻawi i ka ʻike kikoʻī e pili ana i ka hoʻonohonoho ʻana a me ka hoʻohālikelike ʻana i ka PHY IP. - Haʻahaʻa Latency Ethernet 10G MAC Debug Checklist
- AN 699: Ke hoʻohana nei i ka Altera Ethernet Design Toolkit
Kōkua kēia pahu hana iā ʻoe e hoʻonohonoho a holo i nā hoʻolālā kuhikuhi Ethernet a me ka debug i nā pilikia pili Ethernet. - ʻIkepili lāʻau hewa no ka haʻahaʻa haʻahaʻa 10G MAC Data Corruption Issue
- Arria 10 Low Latency Ethernet 10G MAC a me XAUI PHY Reference Design
Hāʻawi i ka files no ka hoʻolālā kuhikuhi.
1.1. Haʻahaʻa Latency Ethernet 10G MAC a me Intel Arria 10 Transceiver Native PHY Intel FPGA IPs
Hiki iā ʻoe ke hoʻonohonoho i ka Intel Arria 10 Transceiver Native PHY Intel FPGA IP e hoʻokō i ka 10GBASE-R PHY me ka Ethernet kikoʻī kiko kino e holo ana ma 10.3125 Gbps data rate e like me ka wehewehe ʻana ma ka paukū 49 o ka kikoʻī IEEE 802.3-2008.
Hāʻawi kēia hoʻonohonoho i kahi XGMII i ka Low Latency Ethernet 10G MAC Intel FPGA IP a hoʻokō i kahi ala hoʻokahi 10.3 Gbps PHY e hāʻawi ana i kahi pilina pololei i kahi module optical SFP + me ka hoʻohana ʻana i ka kikoʻī uila SFI.
Hāʻawi ʻo Intel i ʻelua 10GBASE-R Ethernet subsystem design examples a hiki iā ʻoe ke hana i kēia mau hoʻolālā me ka hoʻohana ʻana i ka Low Latency Ethernet 10G MAC Intel FPGA IP parameter hoʻoponopono. Kākoʻo nā hoʻolālā i ka simulation hana a me ka hoʻāʻo ʻana i nā lako ma nā pahu hoʻomohala Intel i koho ʻia.
Kiʻi 2. Kākoʻo a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me Intel Arria 10 Transceiver Native PHY ma 10GBASE-R Design Example
Kiʻi 3. ʻO ka hoʻonohonoho ʻana a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me Intel Arria 10 Transceiver Native PHY ma 10GBASE-R Design Example me Kakau inoa Hoʻohana ʻia ke ʻano
ʻIke pili
Haʻahaʻa Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example alakaʻi hoʻohana
Hāʻawi i ka ʻike kikoʻī e pili ana i ka instantiating a me ka hoʻohālikelike ʻana i ka hoʻolālā MAC examples.
1.2. Haʻahaʻa Latency Ethernet 10G MAC a me XAUI PHY Intel FPGA IPs
Hāʻawi ka XAUI PHY Intel FPGA IP i kahi XGMII i ka Low Latency Ethernet 10G MAC Intel FPGA IP a hoʻokō i ʻehā mau ala i kēlā me kēia ma 3.125 Gbps ma ka interface PMD.
ʻO ka XAUI PHY kahi hoʻokō kikoʻī kino o ka loulou 10 Gigabit Ethernet i wehewehe ʻia ma ka kikoʻī IEEE 802.3ae-2008.
Hiki iā ʻoe ke kiʻi i ka hoʻolālā kuhikuhi no ka subsystem 10GbE i hoʻohana ʻia me ka Low Latency Ethernet 10G MAC a me XAUI PHY Intel FPGA IPs mai Design Store. Kākoʻo ka hoʻolālā i ka simulation hana a me ka hoʻāʻo ʻana i ka ʻenehana ma ka pahu hoʻomohala Intel i koho ʻia.
Kiʻi 4. ʻO ka hoʻolālā ʻana a me ka hoʻonohonoho hou ʻana no ka haʻahaʻa Latency Ethernet 10G MAC a me XAUI PHY Reference Design. 
ʻIke pili
- Arria 10 Low Latency Ethernet 10G MAC a me XAUI PHY Reference Design
Hāʻawi i ka files no ka hoʻolālā kuhikuhi. - AN 794: Arria 10 Haʻahaʻa Latency Ethernet 10G MAC a me XAUI PHY Hoʻolālā Hoʻohālikelike
1.3. Haʻahaʻa Latency Ethernet 10G MAC a me 1G/10GbE a me 10GBASEKR PHY Intel Arria 10 FPGA IPs
Hāʻawi ka 1G/10GbE a me 10GBASE-KR PHY Intel Arria 10 FPGA IP i MII, GMII a me XGMII i Low Latency Ethernet 10G MAC Intel FPGA IP.
Hoʻokomo ka 1G/10GbE a me 10GBASE-KR PHY Intel Arria 10 FPGA IP i kahi kanal 10Mbps/100Mbps/1Gbps/10Gbps serial PHY. Hāʻawi nā hoʻolālā i kahi pilina pololei i ka 1G/10GbE pālua SFP+ pluggable modules, 10M–10GbE 10GBASE-T a me 10M/100M/1G/10GbE 1000BASE-T keleawe waho PHY, a i ʻole nā pilina chip-to-chip. Kākoʻo kēia mau IP cores i nā helu data 10Mbps/100Mbps/1Gbps/10Gbps i hoʻonohonoho hou ʻia.
Hāʻawi ʻo Intel i ʻelua-wikiwiki 1G/10GbE a me ka nui-wikiwiki 10Mb/100Mb/1Gb/10GbE hoʻolālā examples a hiki iā ʻoe ke hana i kēia mau hoʻolālā me ka hoʻohana ʻana i ka Low Latency
Ethernet 10G MAC Intel FPGA IP hoʻoponopono hoʻoponopono. Kākoʻo nā mea hoʻolālā i ka simulation hana a me ka hoʻāʻo ʻana i ka lako ma luna o ka pahu hoʻomohala Intel i koho ʻia.
ʻO ka hoʻokō ʻana i ka subsystem Ethernet multi-speed me ka hoʻohana ʻana i ka 1G/10GbE a i ʻole 10GBASE-KR PHY Intel Arria 10 FPGA IP hoʻolālā e koi i nā kaohi SDC manual no nā uaki PHY IP kūloko a me ka lawelawe ʻana i ka ʻaoʻao o ka uaki. E nānā i ka altera_eth_top.sdc file i ka hoʻolālā exampe ʻike hou aku e pili ana i ka create_generated_clock, set_clock_groups a set_false_path SDC constraints.
Kiʻi 5. ʻO ka hoʻolālā ʻana a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me Intel Arria 10 1G/10GbE a me 10GBASE-KR Design Example (Ke ʻano 1G/10GbE)
Kiʻi 6. ʻO ka hoʻolālā ʻana a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me Intel Arria 10 1G/10GbE a me 10GBASE-KR Design Example (10Mb/100Mb/1Gb/10GbE Mode)
ʻIke pili
Haʻahaʻa Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example alakaʻi hoʻohana
Hāʻawi i ka ʻike kikoʻī e pili ana i ka instantiating a me ka hoʻohālikelike ʻana i ka hoʻolālā MAC examples.
1.4. Haʻahaʻa Latency Ethernet 10G MAC a me 1G/2.5G/5G/10G MultiRate Ethernet PHY Intel FPGA IPs
Hāʻawi ka 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Intel FPGA IP no nā polokalamu Intel Arria 10 i ka GMII a me XGMII i ka Low Latency Ethernet 10G MAC Intel FPGA IP.
ʻO ka 1G / 2.5G / 5G / 10G Multi-Rate Ethernet PHY Intel FPGA IP no nā polokalamu Intel Arria 10 e hoʻokō i kahi kaila 1G / 2.5G / 5G / 10Gbps serial PHY. Hāʻawi ka hoʻolālā i kahi pilina pololei i ka 1G/2.5GbE pālua SFP + pluggable modules, MGBASE-T a me NBASE-T copper external PHY device, a i ʻole nā pilina chip-to-chip. Kākoʻo kēia mau IP i nā helu data 1G/2.5G/5G/10Gbps hiki ke hoʻonohonoho hou.
Hāʻawi ʻo Intel i ʻelua-wikiwiki 1G/2.5GbE, multi-wikiwiki 1G/2.5G/10GbE MGBASE-T, a me multispeed 1G/2.5G/5G/10GbE MGBASE-T hoʻolālā examples a hiki iā ʻoe ke hana i kēia mau hoʻolālā me ka hoʻohana ʻana i ka Low Latency Ethernet 10G MAC Intel FPGA IP parameter hoʻoponopono. Kākoʻo nā mea hoʻolālā i ka simulation hana a me ka hoʻāʻo ʻana i ka lako ma luna o ka pahu hoʻomohala Intel i koho ʻia.
Kiʻi 7. ʻO ka hoʻopaʻa ʻana a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (Ke ʻano 1G/2.5G)
No ka nui-wikiwiki 1G/2.5GbE a me 1G/2.5G/10GbE MBASE-T Ethernet subsystem hoʻokō me ka hoʻohana ʻana i ka 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel FPGA IP, manaʻo ʻo Intel iā ʻoe e kope i ka module reconfiguration transceiver (alt_mge_rcfg_a10. sv) hāʻawi ʻia me ka hoʻolālā example. Hoʻonohonoho hou kēia module i ka wikiwiki o ke kahawai transceiver mai 1G a i 2.5G, a i ʻole 10G, a me ka hope.
ʻO ka hoʻokō ʻana o ka subsystem 1G/2.5GbE nui-wikiwiki a me 1G/2.5G/10GbE MBASE-T Ethernet subsystem hoʻokō pono i nā koi SDC manual no nā wati PHY IP kūloko.
a me ka mālama ʻana i ke kaʻa o ka uaki. E nānā i ka altera_eth_top.sdc file i ka hoʻolālā exampe ʻike hou aku e pili ana i ka create_generated_clock, set_clock_groups a set_false_path SDC constraints.
Kiʻi 8. ʻO ka hoʻopaʻa ʻana a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (1G/2.5G/10GbE ʻano MBASE-T) 
Kiʻi 9. ʻO ka hoʻonohonoho ʻana a me ka hoʻonohonoho hou ʻana no ka Ethernet Latency haʻahaʻa 10G MAC a me 1G/2.5G/5G/10G Multi-Rate Ethernet PHY Design Example (1G/2.5G/5G/10GbE ʻano NBASE-T)
ʻIke pili
Haʻahaʻa Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example Alakaʻi Mea hoʻohana Hāʻawi i ka ʻike kikoʻī e pili ana i ka hoʻonohonoho ʻana a me ka hoʻohālikelike ʻana i ka hoʻolālā MAC examples.
1.5. Moʻolelo Hoʻoponopono Palapala no AN 795: Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka Latency haʻahaʻa 10G MAC Intel FPGA IP ma Intel Arria 10 Devices
| Palapala Palapala | Nā hoʻololi |
| 2020.10.28 | • Ua kapa hou ʻia ʻo Intel. • Hoʻololi hou i ka palapala e like me AN 795: Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka Low Latency 10G MAC Intel FPGA IP ma Intel Arria 10 Devices. |
| Lā | Manao | Nā hoʻololi |
| Pepeluali-17 | 2017.02.01 | Hoʻokuʻu mua. |
AN 795: Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana haʻahaʻa
Latency 10G MAC Intel ® FPGA IP ma Intel® Arria® 10 Devices
Online Version
Hoʻouna Manaʻo
ID: 683347
Manaʻo: 2020.10.28
Palapala / Punawai
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intel AN 795 Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka Latency haʻahaʻa 10G MAC [pdf] Ke alakaʻi hoʻohana AN 795 Hoʻokō i nā alakaʻi no ka 10G Ethernet Subsystem me ka hoʻohana ʻana i ka Latency haʻahaʻa 10G MAC, AN 795, ka hoʻokō ʻana i nā alakaʻi no ka 10G Ethernet Subsystem e hoʻohana ana i ka Low Latency 10G MAC, Ethernet Subsystem me ka hoʻohana ʻana i ka Latency haʻahaʻa 10G MAC, Low Latency 10G MAC |
