ASMI Parallel II Intel FPGA IP
O le ASMI Parallel II Intel® FPGA IP e maua ai le avanoa i le Intel FPGA setup device, o le quad-serial configuration (EPCQ), low-vol.tage quad-serial configuration (EPCQ-L), ma le EPCQ-A fa'asologa fa'asologa. E mafai ona e faʻaogaina lenei IP e faitau ma tusi ai faʻamatalaga i masini moli fafo mo talosaga, e pei o le faʻafouina o le polokalama mamao ma le SEU Sensitivity Map Header. File (.smh) teuina.
E ese mai i foliga o loʻo lagolagoina e le ASMI Parallel Intel FPGA IP, o le ASMI Parallel II Intel FPGA IP e lagolagoina foʻi:
- Fa'asa'o sa'o le 'emo'e (tusi/faitau) e ala i le Avalon® fa'afanua fa'afanua manatua.
- Fa'atonu le resitala mo isi gaioiga e ala i le fa'atonuga o le resitara tulaga (CSR) i totonu o le Avalon fa'afanua fa'afanua manatua.
- Fa'aliliu fa'atonuga lautele mai le Avalon e fa'ata'atia le mafaufau i totonu o tulafono fa'atonu masini.
Ole ASMI Parallel II Intel FPGA IP e avanoa mo aiga uma Intel FPGA masini e aofia ai le Intel MAX® 10 masini o loʻo faʻaogaina le GPIO mode.
O le ASMI Parallel II Intel FPGA IP na'o le lagolagoina o masini EPCQ, EPCQ-L, ma EPCQ-A. Afai o lo'o e fa'aogaina masini fa'amalama isi vaega, e tatau ona e fa'aogaina le Generic Serial Flash Interface Intel FPGA IP.
Ole ASMI Parallel II Intel FPGA IP e lagolagoina ile Intel Quartus® Prime software version 17.0 ma luma.
Fa'amatalaga Fa'atatau
- Folasaga i Intel FPGA IP Cores
- Tuuina atu faʻamatalaga lautele e uiga i Intel FPGA IP cores, e aofia ai le faʻavasegaina, gaosia, faʻaleleia, ma le faʻataʻitaʻiina o pusa IP.
- Fausia Version-Tutoatasi IP ma Qsys Simulation Scripts
- Fausia tusitusiga faʻataʻitaʻiga e le manaʻomia ni faʻafouga tusi lesona mo polokalama poʻo le faʻaleleia o le IP.
- Puleaina o Poloketi Fa'ata'ita'iga Sili
- Ta'iala mo le pulea lelei ma le feavea'i o lau poloketi ma le IP files.
- ASMI Parallel Intel FPGA IP Core User Guide
- Generic Serial Flash Interface Intel FPGA IP User Guide
- Tuuina atu le lagolago mo masini flash isi vaega.
- AN 720: Fa'ata'ita'iina le ASMI Block i lau Fa'ata'ita'iga
Fa'asalalau Fa'amatalaga
IP versions e tutusa ma le Intel Quartus Prime Design Suite software versions up to v19.1. Mai le Intel Quartus Prime Design Suite software version 19.2 poʻo mulimuli ane, IP cores o loʻo i ai se polokalame faʻaliliuga IP fou.
Ole numera ole IP (XYZ) e ono suia mai le tasi Intel Quartus Prime software version i le isi. Se suiga i:
- X o loʻo faʻaalia se toe iloiloga tele o le IP. Afai e te fa'afouina lau polokalama Intel Quartus Prime, e tatau ona e toe fa'afouina le IP.
- Y faʻaalia le IP e aofia ai foliga fou. Toe fa'afouina lau IP e fa'aofi ai nei foliga fou.
- O le Z o loʻo faʻaalia ai le IP e aofia ai suiga laiti. Toe fa'afouina lau IP e fa'aofi ai nei suiga.
Laulau 1. ASMI Parallel II Intel FPGA IP Faʻamatalaga Faʻamatalaga
| Aitema | Fa'amatalaga |
| IP Version | 18.0 |
| Intel Quartus Prime Pro Edition Version | 18.0 |
| Aso Fa'asalalau | 2018.05.07 |
Taulaga
Ata 1. Ports Block Diagram
Laulau 2. Fa'amatalaga Taulaga
| Fa'ailoga | Lautele | Fa'atonuga | Fa'amatalaga |
| Avalon Fa'ata'ita'iga Pologa Fa'afanua mo le CSR (avl_csr) | |||
| avl_csr_addr | 6 | Ulufale | Avalon fa'afanua fa'afanua fa'asinomaga fa'aoga tuatusi pasi. O le tuatusi pasi o loʻo i le upu faʻasalalau. |
| avl_csr_read | 1 | Ulufale | Avalon fa'afanua fa'afanua fa'ata'ita'iga faitau fa'atonuga ile CSR. |
| avl_csr_rddata | 32 | Tuuina atu | Avalon fa'afanua fa'amaufa'ailoga e faitau fa'amaumauga pasi mai le CSR. |
| avl_csr_write | 1 | Ulufale | Avalon manatua fa'afanua fa'aoga tusi fa'atonuga ile CSR. |
| avl_csr_writedata | 32 | Ulufale | Avalon fa'afanua fa'amaufa'ailoga tusi fa'amaumauga pasi ile CSR. |
| avl_csr_waitrequest | 1 | Tuuina atu | Avalon manatua-fa'afanua interface fa'atalitali mai le CSR. |
| avl_csr_rddata_valid | 1 | Tuuina atu | Avalon memory-mapped interface faitau faʻamatalaga faʻamaonia e faʻaalia ai le CSR faitau faʻamatalaga o loʻo avanoa. |
| Avalon Fa'ata'ita'iga-Fa'afanua Polofe'au mo le Avanoa Fa'amanatu (avl_ mem) | |||
| avl_mem_write | 1 | Ulufale | Avalon fa'afanua fa'afanua fa'amaufa'ailoga tusi fa'atonu i le manatua |
| avl_mem_burstcount | 7 | Ulufale | Avalon fa'afanua fa'afanua fa'amaufa'ailoga na pa'u le faitau mo le manatua. O le tau e amata mai i le 1 i le 64 (le tele o itulau). |
| avl_mem_waitrequest | 1 | Tuuina atu | Avalon manatua fa'afanua fa'ata'ita'iga fa'atalitali mai le manatua. |
| avl_mem_read | 1 | Ulufale | Avalon fa'afanua fa'afanua fa'ata'ita'iga faitau fa'atonuga ile manatua |
| avl_mem_addr | N | Ulufale | Avalon fa'afanua fa'afanua fa'asinomaga fa'aoga tuatusi pasi. O le tuatusi pasi o loʻo i le upu faʻasalalau.
O le lautele o le tuatusi e fa'alagolago i le mamafa o le flash memory na fa'aaogaina. |
| avl_mem_writedata | 32 | Ulufale | Avalon fa'afanua fa'amaufa'ailoga tusi fa'amaumauga pasi i le manatua |
| avl_mem_readddata | 32 | Tuuina atu | Avalon fa'afanua fa'afanua e faitau fa'amaumauga pasi mai le manatua. |
| avl_mem_rddata_valid | 1 | Tuuina atu | Avalon memory-map interface faitau faʻamatalaga faʻamaonia e faʻaalia ai o loʻo maua faʻamatalaga faitau manatua. |
| avl_mem_byteenble | 4 | Ulufale | Avalon fa'afanua fa'afanua fa'amafaufauga tusitusi fa'amaumauga e mafai ai e le pasi ona manatua. I le taimi o le pa, o le pasi e mafai ona faʻaaogaina o le a maualuga, 4'b1111. |
| Uati ma Toe Seti | |||
| clk | 1 | Ulufale | Fa'aulu le uati e loka ai le IP. (1) |
| reset_n | 1 | Ulufale | Asynchronous reset e toe setiina le IP.(2) |
| Fa'alava Fa'afeso'ota'i(3) | |||
| fqspi_dataout | 4 | Faʻatonu | Ulufale po'o fa'aulufale uafu e fafaga fa'amaumauga mai le masini moli. |
| faaauau… | |||
| Fa'ailoga | Lautele | Fa'atonuga | Fa'amatalaga |
| qspi_dclk | 1 | Tuuina atu | Tuuina atu le faailo o le uati i le masini moli. |
| qspi_scein | 1 | Tuuina atu | Tuuina atu le faailo ncs i le masini moli.
Lagolago Stratix® V, Arria® V, Cyclone® V, ma masini tuai. |
| 3 | Tuuina atu | Tuuina atu le faailo ncs i le masini moli.
Lagolago Intel Arria 10 ma Intel Cyclone 10 GX masini. |
- E mafai ona e seti le taimi ole uati i lalo pe tutusa ile 50 MHz.
- Taofi le faailo mo le itiiti ifo ma le tasi le taamilosaga uati e toe seti ai le IP.
- Avanoa pe a e fa'agaoioi le Disable dedicated Active Serial interface parameter.
Fa'amatalaga Fa'atatau
- Quad-Serial Configuration (EPCQ) Pepa Fa'amaumauga o Meafaigaluega
- EPCQ-L Fa'asologa Fa'asologa o Mea Fa'atonu Pepa Fa'amaumauga
- EPCQ-A Fa'asologa Fa'asologa o Mea Fa'amaumauga Fa'amaumauga
Parameter
Laulau 3. Fa'atulagaina Parameter
| Parameter | Tulaga Fa'aletulafono | Fa'amatalaga |
| Fa'atonu ituaiga masini | EPCQ16, EPCQ32, EPCQ64, EPCQ128, EPCQ256, EPCQ512, EPCQ-L256, EPCQ-L512, EPCQ-L1024, EPCQ4A, EPCQ16A, EPCQ32A, EPCQ64A, EPCQ128A | Fa'ailoa mai le ituaiga masini EPCQ, EPCQ-L, po'o le EPCQ-A e te mana'o e fa'aoga. |
| Filifili le I/O mode | FA'ATAU FA'AVAE FA'AVAE FA'ATAUluaQUAD | Filifili le lautele o faʻamatalaga pe a e faʻaogaina le faʻagaioiga Fast Read. |
| Fa'agata le tu'ufa'atasiga Active Serial interface | — | Fa'aala le ASMIBLOCK fa'ailoga i le pito i luga o lau mamanu. |
| Fa'aagaaga fa'aoga pine SPI | — | Fa'aliliuina fa'ailoga ASMIBLOCK i le SPI pin interface. |
| Fa'aaga fa'ata'ita'iga fa'ata'ita'i moli | — | Fa'aaoga le fa'ata'ita'iga fa'ata'ita'iga EPCQ 1024 mo fa'ata'ita'iga. Afai o lo'o e fa'aogaina se masini fa'amalama a le isi vaega, fa'asino ile AN 720: Fa'ata'ita'iina le ASMI Block i lau Fa'ata'ita'iga e fai ai se afifi e fa'afeso'ota'i le fa'ata'ita'iga moli ma le ASMI Block. |
| Numera o Chip Filifilia fa'aaogaina | 1
2(4) 3(4) |
Filifili le numera o chip filifilia e fesoʻotaʻi ma le moli. |
- E na'o le lagolagoina i masini Intel Arria 10, masini Intel Cyclone 10 GX, ma isi masini e mafai ona fa'aogaina fa'aoga pine Enable SPI.
Fa'amatalaga Fa'atatau
- Quad-Serial Configuration (EPCQ) Pepa Fa'amaumauga o Meafaigaluega
- EPCQ-L Fa'asologa Fa'asologa o Mea Fa'atonu Pepa Fa'amaumauga
- EPCQ-A Fa'asologa Fa'asologa o Mea Fa'amaumauga Fa'amaumauga
- AN 720: Fa'ata'ita'iina le ASMI Block i lau Fa'ata'ita'iga
Resitala Faafanua
Laulau 4. Resitala Faafanua
- O tuatusi ta'itasi i le laulau o lo'o i lalo e fa'atusalia ai le 1 upu ole avanoa ole tuatusi manatua.
- O resitala uma e iai le tau fa'aletonu o le 0x0.
| Offset | Resitala Igoa | R/W | Igoa fanua | Bit | Lautele | Fa'amatalaga |
| 0 | WR_ENABLE | W | WR_ENABLE | 0 | 1 | Tusi le 1 e faatino ai le mafai ona tusitusi. |
| 1 | WR_FAGA | W | WR_FAGA | 0 | 1 | Tusi le 1 e faatino ai le le mafai ona tusia. |
| 2 | WR_STATUS | W | WR_STATUS | 7:0 | 8 | O lo'o i ai fa'amatalaga e tusi i le resitala tulaga. |
| 3 | RD_STATUS | R | RD_STATUS | 7:0 | 8 | O lo'o iai fa'amatalaga mai le fa'agaioiga o le resitala o tulaga faitau. |
| 4 | SECTOR_ERASE | W | Vaega Taua | 23:0
po o le 31:0 |
24 po o
32 |
O lo'o iai le tuatusi o le vāega e tape e fa'atatau ile tele ole masini.(5) |
| 5 | SUBSECTOR_ERASE | W | Fa'atatau o vaega laiti | 23:0
po o le 31:0 |
24 po o
32 |
O lo'o iai le tuatusi pito i lalo e tapeina fa'atatau ile tele ole masini.(6) |
| 6 – 7 | Fa'apolopolo | |||||
| 8 | PULE | W/R | FILIFILIA TALA | 7:4 | 4 | Filifilia masini moli. Ole tau fa'aletonu ole 0, lea e fa'atatau ile masini moli muamua. Ina ia filifili le masini lona lua, seti le tau i le 1, e filifili le masini lona tolu, seti le tau i le 2. |
| Fa'apolopolo | ||||||
| W/R | TAGATA | 0 | 1 | Seti le mea lea i le 1 e faʻamalo ai faailo SPI o le IP e ala i le tuʻuina uma o faʻailoga i le tulaga maualuga-Z. | ||
| faaauau… | ||||||
| Offset | Resitala Igoa | R/W | Igoa fanua | Bit | Lautele | Fa'amatalaga |
| E mafai ona fa'aoga lea e fa'asoa ai pasi ma isi masini. | ||||||
| 9 – 12 | Fa'apolopolo | |||||
| 13 | WR_NON_VOLATILE_CONF_REG | W | NVCR tau | 15:0 | 16 | Tusia le tau i le tusi resitala e le mafai ona fealua'i. |
| 14 | RD_NON_VOLATILE_CONF_REG | R | NVCR tau | 15:0 | 16 | Faitau le tau mai le tusi resitala fa'aopoopo e le fa'afefeteina |
| 15 | RD_ FLAG_ STATUS_REG | R | RD_ FLAG_ STATUS_REG | 8 | 8 | Faitau le resitala tulaga o le fu'a |
| 16 | CLR_FLAG_ STATUS REG | W | CLR_FLAG_ STATUS REG | 8 | 8 | Fa'amama le resitala tulaga o le fu'a |
| 17 | BULK_ERASE | W | BULK_ERASE | 0 | 1 | Tusi le 1 e tape uma ai le pu (mo le masini mate tasi).(7) |
| 18 | OTI_ATAU | W | OTI_ATAU | 0 | 1 | Tusi le 1 e tape ai le mate atoa (mo le fa'aputu-mate masini).(7) |
| 19 | 4BYTES_ADDR_EN | W | 4BYTES_ADDR_EN | 0 | 1 | Tusi le 1 e ulufale ai i le 4 bytes address mode |
| 20 | 4BYTES_ADDR_EX | W | 4BYTES_ADDR_EX | 0 | 1 | Tusi le 1 e alu ese mai le 4 bytes tulaga tuatusi |
| 21 | SECTOR_PROTECT | W | Vaega puipuia taua | 7:0 | 8 | Taua e tusi i le resitara tulaga e puipuia ai se vaega. (8) |
| 22 | RD_MEMORY_CAPACITY_ID | R | Fa'atauga e mafai ona manatua | 7:0 | 8 | O lo'o i ai fa'amatalaga o le ID gafatia e manatua. |
| 23 –
32 |
Fa'apolopolo | |||||
E na'o lou mana'omia e fa'ailoa so'o se tuatusi i totonu o le vaega ma o le IP o le a tape'a lena vaega.
E na'o lou mana'omia e fa'amaoti so'o se tuatusi i totonu o le vaega laiti ma o le a tape e le IP lena vaega fa'apitoa.
Fa'amatalaga Fa'atatau
- Quad-Serial Configuration (EPCQ) Pepa Fa'amaumauga o Meafaigaluega
- EPCQ-L Fa'asologa Fa'asologa o Mea Fa'atonu Pepa Fa'amaumauga
- EPCQ-A Fa'asologa Fa'asologa o Mea Fa'amaumauga Fa'amaumauga
- Avalon Interface Specifications
Galuega
O feso'ota'iga a le ASMI Parallel II Intel FPGA IP o feso'ota'iga Avalon e fa'amana'o fa'afanua. Mo nisi faʻamatalaga, vaʻai ile Avalon faʻamatalaga.
- E na'o lou mana'omia e fa'amaoti so'o se tuatusi i totonu o le pa'u ma o le IP o le a solo'esea lena mea fa'apitoa.
- Mo masini EPCQ ma le EPCQ-L, o le poloka puipui e la'ititi [2:4] ma le [6] ma le pito i luga/lalo (TB) o le la'ititi 5 o le resitara tulaga. Mo masini EPCQ-A. o le poloka puipui e itiiti [2:4] ma le TB bit o le 5 o le resitara tulaga.
Fa'amatalaga Fa'atatau
- Avalon Interface Specifications
Puleaina Tulaga Resitala Faagaioiga
E mafai ona e faia se faitau pe tusi i se tuatusi fa'apitoa e fa'aoga ai le Resitala Tulaga Pulea (CSR).
Ina ia faʻatinoina le faʻagaioiga faitau pe tusitusi mo le resitalaina o tulaga faʻatonutonu, mulimuli i laasaga nei:
- Fa'ailoa le fa'ailoga avl_csr_write po'o le avl_csr_read a'o le
e maualalo le faailo avl_csr_waitrequest (afai e maualuga le faailo o le faatalitali, o le faailo o le avl_csr_write po o le avl_csr_read e tatau ona maualuga pea seia oo ina maualalo le faailo o le faatalitali). - I le taimi lava e tasi, seti le tau o le tuatusi ile avl_csr_address pasi. Afai o se galuega tusitusi, seti faʻamatalaga tau i luga o le avl_csr_writedata pasi faʻatasi ma le tuatusi.
- Afai o se fefa'ataua'iga faitau, fa'atali se'i fa'ailoa maualuga le faailo avl_csr_readdatavalid e toe aumai ai fa'amaumauga faitau.
- Mo fa'agaioiga e mana'omia ai le tau tusitusi e moli, e tatau ona e fa'atinoina muamua le fa'agaioiga tusitusi.
- E tatau ona e faitau i le tusi resitala o le fu'a i taimi uma e te tu'uina atu ai se tusi pe tape se poloaiga.
- Afai e tele masini moli e fa'aogaina, e tatau ona e tusi i le chip filifili le resitala e filifili ai le mea sa'o filifilia a'o le'i faia so'o se gaioiga i le masini moli.
Ata 2. Faitau Tusi Resitala Gafa'atasiga Galue Fa'ata'ita'iample
Ata 3. Tusi Enable Register Waveform Example
Fa'agaioiga Manatu
O le ASMI Parallel II Intel FPGA IP memory interface e lagolagoina le pa'u ma tuusa'o le avanoa e manatua ai le uila. I le taimi o le faʻaogaina saʻo o le flash memory, e faia e le IP laasaga nei e faʻataga ai oe e faʻatino soʻo se galuega faitau pe tusitusi saʻo:
- Tusi le mafai mo le galuega tusitusi
- Siaki le resitara o le fu'a ina ia mautinoa ua mae'a le ta'aloga i le moli
- Tu'u le fa'ailo o le fa'atalitali pe a mae'a le taotoga
O fa'agaioiga manatua e tutusa lelei ma le fa'agaioiga fa'aoga o le Avalon e fa'amaufa'ailogaina. E tatau ona e setiina le tau saʻo i le tuatusi pasi, tusi faʻamatalaga pe a fai o se fefaʻatauaʻiga tusitusi, ave le numera o le paʻu i le 1 mo fefaʻatauaiga tasi poʻo lou manaʻo e te manaʻo i le numera o le numera, ma faʻaoso le faailo tusitusi pe faitau.
Ata 4. 8-Upu Tusi Gau Pa'u Example
Ata 5. 8-Upu Faitauga Galu Pa'u Example
Ata 6. 1-Byte Tusia byteenable = 4'b0001 Waveform Example
ASMI Fa'ata'ita'i II Intel FPGA IP Fa'aoga tulaga Examples
Le fa'aoga tulaga exampfa'aaoga le ASMI Parallel II IP ma le JTAG-to-Avalon Master e fa'atino ai fa'agaioiga fa'aoga fa'amalama, e pei o le faitau ID silicon, faitau manatua, tusi manatua, tape vaega, puipuia vaega, fa'amanino le resitara o le fu'a, ma tusi le nvcr.
E tamoe le examples, e tatau ona e configure le FPGA. Mulimuli i laasaga nei:
- Fa'atulaga le FPGA fa'avae ile Platform Designer system e pei ona fa'aalia ile ata o lo'o i lalo.
Ata 7. Platform Designer System Fa'aalia le ASMI Parallel II IP ma le JTAG-i-Avalon Master
- Fa'asa'o le TCL script lea i le lisi lava e tasi ma lau poloketi. Ta'u le tusitusiga epcq128_access.tcl mo example.
- Fa'alauiloa le fa'amafanafanaga. I totonu o le faʻamafanafanaga, faʻapipiʻi le tusitusiga i le faʻaaogaina o le "source epcq128_access.tcl".
Example 1: Faitau le Silicon ID o le Fa'atonu Fa'atonu
Example 2: Faitau ma Tusi Tasi Upu o Faamatalaga i le tuatusi H'40000000
Example 3: Aveese Vaega 64
Example 4: Fa'atino le Puipuiga o Vaega i Vaega (0 i le 127)
Example 5: Faitau ma Fa'amama le Resitala Tulaga o le Fu'a
Example 6: Faitau ma Tusia nvcr
ASMI Parallel II Intel FPGA IP User Guide Archives
IP versions e tutusa ma le Intel Quartus Prime Design Suite software versions up to v19.1. Mai le Intel Quartus Prime Design Suite software version 19.2 poʻo mulimuli ane, IP cores o loʻo i ai se polokalame faʻaliliuga IP fou.
Afai e le o lisiina se fa'asologa autu o le IP, e fa'aoga le ta'iala mo le fa'asologa muamua o le IP.
| Intel Quartus Prime Version | IP Core Version | Fa'aoga Taiala |
| 17.0 | 17.0 | Altera ASMI Parallel II IP Core User Guide |
Tala'aga Toe Iloiloga o Pepa mo le ASMI Parallel II Intel FPGA IP User Guide
| Fa'amatalaga Fa'amaumauga | Intel Quartus Prime Version | IP Version | Suiga |
| 2020.07.29 | 18.0 | 18.0 | • Fa'afouina le ulutala pepa i ASMI Parallel II Intel FPGA IP User Guide.
• Fa'afouina Laulau 2: Fa'atulagaina Parameter i vaega Parameter. |
| 2018.09.24 | 18.0 | 18.0 | • Fa'aopoopo fa'amatalaga i talosaga ma lagolago mo le ASMI Parallel II Intel FPGA IP core.
• Faaopoopo i ai se faamatalaga e faasino i le Generic Serial Flash Interface Intel FPGA IP Core User Guide. • Faaopoopo le ASMI Fa'ata'ita'i II Intel FPGA IP Core Fa'aoga Fa'amatalaga Examples vaega. |
| 2018.05.07 | 18.0 | 18.0 | • Toe fa'aigoa Altera ASMI Parallel II IP core i le ASMI Parallel II Intel FPGA IP core mo le Intel rebranding.
• Fa'aopoopo le lagolago mo masini EPCQ-A. • Faaopoopo i ai se faamatalaga i le faailo o le clk i le Taulaga Fa'amatalaga laulau. • Fa'afouina le fa'amatalaga mo le faailo qspi_scein i le Taulaga Fa'amatalaga laulau. • Fa'aopoopoina se fa'amatalaga ile SECTOR_PROTECT resitara ile Resitala Faafanua laulau. • Fa'afouina le laititi ma le lautele mo SECTOR_ERASE ma SUBSECTOR_ERASE resitala i totonu Resitala Faafanua laulau. • Fa'afou le vaega ma le lautele mo SECTOR_PROTECT resitala i le Resitala Faafanua laulau. |
| faaauau… | |||
| Fa'amatalaga Fa'amaumauga | Intel Quartus Prime Version | IP Version | Suiga |
| • Fa'afouina le fa'amatalaga mo le CHIP SELECT filifiliga o le resitara fa'atonu i le Resitala Faafanua laulau.
• Fa'afouina vaefaamatalaga mo le SECTOR_ERASE, SUBSECTOR_ERASE, BULK_ERASE, ma le DIE_ERASE resitala i le Resitala Faafanua laulau. • Fa'afouina le fa'amatalaga mo le vl_mem_addr faailo i le Taulaga Fa'amatalaga laulau. • Fa'atonuga laiti. |
| Aso | Fa'aliliuga | Suiga |
| Me 2017 | 2017.05.08 | Fa'asalalauga muamua. |
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel, ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie i ai i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel ina ia maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua.
*O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
Pepa / Punaoa
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intel ASMI Parallel II Intel FPGA IP [pdf] Taiala mo Tagata Fa'aoga ASMI Parallel II Intel FPGA IP, ASMI, Parallel II Intel FPGA IP, II Intel FPGA IP, FPGA IP |
