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ASMI Parallel II Intel FPGA IP

ASMI Parallel II Intel FPGA IP ọja

ASMI Parallel II Intel® FPGA IP n pese iraye si awọn ohun elo atunto Intel FPGA, eyiti o jẹ iṣeto ni Quad-serial (EPCQ), kekere-vol.tage Quad-tẹlentẹle iṣeto ni (EPCQ-L), ati EPCQ-A ni tẹlentẹle iṣeto ni. O le lo IP yii lati ka ati kọ data si awọn ẹrọ filasi ita fun awọn ohun elo, gẹgẹbi imudojuiwọn eto latọna jijin ati Akọsori Maapu Sensitivity SEU File (.smh) ipamọ.
Miiran ju awọn ẹya ti o ni atilẹyin nipasẹ ASMI Parallel Intel FPGA IP, ASMI Parallel II Intel FPGA IP tun ṣe atilẹyin:

  • Wiwọle filasi taara (kọ/ka) nipasẹ Avalon® ni wiwo ti a ṣe iranti iranti.
  • Forukọsilẹ Iṣakoso fun awọn miiran mosi nipasẹ Iṣakoso ipo Forukọsilẹ (CSR) ni wiwo Avalon iranti-mapped ni wiwo.
  • Tumọ awọn aṣẹ jeneriki lati inu wiwo ti a ya aworan iranti Avalon sinu awọn koodu pipaṣẹ ẹrọ.

ASMI Parallel II Intel FPGA IP wa fun gbogbo awọn idile ẹrọ Intel FPGA pẹlu awọn ẹrọ Intel MAX® 10 ti o nlo ipo GPIO.
ASMI Parallel II Intel FPGA IP nikan ṣe atilẹyin awọn ẹrọ EPCQ, EPCQ-L, ati EPCQ-A. Ti o ba nlo awọn ẹrọ filasi ẹni-kẹta, o gbọdọ lo Generic Serial Flash Interface Intel FPGA IP.
ASMI Parallel II Intel FPGA IP jẹ atilẹyin ni Intel Quartus® Prime software version 17.0 ati siwaju.
Alaye ti o jọmọ

  • Ifihan to Intel FPGA IP ohun kohun
    • Pese alaye gbogbogbo nipa gbogbo awọn ohun kohun Intel FPGA IP, pẹlu parameterizing, ti ipilẹṣẹ, igbegasoke, ati kikopa awọn ohun kohun IP.
  • Ṣiṣẹda Version-Independent IP ati Qsys Simulation Scripts
    • Ṣẹda awọn iwe afọwọkọ iṣeṣiro ti ko nilo awọn imudojuiwọn afọwọṣe fun sọfitiwia tabi awọn iṣagbega ẹya IP.
  • Ise agbese Management Best Àṣà
    • Awọn itọnisọna fun iṣakoso daradara ati gbigbe ti iṣẹ akanṣe rẹ ati IP files.
  • ASMI Parallel Intel FPGA IP mojuto User Itọsọna
  • Generic Serial Flash Interface Intel FPGA IP Itọsọna olumulo
    • Pese atilẹyin fun awọn ẹrọ filasi ẹni-kẹta.
  • AN 720: Simulating ASMI Block ni Apẹrẹ Rẹ

Alaye Tu silẹ

Awọn ẹya IP jẹ kanna bi awọn ẹya sọfitiwia Intel Quartus Prime Design Suite to v19.1. Lati Intel Quartus Prime Design Suite sọfitiwia ẹya 19.2 tabi nigbamii, awọn ohun kohun IP ni ero ikede IP tuntun kan.
Nọmba IP ti ikede (XYZ) le yipada lati ẹya sọfitiwia Intel Quartus Prime kan si omiiran. Iyipada ninu:

  • X tọkasi atunyẹwo pataki ti IP. Ti o ba ṣe imudojuiwọn sọfitiwia Quartus Prime Intel rẹ, o gbọdọ tun IP ṣe.
  • Y tọkasi IP pẹlu awọn ẹya tuntun. Tun IP rẹ ṣe lati ni awọn ẹya tuntun wọnyi.
  • Z tọkasi IP pẹlu awọn ayipada kekere. Tun IP rẹ ṣe lati fi awọn ayipada wọnyi kun.

Tabili 1. ASMI Parallel II Intel FPGA IP Tu Alaye

Nkan Apejuwe
Ẹya IP 18.0
Intel Quartus NOMBA Pro Edition Version 18.0
Ojo ifisile 2018.05.07

Awọn ibudo

olusin 1. Ports Block aworan atọkaASMI Parallel II Intel FPGA IP ọpọtọ 1

Table 2. Ports Apejuwe

Ifihan agbara Ìbú Itọsọna Apejuwe
Avalon Iranti-Mapped Interface Ẹrú fun CSR (avl_csr)
avl_csr_addr 6 Iṣawọle Avalon iranti-mapped ni wiwo adirẹsi akero. Bosi adirẹsi wa ninu ọrọ sisọ.
avl_csr_read 1 Iṣawọle Avalon iranti-mapped ni wiwo ka Iṣakoso si awọn CSR.
avl_csr_rddata 32 Abajade Avalon iranti-mapped ni wiwo ka data akero lati CSR.
avl_csr_write 1 Iṣawọle Avalon iranti-mapped ni wiwo kọ Iṣakoso si awọn CSR.
avl_csr_writedata 32 Iṣawọle Avalon iranti-mapped ni wiwo kọ data akero to CSR.
avl_csr_waitrequest 1 Abajade Avalon iranti-mapped ni wiwo waitrequest Iṣakoso lati CSR.
avl_csr_rddata_wulo 1 Abajade Avalon iranti-mapped ni wiwo ka data wulo ti o tọkasi awọn CSR kika data wa.
Avalon Iranti-Mapped Interface Ẹrú fun Wiwọle Iranti (avl_ mem)
avl_mem_write 1 Iṣawọle Avalon iranti-mapped ni wiwo kọ iṣakoso si iranti
avl_mem_burstcount 7 Iṣawọle Avalon iranti-mapped ni wiwo ti nwaye kika fun iranti. Iye naa wa lati 1 si 64 (iwọn oju-iwe ti o pọju).
avl_mem_waitrequest 1 Abajade Avalon iranti-mapped ni wiwo waitrequest Iṣakoso lati iranti.
avl_mem_read 1 Iṣawọle Avalon iranti-mapped ni wiwo ka Iṣakoso si iranti
avl_mem_addr N Iṣawọle Avalon iranti-mapped ni wiwo adirẹsi akero. Bosi adirẹsi wa ninu ọrọ sisọ.

Iwọn ti adirẹsi naa da lori iwuwo iranti filasi ti a lo.

avl_mem_writedata 32 Iṣawọle Avalon iranti-mapped ni wiwo kọ data akero si iranti
avl_mem_readddata 32 Abajade Avalon iranti-mapped ni wiwo ka data akero lati iranti.
avl_mem_rddata_valid 1 Abajade Avalon iranti-mapped ni wiwo ka data wulo ti o tọkasi awọn iranti kika data wa.
avl_mem_byteenble 4 Iṣawọle Avalon iranti-mapped ni wiwo kọ data jeki akero si iranti. Nigba ti nwaye mode, byteenable akero yoo jẹ kannaa ga, 4'b1111.
Aago ati Tunto
clk 1 Iṣawọle Aago titẹ sii lati ṣe aago IP. (1)
atunto_n 1 Iṣawọle Atunto Asynchronous lati tun IP.(2)
Conduit Interface(3)
fqspi_datajade 4 Iduro ọja Ti nwọle tabi ibudo igbejade lati ifunni data lati ẹrọ filasi.
tesiwaju…
Ifihan agbara Ìbú Itọsọna Apejuwe
qspi_dclk 1 Abajade Pese aago ifihan agbara si awọn filasi ẹrọ.
qspi_scein 1 Abajade Pese ifihan agbara ncs si ẹrọ filasi.

Ṣe atilẹyin Stratix® V, Arria® V, Cyclone® V, ati awọn ẹrọ agbalagba.

3 Abajade Pese ifihan agbara ncs si ẹrọ filasi.

Ṣe atilẹyin Intel Arria 10 ati Intel Cyclone 10 GX awọn ẹrọ.

  • O le ṣeto igbohunsafẹfẹ aago si isalẹ tabi dogba si 50 MHz.
  • Mu ifihan agbara mu fun o kere ju aago kan lati tun IP tunto.
  • Wa nigbati o ba muu Muu paramita wiwo Serial ti o ni igbẹhin ṣiṣẹ.

Alaye ti o jọmọ

  • Iṣeto ni Quad-Serial (EPCQ) Awọn iwe data awọn ẹrọ
  • EPCQ-L Serial iṣeto ni Datasheet Devices
  • EPCQ-A Serial iṣeto ni Datasheet Device

Awọn paramita

Table 3. paramita Eto

Paramita Awọn iye ti ofin Awọn apejuwe
Iru ẹrọ iṣeto ni EPCQ16, EPCQ32, EPCQ64, EPCQ128, EPCQ256, EPCQ512, EPCQ-L256, EPCQ-L512, EPCQ-L1024, EPCQ4A, EPCQ16A, EPCQ32A, EPCQ64A, EPCQ128 Ni pato EPCQ, EPCQ-L, tabi EPCQ-A iru ẹrọ ti o fẹ lati lo.
Yan ipo I/O Deede boṣewa meji Quad Yan gbooro data iwọn nigba ti o ba jeki awọn Yara Ka isẹ.
Pa ifiṣootọ Iroyin Serial ni wiwo Awọn ọna awọn ifihan agbara ASMIBLOCK si ipele oke ti apẹrẹ rẹ.
Mu wiwo awọn pinni SPI ṣiṣẹ Tumọ awọn ifihan agbara ASMIBLOCK si wiwo pin SPI.
Mu awoṣe kikopa filasi ṣiṣẹ Nlo awoṣe kikopa EPCQ 1024 aiyipada fun kikopa. Ti o ba nlo ẹrọ filasi ẹni-kẹta, tọka si AN 720: Simulating ASMI Block ni Apẹrẹ Rẹ lati ṣẹda a murasilẹ lati so awọn filasi awoṣe pẹlu ASMI Block.
Nọmba ti Chip Select lo 1

2(4)

3(4)

Yan awọn nọmba ti ërún yan ti sopọ si filasi.
  • Atilẹyin nikan ni awọn ẹrọ Intel Arria 10, awọn ẹrọ Intel Cyclone 10 GX, ati awọn ẹrọ miiran pẹlu Muu ṣiṣẹ ni wiwo awọn pinni SPI.

Alaye ti o jọmọ

  • Iṣeto ni Quad-Serial (EPCQ) Awọn iwe data awọn ẹrọ
  • EPCQ-L Serial iṣeto ni Datasheet Devices
  • EPCQ-A Serial iṣeto ni Datasheet Device
  • AN 720: Simulating ASMI Block ni Apẹrẹ Rẹ

Forukọsilẹ Map

Table 4. Forukọsilẹ Map

  • Aiṣedeede adirẹsi kọọkan ni tabili atẹle duro fun ọrọ 1 aaye adirẹsi iranti.
  • Gbogbo awọn iforukọsilẹ ni iye aiyipada ti 0x0.
Aiṣedeede Orukọ Iforukọsilẹ R/W Orukọ aaye Bit Ìbú Apejuwe
0 WR_ENA W WR_ENA 0 1 Kọ 1 lati ṣiṣẹ kikọ ṣiṣẹ.
1 WR_DISABLE W WR_DISABLE 0 1 Kọ 1 lati mu ṣiṣẹ kọ.
2 WR_IPO W WR_IPO 7:0 8 Ni alaye ninu lati kọ si iforukọsilẹ ipo.
3 Ipò RD_ R Ipò RD_ 7:0 8 Ni alaye naa lati inu iṣẹ iforukọsilẹ ipo kika.
4 SECTOR_ERASE W Iye Ẹka 23:0

tabi 31:0

24 tabi

32

Ni adiresi eka ti yoo parẹ da lori iwuwo ẹrọ.(5)
5 SUBSECTOR_ERASE W Subsector Iye 23:0

tabi 31:0

24 tabi

32

Ni adiresi apakan apakan lati parẹ da lori iwuwo ẹrọ.(6)
6 – 7 Ni ipamọ
8 Iṣakoso W/R CHIP Yan 7:4 4 Yan ẹrọ filasi. Iwọn aiyipada jẹ 0, eyiti o fojusi ẹrọ filasi akọkọ. Lati yan ẹrọ keji, ṣeto iye si 1, lati yan ẹrọ kẹta, ṣeto iye si 2.
Ni ipamọ
W/R MU 0 1 Ṣeto eyi si 1 lati mu awọn ifihan agbara SPI ti IP kuro nipa fifi gbogbo ifihan agbara si ipo giga-Z.
tesiwaju…
Aiṣedeede Orukọ Iforukọsilẹ R/W Orukọ aaye Bit Ìbú Apejuwe
            Eyi le ṣee lo lati pin ọkọ akero pẹlu awọn ẹrọ miiran.
9 – 12 Ni ipamọ
13 WR_NON_VOLATILE_CONF_REG W Iye owo ti NVCR 15:0 16 Kọ iye to ti kii-iyipada iṣeto ni Forukọsilẹ.
14 RD_NON_VOLATILE_CONF_REG R Iye owo ti NVCR 15:0 16 Ka iye lati ti kii- iyipada iṣeto ni Forukọsilẹ
15 RD_ FLAG_ STATUS_REG R RD_ FLAG_ STATUS_REG 8 8 Ka flag ipo Forukọsilẹ
16 CLR_FLAG_ IPO REG W CLR_FLAG_ IPO REG 8 8 Pa iforukọsilẹ ipo asia kuro
17 BULK_ERASE W BULK_ERASE 0 1 Kọ 1 lati nu gbogbo ërún (fun ẹrọ-ẹyọkan).7)
18 DIE_ERASE W DIE_ERASE 0 1 Kọ 1 lati pa gbogbo kú rẹ kuro (fun ohun elo akopọ-die).7)
19 4BYTES_ADDR_EN W 4BYTES_ADDR_EN 0 1 Kọ 1 lati tẹ 4 baiti adirẹsi mode
20 4BYTES_ADDR_EX W 4BYTES_ADDR_EX 0 1 Kọ 1 lati jade 4 baiti adirẹsi mode
21 SECTOR_PROTECT W Sector Idaabobo iye 7:0 8 Iye lati kọwe si iforukọsilẹ ipo lati daabobo eka kan. (8)
22 RD_MEMORY_CAPACITY_ID R Iye agbara iranti 7:0 8 Ni alaye ID agbara iranti ni ninu.
23 –

32

Ni ipamọ

Iwọ nikan nilo lati pato adirẹsi eyikeyi laarin eka naa ati pe IP yoo pa eka naa kuro.
Iwọ nikan nilo lati pato adirẹsi eyikeyi laarin awọn apakan ati pe IP yoo parẹ apakan apakan yẹn pato.

Alaye ti o jọmọ

  • Iṣeto ni Quad-Serial (EPCQ) Awọn iwe data awọn ẹrọ
  • EPCQ-L Serial iṣeto ni Datasheet Devices
  • EPCQ-A Serial iṣeto ni Datasheet Device
  • Avalon Interface pato

Awọn iṣẹ ṣiṣe

Awọn atọkun ASMI Parallel II Intel FPGA IP jẹ ifaramọ Avalon iranti-aworan atọkun. Fun awọn alaye diẹ sii, tọka si awọn pato Avalon.

  • Iwọ nikan nilo lati pato adirẹsi eyikeyi laarin ku ati IP yoo parẹ iru ku pato naa.
  • Fun EPCQ ati EPCQ-L awọn ẹrọ, awọn Àkọsílẹ Idaabobo bit jẹ die-die [2: 4] ati [6] ati oke / isalẹ (TB) bit jẹ bit 5 ti iforukọsilẹ ipo. Fun awọn ẹrọ EPCQ-A. awọn Àkọsílẹ Idaabobo bit ni o wa die-die [2:4] ati awọn TB bit jẹ bit 5 ti iforukọsilẹ ipo.

Alaye ti o jọmọ

  • Avalon Interface pato

Awọn iṣẹ Iforukọsilẹ Ipo Iṣakoso

O le ṣe kika tabi kọ si aiṣedeede adirẹsi kan pato nipa lilo Iforukọsilẹ Ipo Iṣakoso (CSR).
Lati ṣiṣẹ kika tabi kọ iṣẹ fun iforukọsilẹ ipo iṣakoso, tẹle awọn igbesẹ wọnyi:

  1. So avl_csr_write tabi avl_csr_read ifihan agbara nigba ti
    avl_csr_waitrequest ifihan agbara kekere (ti o ba ti waitrequest ifihan agbara jẹ ga, awọn avl_csr_write tabi avl_csr_read ifihan agbara gbọdọ wa ni ga titi ti waitrequest ifihan agbara lọ kekere).
  2. Ni akoko kanna, ṣeto iye adirẹsi lori ọkọ akero avl_csr_address. Ti o ba jẹ iṣẹ kikọ, ṣeto data iye lori ọkọ akero avl_csr_writedata pọ pẹlu adirẹsi naa.
  3. Ti o ba jẹ idunadura kika, duro titi ami ifihan avl_csr_readdatavalid yoo jẹ giga lati gba data kika naa pada.
  • Fun awọn iṣẹ ṣiṣe ti o nilo iye kikọ si filasi, o gbọdọ ṣe iṣẹ ṣiṣe kikọ ni akọkọ.
  • O gbọdọ ka iforukọsilẹ ipo asia ni gbogbo igba ti o ba fun kikọ tabi pipaṣẹ piparẹ.
  • Ti o ba ti lo ọpọ filasi awọn ẹrọ, o gbọdọ kọ si awọn ërún yan Forukọsilẹ lati yan awọn ti o tọ ërún yan ṣaaju ṣiṣe eyikeyi isẹ si awọn kan pato filasi ẹrọ.

olusin 2. Ka Memory Agbara Forukọsilẹ Waveform Eksample

ASMI Parallel II Intel FPGA IP ọpọtọ 2

olusin 3. Kọ Jeki Forukọsilẹ Waveform Example

ASMI Parallel II Intel FPGA IP ọpọtọ 3

Awọn iṣẹ iranti

ASMI Parallel II Intel FPGA IP iranti ni wiwo ṣe atilẹyin ti nwaye ati wiwọle iranti filasi taara. Lakoko iraye si iranti filasi taara, IP ṣe awọn igbesẹ wọnyi lati gba ọ laaye lati ṣe eyikeyi kika taara tabi iṣẹ kikọ:

  • Kọ ṣiṣẹ fun iṣẹ kikọ
  • Ṣayẹwo iforukọsilẹ ipo asia lati rii daju pe iṣẹ naa ti pari ni filasi
  • Tu ifihan agbara idaduro silẹ nigbati isẹ ba ti pari

Awọn iṣẹ iranti jẹ iru si awọn iṣẹ wiwo ti a ṣe aworan iranti Avalon. O gbọdọ ṣeto iye ti o pe ni bosi adirẹsi, kọ data ti o ba jẹ idunadura kikọ kan, wakọ iye kika ti nwaye si 1 fun idunadura ẹyọkan tabi iye kika ti nwaye ti o fẹ, ati fa ami kikọ tabi kika.

olusin 4. 8-Ọrọ Kọ Burst Waveform Example

ASMI Parallel II Intel FPGA IP ọpọtọ 4

olusin 5. 8-Ọrọ Kika Burst Waveform Example

ASMI Parallel II Intel FPGA IP ọpọtọ 5

olusin 6. 1-Byte Kọ byteenable = 4'b0001 Waveform Eksample

ASMI Parallel II Intel FPGA IP ọpọtọ 6

ASMI Parallel II Intel FPGA IP Lo Case Eksamples

Ọran lilo examples lo ASMI Parallel II IP ati JTAG-to-Avalon Master lati ṣe awọn iṣẹ iraye si filasi, gẹgẹ bi ID ohun alumọni, iranti ka, kọ iranti, paarẹ eka, aabo eka, iforukọsilẹ ipo asia, ati kọ nvcr.
Lati ṣiṣe awọn examples, o gbọdọ tunto FPGA. Tẹle awọn igbesẹ wọnyi:

  1. Ṣe atunto FPGA ti o da lori eto Onise Platform bi o ṣe han ninu eeya atẹle.
    Nọmba 7. Eto Onise Platform Nfihan ASMI Parallel II IP ati JTAG-to-Avalon TituntoASMI Parallel II Intel FPGA IP ọpọtọ 7
  2. Ṣafipamọ iwe afọwọkọ TCL atẹle ni itọsọna kanna bi iṣẹ akanṣe rẹ. Lorukọ iwe afọwọkọ bi epcq128_access.tcl fun example.ASMI Parallel II Intel FPGA IP ọpọtọ 8 ASMI Parallel II Intel FPGA IP ọpọtọ 9 ASMI Parallel II Intel FPGA IP ọpọtọ 10 ASMI Parallel II Intel FPGA IP ọpọtọ 11 ASMI Parallel II Intel FPGA IP ọpọtọ 12
  3. Lọlẹ eto console. Ninu console, orisun iwe afọwọkọ nipa lilo “orisun epcq128_access.tcl”.

Example 1: Ka ohun alumọni ID ti awọn ẹrọ iṣeto ni

ASMI Parallel II Intel FPGA IP ọpọtọ 13

Example 2: Ka ati Kọ Ọrọ kan ti Data ni Adirẹsi H'40000000

ASMI Parallel II Intel FPGA IP ọpọtọ 14

Example 3: Paarẹ Apa 64

ASMI Parallel II Intel FPGA IP ọpọtọ 15

Example 4: Ṣe Idabobo Ẹka ni Awọn apakan (0 si 127)

ASMI Parallel II Intel FPGA IP ọpọtọ 16

Example 5: Ka ati Clear Flag Ipo Forukọsilẹ

ASMI Parallel II Intel FPGA IP ọpọtọ 17ASMI Parallel II Intel FPGA IP ọpọtọ 18

Example 6: Ka ati Kọ nvcr

ASMI Parallel II Intel FPGA IP ọpọtọ 19

ASMI Parallel II Intel FPGA IP Itọsọna olumulo Archives

Awọn ẹya IP jẹ kanna bi awọn ẹya sọfitiwia Intel Quartus Prime Design Suite to v19.1. Lati Intel Quartus Prime Design Suite sọfitiwia ẹya 19.2 tabi nigbamii, awọn ohun kohun IP ni ero ikede IP tuntun kan.
Ti ẹya IP mojuto ko ba ṣe akojọ, itọsọna olumulo fun ẹya IP mojuto ti tẹlẹ kan.

Intel Quartus NOMBA Version IP Core Version Itọsọna olumulo
17.0 17.0 Altera ASMI Parallel II IP mojuto User Itọsọna

Itan Atunyẹwo iwe fun ASMI Parallel II Intel FPGA IP Itọsọna olumulo

Ẹya Iwe aṣẹ Intel Quartus NOMBA Version Ẹya IP Awọn iyipada
2020.07.29 18.0 18.0 • Ṣe imudojuiwọn akọle iwe si ASMI Parallel II Intel FPGA IP Itọsọna olumulo.

• Imudojuiwọn Table 2: paramita Eto ni apakan

Awọn paramita.

2018.09.24 18.0 18.0 Alaye ti a ṣafikun lori awọn ohun elo ati atilẹyin fun ASMI Parallel II Intel FPGA IP mojuto.

Fi kun akọsilẹ kan lati tọka si awọn Generic Serial Flash Interface Intel FPGA IP mojuto User Itọsọna.

Fi kun awọn ASMI Parallel II Intel FPGA IP Core Lo Case Eksamples apakan.

2018.05.07 18.0 18.0 • Lorukọmii Altera ASMI Parallel II IP mojuto to ASMI Parallel II Intel FPGA IP mojuto fun Intel rebranding.

Atilẹyin ti a ṣafikun fun awọn ẹrọ EPCQ-A.

Fikun akọsilẹ kan si ifihan agbara clk ninu Apejuwe Awọn ibudo tabili.

• Imudojuiwọn apejuwe fun qspi_scein ifihan agbara ninu awọn Apejuwe Awọn ibudo tabili.

Ṣe afikun akọsilẹ kan si iforukọsilẹ SECTOR_PROTECT ninu Forukọsilẹ Map tabili.

• Ṣe imudojuiwọn iwọn ati iwọn fun SECTOR_ERASE ati awọn iforukọsilẹ SUBSECTOR_ERASE ninu Forukọsilẹ Map tabili.

• Ti ṣe imudojuiwọn iwọn ati iwọn fun SECTOR_PROTECT

forukọsilẹ ninu awọn Forukọsilẹ Map tabili.

tesiwaju…
Ẹya Iwe aṣẹ Intel Quartus NOMBA Version Ẹya IP Awọn iyipada
      • Imudojuiwọn apejuwe fun aṣayan CHIP YAN ti iforukọsilẹ Iṣakoso ninu awọn Forukọsilẹ Map tabili.

• Ṣe imudojuiwọn awọn akọsilẹ ẹsẹ fun SECTOR_ERASE, SUBSECTOR_ERASE, BULK_ERASE, ati awọn iforukọsilẹ DIE_ERASE ni Forukọsilẹ Map tabili.

• Ṣe imudojuiwọn apejuwe fun vl_mem_addr

ifihan agbara ninu awọn Apejuwe Awọn ibudo tabili.

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Ọjọ Ẹya Awọn iyipada
Oṣu Karun ọdun 2017 2017.05.08 Itusilẹ akọkọ.

Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ.
* Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Awọn iwe aṣẹ / Awọn orisun

intel ASMI Parallel II Intel FPGA IP [pdf] Itọsọna olumulo
ASMI Parallel II Intel FPGA IP, ASMI, Parallel II Intel FPGA IP, II Intel FPGA IP, FPGA IP

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