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ASMI Parallel II Intel FPGA IP

ASMI Parallel II Intel FPGA IP chigadzirwa

Iyo ASMI Parallel II Intel® FPGA IP inopa mukana kune iyo Intel FPGA yekumisikidza michina, inova iyo quad-serial configuration (EPCQ), yakaderera-vol.tage quad-serial configuration (EPCQ-L), uye EPCQ-A serial configuration. Iwe unogona kushandisa iyi IP kuverenga nekunyora data kune ekunze flash zvishandiso zvekushandisa, senge kure kure system update uye SEU Sensitivity Mepu Header. File (.smh) kuchengetedza.
Zvimwe kunze kwezvinhu zvinotsigirwa neASMI Parallel Intel FPGA IP, iyo ASMI Parallel II Intel FPGA IP inotsigirawo:

  • Yakananga flash yekuwana (nyora / verenga) kuburikidza neAvalon® memory-mapped interface.
  • Kudzora rejista kune mamwe ma mashandiro kuburikidza nerejitari yemamiriro ekutonga (CSR) interface muAvalon memory-mapped interface.
  • Shandura mirairo yakajairika kubva kuAvalon memory-mapped interface kuita macode echishandiso.

Iyo ASMI Parallel II Intel FPGA IP inowanikwa kune ese Intel FPGA mudziyo mhuri kusanganisira iyo Intel MAX® 10 zvishandiso zviri kushandisa iyo GPIO modhi.
Iyo ASMI Parallel II Intel FPGA IP inongotsigira EPCQ, EPCQ-L, uye EPCQ-A zvishandiso. Kana iwe uri kushandisa wechitatu-bato flash zvishandiso, unofanirwa kushandisa iyo Generic Serial Flash Interface Intel FPGA IP.
Iyo ASMI Parallel II Intel FPGA IP inotsigirwa muIntel Quartus® Prime software vhezheni 17.0 zvichienda mberi.
Related Information

  • Nhanganyaya kuIntel FPGA IP Cores
    • Inopa ruzivo rwese nezvese Intel FPGA IP cores, kusanganisira parameterizing, kugadzira, kusimudzira, uye kutevedzera IP cores.
  • Kugadzira Shanduro-Yakazvimirira IP uye Qsys Simulation Scripts
    • Gadzira zvinyorwa zvekunyepedzera zvisingade zvigadziriso zvemanyorero zvesoftware kana IP vhezheni kusimudzira.
  • Project Management Best Practices
    • Nhungamiro yekutonga kwakanaka uye kutakurika kweprojekiti yako uye IP files.
  • ASMI Parallel Intel FPGA IP Core User Guide
  • Generic Serial Flash Interface Intel FPGA IP User Guide
    • Inopa rutsigiro rwechitatu-bato flash zvishandiso.
  • AN 720: Kuteedzera iyo ASMI Block mune Yako Dhizaini

Kuburitsa Ruzivo

IP shanduro dzakafanana neIntel Quartus Prime Design Suite software shanduro kusvika v19.1. Kubva kuIntel Quartus Prime Design Suite software vhezheni 19.2 kana gare gare, IP cores ine itsva IP shanduro chirongwa.
Iyo IP vhezheni (XYZ) nhamba inogona kuchinja kubva kune imwe Intel Quartus Prime software shanduro kuenda kune imwe. Shanduko mu:

  • X inoratidza kudzokororwa kukuru kweIP. Kana iwe ukagadziridza yako Intel Quartus Prime software, unofanira kudzorera IP.
  • Y inoratidza iyo IP inosanganisira zvinhu zvitsva. Gadzirisa IP yako kuti ubatanidze zvinhu zvitsva izvi.
  • Z inoratidza iyo IP inosanganisira shanduko diki. Gadzirisa IP yako kuti ubatanidze shanduko idzi.

Tafura 1. ASMI Parallel II Intel FPGA IP Release Information

Item Tsanangudzo
IP Version 18.0
Intel Quartus Prime Pro Edition Shanduro 18.0
Release Date 2018.05.07

Ports

Mufananidzo 1. Ports Block DiagramASMI Parallel II Intel FPGA IP fig 1

Tafura 2. Ports Tsanangudzo

Signal Upamhi Direction Tsanangudzo
Avalon Memory-Mapped Slave Interface yeCSR (avl_csr)
avl_csr_addr 6 Input Avalon memory-mapped interface kero bhazi. Kero bhazi iri mukutaura kwemazwi.
avl_csr_verenga 1 Input Avalon memory-mapped interface kuverenga kutonga kune iyo CSR.
avl_csr_rddata 32 Output Avalon memory-mapped interface verenga data bhazi kubva kuCSR.
avl_csr_write 1 Input Avalon memory-mapped interface kunyora kutonga kuCSR.
avl_csr_writedata 32 Input Avalon memory-mapped interface nyora data bhazi kuCSR.
avl_csr_waitrequest 1 Output Avalon memory-mapped interface waitrequest control kubva kuCSR.
avl_csr_rddata_valid 1 Output Avalon memory-mapped interface kuverenga data inoshanda inoratidza iyo CSR yekuverenga data iripo.
Avalon Memory-Mapped Slave Interface yeMemory Access (avl_ mem)
avl_mem_write 1 Input Avalon memory-mapped interface nyora kutonga kundangariro
avl_mem_burstcount 7 Input Avalon memory-mapped interface yakawedzera kuverenga yendangariro. Huwandu hunobva pa1 kusvika pa64 (hukuru hwepeji saizi).
avl_mem_waitrequest 1 Output Avalon memory-mapped interface waitrequest control kubva mundangariro.
avl_mem_read 1 Input Avalon memory-mapped interface kuverenga kutonga kundangariro
avl_mem_addr N Input Avalon memory-mapped interface kero bhazi. Kero bhazi iri mukutaura kwemazwi.

Kufara kwekero kunoenderana ne flash memory density inoshandiswa.

avl_mem_writedata 32 Input Avalon memory-mapped interface nyora data bhazi kundangariro
avl_mem_readddata 32 Output Avalon memory-mapped interface verenga data bhazi kubva mundangariro.
avl_mem_rddata_valid 1 Output Avalon memory-mapped interface verenga data inoshanda inoratidza ndangariro kuverenga data iripo.
avl_mem_byteenble 4 Input Avalon memory-mapped interface nyora data inogonesa bhazi kundangariro. Munguva yekuputika modhi, byteenable bhazi rinenge rakakwirira, 4'b1111.
Clock uye Reset
clk 1 Input Isa wachi kuti uvhare IP. (1)
reset_n 1 Input Asynchronous reset kuti uise patsva IP.(2)
Conduit Interface(3)
fqspi_dataout 4 Bidirectional Kupinza kana kubuda chiteshi kudyisa data kubva kune flash mudziyo.
akaenderera…
Signal Upamhi Direction Tsanangudzo
qspi_dclk 1 Output Inopa chiratidzo chewachi kune iyo flash kifaa.
qspi_scein 1 Output Inopa iyo ncs chiratidzo kune iyo flash kifaa.

Inotsigira Stratix® V, Arria® V, Cyclone® V, uye zvishandiso zvekare.

3 Output Inopa iyo ncs chiratidzo kune iyo flash kifaa.

Inotsigira Intel Arria 10 uye Intel Cyclone 10 GX zvishandiso.

  • Unogona kuseta frequency yewachi kudzikira kana kuenzana ne50 MHz.
  • Bata chiratidzo kweinenge wachi imwe kutenderera kuti uise zvakare IP.
  • Inowanikwa kana iwe uchigonesa Disable yakatsaurwa Active Serial interface parameter.

Related Information

  • Quad-Serial Configuration (EPCQ) Devices Datasheet
  • EPCQ-L Serial Configuration Devices Datasheet
  • EPCQ-A Serial Configuration Device Datasheet

Parameters

Tafura 3. Parameter Settings

Parameter Mitemo Yemitemo Tsanangudzo
Configuration mudziyo mhando EPCQ16, EPCQ32, EPCQ64, EPCQ128, EPCQ256, EPCQ512, EPCQ-L256, EPCQ-L512, EPCQ-L1024, EPCQ4A, EPCQ16A, EPCQ32A, EPCQ64A, EPCQ128A Inotsanangura EPCQ, EPCQ-L, kana EPCQ-A rudzi rwemudziyo waunoda kushandisa.
Sarudza I/O modhi NORMAL STANDARD DUAL QUAD Inosarudza yakawedzera upamhi hwe data paunogonesa iyo Fast Read mashandiro.
Dzima yakatsaurwa Active Serial interface Inoendesa masaini eASMIBLOCK kusvika padanho repamusoro redhizaini yako.
Gonesa SPI mapini interface Inoshandura masaini eASMIBLOCK kuenda kuSPI pin interface.
Gonesa flash simulation modhi Inoshandisa iyo yakasarudzika EPCQ 1024 simulation modhi yekufananidza. Kana uri kushandisa chechitatu-bato flash mudziyo, tarisa AN 720: Kuteedzera iyo ASMI Block mune Yako Dhizaini kugadzira wrapper yekubatanidza iyo flash modhi neASMI Block.
Nhamba yeChip Sarudzo yakashandiswa 1

2(4)

3(4)

Inosarudza nhamba ye chip yakasarudzwa yakabatana kune flash.
  • Inongotsigirwa muIntel Arria 10 zvishandiso, Intel Cyclone 10 GX madivayiri, uye zvimwe midziyo ine Enable SPI pini interface inogoneswa.

Related Information

  • Quad-Serial Configuration (EPCQ) Devices Datasheet
  • EPCQ-L Serial Configuration Devices Datasheet
  • EPCQ-A Serial Configuration Device Datasheet
  • AN 720: Kuteedzera iyo ASMI Block mune Yako Dhizaini

Register Mepu

Tafura 4. Nyora Mepu

  • Imwe neimwe kero yekubvisa mutafura inotevera inomiririra 1 izwi rendangariro kero nzvimbo.
  • Marejista ese ane mutengo wakasarudzika we0x0.
Offset Register Zita R/W Zita remunda Bit Upamhi Tsanangudzo
0 WR_ENABLE W WR_ENABLE 0 1 Nyora 1 kuti uite kunyora kugonesa.
1 WR_DISABLE W WR_DISABLE 0 1 Nyora 1 kuita kunyora kudzima.
2 WR_STATUS W WR_STATUS 7:0 8 Iine ruzivo rwekunyorera kurejista yemamiriro.
3 RD_STATUS R RD_STATUS 7:0 8 Iine ruzivo kubva pakuverenga mamiriro ekurejisa maitiro.
4 SEKTA_ERASE W Sector Value 23:0

kana 31:0

24 kana

32

Iva nekero yechikamu ichadzimwa zvichienderana nekuwanda kwemudziyo.(5)
5 SUBSECTOR_ERASE W Subsector Kukosha 23:0

kana 31:0

24 kana

32

Rine kero yechikamu chinodzimwa zvichienderana nekuwanda kwemudziyo.(6)
6-7 Reserved
8 KUDZORA W/R CHIP SARUDZA 7:4 4 Inosarudza flash device. Iyo yakasarudzika kukosha ndeye 0, iyo inotarisa yekutanga flash mudziyo. Kusarudza mudziyo wechipiri, isa kukosha ku1, kusarudza mudziyo wechitatu, isa kukosha ku2.
Reserved
W/R DIMA 0 1 Isa izvi ku1 kudzima masaini eSPI eIP nekuisa chiratidzo chese chinobuda kune yakakwirira-Z nyika.
akaenderera…
Offset Register Zita R/W Zita remunda Bit Upamhi Tsanangudzo
            Izvi zvinogona kushandiswa kugovera bhazi nemimwe michina.
9-12 Reserved
13 WR_NON_VOLATILE_CONF_REG W NVCR mutengo 15:0 16 Inonyora kukosha kune isiri-volatile configuration register.
14 RD_NON_VOLATILE_CONF_REG R NVCR mutengo 15:0 16 Inoverenga kukosha kubva kune isina- volatile configuration register
15 RD_ FLAG_ STATUS_REG R RD_ FLAG_ STATUS_REG 8 8 Inoverenga chimiro chemureza
16 CLR_FLAG_ STATUS REG W CLR_FLAG_ STATUS REG 8 8 Inodzima rejisita yemureza
17 BULK_ERASE W BULK_ERASE 0 1 Nyora 1 kudzima chip yese (yemudziyo unofa kamwe chete).(7)
18 DIE_ERASE W DIE_ERASE 0 1 Nyora 1 kuti udzime kufa kwese (kune stack-die mudziyo).(7)
19 4BYTES_ADDR_EN W 4BYTES_ADDR_EN 0 1 Nyora 1 kuti uise 4 bytes kero mode
20 4BYTES_ADDR_EX W 4BYTES_ADDR_EX 0 1 Nyora 1 kubuda 4 bytes kero mode
21 SEKTA_PROTECT W Sector kuchengetedza kukosha 7:0 8 Kukosha kwekunyora kune chimiro chekunyoresa kuchengetedza chikamu. (8)
22 RD_MEMORY_CAPACITY_ID R Memory capacity value 7:0 8 Iine ruzivo rwememory capacity ID.
23 -

32

Reserved

Iwe unongoda kudoma chero kero mukati mechikamu uye iyo IP ichadzima iyo chaiyo chikamu.
Iwe unongoda kudoma chero kero mukati mechikamu uye IP inodzima iyo chaiyo chikamu.

Related Information

  • Quad-Serial Configuration (EPCQ) Devices Datasheet
  • EPCQ-L Serial Configuration Devices Datasheet
  • EPCQ-A Serial Configuration Device Datasheet
  • Avalon Interface Specifications

Operations

Iyo ASMI Parallel II Intel FPGA IP interfaces ndeye Avalon memory-mapped interface inoenderana. Kuti uwane rumwe ruzivo, tarisa kune iyo Avalon yakatarwa.

  • Iwe unongoda kutsanangura chero kero mukati mekufa uye IP inodzima iyo chaiyo kufa.
  • Kune EPCQ uye EPCQ-L zvishandiso, iyo block inodzivirira bit [2:4] uye [6] uye yepamusoro/pasi (TB) bhiti ibhiti 5 yezita rerejista. Ye EPCQ-A zvishandiso. iyo block protect bit idiki [2:4] uye iyo TB bit i5 yezita rerejista.

Related Information

  • Avalon Interface Specifications

Kudzora Status Register Mashandiro

Unogona kuverenga kana kunyora kune imwe kero yekubvisa uchishandisa iyo Control Status Register (CSR).
Kuti uite basa rekuverenga kana kunyora rerejista yemamiriro ekutonga, tevera matanho aya:

  1. Rongedza iyo avl_csr_write kana avl_csr_read chiratidzo apo iyo
    avl_csr_waitrequest siginecha yakaderera (kana iyo waitrequest siginecha yakakwira, iyo avl_csr_write kana avl_csr_read chiratidzo inofanirwa kuchengetwa yakakwira kusvika chiratidzo chekumirira chadzikira).
  2. Panguva imwecheteyo, isa kukosha kwekero pane avl_csr_address bhazi. Kana iri basa rekunyora, isa kukosha kwedhata paavl_csr_writedata bhazi pamwe nekero.
  3. Kana iri yekuverenga dhizaini, mirira kusvika iyo avl_csr_readdatavalid siginecha yanzi yakakwira kuti utore data rakaverengwa.
  • Pamashandisirwo anoda kukosha kwekunyora kupenya, unofanirwa kuita kunyorera kugonesa oparesheni kutanga.
  • Iwe unofanirwa kuverenga iyo mureza mamiriro erejista pese paunopa kunyora kana kudzima kuraira.
  • Kana akawanda maflash maturusi akashandiswa, unofanirwa kunyorera kune chip sarudza rejista kuti usarudze chaiyo chip sarudza usati waita chero oparesheni kune chaiyo flash mudziyo.

Mufananidzo 2. Verenga Memory Capacity Register Waveform Example

ASMI Parallel II Intel FPGA IP fig 2

Mufananidzo 3. Nyora Inogonesa Register Waveform Example

ASMI Parallel II Intel FPGA IP fig 3

Memory Operations

Iyo ASMI Parallel II Intel FPGA IP memory interface inotsigira kuputika uye yakananga flash memory kuwana. Munguva yekunanga flash memory yekuwana, iyo IP inoita anotevera matanho ekubvumidza iwe kuita chero yakananga kuverenga kana kunyora oparesheni:

  • Nyora inogonesa yekunyora kushanda
  • Tarisa mureza chimiro rejista kuti uve nechokwadi chekuti oparesheni yapera paflash
  • Sunungura chiratidzo chekumirira kana kushanda kwapera

Memory mashandiro akafanana neAvalon memory-mapped interface mashandiro. Iwe unofanirwa kuseta iyo chaiyo kukosha kukero bhazi, nyora data kana iri dhizaini yekunyora, tyaira iyo kuputika kuverenga kukosha kune 1 kune imwechete transaction kana yako yaunoda kuputika kuverenga kukosha, uye kukonzeresa kunyora kana kuverenga chiratidzo.

Mufananidzo 4. 8-Shoko Nyora Burst Waveform Example

ASMI Parallel II Intel FPGA IP fig 4

Mufananidzo 5. 8-Kuverenga Shoko Kuputika Waveform Example

ASMI Parallel II Intel FPGA IP fig 5

Mufananidzo 6. 1-Byte Nyora byteenable = 4'b0001 Waveform Example

ASMI Parallel II Intel FPGA IP fig 6

ASMI Parallel II Intel FPGA IP Shandisa Nyaya Examples

Iyo yekushandisa kesi exampshandisa iyo ASMI Parallel II IP uye JTAG-ku-Avalon Master kuita flash access mashandiro, akadai sekuverenga silicon ID, kuverenga ndangariro, kunyora ndangariro, chikamu kudzima, chikamu chekuchengetedza, yakajeka mureza mamiriro regi uye nyora nvcr.
Kumhanya exampzvishoma, iwe unofanirwa kugadzirisa iyo FPGA. Tevera matanho aya:

  1. Gadzirisa iyo FPGA yakavakirwa paPlatform Designer system sezvakaratidzwa mumufananidzo unotevera.
    Mufananidzo 7. Platform Designer System Inoratidza iyo ASMI Parallel II IP uye JTAG-ku-Avalon MasterASMI Parallel II Intel FPGA IP fig 7
  2. Sevha inotevera TCL script mune imwecheteyo dhairekitori seprojekiti yako. Doma chinyorwa ichi sepcq128_access.tcl che example.ASMI Parallel II Intel FPGA IP fig 8 ASMI Parallel II Intel FPGA IP fig 9 ASMI Parallel II Intel FPGA IP fig 10 ASMI Parallel II Intel FPGA IP fig 11 ASMI Parallel II Intel FPGA IP fig 12
  3. Tanga system console. Mukoni, bvisa chinyorwa nekushandisa "source epcq128_access.tcl".

Example 1: Verenga iyo Silicon ID yeZvigadziriso Zvishandiso

ASMI Parallel II Intel FPGA IP fig 13

Example 2: Verenga uye Nyora Izwi Rimwechete reData paKero H'40000000

ASMI Parallel II Intel FPGA IP fig 14

ExampLe 3: Dzima Chikamu 64

ASMI Parallel II Intel FPGA IP fig 15

Example 4: Ita Sector Protect kuSectors (0 kusvika 127)

ASMI Parallel II Intel FPGA IP fig 16

Example 5: Verenga uye Bvisa Mureza Status Register

ASMI Parallel II Intel FPGA IP fig 17ASMI Parallel II Intel FPGA IP fig 18

Example 6: Verenga uye Nyora nvcr

ASMI Parallel II Intel FPGA IP fig 19

ASMI Parallel II Intel FPGA IP User Guide Archives

IP shanduro dzakafanana neIntel Quartus Prime Design Suite software shanduro kusvika v19.1. Kubva kuIntel Quartus Prime Design Suite software vhezheni 19.2 kana gare gare, IP cores ine itsva IP shanduro chirongwa.
Kana IP core vhezheni isina kunyorwa, gwara remushandisi rekare IP core version rinoshanda.

Intel Quartus Prime Version IP Core Version User Guide
17.0 17.0 Altera ASMI Parallel II IP Core User Guide

Gwaro Revision Nhoroondo yeASMI Parallel II Intel FPGA IP Mushandisi Wekushandisa

Document Version Intel Quartus Prime Version IP Version Kuchinja
2020.07.29 18.0 18.0 • Vandudza zita regwaro ku ASMI Parallel II Intel FPGA IP User Guide.

• Updated Tafura 2: Parameter Settings muchikamu

Parameters.

2018.09.24 18.0 18.0 • Yakawedzera ruzivo nezve maapplication uye rutsigiro rweASMI Parallel II Intel FPGA IP musimboti.

• Akawedzera chinyorwa chekutaura kune Generic Serial Flash Interface Intel FPGA IP Core User Guide.

• Added the ASMI Parallel II Intel FPGA IP Core Shandisa Nyaya Examples chikamu.

2018.05.07 18.0 18.0 • Yakanzizve Altera ASMI Parallel II IP musimboti kuita ASMI Parallel II Intel FPGA IP musimboti paIntel rebranding.

• Yakawedzerwa tsigiro yeEPCQ-A zvishandiso.

• Yakawedzera chinyorwa kuchiratidzo che clk mu Zviteshi Zvengarava table.

• Yakagadziridza tsananguro yechiratidzo cheqspi_scein mu Zviteshi Zvengarava table.

• Yakawedzera chinyorwa kuSECTOR_PROTECT rejista mu Register Mepu table.

• Yakagadziridza bhiti nehupamhi hweSECTOR_ERASE uye SUBSECTOR_ERASE maregister mu Register Mepu table.

• Yakagadziridza bhiti nehupamhi hweSECTOR_PROTECT

rejista mu Register Mepu table.

akaenderera…
Document Version Intel Quartus Prime Version IP Version Kuchinja
      • Yakagadziridza tsananguro yeCHIP SELECT sarudzo yekunyoresa CONTROL mu Register Mepu table.

• Zvakagadziridza zvinyorwa zvezasi zveSECTOR_ERASE, SUBSECTOR_ERASE, BULK_ERASE, uye DIE_ERASE marejista mu Register Mepu table.

• Vandudza tsananguro yevl_mem_addr

chiratidzo mu Zviteshi Zvengarava table.

• Zvinyorwa zvidiki zvekupepeta.

 

Date Version Kuchinja
Chivabvu 2017 2017.05.08 Kusunungurwa kwekutanga.

Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, uye mamwe maIntel mamaki zviratidzo zveIntel Corporation kana vatsigiri vayo. Intel inobvumidza kuita kwayo FPGA uye semiconductor zvigadzirwa kune zvazvino zvirevo zvinoenderana neIntel's standard waranti, asi inochengetera kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi.
*Mamwe mazita nemhando zvinogona kunzi ndezvevamwe.

Zvinyorwa / Zvishandiso

Intel ASMI Parallel II Intel FPGA IP [pdf] Bhuku reMushandisi
ASMI Parallel II Intel FPGA IP, ASMI, Parallel II Intel FPGA IP, II Intel FPGA IP, FPGA IP

References

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