MICROCHIP DDR AXI4 Arbiter

Nhanganyaya: Iyo AXI4-Stream protocol standard inoshandisa izwi rekuti Master uye Muranda. Iyo yakaenzana Microchip terminology inoshandiswa mugwaro iri ndeye Initiator uye Target, zvichiteerana.
Pfupiso: Tafura inotevera inopa pfupiso yeDDR AXI4 Arbiter maitiro.

Hunhu	Value
Core Version	DDR AXI4 Arbiter v2.2
Inotsigirwa Mudziyo Mhuri	–
Inotsigirwa Tool Flow Licensing	–

Features: DDR AXI4 Arbiter ine zvinotevera zvakakosha maficha:

• IP musimboti unofanirwa kuiswa kune IP Catalog yeLibero SoC software.
• Iyo musimboti inogadziriswa, inogadzirwa, uye inomisikidzwa mukati meiyo SmartDesign chishandiso chekuisirwa muLibero chirongwa rondedzero.

Kushandiswa Kwemudziyo uye Kuita:

Device Details	Mhuri	Mudziyo	Zviwanikwa	Kuita (MHz)
LUTs DFF RAMs LSRAM SRAM Math Blocks Chip Globals	PolarFire	MPF300T-1	5411 4202	266

Tsanangudzo Yekushanda

Tsanangudzo Yekushanda Ichi chikamu chinotsanangura zvekushandisa zveDDR_AXI4_Arbiter. Iyi inotevera nhamba inoratidza yepamusoro-yepini-kunze dhayagiramu yeDDR AXI4 Arbiter.

DDR_AXI4_Arbiter Parameters uye Interface Signals

Magadzirirwo Settings:
Zvigadziriso zveDDR_AXI4_Arbiter hazvina kutaurwa mugwaro iri.

Zvinopinza uye Zvinobuda Zviratidzo:
Iyo yekupinza uye yekuburitsa masaini eDDR_AXI4_Arbiter haana kutaurwa mugwaro iri.

Madhiyamu enguva
Madhayagiramu enguva eDDR_AXI4_Arbiter haana kutaurwa mugwaro iri.

Testbench

Simulation:
Iwo ekufananidza iwo eDDR_AXI4_Arbiter haana kutaurwa mugwaro iri.
Revision History
Nhoroondo yekudzokorora yeDDR_AXI4_Arbiter haina kutaurwa mugwaro iri.
Microchip FPGA Tsigiro
Iyo Microchip FPGA Tsigiro ruzivo rweDDR_AXI4_Arbiter haina kutaurwa mugwaro iri.

Mirayiridzo Yekushandiswa Kwechigadzirwa

1. Isa DDR AXI4 Arbiter v2.2 kune IP Catalog yeLibero SoC software.
2. Gadzirisa, gadzira uye simbisa iyo musimboti mukati meiyo SmartDesign chishandiso chekuisirwa muLibero chirongwa rondedzero.

Nhanganyaya (Bvunza Mubvunzo)

Memory chikamu chakakosha cheiyo chero yakajairwa vhidhiyo uye mifananidzo yekushandisa. Iwo anoshandiswa kubhafa ese evhidhiyo mafuremu kana ndangariro yenzvimbo yeFPGA isina kukwana kubata furemu yese. Kana paine akawanda kuverenga uye kunyora emavhidhiyo mafuremu muDDR, mutsigiri anozodikanwa kugadzirisa pakati pezvikumbiro zvakawanda. Iyo DDR AXI4 Arbiter IP inopa 8 kunyora zviteshi zvekunyora furemu buffers mune yekunze DDR ndangariro uye 8 yekuverenga chiteshi kuverenga mafuremu kubva kunze ndangariro. Kupopotedzana kwakavakirwa pahwaro hwekutanga-kuuya, hwekutanga kushandira. Kana zvikumbiro zviviri zvikaitika panguva imwe chete, chiteshi chine nhamba yakaderera yechiteshi chinozonyanya kukosha. Iyo arbiter inobatanidza neDDR controller IP kuburikidza neAXI4 interface. Iyo DDR AXI4 Arbiter inopa AXI4 Initiator interface kune DDR pane-chip controllers. Iyo arbiter inotsigira anosvika masere ekunyora chiteshi uye masere ekuverenga chiteshi. Iyo block inogadzirisa pakati sere kuverenga chiteshi kuti ipe mukana kune iyo AXI yekuverenga chiteshi nenzira yekutanga-kuuya, yekutanga-yakashumirwa. Iyo block inopindirana pakati pemasere ekunyora chiteshi kuti ipe mukana kune iyo AXI yekunyora chiteshi nenzira yekutanga-kuuya, yekutanga-yakashandirwa. Nzira sere dzese dzekuverenga nekunyora dzine kukosha kwakaenzana. Iyo AXI4 Initiator interface yeArbiter IP inogona kugadzirwa kune akasiyana data upamhi kubva pa64 bits kusvika 512 bits.
Zvakakosha: Iyo AXI4-Stream protocol standard inoshandisa izwi rekuti "Tenzi" uye "Muranda". Iyo yakaenzana Microchip terminology inoshandiswa mugwaro iri ndeye Initiator uye Target, zvichiteerana.
Pfupiso (Bvunza Mubvunzo)
Tafura inotevera inopa pfupiso yeDDR AXI4 Arbiter maitiro.

Tafura 1. DDR AXI4 Arbiter Hunhu

Gwaro iri rinoshanda kuDDR AXI4 Arbiter v2.2.

• PolarFire® SoC
• PolarFire
• RTG4™
• IGLOO® 2
• SmartFusion® 2

Inoda Libero® SoC v12.3 kana gare gare kuburitswa. Iyo IP inogona kushandiswa muRTL modhi pasina chero rezinesi. Kuti uwane rumwe ruzivo, ona DDR_AXI4_Arbiter.

Zvimiro (Bvunza Mubvunzo)

DDR AXI4 Arbiter ine zvinotevera zvakakosha maficha:

• Masere Nyora chiteshi
• Eight Read channels
• AXI4 Interface kune DDR controller
• Configurable AXI4 hupamhi: 64, 128, 256, uye 512 bits
• Configurable Kero hupamhi: 32 kusvika 64 bits

Kuitwa kweIP Core muLibero® Dhizaini Suite (Bvunza Mubvunzo)
IP musimboti unofanirwa kuiswa kune IP Catalog yeLibero SoC software. Izvi zvinoiswa otomatiki kuburikidza neiyo IP Catalog yekuvandudza basa muLibero SoC software, kana iyo IP musimboti inotorwa nemaoko kubva pakatalogi. Kana iyo IP musimboti yaiswa muLibero SoC software IP Catalog, iyo musimboti inogadziriswa, inogadzirwa, uye inomisikidzwa mukati meiyo SmartDesign chishandiso chekuisirwa muLibero chirongwa rondedzero.
Kushandiswa Kwemudziyo uye Kuita (Bvunza Mubvunzo)
Tafura inotevera inonyora mashandisirwo emudziyo anoshandiswa kuDDR_AXI4_Arbiter.
Tafura 2. DDR_AXI4_Arbiter Kushandiswa

Mudziyo Details		Zviwanikwa		Kuita (MHz)	RAMs		Math Blocks	Chip Globals
Mhuri	Mudziyo	LUTs	DFF		LSRAM	μSRAM
PolarFire® SoC	MPFS250T-1	5411	4202	266	13	1	0	0
PolarFire	MPF300T-1	5411	4202	266	13	1	0	0
SmartFusion® 2	M2S150-1	5546	4309	192	15	1	0	0

Zvakakosha:

• Iyo data iri mutafura yapfuura inotorwa uchishandisa yakajairwa synthesis uye marongero. Iyo IP inogadzirirwa sere kunyora chiteshi, sere kuverenga chiteshi, kero hupamhi hwe32 bit, uye data hupamhi hwe512 bits kumisikidza.
• Wachi inomanikidzwa kusvika ku200 MHz paunenge uchimhanyisa ongororo yenguva kuti uwane huwandu hwekuita.

Tsanangudzo Yekushanda (Bvunza Mubvunzo)
Ichi chikamu chinotsanangura zvekushandisa zveDDR_AXI4_Arbiter. Iyi inotevera nhamba inoratidza yepamusoro-yepini-kunze dhayagiramu yeDDR AXI4 Arbiter. Mufananidzo 1-1. Yepamusoro-Level Pin-Out Block Diagram yeNative Arbiter Interface

Iyi inotevera nhamba inoratidza iyo system-level block dhizaini yeDDR_AXI4_Arbiter muBus interface mode. Mufananidzo 1-2. System-Level Block Diagram yeDDR_AXI4_Arbiter

Kudhinda kwekuverenga kunokonzereswa nekuisa chiratidzo chekuisa r(x)_req_i kumusoro pane imwe chiteshi chekuverenga. Iyo arbiter inopindura nekubvuma kana yagadzirira kushandira chikumbiro chekuverenga. Zvadaro sampLes kero yekutanga yeAXI uye inoverenga saizi yakaputika iyo inoiswa kubva kune yekunze initiator. Iyo chiteshi inobata zvinopinza uye inogadzira inodiwa AXI kutengeserana kuverenga data kubva kuDDR memory. Iyo yekuverenga data inobuda kubva kune arbiter yakajairika kune ese akaverengwa machani. Panguva yekuverengerwa data, iyo data yekuverenga inoshanda yeinoenderana chiteshi inokwira. Mhedziso yekuverenga dhizaini inoratidzwa nechiratidzo chekuverenga-chakaitwa kana mabheti ese akakumbirwa atumirwa. Zvakafanana nekuverenga kutengeserana, kunyorera kutengeserana kunokonzerwa nekuisa chiratidzo chekuisa w(x)_req_i yakakwirira. Pamwe chete nechiratidzo chekukumbira, kero yekutanga yekunyora uye kureba kwekuputika kunofanirwa kupihwa panguva yekukumbira. Kana iyo arbiter iripo yekushandira chikumbiro chakanyorwa, inopindura nekutumira chiratidzo chekubvuma pane inoenderana chiteshi. Ipapo mushandisi anofanira kupa iyo yekunyora data pamwe neiyo data-inoshanda chiratidzo pane chiteshi. Huwandu hwewachi iyo data inoshanda nguva yakakwira inofanirwa kuenderana nehurefu hwekuputika. Iyo arbiter inopedzisa basa rekunyora uye inoseta iyo yakanyorwa yaitwa chiratidzo kumusoro inoratidza kupedzwa kwekunyora kutengeserana.
DDR_AXI4_Arbiter Parameters uye Interface Signals (Bvunza Mubvunzo)
Ichi chikamu chinokurukura maparameter muDDR_AXI4_Arbiter GUI configurator uye I/O zviratidzo.
2.1 Zvigadziriso Zvirongwa (Bvunza Mubvunzo)
Tafura inotevera inonyora tsananguro yezvigadziriso zvimiro zvinoshandiswa mukuitwa kwehardware yeDDR_AXI4_Arbiter. Aya ndiwo generic parameters uye anogona kusiana zvichienderana nezvinodiwa zvekushandisa.

Tafura 2-1. Configuration Parameter

Signal Zita	Tsanangudzo
AXI ID Width	Inotsanangura iyo AXI ID hupamhi.
AXI Data Width	Inotsanangura iyo AXI data upamhi.
AXI Kero Upamhi	Inotsanangura iyo AXI kero hupamhi
Nhamba yeRead channels	Sarudzo dzekusarudza inodiwa kwete yekunyora chiteshi kubva kune yekudonhedza-pasi menyu kubva kune imwe chiteshi kusvika masere ekunyora chiteshi.
Nhamba yeNyora zviteshi	Sarudzo dzekusarudza inodiwa kwete yematanho ekuverenga kubva kune yekudonhedza-pasi menyu kubva kune imwe chiteshi kusvika masere ekuverenga chiteshi.
AXI4_SELECTION	Sarudzo dzekusarudza pakati peAXI4_MASTER neAXI4_MIRRORED_SLAVE.
Arbiter Interface	Sarudzo yekusarudza iyo bhazi interface.

Zvinopinza uye Zvinobuda Zviratidzo (Bvunza Mubvunzo)
Iri tafura rinotevera rinoratidza zvinopinza uye zvinobuda zviteshi zveDDR AXI4 Arbiter yeBus interface.
Tafura 2-2. Input and Output Ports for Arbiter Bus Interface

Signal Zita	Direction	Upamhi	Tsanangudzo
reset_i	Input	—	Active Low asynchronous reset chiratidzo chekugadzira
sys_ckl_i	Input	—	System wachi
ddr_ctrl_ready_i	Input	—	Inogamuchira yakagadzirira Yekupinda chiratidzo kubva kuDDR controller
ARVALID_I_0	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 0
ARSIZE_I_0	Input	8 zvishoma	verenga kuputika saizi kubva kuverenga chiteshi 0
ARADDR_I_0	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 0
ARREADY_O_0	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 0
RVALID_O_0	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 0
RDATA_O_0	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 0
RLAST_O_0	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 0
BUSER_O_r0	Output	—	Verenga kupedza kuverenga chiteshi 0
ARVALID_I_1	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 1
ARSIZE_I_1	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 1
ARADDR_I_1	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 1
ARREADY_O_1	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 1
RVALID_O_1	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 1
RDATA_O_1	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 1
RLAST_O_1	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 1
BUSER_O_r1	Output	—	Verenga kupedza kuverenga chiteshi 1
ARVALID_I_2	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 2

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
ARSIZE_I_2	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 2
ARADDR_I_2	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 2
ARREADY_O_2	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 2
RVALID_O_2	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 2
RDATA_O_2	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 2
RLAST_O_2	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 2
BUSER_O_r2	Output	—	Verenga kupedza kuverenga chiteshi 2
ARVALID_I_3	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 3
ARSIZE_I_3	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 3
ARADDR_I_3	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 3
ARREADY_O_3	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 3
RVALID_O_3	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 3
RDATA_O_3	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 3
RLAST_O_3	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 3
BUSER_O_r3	Output	—	Verenga kupedza kuverenga chiteshi 3
ARVALID_I_4	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 4
ARSIZE_I_4	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 4
ARADDR_I_4	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 4
ARREADY_O_4	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 4
RVALID_O_4	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 4
RDATA_O_4	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 4
RLAST_O_4	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 4
BUSER_O_r4	Output	—	Verenga kupedza kuverenga chiteshi 4
ARVALID_I_5	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 5
ARSIZE_I_5	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 5
ARADDR_I_5	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 5
ARREADY_O_5	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 5
RVALID_O_5	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 5
RDATA_O_5	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 5
RLAST_O_5	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 5
BUSER_O_r5	Output	—	Verenga kupedza kuverenga chiteshi 5
ARVALID_I_6	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 6
ARSIZE_I_6	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 6
ARADDR_I_6	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 6
ARREADY_O_6	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 6
RVALID_O_6	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 6
RDATA_O_6	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 6
RLAST_O_6	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 6

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
BUSER_O_r6	Output	—	Verenga kupedza kuverenga chiteshi 6
ARVALID_I_7	Input	—	Verenga chikumbiro kubva kuverenga chiteshi 7
ARSIZE_I_7	Input	8 zvishoma	Verenga kuputika saizi kubva kuverenga chiteshi 7
ARADDR_I_7	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 7
ARREADY_O_7	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kuverenga chiteshi 7
RVALID_O_7	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 7
RDATA_O_7	Output	[AXI_DATA_WIDTH-1 : 0]	Verenga data kubva kuverenga chiteshi 7
RLAST_O_7	Output	—	Verenga kupera kweiyo furemu chiratidzo kubva kuverenga chiteshi 7
BUSER_O_r7	Output	—	Verenga kupedza kuverenga chiteshi 7
AWSIZE_I_0	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 0
WDATA_I_0	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 0
WVALID_I_0	Input	—	Nyora data inoshanda kunyora chiteshi 0
AWVALID_I_0	Input	—	Nyora chikumbiro kubva kunyora chiteshi 0
AWADDR_I_0	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 0
AWREADY_O_0	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 0
BUSER_O_0	Output	—	Nyora kupedzisa kunyora chiteshi 0
AWSIZE_I_1	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 1
WDATA_I_1	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 1
WVALID_I_1	Input	—	Nyora data inoshanda kunyora chiteshi 1
AWVALID_I_1	Input	—	Nyora chikumbiro kubva kunyora chiteshi 1
AWADDR_I_1	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 1
AWREADY_O_1	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 1
BUSER_O_1	Output	—	Nyora kupedzisa kunyora chiteshi 1
AWSIZE_I_2	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 2
WDATA_I_2	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 2
WVALID_I_2	Input	—	Nyora data inoshanda kunyora chiteshi 2
AWVALID_I_2	Input	—	Nyora chikumbiro kubva kunyora chiteshi 2
AWADDR_I_2	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 2
AWREADY_O_2	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 2
BUSER_O_2	Output	—	Nyora kupedzisa kunyora chiteshi 2
AWSIZE_I_3	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 3
WDATA_I_3	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 3
WVALID_I_3	Input	—	Nyora data inoshanda kunyora chiteshi 3
AWVALID_I_3	Input	—	Nyora chikumbiro kubva kunyora chiteshi 3
AWADDR_I_3	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 3
AWREADY_O_3	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 3
BUSER_O_3	Output	—	Nyora kupedzisa kunyora chiteshi 3
AWSIZE_I_4	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 4

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
WDATA_I_4	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 4
WVALID_I_4	Input	—	Nyora data inoshanda kunyora chiteshi 4
AWVALID_I_4	Input	—	Nyora chikumbiro kubva kunyora chiteshi 4
AWADDR_I_4	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 4
AWREADY_O_4	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 4
BUSER_O_4	Output	—	Nyora kupedzisa kunyora chiteshi 4
AWSIZE_I_5	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 5
WDATA_I_5	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 5
WVALID_I_5	Input	—	Nyora data inoshanda kunyora chiteshi 5
AWVALID_I_5	Input	—	Nyora chikumbiro kubva kunyora chiteshi 5
AWADDR_I_5	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 5
AWREADY_O_5	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 5
BUSER_O_5	Output	—	Nyora kupedzisa kunyora chiteshi 5
AWSIZE_I_6	Input	8 zvishoma	Nyora saizi yakaputika yekunyora chiteshi 6
WDATA_I_6	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 6
WVALID_I_6	Input	—	Nyora data inoshanda kunyora chiteshi 6
AWVALID_I_6	Input	—	Nyora chikumbiro kubva kunyora chiteshi 6
AWADDR_I_6	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 6
AWREADY_O_6	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 6
BUSER_O_6	Output	—	Nyora kupedzisa kunyora chiteshi 6
AWSIZE_I_7	Input	8 zvishoma	Nyora saizi yakaputika kubva pakunyora chiteshi 7
WDATA_I_7	Input	[AXI_DATA_WIDTH-1:0]	Vhidhiyo data Kupinza kunyora chiteshi 7
WVALID_I_7	Input	—	Nyora data inoshanda kunyora chiteshi 7
AWVALID_I_7	Input	—	Nyora chikumbiro kubva kunyora chiteshi 7
AWADDR_I_7	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanira kuitika kubva pakunyora chiteshi 7
AWREADY_O_7	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kunyora chiteshi 7
BUSER_O_7	Output	—	Nyora kupedzisa kunyora chiteshi 7

Iri tafura rinotevera rinonyora zvinopinza uye zvinobuda zviteshi zveDDR AXI4 Arbiter yeiyo yemuno interface.
Tafura 2-3. Zvekupinda uye Zvekubuda Ports zveNative Arbiter Interface

Signal Zita	Direction	Upamhi	Tsanangudzo
reset_i	Input	—	Active yakaderera asynchronous reset chiratidzo kugadzira
sys_clk_i	Input	—	System wachi
ddr_ctrl_ready_i	Input	—	Inogamuchira yakagadzirira yekupinza chiratidzo kubva kuDDR controller
r0_req_i	Input	—	Verenga chikumbiro kubva kune initiator 0
r0_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r0_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 0
r0_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 0

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
r0_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 0
r0_done_o	Output	—	Verenga kupedzisa kune initiator 0
r1_req_i	Input	—	Verenga chikumbiro kubva kune initiator 1
r1_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r1_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 1
r1_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 1
r1_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 1
r1_done_o	Output	—	Verenga kupedzisa kune initiator 1
r2_req_i	Input	—	Verenga chikumbiro kubva kune initiator 2
r2_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r2_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 2
r2_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 2
r2_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 2
r2_done_o	Output	—	Verenga kupedzisa kune initiator 2
r3_req_i	Input	—	Verenga chikumbiro kubva kune initiator 3
r3_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r3_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 3
r3_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 3
r3_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 3
r3_done_o	Output	—	Verenga kupedzisa kune initiator 3
r4_req_i	Input	—	Verenga chikumbiro kubva kune initiator 4
r4_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r4_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 4
r4_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 4
r4_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 4
r4_done_o	Output	—	Verenga kupedzisa kune initiator 4
r5_req_i	Input	—	Verenga chikumbiro kubva kune initiator 5
r5_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r5_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 5
r5_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 5
r5_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 5
r5_done_o	Output	—	Verenga kupedzisa kune initiator 5
r6_req_i	Input	—	Verenga chikumbiro kubva kune initiator 6
r6_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi
r6_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 6
r6_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 6
r6_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 6
r6_done_o	Output	—	Verenga kupedzisa kune initiator 6
r7_req_i	Input	—	Verenga chikumbiro kubva kune initiator 7
r7_burst_size_i	Input	8 zvishoma	Verenga kuputika saizi

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
r7_rstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kubva panofanira kutangirwa kuverenga chiteshi 7
r7_ack_o	Output	—	Arbiter kubvuma kuverenga chikumbiro kubva kune initiator 7
r7_data_valid_o	Output	—	Verenga data inoshanda kubva pakuverenga chiteshi 7
r7_done_o	Output	—	Verenga kupedzisa kune initiator 7
rdata_o	Output	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yakabuda kubva pakuverenga chiteshi
w0_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w0_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 0
w0_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 0
w0_req_i	Input	—	Nyora chikumbiro kubva kune initiator 0
w0_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 0
w0_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 0
w0_done_o	Output	—	Nyora kupedzisa kune initiator 0
w1_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w1_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 1
w1_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 1
w1_req_i	Input	—	Nyora chikumbiro kubva kune initiator 1
w1_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 1
w1_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 1
w1_done_o	Output	—	Nyora kupedzisa kune initiator 1
w2_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w2_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 2
w2_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 2
w2_req_i	Input	—	Nyora chikumbiro kubva kune initiator 2
w2_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 2
w2_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 2
w2_done_o	Output	—	Nyora kupedzisa kune initiator 2
w3_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w3_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 3
w3_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 3
w3_req_i	Input	—	Nyora chikumbiro kubva kune initiator 3
w3_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 3
w3_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 3
w3_done_o	Output	—	Nyora kupedzisa kune initiator 3
w4_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w4_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 4
w4_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 4
w4_req_i	Input	—	Nyora chikumbiro kubva kune initiator 4
w4_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanira kuitika kubva pakunyora chiteshi 4

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
w4_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 4
w4_done_o	Output	—	Nyora kupedzisa kune initiator 4
w5_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w5_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 5
w5_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 5
w5_req_i	Input	—	Nyora chikumbiro kubva kune initiator 5
w5_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 5
w5_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 5
w5_done_o	Output	—	Nyora kupedzisa kune initiator 5
w6_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w6_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 6
w6_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 6
w6_req_i	Input	—	Nyora chikumbiro kubva kune initiator 6
w6_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 6
w6_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 6
w6_done_o	Output	—	Nyora kupedzisa kune initiator 6
w7_burst_size_i	Input	8 zvishoma	Nyora kuputika saizi
w7_data_i	Input	[AXI_DATA_WIDTH – 1:0]	Vhidhiyo data yekupinda kunyora chiteshi 7
w7_data_valid_i	Input	—	Nyora data inoshanda kunyora chiteshi 7
w7_req_i	Input	—	Nyora chikumbiro kubva kune initiator 7
w7_wstart_addr_i	Input	[AXI_ADDR_WIDTH – 1:0]	DDR kero kwainonyorwa kunofanirwa kuitika kubva pakunyora chiteshi 7
w7_ack_o	Output	—	Arbiter kubvuma kunyora chikumbiro kubva kune initiator 7
w7_done_o	Output	—	Nyora kupedzisa kune initiator 7
AXI I/F Zviratidzo
Verenga Kero Channel
arid_o	Output	[AXI_ID_WIDTH – 1:0]	Verenga kero ID. Identification tag yeboka rekero yekuverenga yezviratidzo.
araddr_o	Output	[AXI_ADDR_WIDTH – 1:0]	Verenga kero. Inopa kero yekutanga yekuverenga burst transaction. Chete kero yekutanga yekuputika inopiwa.
arlen_o	Output	[7:0]	Kuputika kureba. Inopa iyo chaiyo nhamba yekutamiswa mukuputika. Ruzivo urwu runotara nhamba yekufambiswa kwedata kwakabatana nekero.
arsize_o	Output	[2:0]	Kuputika saizi. Saizi yekuchinjisa yega yega mukuputika.
arburst_o	Output	[1:0]	Burst type. Yakabatana neruzivo rwehukuru, inodonongodza kuti kero yekuchinjisa yega yega mukati mekuputika inoverengerwa sei. Yakagadziriswa ku2'b01 à Inowedzera kero yakaputika.
arlock_o	Output	[1:0]	Kiya mhando. Inopa rumwe ruzivo nezve maatomu maitiro ekutamisa. Yakagadziriswa ku2'b00 kune Yakajairika Access.

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
arcache_o	Output	[3:0]	Cache type. Inopa rumwe ruzivo nezve cacheable maitiro ekutamisa. Yakagadziriswa ku4'b0000 kune Isiri-cacheable uye isiri-bufferable.
arprot_o	Output	[2:0]	Kudzivirirwa mhando. Inopa ruzivo rwekudzivirira chikamu chekutengeserana. Yakagadziriswa ku3'b000 kune Yakajairika, yakachengeteka kuwana data.
arvalid_o	Output	—	Verenga kero inoshanda. Kana HIGH, kero yekuverenga uye yekudzora ruzivo inoshanda uye inoramba yakakwira kusvika kero yekubvuma chiratidzo, yakagadzirira, yakakwira. 1 = Kero uye kudzora ruzivo runoshanda 0 = Kero uye kudzora ruzivo haruna kushanda
ready_o	Input	—	Verenga kero yagadzirira. Chinangwa chakagadzirira kubvuma kero uye masaini ekudzora anoenderana. 1 = chinangwa chakagadzirira 0 = chinangwa hachina kugadzirira
Verenga Data Channel
bvisa	Input	[AXI_ID_WIDTH – 1:0]	Verenga ID tag. ID tag yeboka rekuverenga data rezviratidzo. Iko kukosha kwekubvisa kunogadzirwa nechinangwa uye inofanirwa kuenderana neyakaoma kukosha kwekuverenga kutengeserana kwairi kupindura.
rdata	Input	[AXI_DATA_WIDTH – 1:0]	Verenga data
resp	Input	[1:0]	Verenga mhinduro. Mamiriro ekuendeswa kwekuverenga. Mhinduro dzinotenderwa ndedze OK, EXOKAY, SLVERR, uye DECERR.
yekupedzisira	Input	—	Verenga pakupedzisira. Kuchinjisa kwekupedzisira mukuverenga kwakaputika.
rvalid	Input	—	Verenga ichokwadi. Inodiwa yekuverenga data iripo uye kutumira kwekuverenga kunogona kupera. 1 = verenga data iripo 0 = kuverenga data haisipo
ready	Output	—	Verenga wakagadzirira. Initiator inogona kugamuchira iyo yekuverenga data uye mhinduro ruzivo. 1= muvambi akagadzirira 0 = muvambi haana kugadzirira
Nyora Kero Channel
awid	Output	[AXI_ID_WIDTH – 1:0]	Nyora kero ID. Identification tag yekero yekunyora boka rezviratidzo.
awaddr	Output	[AXI_ADDR_WIDTH – 1:0]	Nyora kero. Inopa kero yekutanga kutamisa mune yekunyora kuputika transaction. Iwo anobatanidzwa ekudzora masaini anoshandiswa kuona maadero ezvasara kutamiswa mukuputika.
awlen	Output	[7:0]	Kuputika kureba. Inopa iyo chaiyo nhamba yekutamiswa mukuputika. Ruzivo urwu runotara nhamba yekufambiswa kwedata kwakabatana nekero.
awsize	Output	[2:0]	Kuputika saizi. Saizi yekuchinjisa yega yega mukuputika. Byte lane strobes inoratidza chaizvo kuti ndedzipi nzira dzekuvandudza.
awburst	Output	[1:0]	Burst type. Yakabatana neruzivo rwehukuru, inodonongodza kuti kero yekuchinjisa yega yega mukati mekuputika inoverengerwa sei. Yakagadziriswa ku2'b01 à Inowedzera kero yakaputika.

………..enderera mberi
Signal Zita	Direction	Upamhi	Tsanangudzo
awlock	Output	[1:0]	Kiya mhando. Inopa rumwe ruzivo nezve maatomu maitiro ekutamisa. Yakagadziriswa ku2'b00 kune Yakajairika Access.
awcache	Output	[3:0]	Cache type. Inoratidza iyo inogona kubhuroka, inochengeteka, kunyora- kuburikidza, kunyora-kudzosera, uye kugovera hunhu hwekutengeserana. Yakagadziriswa ku4'b0000 kune Isiri-cacheable uye isiri-bufferable.
awprot	Output	[2:0]	Kudzivirirwa mhando. Inotaridza yakajairika, rombo, kana chengetedzo nhanho yekutengeserana uye kana kutengeserana kuri kuwana data kana kuwana yekuraira. Yakagadziriswa ku3'b000 kune Yakajairika, yakachengeteka kuwana data.
awvalid	Output	—	Nyora kero inoshanda. Inoratidza kuti kero yekunyora yakakodzera uye ruzivo rwekutonga zviripo. 1 = kero uye kudzora ruzivo rwuripo 0 = kero uye ruzivo rwekutonga harisipo. Kero uye ruzivo rwekutonga zvinoramba zvakagadzikana kusvikira kero yabvuma chiratidzo, awready, yaenda HIGH.
awready	Input	—	Nyora kero yakagadzirira. Inoratidza kuti chinangwa chakagadzirira kugamuchira kero uye masaini ekudzora anobatana. 1 = chinangwa chakagadzirira 0 = chinangwa hachina kugadzirira
Nyora Data Channel
wdata	Output	[AXI_DATA_WIDTH – 1:0]	Nyora data
wstrb	Output	[AXI_DATA_WIDTH – 8:0]	Nyora strobes. Ichi chiratidzo chinoratidza kuti ndedzipi nzira dzekugadzirisa mundangariro. Kune imwe yekunyora strobe kune ese masere mabheti ekunyora data bhasi.
last	Output	—	Nyora kwekupedzisira. Kuchinjisa kwekupedzisira mukuputika kwekunyora.
wvalid	Output	—	Nyora zvinoshanda. Inoshanda kunyora data uye strobes zviripo. 1 = nyora data uye strobes iripo 0 = nyora data uye strobes haisipo
wready	Input	—	Nyora wakagadzirira. Chinangwa chinogona kubvuma kunyora data. 1 = chinangwa chakagadzirira 0 = chinangwa hachina kugadzirira
Nyora Response Channel
bid	Input	[AXI_ID_WIDTH – 1:0]	Mhinduro ID. The identification tag yemhinduro yekunyora. Iko kukosha kwebhidhiri kunofanirwa kuenderana neawid kukosha kwekunyora kutengeserana uko chinangwa chiri kupindura.
bresp	Input	[1:0]	Nyora mhinduro. Mamiriro ekunyora kutengeserana. Mhinduro dzinotenderwa ndeidzi CHAIVA, EXOKAY, SLVERR, uye DECERR.
bvalid	Input	—	Nyora mhinduro inoshanda. Mhinduro yekunyora iripo. 1 = nyora mhinduro iripo 0 = nyora mhinduro haisipo
bready	Output	—	Mhinduro yakagadzirira. Initiator inogona kugamuchira ruzivo rwemhinduro. 1 = muvambi akagadzirira 0 = muvambi haana kugadzirira

Madhiyamu enguva (Bvunza Mubvunzo)
Ichi chikamu chinokurukura DDR_AXI4_Arbiter timing diagrams. Nhamba dzinotevera dzinoratidza kubatana kwezviyero zvekukumbira kuverenga nekunyora, kutanga kero yendangariro, kunyora mapindiro kubva kune wekunze wekutanga, kuverenga kana kunyora kubvuma, uye kuverenga kana kunyora kupedzisa kupihwa neanopikisa.
Mufananidzo 3-1. Nguva yedhiyagiramu yeZviratidzo zvinoshandiswa muKunyora/Kuverenga kuburikidza neAXI4 Interface

Testbench (Bvunza Mubvunzo)
Testbench yakabatana inoshandiswa kuona uye kuyedza DDR_AXI4_Arbiter inonzi semushandisi testbench. Testbench inopihwa kutarisa kushanda kweDDR_AXI4_Arbiter IP. Iyi testbench inoshanda chete kune maviri ekuverenga chiteshi uye maviri ekunyora chiteshi ane Bhazi Interface kumisikidzwa.
 Simulation (Bvunza Mubvunzo)
Matanho anotevera anotsanangura maitiro ekutevedzera musimboti uchishandisa testbench:

1. Vhura iyo Libero® SoC Catalog tab, wedzera Solutions-Vhidhiyo, tinya kaviri DDR_AXI4_Arbiter, wobva wadzvanya OK. Zvinyorwa zvine chekuita neIP zvakanyorwa pasi peChinyorwa. Zvakakosha: Kana iwe usingaone iyo Catalog tab, famba uchienda View > Windows menyu uye tinya Catalog kuti ionekwe.

Mufananidzo 4-1. DDR_AXI4_Arbiter IP Core muLibero SoC Catalog

Gadzira chikamu hwindo rinoonekwa sezvinoratidzwa mune inotevera. Dzvanya OK. Ita shuwa kuti Zita iri DDR_AXI4_ARBITER_PF_C0.
Mufananidzo 4-2. Gadzira Chikamu

Gadzirisa iyo IP ye2 yekuverenga chiteshi, 2 nyora zviteshi uye sarudza Bhazi Interface sezvakaratidzwa mumufananidzo unotevera uye tinya OK kuti ugadzire IP.
Mufananidzo 4-3. Configuration

Pa Stimulus Hierarchy tab, sarudza testbench (DDR_AXI4_ARBITER_PF_tb.v), tinya kurudyi wobva wadzvanya Simulate Pre-Synth Dhizaini> Vhura Interactively.
Zvakakosha: Kana iwe usingaone iyo Stimulus Hierarchy tab, famba uchienda View > Windows menyu uye tinya Stimulus Hierarchy kuti ionekwe.
Mufananidzo 4-4. Simulating Pre-Synthesis DhizainiModelSim inotanga ne testbench file, sezvinoratidzwa mumufananidzo unotevera.
Mufananidzo 4-5. ModelSim Simulation Window

Zvakakosha: Kana simulation ikavhiringwa nekuda kwemuganho wenguva yekumhanya unotsanangurwa mu.do file, shandisa run -all command kupedzisa simulation.
Revision History (Bvunza Mubvunzo)
Nhoroondo yekudzokorora inotsanangura shanduko dzakaitwa mugwaro. Kuchinja kwacho kunorongwa nekudzokorora, kutanga nebhuku razvino uno.
Tafura 5-1. Revision History

Kudzokorora	Date	Tsanangudzo
A	04/2023	Inotevera rondedzero yeshanduko mukudzokorora A yegwaro: • Akatamisa gwaro kuenda kuMicrochip template. • Yakagadziridza nhamba yegwaro kuti DS00004976A kubva pa50200950. • Yakawedzerwa 4. Testbench.
2.0	—	Iyi inotevera rondedzero yeshanduko mukudzokorora 2.0 yegwaro: • Yakawedzerwa Mufananidzo 1-2. • Yakawedzerwa Tafura 2-2. • Yakagadziridza mazita emamwe mazita ekuisa nekubuda kwezviratidzo mukati Tafura 2-2.
1.0	—	Kutanga Kusunungurwa.

Microchip FPGA Tsigiro (Bvunza Mubvunzo)
Microchip FPGA zvigadzirwa boka rinodzosera zvigadzirwa zvaro neakasiyana masevhisi ekutsigira, anosanganisira Customer Service, Customer Technical Support Center, a websaiti, uye mahofisi ekutengesa pasi rese. Vatengi vanokurudzirwa kushanyira Microchip online zviwanikwa vasati vabata rutsigiro sezvo paine mukana wekuti mibvunzo yavo yatopindurwa. Bata Technical Support Center kuburikidza ne websaiti pa www.microchip.com/support. Taura iyo FPGA Chidimbu Chikamu nhamba, sarudza yakakodzera kesi chikamu, uye kurodha dhizaini files paunenge uchigadzira tekinoroji yekutsigira kesi. Bata Mutengi Sevhisi kune isiri-tekinoroji chigadzirwa rutsigiro, semitengo yechigadzirwa, kukwidziridzwa kwechigadzirwa, ruzivo rwakagadziridzwa, mamiriro eodha, uye mvumo.

• Kubva kuNorth America, fonera 800.262.1060
• Kubva kune dzimwe nyika, fonera 650.318.4460
• Fax, kubva kupi zvako munyika, 650.318.8044

Microchip Ruzivo (Bvunza Mubvunzo)

Iyo Microchip Webnzvimbo (Bvunza Mubvunzo)
Microchip inopa online rutsigiro kuburikidza neyedu website pa www.microchip.com/. Izvi webnzvimbo inoshandiswa kugadzira files uye ruzivo runowanikwa nyore kune vatengi. Zvimwe zvezvinyorwa zviripo zvinosanganisira:

• Product Support - Datasheets uye errata, zvinyorwa zvekushandisa uye sample zvirongwa, zviwanikwa zvekugadzira, madhairekitori evashandisi uye magwaro ekutsigira hardware, kuburitswa kwesoftware, uye software yakachengetwa
• General Technical Support - Mibvunzo Inowanzo bvunzwa (FAQs), zvikumbiro zvetsigiro yehunyanzvi, mapoka ekukurukurirana epamhepo, Microchip dhizaini dhizaini chirongwa chenhengo rondedzero.
• Bhizinesi reMicrochip - Chigadzirwa chekusarudza uye madhairekitori ekurongeka, ichangoburwa Microchip inoburitswa, rondedzero yemasemina uye zviitiko, rondedzero yeMicrochip mahofisi ekutengesa, vaparidzi, uye vamiriri vefekitari.

Chigadzirwa Chekuchinja Notification Service (Bvunza Mubvunzo)
Microchip's product change notification service inobatsira kuchengetedza vatengi varipo paMicrochip zvigadzirwa. Vanyoreri vanogashira zviziviso zveemail pese paine shanduko, zvigadziriso, zvidzokorodzo kana kukanganisa zvine chekuita neyakatsanangurwa chigadzirwa mhuri kana chishandiso chekusimudzira chekufarira. Kuti unyore, enda ku www.microchip.com/pcn uye tevera mirairo yekunyoresa.
Tsigiro yeVatengi (Bvunza Mubvunzo)
Vashandisi vezvigadzirwa zveMicrochip vanogona kugamuchira rubatsiro kuburikidza nematanho akati wandei:

• Distributor kana Mumiririri
• Local Sales Office
• Embedded Solutions Engineer (ESE)
• Technical Support

Vatengi vanofanirwa kubata mugovera wavo, mumiriri kana ESE kuti vawane rutsigiro. Mahofisi ekutengesa emunharaunda aripowo kubatsira vatengi. Rondedzero yemahofisi ekutengesa nenzvimbo inosanganisirwa mugwaro iri. Tsigiro yehunyanzvi inowanikwa kuburikidza ne websaiti pa: www.microchip.com/support.
Microchip Devises Code Protection Feature (Bvunza Mubvunzo)
Ziva zvinotevera zvinongedzo zvechidziviriro chekodhi pane Microchip zvigadzirwa:

• Zvigadzirwa zveMicrochip zvinosangana nezvakatsanangurwa zviri mune yavo chaiyo Microchip Data Sheet.
• Microchip inotenda kuti mhuri yayo yezvigadzirwa yakachengeteka kana ichishandiswa nenzira yakatarwa, mukati memaitiro ekushanda, uye pasi pemamiriro ezvinhu.
• Microchip inokoshesa uye inodzivirira zvine hukasha kodzero dzayo dzepfuma. Kuedza kutyora kodhi yekudzivirira maficha eMicrochip chigadzirwa zvinorambidzwa zvachose uye zvinogona kutyora DigitalMillennium Copyright Act.
• Kunyange Microchip kana chero imwe semiconductor inogadzira inogona kuvimbisa kuchengetedzwa kwekodhi yayo. Kudzivirirwa kwekodhi hazvireve kuti tiri kuvimbisa kuti chigadzirwa "hachiputsike". Kudzivirirwa kwekodhi kunogara kuchishanduka. Microchip yakazvipira kuramba ichivandudza kodhi yekudzivirira maficha ezvigadzirwa zvedu.

Legal Notice (Bvunza Mubvunzo)
Ichi chinyorwa uye ruzivo rwuri pano runogona kushandiswa chete neMicrochip zvigadzirwa, zvinosanganisira kugadzira, kuyedza, uye kubatanidza zvigadzirwa zveMicrochip nechishandiso chako. Kushandiswa kweruzivo urwu neimwe nzira kunotyora aya mazwi. Ruzivo nezve maapplication emudziyo unopihwa chete kuti zvikunakire uye unogona kukwidziridzwa nekuvandudzwa. Ibasa rako kuona kuti application yako inosangana nezvako zvakatemwa. Bata hofisi yako yekutengesa Microchip kuti uwane rumwe rutsigiro kana, uwane rumwe rutsigiro pa www.microchip.com/en-us/support/design-help/ client-support-services. RUZIVO IYI INOPIWA NE MICROCHIP "SEZVAZVIRI". MICROCHIP HAIITA ZVINOmiririrwa KANA KUTI MWARATIDZO YERUPI RWERUDZI ZVINO ZVINOTAURWA KANA ZVINOREVA, KUNYORA KANA KUTAURA, ZVINOTAURWA KANA ZVIMWE ZVAKASIYANA, ZVINOENDERA NERUZIVO ZVINO sanganisira ASI ZVISI ZVINOGONA KUTI ZVINOITWA KUTI ZVINOTAURWA, ZVINOTAURWA KUTI ZVIRI MUKATI CHINANGWA CHENYU, KANA KUTI MAWARANTI ZVINOENDERANA NEZVINHU ZVAKAITWA, HUNHU, KANA KUITA. HAPANA CHIITIKO CHICHAITWA MICROCHIP KUNE MHOSVA DZEPI ZVIRI KUNHU ZVINHU, ZVINHU, ZVAKASIYANA, ZVAKAITIKA, ZVINHU, KANA KURASIKA KWAKAITWA, KUPARADZWA, MUTENGO, KANA KUDZORA KWEZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINHU ZVINO KANA KUSHANDISWA KWAZVO, ZVISINEI, ZVINOITWA MAZANO. ZVINOGONA KANA KUKANGAZWA ZVINOFONEKWA? ZVINO ZVINOGONA ZVAKAZARA ZVINOTENDERWA NEMUTEMO, MICROCHIP YOSE YAKUBVA PAZVINOITWA ZVINHU ZVINHU ZVINHU ZVINOITWA NERUZIVO KANA KUSHANDISWA KWAKO HAKUZOPIRI NHAMBA YEMIRIDZO, KANA ZVICHIDA, ZVAWABHADHARA ZVAKASIYANA KUTI ZVINOITWA MICROCHIP. Kushandiswa kweMicrochip zvishandiso mukutsigira hupenyu uye / kana kuchengetedza zvikumbiro zviri panjodzi yemutengi, uye mutengi anobvuma kudzivirira, kubhadharisa uye kubata Microchip isingakuvadzi kubva kune chero uye zvese zvinokuvadza, zvirevo, masutu, kana mari inokonzerwa nekushandiswa kwakadaro. Hapana marezinesi anofambiswa, zviri pachena kana neimwe nzira, pasi pekodzero chero ipi zvayo yeMicrochip intellectual property kunze kwekunge zvataurwa neimwe nzira.
Zviratidzo (Bvunza Mubvunzo)
Iyo Microchip zita uye logo, iyo Microchip logo, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXTouchlus MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetri , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, uye XMEGA zviratidzo zvakanyoreswa zveMicrochip Technology Incorporated muUSA nedzimwe nyika. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed ​​Control, HyperLight Load, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, uye ZL zvikwangwani zvakanyoreswa zveMicrochip Technology Incorporated muUSA Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Chero Capacitor, AnyIn, AnyOut, Augmented Switching. , BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealCirnet ICIPIC, IdealCirnet, SerialBridgeit In, IdealCridget, IdealBridge, IdealBridge, Ideal. Hungwaru Kufananidza, IntelliMOS, Inter-Chip Kubatana, JitterBlocker, Knob-on-Display, KoD, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX , RTG4, SAMICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, Trusted Time, TSHARC, USBCheck, VariSense, VectorBlo VeriPHY, ViewSpan, WiperLock, XpressConnect, uye ZENA zviratidzo zveMicrochip Technology Incorporated muUSA nedzimwe nyika. SQTP chiratidzo chesevhisi cheMicrochip Technology Incorporated muUSA The Adaptec logo, Frequency on Demand, Silicon Storage Technology, neSymmcom zvikwangwani zvekutengesa zveMicrochip Technology Inc. kune dzimwe nyika. GestIC ichiratidzo chekutengeserana chakanyoreswa cheMicrochip Technology Germany II GmbH & Co. KG, inotsigira Microchip Technology Inc., kune dzimwe nyika. Mamwe matrademark ese ataurwa pano zvinhu zvemakambani avo. © 2023, Microchip Technology Incorporated nemakambani ayo. All Rights Reserved.
ISBN: 978-1-6683-2302-1 Quality Management System (Bvunza Mubvunzo) Kuti uwane ruzivo nezve Microchip's Quality Management Systems, ndapota shanya. www.microchip.com/quality.

Munyika Yose Kutengesa uye Basa

AMERICAS	ASIA/PACIFIC	ASIA/PACIFIC	EUROPE
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Tsigiro yehunyanzvi: www.microchip.com/support Web Kero: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Vadivelu Comedy Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Kanadha - Toronto Tel: 905-695-1980 Fax: 905-695-2078	Australia - Sydney Tel: 61-2-9868-6733 China - Beijing Tel: 86-10-8569-7000 China – Chengdu Tel: 86-28-8665-5511 China - Chongqing Tel: 86-23-8980-9588 China - Dongguan Tel: 86-769-8702-9880 China - Guangzhou Tel: 86-20-8755-8029 China - Hangzhou Tel: 86-571-8792-8115 China - Hong Kong SAR Tel: 852-2943-5100 China – Nanjing Tel: 86-25-8473-2460 China – Qingdao Tel: 86-532-8502-7355 China - Shanghai Tel: 86-21-3326-8000 China – Shenyang Tel: 86-24-2334-2829 China - Shenzhen Tel: 86-755-8864-2200 China - Suzhou Tel: 86-186-6233-1526 China - Wuhan Tel: 86-27-5980-5300 China - Xian Tel: 86-29-8833-7252 China - Xiamen Tel: 86-592-2388138 China – Zhuhai Tel: 86-756-3210040	India – Bangalore Tel: 91-80-3090-4444 India - New Delhi Tel: 91-11-4160-8631 India - Pune Tel: 91-20-4121-0141 Japani – Osaka Tel: 81-6-6152-7160 Japani – Tokyo Tel: 81-3-6880- 3770 Korea – Daegu Tel: 82-53-744-4301 Korea - Seoul Tel: 82-2-554-7200 Malaysia – Kuala Lumpur Tel: 60-3-7651-7906 Malaysia – Penang Tel: 60-4-227-8870 Philippines - Manila Tel: 63-2-634-9065 Singapowo Tel: 65-6334-8870 Taiwan - Hsin Chu Tel: 886-3-577-8366 Taiwan - Kaohsiung Tel: 886-7-213-7830 Taiwan – Taipei Tel: 886-2-2508-8600 Thailand - Bangkok Tel: 66-2-694-1351 Vietnam – Ho Chi Minh Tel: 84-28-5448-2100	Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4485-5910 Fax: 45-4485-2829 Finland – Espoo Tel: 358-9-4520-820 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Kuchera Tel: 49-8931-9700 Germany – Haan Tel: 49-2129-3766400 Germany - Heilbronn Tel: 49-7131-72400 Germany – Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Germany - Rosenheim Tel: 49-8031-354-560 Israel – Ra'anana Tel: 972-9-744-7705 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy – Padova Tel: 39-049-7625286 Netherlands – Drunen Tel: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Nhare: 47-72884388 Poland - Warsaw Tel: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820

© 2023 Microchip Technology Inc. nemasangano ayo

Zvinyorwa / Zvishandiso

MICROCHIP DDR AXI4 Arbiter [pdf] Bhuku reMushandisi DDR AXI4 Arbiter, DDR AXI4, Arbiter

References

• User Manual