ASMI Parallel II Intel FPGA IP
ASMI Parallel II Intel® FPGA IP muab kev nkag mus rau Intel FPGA teeb tsa cov cuab yeej, uas yog plaub-serial configuration (EPCQ), qis-vol.tage quad-serial configuration (EPCQ-L), thiab EPCQ-A serial configuration. Koj tuaj yeem siv tus IP no los nyeem thiab sau cov ntaub ntawv rau cov khoom siv flash sab nraud rau cov ntawv thov, xws li cov chaw taws teeb hloov tshiab thiab SEU Sensitivity Map Header File (.smh) cia.
Lwm yam tshaj li cov yam ntxwv txhawb nqa los ntawm ASMI Parallel Intel FPGA IP, ASMI Parallel II Intel FPGA IP kuj txhawb nqa:
- Direct flash access (sau / nyeem) los ntawm Avalon® nco-mapped interface.
- Tswj kev sau npe rau lwm txoj haujlwm los ntawm kev tswj hwm tus lej sau npe (CSR) interface hauv Avalon nco-mapped interface.
- Txhais cov lus txib dav dav los ntawm Avalon nco-mapped interface rau hauv ntaus ntawv cov lej.
ASMI Parallel II Intel FPGA IP yog muaj rau txhua tsev neeg Intel FPGA cov cuab yeej suav nrog Intel MAX® 10 cov khoom siv uas siv GPIO hom.
ASMI Parallel II Intel FPGA IP tsuas yog txhawb nqa EPCQ, EPCQ-L, thiab EPCQ-A cov khoom siv. Yog tias koj siv cov khoom siv thib peb, koj yuav tsum siv Generic Serial Flash Interface Intel FPGA IP.
ASMI Parallel II Intel FPGA IP tau txais kev txhawb nqa hauv Intel Quartus® Prime software version 17.0 thiab txuas ntxiv mus.
Cov ntaub ntawv ntsig txog
- Taw qhia rau Intel FPGA IP Cores
- Muab cov ntaub ntawv dav dav txog tag nrho Intel FPGA IP cores, suav nrog parameterizing, tsim, kho dua tshiab, thiab simulating IP cores.
- Tsim Version-Independent IP thiab Qsys Simulation Scripts
- Tsim cov ntawv simulation uas tsis xav tau phau ntawv hloov tshiab rau software lossis IP version hloov kho.
- Kev Tswj Xyuas Qhov Zoo Tshaj Plaws
- Cov lus qhia rau kev tswj kom muaj txiaj ntsig thiab nqa tau yooj yim ntawm koj qhov project thiab IP files.
- ASMI Parallel Intel FPGA IP Tus Neeg Siv Phau Ntawv Qhia
- Generic Serial Flash Interface Intel FPGA IP Tus Neeg Siv Qhia
- Muab kev txhawb nqa rau lwm tus neeg siv flash.
- AN 720: Simulating ASMI Thaiv hauv Koj Tsim
Tshaj tawm cov ntaub ntawv
IP versions yog tib yam li Intel Quartus Prime Design Suite software versions mus txog v19.1. Los ntawm Intel Quartus Prime Design Suite software version 19.2 lossis tom qab ntawd, IP cores muaj cov txheej txheem tshiab IP versioning.
Tus IP version (XYZ) tus lej yuav hloov ntawm ib qho Intel Quartus Prime software version mus rau lwm qhov. Kev hloov hauv:
- X qhia txog kev hloov kho loj ntawm IP. Yog tias koj hloov kho koj lub Intel Quartus Prime software, koj yuav tsum rov tsim dua tus IP.
- Y qhia tias tus IP suav nrog cov yam ntxwv tshiab. Rov tsim koj tus IP kom suav nrog cov yam ntxwv tshiab no.
- Z qhia tias IP suav nrog kev hloov pauv me me. Rov tsim koj tus IP kom suav nrog cov kev hloov pauv no.
Table 1. ASMI Parallel II Intel FPGA Cov Ntaub Ntawv Tso Tawm
| Yam khoom | Kev piav qhia |
| IP Version | 18.0 |
| Intel Quartus Prime Pro Edition Version | 18.0 |
| Hnub tso tawm | 2018.05.07 |
Chaw nres nkoj
Daim duab 1. Ports Block Diagram
Table 2. Ports Description
| Teeb liab | Dav | Kev taw qhia | Kev piav qhia |
| Avalon Memory-Mapped Slave Interface rau CSR (avl_csr) | |||
| avl_csr_addr | 6 | Tswv yim | Avalon nco-mapped interface chaw nyob npav. Lub npav chaw nyob yog nyob rau hauv lo lus hais. |
| avl_csr_read | 1 | Tswv yim | Avalon nco-mapped interface nyeem tswj rau CSR. |
| avl_csr_rddata | 32 | Tso zis | Avalon nco-mapped interface nyeem cov ntaub ntawv tsheb npav los ntawm CSR. |
| avl_csr_write | 1 | Tswv yim | Avalon nco-mapped interface sau tswj rau CSR. |
| avl_csr_writedata | 32 | Tswv yim | Avalon nco-mapped interface sau cov ntaub ntawv npav rau CSR. |
| avl_csr_waitrequest | 1 | Tso zis | Avalon nco-mapped interface waitrequest tswj los ntawm CSR. |
| avl_csr_rddata_valid | 1 | Tso zis | Avalon nco-mapped interface nyeem cov ntaub ntawv siv tau uas qhia tias CSR nyeem cov ntaub ntawv muaj. |
| Avalon Memory-Mapped Slave Interface rau Memory Access (avl_ mem) | |||
| avl_mem_write | 1 | Tswv yim | Avalon nco-mapped interface sau tswj rau lub cim xeeb |
| avl_mem_burstcount | 7 | Tswv yim | Avalon nco-mapped interface tawg suav rau lub cim xeeb. Tus nqi ntau ntawm 1 txog 64 (qhov siab tshaj nplooj ntawv loj). |
| avl_mem_waitrequest | 1 | Tso zis | Avalon nco-mapped interface waitrequest tswj los ntawm lub cim xeeb. |
| avl_mem_read | 1 | Tswv yim | Avalon nco-mapped interface nyeem tswj rau lub cim xeeb |
| avl_mem_addr | N | Tswv yim | Avalon nco-mapped interface chaw nyob npav. Lub npav chaw nyob yog nyob rau hauv lo lus hais.
Qhov dav ntawm qhov chaw nyob yog nyob ntawm flash nco ceev siv. |
| avl_mem_writedata | 32 | Tswv yim | Avalon nco-mapped interface sau cov ntaub ntawv tsheb npav rau lub cim xeeb |
| avl_mem_readddata | 32 | Tso zis | Avalon nco-mapped interface nyeem cov ntaub ntawv tsheb npav los ntawm lub cim xeeb. |
| avl_mem_rddata_valid | 1 | Tso zis | Avalon nco-mapped interface nyeem cov ntaub ntawv siv tau uas qhia tias lub cim xeeb nyeem cov ntaub ntawv muaj. |
| avl_mem_byteenble | 4 | Tswv yim | Avalon nco-mapped interface sau cov ntaub ntawv pab kom tsheb npav mus rau lub cim xeeb. Thaum lub sij hawm bursting hom, byteenable tsheb npav yuav logic siab, 4'b1111. |
| Clock thiab Reset | |||
| clk | 1 | Tswv yim | Input moos rau moos IP. (1) |
| reset_n | 1 | Tswv yim | Asynchronous reset kom rov pib dua tus IP.(2) |
| Conduit Interface(3) | |||
| fqspi_dataout | 4 | Ob tog | Input lossis output chaw nres nkoj los pub cov ntaub ntawv los ntawm lub flash ntaus ntawv. |
| txuas ntxiv… | |||
| Teeb liab | Dav | Kev taw qhia | Kev piav qhia |
| qspi_dclk ua | 1 | Tso zis | Muab moos teeb liab rau lub flash ntaus ntawv. |
| qspi_scein | 1 | Tso zis | Muab ncs teeb liab rau lub flash ntaus ntawv.
Txhawb Stratix® V, Arria® V, Cyclone® V, thiab cov khoom siv qub. |
| 3 | Tso zis | Muab ncs teeb liab rau lub flash ntaus ntawv.
Txhawb Intel Arria 10 thiab Intel Cyclone 10 GX li. |
- Koj tuaj yeem teeb tsa lub moos zaus kom qis lossis sib npaug li 50 MHz.
- Tuav lub teeb liab rau tsawg kawg ib lub voj voog kom rov pib dua IP.
- Muaj thaum koj qhib qhov Disable Active Serial interface parameter.
Cov ntaub ntawv ntsig txog
- Quad-Serial Configuration (EPCQ) Devices Datasheet
- EPCQ-L Serial Configuration Devices Datasheet
- EPCQ-A Serial Configuration Device Datasheet
Tsis muaj
Table 3. Parameter Chaw
| Parameter | Cov nqi raug cai | Cov lus piav qhia |
| Configuration ntaus ntawv hom | EPCQ16, EPCQ32, EPCQ64, EPCQ128, EPCQ256, EPCQ512, EPCQ-L256, EPCQ-L512, EPCQ-L1024, EPCQ4A, EPCQ16A, EPCQ32A, EPCQ64A, EPCQ128A | Qhia meej txog EPCQ, EPCQ-L, lossis EPCQ-A ntaus ntawv uas koj xav siv. |
| Xaiv hom I/O | NORMAL STANDARD DUAL QUAD | Xaiv cov ntaub ntawv txuas ntxiv thaum koj ua haujlwm rau Fast Read. |
| Disable mob siab rau Active Serial interface | — | Routes ASMIBLOCK signals mus rau theem sab saum toj ntawm koj tus qauv tsim. |
| Qhib SPI pins interface | — | Txhais cov cim ASMIBLOCK rau SPI tus pin interface. |
| Pab kom flash simulation qauv | — | Siv lub neej ntawd EPCQ 1024 simulation qauv rau simulation. Yog hais tias koj siv ib tug thib peb-tog flash ntaus ntawv, xa mus rau AN 720: Simulating ASMI Thaiv hauv Koj Tsim los tsim ib lub wrapper los txuas cov qauv flash nrog ASMI Block. |
| Tus naj npawb ntawm Chip Xaiv siv | 1
2(4) 3(4) |
Xaiv tus naj npawb ntawm nti xaiv txuas nrog lub flash. |
- Tsuas yog txhawb nqa hauv Intel Arria 10 cov khoom siv, Intel Cyclone 10 GX li, thiab lwm yam khoom siv nrog Enable SPI pins interface enabled.
Cov ntaub ntawv ntsig txog
- Quad-Serial Configuration (EPCQ) Devices Datasheet
- EPCQ-L Serial Configuration Devices Datasheet
- EPCQ-A Serial Configuration Device Datasheet
- AN 720: Simulating ASMI Thaiv hauv Koj Tsim
Sau npe daim ntawv qhia
Table 4. Sau npe daim ntawv qhia
- Txhua qhov chaw nyob offset hauv cov lus hauv qab no sawv cev rau 1 lo lus ntawm qhov chaw nyob nco.
- Tag nrho cov ntawv sau npe muaj tus nqi pib ntawm 0x0.
| Offset | Sau npe | R/W | Lub npe teb | Me ntsis | Dav | Kev piav qhia |
| 0 | WR_ENABLE | W | WR_ENABLE | 0 | 1 | Sau 1 los ua kev sau ntawv. |
| 1 | WR_DISABLE | W | WR_DISABLE | 0 | 1 | Sau 1 los ua kev sau ntawv lov tes taw. |
| 2 | WR_STATUS | W | WR_STATUS | 7:0 ua | 8 | Muaj cov ntaub ntawv los sau rau hauv daim ntawv teev npe. |
| 3 | RD_STATUS | R | RD_STATUS | 7:0 ua | 8 | Muaj cov ntaub ntawv los ntawm kev nyeem cov xwm txheej sau npe ua haujlwm. |
| 4 | SECTOR_ERASE | W | Tus nqi | 23:0 ua
ib 31:0 |
24 lub
32 |
Muaj cov chaw nyob hauv qhov chaw yuav raug tshem tawm nyob ntawm qhov ceev ntawm cov cuab yeej.(5) |
| 5 | SUBSECTOR_ERASE | W | Tus nqi subsector | 23:0 ua
ib 31:0 |
24 lub
32 |
Muaj qhov chaw nyob subsector yuav tsum tau muab tshem tawm nyob ntawm qhov ceev ntawm cov khoom siv.(6) |
| 6–7 : kuv | Khaws tseg | |||||
| 8 | Tswj | W/R | CHIP xaiv | 7:4 ua | 4 | Xaiv cov khoom siv flash. Lub neej ntawd tus nqi yog 0, uas yog lub hom phiaj thawj flash ntaus ntawv. Txhawm rau xaiv cov cuab yeej thib ob, teeb tsa tus nqi rau 1, xaiv lub cuab yeej thib peb, teeb tus nqi rau 2. |
| Khaws tseg | ||||||
| W/R | QHIA | 0 | 1 | Teem qhov no rau 1 kom lov tes taw SPI cov cim ntawm IP los ntawm kev muab tag nrho cov teeb liab tso tawm mus rau high-Z xeev. | ||
| txuas ntxiv… | ||||||
| Offset | Sau npe | R/W | Lub npe teb | Me ntsis | Dav | Kev piav qhia |
| Qhov no tuaj yeem siv los faib tsheb npav nrog lwm cov khoom siv. | ||||||
| 9–12 : kuv | Khaws tseg | |||||
| 13 | WR_NON_VOLATILE_CONF_REG | W | NVCR tus nqi | 15:0 ua | 16 | Sau tus nqi rau cov ntawv sau npe tsis hloov pauv. |
| 14 | RD_NON_VOLATILE_CONF_REG | R | NVCR tus nqi | 15:0 ua | 16 | Nyeem tus nqi los ntawm cov ntawv sau npe tsis hloov pauv |
| 15 | RD_FLAG_STATUS_REG | R | RD_FLAG_STATUS_REG | 8 | 8 | Nyeem chij xwm txheej sau npe |
| 16 | CLR_FLAG_ STATUS REG | W | CLR_FLAG_ STATUS REG | 8 | 8 | Clears flag status register |
| 17 | BULK_ERASE | W | BULK_ERASE | 0 | 1 | Sau 1 txhawm rau lwv tag nrho cov nti (rau ib qho khoom siv tuag).(7) |
| 18 | DIE_ERASE | W | DIE_ERASE | 0 | 1 | Sau 1 kom tshem tawm tag nrho cov tuag (rau cov khoom sib tsoo-tuag).(7) |
| 19 | 4BYTES_ADDR_EN | W | 4BYTES_ADDR_EN | 0 | 1 | Sau 1 kom nkag mus rau 4 bytes chaw nyob hom |
| 20 | 4BYTES_ADDR_EX | W | 4BYTES_ADDR_EX | 0 | 1 | Sau 1 mus rau 4 bytes chaw nyob hom |
| 21 | SECTOR_PROTECT | W | Sector tiv thaiv tus nqi | 7:0 ua | 8 | Tus nqi sau rau cov xwm txheej sau npe los tiv thaiv ib ntu. (8) |
| 22 | RD_MEMORY_CAPACITY_ID | R | Memory peev xwm tus nqi | 7:0 ua | 8 | Muaj cov ntaub ntawv ntawm lub cim xeeb muaj peev xwm ID. |
| 23 –
32 |
Khaws tseg | |||||
Koj tsuas yog yuav tsum tau qhia ib qho chaw nyob hauv lub sector thiab tus IP yuav tshem tawm cov haujlwm tshwj xeeb.
Koj tsuas yog yuav tsum tau qhia ib qho chaw nyob hauv subsector thiab IP yuav tshem tawm qhov tshwj xeeb subsector.
Cov ntaub ntawv ntsig txog
- Quad-Serial Configuration (EPCQ) Devices Datasheet
- EPCQ-L Serial Configuration Devices Datasheet
- EPCQ-A Serial Configuration Device Datasheet
- Avalon Interface Specifications
Kev ua haujlwm
ASMI Parallel II Intel FPGA IP interfaces yog Avalon nco-mapped interface raws. Yog xav paub ntxiv, xa mus rau Avalon specifications.
- Koj tsuas yog yuav tsum qhia qhov chaw nyob hauv qhov tuag thiab tus IP yuav tshem tawm qhov tuag tshwj xeeb.
- Rau EPCQ thiab EPCQ-L cov khoom siv, qhov thaiv thaiv me ntsis yog me ntsis [2: 4] thiab [6] thiab sab saum toj / hauv qab (TB) ntsis yog me ntsis 5 ntawm cov xwm txheej sau npe. Rau EPCQ-A cov khoom siv. qhov thaiv thaiv me ntsis yog me ntsis [2: 4] thiab TB ntsis yog me ntsis 5 ntawm cov xwm txheej sau npe.
Cov ntaub ntawv ntsig txog
- Avalon Interface Specifications
Tswj xwm txheej sau npe ua haujlwm
Koj tuaj yeem ua qhov nyeem lossis sau rau qhov chaw nyob tshwj xeeb offset siv Control Status Register (CSR).
Txhawm rau ua haujlwm nyeem lossis sau ntawv rau kev tswj hwm kev sau npe, ua raws cov kauj ruam no:
- Qhia rau avl_csr_write lossis avl_csr_read teeb liab thaum lub
avl_csr_waitrequest teeb liab tsawg (yog tias lub teeb liab waitrequest siab, avl_csr_write lossis avl_csr_read teeb liab yuav tsum tau ceev kom siab kom txog thaum lub teeb liab waitrequest qis). - Tib lub sijhawm, teeb tsa tus nqi chaw nyob ntawm avl_csr_address tsheb npav. Yog tias nws yog kev sau ntawv, teeb tsa tus nqi cov ntaub ntawv ntawm avl_csr_writedata tsheb npav ua ke nrog qhov chaw nyob.
- Yog tias nws yog kev nyeem ntawv, tos kom txog thaum avl_csr_readdatavalid teeb liab tau lees paub siab kom rov qab tau cov ntaub ntawv nyeem.
- Rau cov haujlwm uas yuav tsum tau sau tus nqi rau flash, koj yuav tsum ua qhov kev sau ua haujlwm ua ntej.
- Koj yuav tsum nyeem tus chij xwm txheej sau npe txhua zaus koj sau ntawv lossis tshem tawm cov lus txib.
- Yog tias siv ntau lub flash pab kiag li lawm, koj yuav tsum sau rau lub nti xaiv sau npe los xaiv qhov tseeb nti xaiv ua ntej ua haujlwm rau cov khoom siv flash tshwj xeeb.
Daim duab 2. Nyeem Memory Capacity Register Waveform Example
Daim duab 3. Sau Enable Register Waveform Example
Kev ua haujlwm nco
ASMI Parallel II Intel FPGA IP nco interface txhawb kev tawg thiab ncaj qha flash nco nkag. Thaum lub sijhawm nkag mus rau lub cim xeeb ncaj qha, tus IP ua cov kauj ruam hauv qab no kom tso cai rau koj ua haujlwm ncaj qha nyeem lossis sau ntawv:
- Sau enable rau kev sau ntawv
- Txheeb xyuas tus chij xwm txheej sau npe kom paub tseeb tias cov haujlwm tau ua tiav ntawm lub flash
- Tso lub teeb liab waitrequest thaum ua tiav
Kev ua haujlwm nco zoo ib yam li Avalon nco-mapped interface ua haujlwm. Koj yuav tsum tau teeb tsa tus nqi raug ntawm qhov chaw nyob, sau cov ntaub ntawv yog tias nws yog kev sau ntawv, tsav tus nqi tawg mus rau 1 rau ib qho kev sib pauv lossis koj qhov xav tau tawg suav tus nqi, thiab ua rau kev sau lossis nyeem cov teeb liab.
Daim duab 4. 8-Word Write Burst Waveform Example
Daim duab 5. 8-Word Reading Burst Waveform Example
Daim duab 6. 1-Byte Sau byteenable = 4'b0001 Waveform Example
ASMI Parallel II Intel FPGA IP Siv Case Examples
Case siv examples siv ASMI Parallel II IP thiab JTAG-to-Avalon Master los ua haujlwm flash nkag, xws li nyeem silicon ID, nyeem lub cim xeeb, sau lub cim xeeb, kev tshem tawm, kev tiv thaiv sector, tshem tawm tus chij xwm txheej, thiab sau nvcr.
Kom khiav exampYog li, koj yuav tsum teeb tsa FPGA. Ua raws li cov kauj ruam no:
- Configure FPGA raws li Platform Designer system raws li qhia hauv daim duab hauv qab no.
Daim duab 7. Platform Designer System Qhia txog ASMI Parallel II IP thiab JTAG-rau-Avalon Master
- Txuag cov ntawv TCL nram qab no rau hauv tib phau ntawv teev npe raws li koj qhov project. Lub npe tsab ntawv ua epcq128_access.tcl rau example.
- Tua tawm qhov system console. Hauv console, sau cov ntawv sau los ntawm kev siv "qhov chaw epcq128_access.tcl".
Example 1: Nyeem Silicon ID ntawm Configuration Devices
Example 2: Nyeem thiab Sau Ib Lo Lus Cov Ntaub Ntawv ntawm Chaw Nyob H'40000000
Example 3: Luas Sector 64
Example 4: Ua Sector Tiv Thaiv ntawm Sectors (0 txog 127)
Example 5: Nyeem thiab Ncua Daim Ntawv Sau Npe
Example 6: Nyeem thiab sau nvcr
ASMI Parallel II Intel FPGA Tus Neeg Siv Khoom Qhia Archives
IP versions yog tib yam li Intel Quartus Prime Design Suite software versions mus txog v19.1. Los ntawm Intel Quartus Prime Design Suite software version 19.2 lossis tom qab ntawd, IP cores muaj cov txheej txheem tshiab IP versioning.
Yog tias tus IP core version tsis tau teev tseg, cov lus qhia siv rau tus IP core version dhau los siv.
| Intel Quartus Prime Version | IP Core Version | Cov neeg siv phau ntawv qhia |
| 17.0 | 17.0 | Altera ASMI Parallel II IP Core User Guide |
Cov ntaub ntawv kho dua tshiab rau ASMI Parallel II Intel FPGA IP Tus Neeg Siv Qhia
| Cov ntaub ntawv Version | Intel Quartus Prime Version | IP Version | Hloov |
| 2020.07.29 | 18.0 | 18.0 | • Hloov kho cov ntaub ntawv npe rau ASMI Parallel II Intel FPGA Tus Neeg Siv Lus Qhia.
• Hloov tshiab Table 2: Parameter Settings hauv seem Tsis muaj. |
| 2018.09.24 | 18.0 | 18.0 | • Ntxiv cov ntaub ntawv ntawm cov ntawv thov thiab kev txhawb nqa rau ASMI Parallel II Intel FPGA IP core.
• Ntxiv ib daim ntawv kom xa mus rau Generic Serial Flash Interface Intel FPGA IP Tus Neeg Siv Khoom Qhia. • Ntxiv rau ASMI Parallel II Intel FPGA IP Core Siv Case Examples ntu. |
| 2018.05.07 | 18.0 | 18.0 | • Renamed Altera ASMI Parallel II IP core rau ASMI Parallel II Intel FPGA IP core ib Intel rebranding.
• Ntxiv kev txhawb nqa rau EPCQ-A li. • Ntxiv ib daim ntawv rau lub teeb liab clk nyob rau hauv Piav Qhia Ports rooj. • Hloov kho cov lus piav qhia rau lub teeb liab qspi_scein hauv Piav Qhia Ports rooj. • Ntxiv ib daim ntawv rau SECTOR_PROTECT sau npe hauv Sau npe daim ntawv qhia rooj. • Hloov kho me ntsis thiab dav rau SECTOR_ERASE thiab SUBSECTOR_ERASE cov npe hauv Sau npe daim ntawv qhia rooj. • Hloov kho me ntsis thiab dav rau SECTOR_PROTECT register hauv Sau npe daim ntawv qhia rooj. |
| txuas ntxiv… | |||
| Cov ntaub ntawv Version | Intel Quartus Prime Version | IP Version | Hloov |
| • Hloov kho cov lus piav qhia rau CHIP SELECT xaiv ntawm CONTROL sau npe hauv Sau npe daim ntawv qhia rooj.
• Hloov kho cov ntawv hauv qab rau SECTOR_ERASE, SUBSECTOR_ERASE, BULK_ERASE, thiab DIE_ERASE cov npe hauv Sau npe daim ntawv qhia rooj. • Hloov kho cov lus piav qhia rau vl_mem_addr signal hauv Piav Qhia Ports rooj. • Cov kev hloov kho me me. |
| Hnub tim | Version | Hloov |
| Peb 2017 | 2017.05.08 | Kev tso tawm thawj zaug. |
Intel Corporation. Txhua txoj cai. Intel, Intel logo, thiab lwm yam Intel cov cim yog cov cim lag luam ntawm Intel Corporation lossis nws cov koom haum. Intel lav kev ua tau zoo ntawm nws cov FPGA thiab cov khoom lag luam semiconductor rau cov kev qhia tshwj xeeb tam sim no raws li Intel tus qauv kev lees paub, tab sis muaj txoj cai los hloov cov khoom thiab cov kev pabcuam txhua lub sijhawm yam tsis muaj ntawv ceeb toom. Intel xav tias tsis muaj lub luag haujlwm lossis kev lav phib xaub uas tshwm sim los ntawm daim ntawv thov lossis siv cov ntaub ntawv, cov khoom lag luam, lossis cov kev pabcuam uas tau piav qhia hauv no tshwj tsis yog raws li tau pom zoo hauv kev sau ntawv los ntawm Intel. Intel cov neeg siv khoom tau qhia kom tau txais qhov tseeb version ntawm cov cuab yeej tshwj xeeb ua ntej tso siab rau cov ntaub ntawv tshaj tawm thiab ua ntej muab xaj rau cov khoom lossis cov kev pabcuam.
* Lwm lub npe thiab hom yuav raug lees paub raws li cov cuab yeej ntawm lwm tus.
Cov ntaub ntawv / Cov ntaub ntawv
 |
Intel ASMI Parallel II Intel FPGA IP [ua pdf] Cov neeg siv phau ntawv qhia ASMI Parallel II Intel FPGA IP, ASMI, Parallel II Intel FPGA IP, II Intel FPGA IP, FPGA IP |
