Intel Chip ID FPGA IP Cores

Txhua qhov txhawb Intel® FPGA muaj qhov tshwj xeeb 64-ntsis nti ID. Chip ID Intel FPGA IP cores tso cai rau koj nyeem tawm daim npav ID no rau kev txheeb xyuas cov cuab yeej.

Cov ntaub ntawv ntsig txog

• Taw qhia rau Intel FPGA IP Cores
  • Muab cov ntaub ntawv dav dav txog tag nrho Intel FPGA IP cores, suav nrog parameterizing, tsim, kho dua tshiab, thiab simulating IP cores.
• Tsim ib qho Kev Sib Txuas Simulator Teeb Tsab Ntawv
  • Tsim cov ntawv simulation uas tsis xav tau phau ntawv hloov tshiab rau software lossis IP version hloov kho.

Kev them nyiaj yug ntaus ntawv

IP Cores	Cov khoom siv txhawb nqa
Chip ID Intel Stratix® 10 FPGA IP core	Intel Stratix 10
Cim Chip ID Intel Arria® 10 FPGA IP core	Intel Arria 10
Cim Chip ID Intel Cyclone® 10 GX FPGA IP core	Intel Cyclone 10 GX
Cim Chip ID Intel MAX® 10 FPGA IP	Intel MAX 10
Cim Chip ID Intel FPGA IP core	Stratix V Arria V Cyclone V

Cov ntaub ntawv ntsig txog

• Cim Chip ID Intel MAX 10 FPGA IP Core

Chip ID Intel Stratix 10 FPGA IP Core

• Tshooj lus no piav qhia txog Chip ID Intel Stratix 10 FPGA IP core.

Functional Description

Lub teeb liab data_valid pib qis hauv lub xeev thawj zaug uas tsis muaj cov ntaub ntawv raug nyeem los ntawm lub cuab yeej. Tom qab pub lub siab-rau-tsawg mem tes rau qhov chaw nkag tau nyeem, Chip ID Intel Stratix 10 FPGA IP nyeem cov cim nti ID. Tom qab nyeem ntawv, tus tub ntxhais IP lees paub cov teeb liab data_valid los qhia tias tus cim nti ID tus nqi ntawm qhov chaw nres nkoj tso tawm yog npaj rau kev rov qab. Kev ua haujlwm rov ua dua tsuas yog thaum koj rov pib dua IP core. Lub chip_id[63:0] tso zis chaw nres nkoj tuav tus nqi ntawm tus cim nti ID kom txog thaum koj rov teeb tsa lub cuab yeej lossis rov pib dua tus IP core.

Nco tseg: Koj tsis tuaj yeem simulate Chip ID IP core vim tias tus tub ntxhais IP tau txais cov lus teb ntawm nti ID cov ntaub ntawv los ntawm SDM. Txhawm rau txheeb xyuas tus IP core no, Intel xav kom koj ua qhov kev ntsuas kho vajtse.

Chaw nres nkoj

Daim duab 1: Chip ID Intel Stratix 10 FPGA IP Core Ports

Table 2: Chip ID Intel Stratix 10 FPGA IP Core Ports Nqe lus piav qhia

Chaw nres nkoj	I/O	Loj (Bit)	Kev piav qhia
clkin ua	Tswv yim	1	Pub lub moos teeb liab rau lub chip ID thaiv. Qhov siab tshaj plaws txhawb nqa yog sib npaug rau koj lub moos system.
rov pib dua	Tswv yim	1	Synchronous reset uas rov pib dua tus IP core. Txhawm rau rov pib dua tus tub ntxhais IP, lees paub qhov pib dua teeb liab siab rau tsawg kawg 10 clkin cycles.
data_valid	Tso zis	1	Qhia tias tus cim nti ID yog npaj txhij rau retrieval. Yog tias lub teeb liab qis, tus tub ntxhais IP yog nyob rau hauv thawj lub xeev lossis tab tom thauj cov ntaub ntawv los ntawm fuse ID. Tom qab tus tub ntxhais IP lees paub lub teeb liab, cov ntaub ntawv tau npaj rau kev rov qab los ntawm chip_id [63..0] tso zis chaw nres nkoj.
chip_id	Tso zis	64	Qhia txog tus cim nti ID raws li nws qhov chaw fuse ID. Cov ntaub ntawv tsuas yog siv tau tom qab tus tub ntxhais IP lees paub cov teeb liab data_valid. Tus nqi ntawm lub zog-up rov qab mus rau 0. Lub chip_id [63:0] tso zis chaw nres nkoj tuav tus nqi ntawm tus cim nti ID kom txog thaum koj rov kho lub cuab yeej lossis rov pib dua tus IP core.
nyeem	Tswv yim	1	Lub teeb liab readid yog siv los nyeem tus nqi ID los ntawm lub cuab yeej. Txhua zaus lub teeb liab hloov tus nqi ntawm 1 mus rau 0, tus IP tseem ceeb ua rau kev nyeem ID ua haujlwm. Koj yuav tsum tsav lub teeb liab mus rau 0 thaum tsis siv. Txhawm rau pib ua haujlwm nyeem ID, tsav lub teeb liab siab rau tsawg kawg 3 lub voj voog, ces rub nws qis. Tus tub ntxhais IP pib nyeem tus nqi ntawm daim npav ID.

Kev nkag mus rau Chip ID Intel Stratix 10 FPGA IP los ntawm Kev Siv Hluav Taws Xob

Thaum koj toggle lub teeb liab nyeem tau, Chip ID Intel Stratix 10 FPGA IP core pib nyeem cov nti ID los ntawm Intel Stratix 10 ntaus ntawv. Thaum lub nti ID npaj txhij, Chip ID Intel Stratix 10 FPGA IP core lees paub cov teeb liab data_valid thiab xaus JTAG nkag mus.

Nco tseg: Tso cai ncua sij hawm sib npaug rau tCD2UM tom qab tag nrho nti teeb tsa ua ntej sim nyeem cov cim nti ID. Xa mus rau daim ntawv teev cov cuab yeej siv rau tCD2UM tus nqi.

Rov pib dua Chip ID Intel Stratix 10 FPGA IP Core

Txhawm rau rov pib dua tus IP core, koj yuav tsum lees paub qhov pib dua lub teeb liab rau tsawg kawg kaum lub voj voog.

Nco tseg

1. Rau Intel Stratix 10 cov khoom siv, tsis txhob rov pib dua IP core kom txog thaum tsawg kawg tCD2UM tom qab tag nrho nti pib. Xa mus rau daim ntawv teev cov cuab yeej siv rau tCD2UM tus nqi.
2. Rau IP core instantiation cov lus qhia, koj yuav tsum xa mus rau Intel Stratix 10 Reset Release IP seem hauv Intel Stratix 10 Configuration User Guide.

Cov ntaub ntawv ntsig txog

Intel Stratix 10 Configuration User Guide

• Muab cov ntaub ntawv ntau ntxiv txog Intel Stratix 10 Reset Release IP.

Chip ID Intel FPGA IP Cores

Tshooj lus no piav qhia txog IP cores hauv qab no

• Cim Chip ID Intel Arria 10 FPGA IP core
• Cim Chip ID Intel Cyclone 10 GX FPGA IP core
• Cim Chip ID Intel FPGA IP core

Functional Description

Lub teeb liab data_valid pib qis hauv lub xeev thawj zaug uas tsis muaj cov ntaub ntawv raug nyeem los ntawm lub cuab yeej. Tom qab pub lub moos teeb liab mus rau clkin input chaw nres nkoj, Chip ID Intel FPGA IP core nyeem cov cim nti ID. Tom qab nyeem ntawv, tus tub ntxhais IP lees paub cov teeb liab data_valid los qhia tias tus cim nti ID tus nqi ntawm qhov chaw nres nkoj tso tawm yog npaj rau kev rov qab. Kev ua haujlwm rov ua dua tsuas yog thaum koj rov pib dua IP core. Lub chip_id[63:0] tso zis chaw nres nkoj tuav tus nqi ntawm tus cim nti ID kom txog thaum koj rov teeb tsa lub cuab yeej lossis rov pib dua tus IP core.

Nco tseg: Intel Chip ID IP core tsis muaj cov qauv simulation files. Txhawm rau txheeb xyuas tus IP core no, Intel xav kom koj ua qhov kev ntsuas kho vajtse.

Daim duab 2: Chip ID Intel FPGA IP Core Ports

Table 3: Chip ID Intel FPGA IP Core Ports Nqe lus piav qhia

Chaw nres nkoj	I/O	Loj (Bit)	Kev piav qhia
clkin ua	Tswv yim	1	Pub lub moos teeb liab rau lub chip ID thaiv. Qhov siab tshaj plaws txhawb frequencies yog raws li nram no: • Rau Intel Arria 10 thiab Intel Cyclone 10 GX: 30 MHz. • Rau Intel MAX 10, Stratix V, Arria V thiab Cyclone V: 100 MHz.
rov pib dua	Tswv yim	1	Synchronous reset uas rov pib dua tus IP core. Txhawm rau rov pib dua tus tub ntxhais IP, lees paub qhov teeb meem pib dua siab rau tsawg kawg 10 clkin cycles(1). Lub chip_id [63:0] tso zis chaw nres nkoj tuav tus nqi ntawm tus cim nti ID kom txog thaum koj rov kho lub cuab yeej lossis rov pib dua tus IP core.
data_valid	Tso zis	1	Qhia tias tus cim nti ID yog npaj txhij rau retrieval. Yog tias lub teeb liab qis, tus tub ntxhais IP yog nyob rau hauv thawj lub xeev lossis tab tom thauj cov ntaub ntawv los ntawm fuse ID. Tom qab tus tub ntxhais IP lees paub lub teeb liab, cov ntaub ntawv tau npaj rau kev rov qab los ntawm chip_id [63..0] tso zis chaw nres nkoj.
chip_id	Tso zis	64	Qhia txog tus cim nti ID raws li nws qhov chaw fuse ID. Cov ntaub ntawv tsuas yog siv tau tom qab tus tub ntxhais IP lees paub cov teeb liab data_valid. Tus nqi ntawm lub zog-up rov qab mus rau 0.

Nkag mus rau Unique Chip ID Intel Arria 10 FPGA IP thiab Cim Chip ID Intel Cyclone 10 GX FPGA IP los ntawm Lub Teeb Pom Kev

Nco tseg: Intel Arria 10 thiab Intel Cyclone 10 GX nti ID nkag tsis tau yog tias koj muaj lwm lub tshuab lossis IP cores nkag mus rau JTAG ib txhij. Rau example, Lub Teeb Qhia Tap II Logic Analyzer, Transceiver Toolkit, in-system signals or probes, and the SmartVID Controller IP core.

Thaum koj toggle lub teeb liab pib dua, Lub Cim Chip ID Intel Arria 10 FPGA IP thiab Cim Chip ID Intel Cyclone 10 GX FPGA IP cores pib nyeem daim npav ID los ntawm Intel Arria 10 lossis Intel Cyclone 10 GX ntaus ntawv. Thaum lub chip ID npaj txhij, Unique Chip ID Intel Arria 10 FPGA IP thiab Cim Chip ID Intel Cyclone 10 GX FPGA IP cores lees paub cov teeb liab data_valid thiab xaus JTAG nkag mus.

Nco tseg: Tso cai ncua sij hawm sib npaug rau tCD2UM tom qab tag nrho nti teeb tsa ua ntej sim nyeem cov cim nti ID. Xa mus rau daim ntawv teev cov cuab yeej siv rau tCD2UM tus nqi.

Rov pib dua Chip ID Intel FPGA IP Core

Txhawm rau rov pib dua tus IP core, koj yuav tsum lees paub qhov pib dua lub teeb liab rau tsawg kawg kaum lub voj voog. Tom qab koj deassert lub teeb liab pib dua, tus IP core rereads tus cim nti ID los ntawm fuse ID thaiv. IP core lees paub cov teeb liab data_valid tom qab ua tiav qhov haujlwm.

Nco tseg: Rau Intel Arria 10, Intel Cyclone 10 GX, Intel MAX 10, Stratix V, Arria V, thiab Cyclone V pab kiag li lawm, tsis txhob rov pib dua IP core kom txog thaum tsawg kawg tCD2UM tom qab tag nrho nti pib. Xa mus rau daim ntawv teev cov cuab yeej siv rau tCD2UM tus nqi.

Chip ID Intel FPGA IP Cores Cov Neeg Siv Khoom Qhia Archives

Yog tias tus IP core version tsis tau teev tseg, cov lus qhia siv rau tus IP core version dhau los siv.

IP Core Version	Cov neeg siv phau ntawv qhia
18.1	Chip ID Intel FPGA IP Cores Tus Neeg Siv Qhia
18.0	Chip ID Intel FPGA IP Cores Tus Neeg Siv Qhia

Cov ntaub ntawv kho dua tshiab rau Chip ID Intel FPGA IP Cores Tus Neeg Siv Qhia

Cov ntaub ntawv Version	Intel Quartus® Prime Version	Hloov
2022.09.26	20.3	Tshem tawm Kev Tswj Xyuas Qhov Zoo Tshaj Plaws txuas. Hloov tshiab Functional Description Hauv Chip ID Intel Stratix 10 FPGA IP Core. Hloov tshiab Functional Description Hauv Chip ID Intel FPGA IP Cores.
2020.10.05	20.3	Hloov kho cov lus piav qhia ntawm clkin thiab resetports hauv Table: Chip ID Intel FPGA IP Core Ports Nqe lus piav qhia kom suav nrog Intel MAX 10 cov ntsiab lus. Hloov kho cov Rov pib dua Chip ID Intel FPGA IP Core ntu kom suav nrog kev txhawb nqa rau Intel MAX 10 ntaus ntawv.
2019.05.17	19.1	Hloov kho cov Rov pib dua Chip ID Intel Stratix 10 FPGA IP Core lub ntsiab lus ntxiv ib daim ntawv thib ob hais txog IP core instantiation cov lus qhia.
2019.02.19	18.1	Ntxiv kev txhawb nqa rau Intel MAX 10 li hauv IP Cores thiab cov khoom siv txhawb nqa rooj.
2018.12.24	18.1	Ntxiv cov Chip ID Intel FPGA IP Cores Cov Neeg Siv Khoom Qhia Archives ntu.  Restructured cov ntaub ntawv los muab cov ntsiab lus ntxiv ntawm cov khoom siv txhawb nqa.
2018.06.08	18.0	Hloov kho cov lus piav qhia qhov chaw nres nkoj nyeem. Hloov kho cov lus piav qhia chaw nres nkoj dua.
2018.05.07	18.0	Ntxiv qhov chaw nres nkoj nyeem rau Chip ID Intel Stratix 10 FPGA IP IP core.

 

Hnub tim	Version	Hloov
Kaum Ob Hlis 2017	2017.12.11	Hloov kho cov ntaub ntawv npe los ntawm Altera Unique Chip ID IP Tus Neeg Siv Khoom Qhia. Ntxiv Kev them nyiaj yug ntaus ntawv ntu.  Ua ke thiab ntxiv cov ntaub ntawv los ntawm Altera Arria 10 Cim Chip ID IP Tus Neeg Siv Khoom Qhia thiab Stratix 10 Cim Chip ID IP Tus Neeg Siv Khoom Qhia. Rebranded rau Intel. Hloov tshiab Functional Description. Ntxiv Intel Cyclone 10 GX ntaus ntawv txhawb nqa.
Peb 2016	2016.05.02	Tshem tawm cov txheej txheem IP cov ntaub ntawv tseem ceeb thiab txuas ntxiv mus rau Quartus Prime Phau Ntawv Qhia. Cov ntawv hloov kho tshiab txog Arria 10 ntaus ntawv txhawb nqa.
Cuaj hlis, 2014	2014.09.02	• Hloov kho cov ntaub ntawv npe kom muaj kev cuam tshuam lub npe tshiab ntawm "Altera Unique Chip ID" IP core.

Hnub tim	Version	Hloov
Lub Yim Hli, 2014	2014.08.18	Hloov tshiab parameterization cov kauj ruam rau legacy parameter editor. Ntxiv sau tseg tias tus tub ntxhais IP no tsis txhawb nqa Arria 10 tsim.
Lub Rau Hli, 2014	2014.06.30	Hloov MegaWizard Plug-In Manager cov ntaub ntawv nrog IP Catalog. Ntxiv cov ntaub ntawv txheem txog kev kho dua tshiab IP cores. Ntxiv cov qauv kev teeb tsa thiab cov ntaub ntawv tso cai. Tshem tawm cov ntaub ntawv qhia txog qib kev txhawb nqa ntaus ntawv dhau los. IP core ntaus ntawv txhawb nqa tam sim no muaj nyob rau hauv IP Catalog thiab parameter editor.
Cuaj hlis, 2013	2013.09.20	Hloov kho rau lo lus "Tau txais daim npav ID ntawm FPGA ntaus ntawv" mus rau "Kev tau txais cov cim nti ID ntawm FPGA ntaus ntawv"
Lub Tsib Hlis, 2013	1.0	Kev tso tawm thawj zaug.

Xa lus tawm tswv yim

Cov ntaub ntawv / Cov ntaub ntawv

Intel Chip ID FPGA IP Cores [ua pdf] Cov neeg siv phau ntawv qhia Chip ID FPGA IP Cores, Chip ID, FPGA IP Cores, IP Cores

Cov ntaub ntawv

• Cov neeg siv phau ntawv