VHDL VITAL™
Fa'ata'ita'iga Taiala

Folasaga

O lenei VHDL Vital Simulation Guide o loʻo i ai faʻamatalaga e uiga i le faʻaaogaina o le ModelSim e faʻataʻitaʻi ai mamanu mo masini Microsemi SoC. Va'ai ile fesoasoani ile initaneti mo fa'amatalaga fa'aopoopo e uiga i le fa'aogaina o le SoC software.
Va'ai i fa'amaumauga e aofia ai ma lau simulator mo fa'amatalaga e uiga i le fa'atinoina o fa'ata'ita'iga.

Fa'amatalaga Fa'amaumauga
O lenei pepa e fa'atatau i mea nei:

1. Ua e fa'apipi'i le polokalame Libero SoC. O lenei pepa e mo Libero SoC software v10.0 ma luga atu. Mo lomiga muamua o polokalama, tagai i le Legacy VHDL Vital Simulation Guide.
2. Ua e fa'apipi'i lau VHDL VITAL simulator.
3. Ua e masani i fale faigaluega UNIX ma faiga fa'aoga po'o PC ma Windows fa'aogaina siosiomaga.
4. Ua e masani ile FPGA architecture ma le FPGA design software.

Feagaiga Fa'amaumauga
O lo'o fa'aogaina e lenei pepa ia suiga nei:

• O faletusi a le aiga FPGA o loʻo faʻaalia e pei o . Suia le suiga ole aiga FPGA mana'omia ile aiga masini pe a mana'omia. Mo example: vcom -galuega .vhd
• O faletusi VHDL tuufaatasia o loʻo faʻaalia e pei o . Sui mo le suiga ole aiga VHDL e mana'omia pe a mana'omia. O le gagana VHDL e mana'omia le igoa o le faletusi e amata i se mataitusi alafa.

Fesoasoani i luga ole laiga
Microsemi SoC software e sau ma fesoasoani i luga ole laiga. O fesoasoani fa'ainitaneti e fa'apitoa i meafaigaluega fa'akomepiuta ta'itasi e maua mai le lisi Fesoasoani.

Seti

O lenei mataupu o loʻo i ai faʻamatalaga i le faʻatulagaina o le ModelSim simulator e faʻataʻitaʻi ai mamanu Microsemi SoC.
O lenei mataupu o loʻo aofia ai manaʻoga faʻapipiʻi, laasaga e faʻamatalaina pe faʻafefea ona tuʻufaʻatasia faletusi Microsemi SoC FPGA, ma isi faʻamatalaga seti mo le meafaigaluega faʻataʻitaʻiga e te faʻaogaina.

Polokalama Manaoga
O fa'amatalaga i totonu o lenei ta'iala e fa'atatau i le Microsemi Libero SoC Software v10.0 ma luga atu ma le IEEE1076-compliant VHDL simulators.
E le gata i lea, o lenei taʻiala o loʻo i ai faʻamatalaga e uiga i le faʻaaogaina o simulators ModelSim.
Mo faʻamatalaga faʻapitoa e uiga i faʻaliliuga o loʻo lagolagoina e lenei faʻasalalauga, alu i le polokalama lagolago faʻapitoa ile Microsemi web nofoaga (http://www.actel.com/custsup/search.html) ma su'e le upu upu lona tolu.

ModelSim
Talu ai e eseese le ala fa'apipi'i mo tagata ta'itasi ma fa'apipi'i ta'itasi, e fa'aaoga e lenei pepa le $ALSDIR e fa'ailoa ai le nofoaga o lo'o fa'apipi'i ai le polokalame. Afai o oe o se tagata Unix, na o le fatuina o se fesuiaiga o le siosiomaga e taʻua o ALSDIR ma seti lona tau i le ala faʻapipiʻi. Afai o oe o se tagata faʻaoga Windows, sui le $ALSDIR i le ala faʻapipiʻi i totonu o poloaiga.
Fa'aoga le faiga o lo'o mulimuli mai e tu'ufa'atasia ai faletusi mo le ModelSim simulators. Fa'aigoa tulafono UNIX i le UNIX vave. Fa'aigoa fa'atonuga a le Windows i luga o le laina fa'atonu o le fa'amalama o le ModelSim Transcript.
O tulafono o loʻo i lalo e mo Windows. Ina ia faʻaogaina tulafono mo UNIX, faʻaoga faʻamaʻi i luma nai lo faʻamaʻi tua.

O lenei faiga e tuufaatasia ai se faletusi Microsemi VITAL i le $ALSDIR\lib\vtl\95\mti directory. E tatau ona e tu'ufa'atasia fa'ata'ita'iga faletusi a le FPGA mo faletusi VITAL e fa'atino lelei.
Fa'aaliga: Afai ua i ai se tusi MTI i le $ALSDIR\lib\vtl\95 directory, e ono iai faletusi tu'ufa'atasi, ma atonu e te le mana'omia le fa'atinoina o le faiga o lo'o mulimuli mai.

1. Fausia se faletusi e taʻua mti i le $ALSDIR\lib\vtl\95 directory.
2. Valaau le ModelSim simulator (na'o Windows).
3. Suia i le $ALSDIR\lib\vtl\95\mti directory. Ulufale i le poloaiga lenei i le vave: cd $ALSDIR\lib\vtl\95\mti
4. Fausia a faletusi a le aiga. Ulufale i le poloaiga lenei i le vave: vlib
5. Fa'afanua le faletusi VITAL i le fa'atonuga. Ulufale le poloaiga lenei i le vave: vmap $ALSDIR\lib\vtl\95\mti\
6. Fa'aopoopo au faletusi VITAL.
   vcom -galuega ../ .vhd
   Mo example, ina ia tuufaatasia le faletusi 40MX mo lau simulator, lolomi le poloaiga lenei: vcom -work a40mx ../40mx.vhd
7. (Filifili) Fa'aopoopo le faletusi o femalagaiga. Fa'atino na'o le la'asaga lea pe a mana'omia le fa'aogaina o le faletusi femalagaiga. Tusi le poloaiga lenei i le vave: vcom -work ../ _mig.vhd

Fuafuaga tafe

O lenei mataupu o loʻo faʻamatalaina ai le faʻasologa o mamanu mo faʻataʻitaʻiga faʻataʻitaʻiga ma se meafaigaluega faʻataʻitaʻiga VHDL VITAL.

VHDL VITAL Fuafuaga Fua
O le VHDL VITAL design flow e fa la'asaga autu:

1. Fausia Fuafuaga
2. Fa'atino Fuafuaga
3. Polokalama
4. Fa'ailoga Fa'atonu

O vaega o lo'o mulimuli mai o lo'o fa'amatalaina ai nei laasaga.

Fausia Fuafuaga
I le taimi o le fausiaina o le mamanu / faʻamaoniga, o se mamanu e puʻeina i se RTL-level (amio) VHDL puna file.
A maeʻa ona puʻeina le mamanu, e mafai ona e faia se faʻataʻitaʻiga amio a le VHDL file e fa'amaonia e sa'o le VHDL code. Ona tu'ufa'atasia lea o le fa'ailoga i totonu o le VHDL netlist (tulaga fa'atulagaina). A maeʻa le faʻapipiʻiina, e mafai ona e faia se faʻataʻitaʻiga faʻatulagaina muamua o le mamanu. Mulimuli ane, o le lisi EDIF ua fa'atupuina mo le fa'aoga i le Libero SoC ma le VHDL fa'atulagaina post-layout netlist e fa'atupuina mo le fa'ata'ita'iga taimi i totonu ole VHDL VITAL-tausi simulator.

VHDL Punavai Ulufale
Ulufale i lau VHDL mamanu puna e fa'aaoga ai se fa'atonu tusitusiga po'o se fa'atonu HDL e ma'ale'ale tala. O lau VHDL mamanu puna e mafai ona aofia ai RTL-level constructs, faʻapea foʻi ma faʻataʻitaʻiga o elemene fausaga, e pei o le Libero SoC cores.

Fa'ata'ita'iga o Amio
Faia se fa'ata'ita'iga fa'ata'ita'iga o lau mamanu a'o le'i fa'apipi'i. Fa'ata'ita'iga amio e fa'amaonia ai le fa'atinoga o lau VHDL code. E masani lava, e te fa'aoga leai se fa'atuai ma se nofoa fa'ata'ita'i VHDL fa'ata'ita'i e ave fa'ata'ita'iga. Va'ai i fa'amaumauga o lo'o aofia ai ma lau meafaigaluega fa'ata'ita'iga mo fa'amatalaga e uiga i le fa'atinoina o fa'ata'ita'iga.

Fa'asologa
A mae'a ona e fa'atupu lau fa'apogai mamanu VHDL amio, e tatau ona e fa'amaopoopoina. O le Synthesis e suia ai le amio VHDL file i totonu o le upega tafa'ilagi ma fa'amalieina le mamanu mo se tekonolosi fa'atatau. O fa'amaumauga o lo'o aofia ai ma lau meafaigaluega fa'apipi'i o lo'o iai fa'amatalaga e uiga i le fa'atinoina o le fa'asologa o mamanu.

EDIF Netlist Tupulaga
A mae'a ona e faia, fa'apipi'i, ma fa'amaonia lau fa'ata'ita'iga, e fa'atupuina e le polokalama se lisi EDIF mo le nofoaga-ma-auala ile Libero SoC.
Ole lisi ole lisi ole EDIF e faʻaaogaina foi e faʻatupuina ai se lisi faʻapipiʻi VHDL mo le faʻaogaina ile faʻataʻitaʻiga.

Structural VHDL Netlist Fausia
O le Libero SoC e fa'atupuina le VHDL netlist mai lau EDIF netlist mo le fa'aoga i le post-synthesis prelayout structural simulation.
O le file o lo'o avanoa ile /synthesis directory pe a e mana'o e fai fa'ata'ita'i ma le lima.
Fa'ata'otoga Fa'atonu
Fa'atino se fa'ata'ita'iga fa'atulagaina a'o le'i tu'u-ma-fa'alaala. Fa'ata'ita'iga fa'atusa e fa'amaonia ai le fa'atinoga o lau lisi fa'apipi'i muamua VHDL fa'asologa. O fa'atuai iunite o lo'o aofia i totonu o faletusi Libero SoC VITAL tu'ufa'atasi o lo'o fa'aogaina. Va'ai i fa'amaumauga o lo'o aofia ai ma lau meafaigaluega fa'ata'ita'i mo fa'amatalaga e uiga i le fa'atinoina o fa'ata'ita'iga.

Fa'atino Fuafuaga
I le taimi o le faʻatinoga o mamanu, e te tuʻuina-ma-auala se mamanu e faʻaaoga ai le Libero SoC. E le gata i lea, e mafai ona e faia suʻesuʻega taimi. A maeʻa le nofoaga-ma-auala, faʻatino le faʻatulagaina o pou (taimi) faʻataʻitaʻiga faʻatasi ma se VHDL VITAL-tausi simulator.
Polokalama
Polokalama se masini e iai polokalama faakomepiuta ma masini mai le Microsemi SoC po'o se polokalame polokalame a isi vaega e lagolagoina. Va'ai ile fesoasoani ile polokalame ile initaneti mo fa'amatalaga e uiga ile fa'apolokalameina ole masini Microsemi SoC.
Fa'ailoga Fa'atonu
E mafai ona e fa'atinoina le fa'amaoniga i luga o se masini fa'akomepiuta e fa'aaoga ai le mea faigaluega fa'amaonia Silicon Explorer.
Va'ai ile Silicon Explorer Quick Start mo fa'amatalaga e uiga ile fa'aogaina ole Silicon Explorer.

Fausia Netlists

O lenei mataupu o loʻo faʻamatalaina ai faiga mo le faʻatupuina o le EDIF ma le lisi faʻavae VHDL.
Fausia se EDIF Netlist
A mae'a ona pu'eina lau ata po'o le fa'apipi'iina o lau fa'ata'ita'iga, fa'atupu se lisi EDIF mai lau schematic capture po'o le tu'ufa'atasiga meafaigaluega. Fa'aoga le lisi EDIF mo le nofoaga-ma-auala. Va'ai i fa'amaumauga o lo'o aofia ai ma lau pu'e ata po'o le tu'ufa'atasiga meafaigaluega mo fa'amatalaga e uiga i le fa'atupuina o se EDIF netlist.
Fausia se Structural VHDL Netlist
Structural VHDL netlist files e gaosia otometi e avea o se vaega o lau poloketi Libero SoC.
E mafai ona e su'e lau VHDL netlist files i le / synthesis directory o lau poloketi Libero. Mo example, afai o lau lisi o galuega e taʻua o le project1, o lau lisi o upega tafaʻilagi files i totonu /project1/synthesis.
O nisi aiga e mafai ona e auina atu i fafo files ma le lima mo le fa'aoga i meafaigaluega fafo. Afai e lagolagoina e lau masini lenei vaega e mafai ona e auina atu i fafo netlist files mai Tools > Export > Netlist.

Faʻataʻitaʻiga ma ModelSim

O lenei mataupu o loʻo faʻamatalaina laasaga e faʻatino ai amio, faʻatulagaina ma faʻataʻitaʻiga taimi e faʻaaoga ai le ModelSim simulator.
O fa'atinoga o lo'o fa'aalia e mo PC. O faiga fa'atulagaina tutusa e galue tutusa mo UNIX. Fa'aoga fa'ase'e i luma e sui a'i fa'a'ai tua. Mo le PC, fa'apipi'i poloaiga ile fa'amalama MTI. Mo UNIX, fa'aoga poloaiga ile fa'amalama UNIX.

Fa'ata'ita'iga o Amio
Fa'aoga le faiga o lo'o i lalo e fa'atino ai se fa'ata'ita'iga fa'ata'ita'iga o se mamanu. Va'ai i fa'amaumauga
aofia ai ma lau meafaigaluega faʻataʻitaʻiga mo faʻamatalaga faaopoopo e uiga i le faʻatinoina o le faʻataʻitaʻiga o amioga.

1. Talosaga lau ModelSim simulator. (Na'o PC)
2. Suia le lisi i lau lisi o galuega. O lenei lisi e tatau ona aofia ai lau mamanu VHDL files ma le laulau su'esu'e. Ituaiga: cd
3. Fa'afanua i le Faletusi. Afai ei ai ni mea e faʻapipiʻiina i lau puna VHDL, faʻaoga le poloaiga lea e faʻafanua ai i le faletusi VITAL tuʻufaʻatasia: vmap $ALSDIR\lib\vtl\95\mti\
   E faasino i le faletusi a le aiga i lau mamanu VHDL files, fa'aopoopo laina nei i lau mamanu VHDL files: faletusi ; fa'aoga .components.all;
4. Fausia se lisi "galuega". Ituaiga: vlib galuega
5. Fa'afanua i le tusi "galuega". Tusi le poloaiga lenei: vmap work .\work
6. Faia se fa'ata'ita'iga fa'ata'ita'iga o lau mamanu. Ina ia faia se faʻataʻitaʻiga faʻataʻitaʻiga e faʻaaoga ai lau VSystem poʻo le ModelSim simulator, faʻapipiʻi lau mamanu VHDL ma le suʻega suʻega files ma faʻatautaia se faʻataʻitaʻiga. Mo fa'ata'ita'iga fa'apitoa, tu'ufa'atasi poloka mamanu pito i lalo a'o le'i o'o i poloka fa'ata'oto maualuga.

O tulafono nei o loʻo faʻaalia ai le faʻapipiʻiina o le VHDL design ma le suʻega suʻega files:
vcom -93 .vhd
vcom -93 .vhd

Ina ia faʻatusa le mamanu, faʻapipiʻi:
vsim
Mo exampLe:
vsim test_adder_behave
O le a fa'atusaina le pa'aga fa'apitoa-tusi fa'atonu e le fa'aigoaina o le test_adder_behave i le su'ega. Afai o lau mamanu o loʻo i ai se PLL autu, faʻaaoga se iugafono 1ps:
vsim -t ps
Mo exampLe:
vsim -t ps test_adder_behave

Fa'ata'otoga Fa'atonu
Fa'aaogā le fa'agasologa o lo'o mulimuli mai e fa'atino ai fa'ata'ita'iga fa'atulagaina.

1. Fausia se lisi fa'apipi'i VHDL. Afai o lo'o e fa'aogaina le Synopsys Design Compiler, fa'atupu se fa'asologa VHDL netlist fa'aoga lenei meafaigaluega.
   Afai o loʻo e faʻaogaina isi meafaigaluega faʻapipiʻi, faʻapipiʻi se VHDL maualuga mai lau EDIF netlist e ala i le faʻaogaina o le file gaosia otometi i lau poloketi. O nisi aiga mamanu e mafai ai ona e gaosia le files sa'o mai le Meafaigaluega > Fa'atau atu > Netlist lisi.
   Fa'aaliga: O le VHDL fa'atupuina e fa'aoga std_logic mo ports uma. O taulaga pasi o le a tutusa le fa'asologa e pei ona fa'aalia i le EDIF netlist.
2. Fa'afanua ile faletusi VITAL. Fa'atonu le fa'atonuga lea e fa'afanua ai le faletusi VITAL tu'ufa'atasia.
   vmap $ALSDIR\lib\vtl\95\mti\
3. Fa'aopoopo le lisi fa'atulagaina. Fa'aopoopo lau mamanu VHDL ma le su'ega files. O tulafono nei o loʻo faʻaalia ai le faʻapipiʻiina o le VHDL design ma le suʻega suʻega files:
   vcom -na'o e -93 .vhd
   vcom -na'o le -93 .vhd
   vcom .vhd
   Fa'aaliga: Muamua, o le talosaga e tuʻufaʻatasia faʻalapotopotoga. Ona, faʻapipiʻiina lea o fausaga, e pei ona manaʻomia mo VHDL netlists tusia e nisi meafaigaluega.
4. Faʻatautaia le faʻataʻitaʻiga faʻavae. Ina ia faʻataʻitaʻiina lau mamanu, faʻapipiʻi: vsim
   Mo example: vsim test_adder_structure
   O le a fa'atusaina le pa'aga fa'apitoa-tusi fa'atonu e le fa'aigoaina o le test_adder_structure i le su'ega.
   Afai o lau mamanu o loʻo i ai se PLL autu, faʻaaoga se iugafono 1ps: vsim -t ps
   Mo example: vsim -t ps test_adder_structure

Taimi Fa'atusa
Fa'atino fa'ata'ita'iga taimi:

1. Afai e te le'i faia, toe fa'ailoa lau mamanu ma fai lau su'ega.
2. Ina ia faia se faʻataʻitaʻiga taimi e faʻaaoga ai lau V-System poʻo le ModelSim simulator, faʻapipiʻi lau mamanu VHDL ma le suʻega suʻega files, pe afai latou te leʻi tuʻufaʻatasia mo se faʻataʻitaʻiga faʻavae, ma faʻatautaia se faʻataʻitaʻiga. O tulafono nei o loʻo faʻaalia ai le faʻapipiʻiina o le VHDL design ma le suʻega suʻega files:
   vcom -na'o e -93 .vhd
   vcom -na'o le -93 .vhd
   vcom .vhd
   Fa'aaliga: O le fa'atinoina o la'asaga muamua e tu'ufa'atasia ai fa'alapotopotoga muamua ona fa'asolo ai lea o fausaga, e pei ona mana'omia mo VHDL netlists tusia e nisi meafaigaluega.
3. Fa'agasolo le fa'ata'ita'iga fa'amatalaga tua e fa'aaoga ai fa'amatalaga taimi i le SDF file. Ituaiga: vsim -sdf[max|typ|min] / = .sdf -c
   O le filifiliga e fa'amaoti ai le itulagi (po'o le ala) i se fa'ata'ita'iga i se mamanu lea e amata ai fa'amatalaga tua. E mafai ona e faʻaogaina e faʻamaonia ai se faʻataʻitaʻiga FPGA faʻapitoa i se mamanu faʻapipiʻi tele poʻo se suʻega suʻega e te manaʻo e toe faʻasalalau. Mo example: vsim – sdfmax /uut=adder.sdf -c test_adder_structural
   I lenei example, o le fa'aopoopo fa'alāpotopotoga ua fa'ata'ita'iina e pei o le fa'ata'ita'iga "uut" i le su'ega. O le pa'aga fa'ale-tagata fa'apitoa e fa'aigoaina "test_adder_structural" i totonu o le su'ega o le a fa'ata'ita'iina i le fa'aogaina o le fa'atuai maualuga o lo'o fa'amaoti mai i le SDF. file.
   Afai o lau mamanu o loʻo i ai se PLL autu, faʻaaoga se iugafono 1ps: vsim -t ps -sdf[max|typ|min] / = .sdf -c
   Mo example: vsim -t ps -sdfmax /uut=adder.sdf -c test_adder_structural

A – Lagolago oloa

O le Microsemi SoC Products Group e lagolagoina ana oloa i auaunaga lagolago eseese, e aofia ai Auaunaga Fa'atau, Tagata Fa'atau Fesoasoani Fesoasoani, a webnofoaga, meli faaeletonika, ma ofisa faatau i le lalolagi atoa.
O lenei fa'aopoopoga o lo'o iai fa'amatalaga e uiga i le fa'afeso'ota'ia o le Microsemi SoC Products Group ma le fa'aogaina o nei auaunaga lagolago.

Auaunaga i tagata
Fa'afeso'ota'i Auaunaga Fa'atau mo le lagolago o oloa e le fa'apitoa, e pei o le tau o oloa, fa'aleleia o oloa, fa'afouga fa'amatalaga, tulaga oka, ma le fa'atagaina.
Mai Amerika i Matu, valaau 800.262.1060
Mai le lalolagi atoa, valaau 650.318.4460
Fax, mai so'o se mea i le lalolagi, 408.643.6913

Nofoaga Fesoasoani Lagolago Tagata Fa'atau
O le Microsemi SoC Products Group o lo'o fa'afaigaluegaina lana Customer Technical Support Center ma ni inisinia tomai e mafai ona fesoasoani i le taliina o au meafaigaluega, polokalama, ma fesili mamanu e uiga i Microsemi SoC Products. E fa'aalu e le Customer Technical Support Center le tele o le taimi e fai ai fa'amatalaga talosaga, tali i fesili masani fa'ata'amilosaga mamanu, fa'amaumauga o fa'amatalaga ua iloa, ma fesili eseese. O lea, ae e te leʻi faʻafesoʻotaʻi i matou, faʻamolemole asiasi i matou punaoa i luga ole laiga. E foliga mai ua uma ona matou taliina au fesili.

Lagolago Fa'atekinisi
Asiasi i le Customer Support webnofoaga (www.microsemi.com/soc/support/search/default.aspx) mo nisi fa'amatalaga ma lagolago. Tele tali e maua ile su'esu'ega web punaoa e aofia ai ata, ata, ma sootaga i isi punaoa i luga o le webnofoaga.

Webnofoaga
E mafai ona e su'esu'eina le tele o fa'amatalaga fa'apitoa ma fa'amatalaga e le fa'apitoa i le SoC home page, i www.microsemi.com/soc.

Fa'afeso'ota'i le Customer Technical Support Center
O lo'o galulue fa'ainisinia maualuluga i le Technical Support Center. E mafai ona fa'afeso'ota'i le Ofisa Lagolago Fa'apitoa e ala ile imeli po'o le Microsemi SoC Products Group webnofoaga.
imeli
E mafai ona e fa'afeso'ota'i au fesili fa'apitoa i la matou tuatusi imeli ma toe maua tali ile imeli, fax, po'o le telefoni. E le gata i lea, afai e i ai ni ou faʻafitauli mamanu, e mafai ona e imeli lau mamanu files ia maua fesoasoani.
Matou te mataʻituina pea le imeli i le aso atoa. Pe a lafo mai lau talosaga ia matou, faamolemole ia mautinoa e aofia ai lou igoa atoa, igoa o le kamupani, ma au faʻamatalaga faʻafesoʻotaʻi mo le faʻatinoina lelei o lau talosaga.
Ole tuatusi imeli lagolago fa'apitoa ole soc_tech@microsemi.com.

O'u Mataupu
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I fafo o le US
O tagata fa'atau e mana'omia se fesoasoani i fafo atu o sone taimi a Amerika e mafai ona fa'afeso'ota'i le lagolago fa'apitoa e ala ile imeli (soc_tech@microsemi.com) pe faʻafesoʻotaʻi se ofisa faʻatau i le lotoifale. E mafai ona maua lisi o ofisa fa'atau i www.microsemi.com/soc/company/contact/default.aspx.

Lagolago Fa'atekinisi ITAR
Mo fesoasoani fa'apitoa i RH ma RT FPGA o lo'o fa'atulafonoina e International Traffic in Arms Regulations (ITAR), fa'afeso'ota'i mai soc_tech_itar@microsemi.com. I le isi itu, i totonu o O'u Matā'upu, filifili le Ioe i le lisi pa'ū ITAR. Mo se lisi atoa ole ITAR-regulated Microsemi FPGAs, asiasi ile ITAR web itulau.

Microsemi Corporate Headquarters
One Enterprise, Aliso Viejo CA 92656 ISA
I totonu o Amerika: +1 949-380-6100
Fa'atauga: +1 949-380-6136
Fax: +1 949-215-4996

O le Microsemi Corporation (NASDAQ: MSCC) e ofoina atu se vaega atoatoa o fofo semiconductor mo: aerospace, puipuiga ma le saogalemu; pisinisi ma fesootaiga; ma maketi tau alamanuia ma isi malosiaga. O oloa e aofia ai le maualuga-fa'atinoga, maualuga-fa'atuatuaina analog ma RF masini, fa'afefiloi fa'ailoga ma RF feso'ota'iga feso'ota'iga, customizable SoCs, FPGAs, ma subsystems atoatoa. Microsemi o lo'o fa'auluulu i Aliso Viejo, Calif. A'oa'o atili i www.microsemi.com.

© 2012 Microsemi Corporation. Ua taofia aia tatau uma. Microsemi ma le Microsemi logo o fa'ailoga fa'atau a le Microsemi Corporation. O isi fa'ailoga tau fefa'ataua'iga uma ma fa'ailoga tautua o meatotino a latou tagata e ona.
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