I-UG-20219 Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example

Mayelana ne-External Memory Interfaces Intel® Agilex™ FPGA IP

Khipha Ulwazi

Izinguqulo ze-IP ziyefana nezinguqulo zesofthiwe ye-Intel® Quartus® Prime Design Suite kufika ku-v19.1. Kusukela ku-Intel Quartus Prime Design Suite software version 19.2 noma kamuva, ama-IP cores anohlelo olusha lwenguqulo ye-IP. Inombolo ye-IP versioning scheme (XYZ) iyashintsha isuka kwenye inguqulo yesofthiwe iye kwenye. Ushintsho ku:

• U-X ukhombisa ukubuyekezwa okukhulu kwe-IP. Uma ubuyekeza isofthiwe yakho ye-Intel Quartus Prime, kufanele uvuselele i-IP.
• U-Y ukhombisa ukuthi i-IP ihlanganisa izici ezintsha. Khiqiza kabusha i-IP yakho ukuze ufake lezi zici ezintsha.
• U-Z ukhombisa ukuthi i-IP ihlanganisa izinguquko ezincane. Khiqiza kabusha i-IP yakho ukuze ufake lezi zinguquko.
  

  Into	Incazelo
  Inguqulo ye-IP	2.4.2
  I-Intel Quartus Prime	21.2
  Usuku lokukhulula	2021.06.21

I-Design Example Umhlahlandlela Wokuqala Osheshayo We-Memory Interfaces Yangaphandle Intel Agilex™ FPGA IP

I-ex yedizayini ezenzakalelayoampi-le flow iyatholakala ku-Intel Agilex™ inkumbulo yangaphandle yokusebenzelana. Khiqiza Exampinkinobho ethi Designs ku-ExampIthebhu ye-Designs ikuvumela ukuthi ucacise futhi ukhiqize i-synthesis kanye nomklamo wokulingisa example file amasethi ongawasebenzisa ukuze uqinisekise i-EMIF IP yakho. Ungakwazi ukukhiqiza i-ex yokuklamaample ehambisana nekhithi yokuthuthukisa ye-Intel FPGA, noma yanoma iyiphi i-EMIF IP oyikhiqizayo. Ungasebenzisa i-design example ukusiza ukuhlola kwakho, noma njengendawo yokuqala yohlelo lwakho.

I-General Design Example Workflows

Ukudala Iphrojekthi ye-EMIF

Kuye i-Intel Quartus Prime software version 17.1 nakamuva, kufanele udale iphrojekthi ye-Intel Quartus Prime ngaphambi kokukhiqiza i-EMIF IP kanye ne-design ex.ample.

1. Yethula isoftware ye-Intel Quartus Prime bese ukhetha File ➤ Iselekeleli Sephrojekthi Esisha. Chofoza Okulandelayo. I-Design Example Umhlahlandlela Wokuqala Osheshayo We-Memory Interfaces Yangaphandle Intel Agilex™ FPGA IP
2. Cacisa uhla lwemibhalo ( ), igama lephrojekthi ye-Intel Quartus Prime ( ), kanye negama lenhlangano yezinga eliphezulu ( ) ofuna ukukudala. Chofoza Okulandelayo.
3. Qinisekisa ukuthi iphrojekthi engenalutho ikhethiwe. Chofoza Okulandelayo izikhathi ezimbili.
4. Ngaphansi komndeni, khetha i-Intel Agilex.
5. Ngaphansi kwesihlungi Segama, thayipha inombolo yengxenye yedivayisi.
6. Ngaphansi Kwamadivayisi Atholakalayo, khetha idivayisi efanelekile.
7. Chofoza okuthi Qeda.

Ikhiqiza futhi Ilungiselela i-EMIF IP

Izinyathelo ezilandelayo zibonisa indlela yokukhiqiza nokulungisa i-EMIF IP. Lokhu kuhamba kwakha isikhombimsebenzisi se-DDR4, kodwa izinyathelo ziyefana kwezinye izivumelwano. (Lezi zinyathelo zilandela ukugeleza kwe-IP Catalogue (ezimele); uma ukhetha ukusebenzisa ukugeleza komklami wenkundla (uhlelo) esikhundleni salokho, izinyathelo ziyefana.)

1. Efasiteleni leKhathalogi ye-IP, khetha I-Memory Interfaces yangaphandle Intel Agilex FPGA IP. (Uma iwindi leKhathalogi ye-IP lingabonakali, khetha View ➤ Ikhathalogi ye-IP.)
2. Ku-IP Parameter Editor, nikeza igama lebhizinisi le-EMIF IP (igama olinikeza lapha liba file Igama le-IP) futhi ucacise uhla lwemibhalo. Chofoza okuthi Dala.
3. Umhleli wepharamitha unamathebhu amaningi lapho kufanele ulungise khona amapharamitha ukuze abonise ukusebenzisa kwakho kwe-EMIF.

Intel Agilex EMIF Ipharamitha Imihlahlandlela Yomhleli
Lesi sihloko sinikeza umhlahlandlela wezinga eliphezulu wokwenza ipharamitha kumathebhu kusihleli sepharamitha ye-Intel Agilex EMIF IP.

Ithebula 1. Imihlahlandlela yomhleli wepharamitha ye-EMIF

Ithebhu Yomhleli Wepharamitha	Iziqondiso
Okujwayelekile	Qinisekisa ukuthi amapharamitha alandelayo afakwe ngendlela efanele: • Ibanga lesivinini socingo. • Ifrikhwensi yewashi lememori. • Ifrikhwensi yewashi lereferensi ye-PLL.
Inkumbulo	• Bheka ishidi ledatha ledivayisi yakho yememori ukuze ufake amapharamitha ku Inkumbulo ithebhu. • Kufanele futhi ufake indawo ethile yephinikhodi ethi ALERT#. (Isebenza ku-DDR4 memory protocol kuphela.)
Mem I/O	• Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku Mem I/O ithebhu. • Ukuze uthole ukuqinisekiswa okuthuthukisiwe komklamo, kufanele wenze ukulingisa kwebhodi ukuze uthole izilungiselelo ezilungile zokuqeda.
I-FPGA I/O	• Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku I-FPGA I/O ithebhu. • Ukuze uthole ukuqinisekiswa kwedizayini okuthuthukisiwe, kufanele wenze ukulingisa kwebhodi namamodeli ahlobene e-IBIS ukuze ukhethe amazinga afanelekile e-I/O.
Mem Timing	• Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku Mem Timing ithebhu. • Ukuqinisekisa ukwakheka okuthuthukile, kufanele ufake imingcele ngokuya ngeshidi ledatha yedivayisi yakho yememori.
Isilawuli	Setha amapharamitha wesilawuli ngokuya ngokucushwa nokuziphatha okufunayo kwesilawuli sakho sememori.
Ukuxilonga	Ungasebenzisa amapharamitha ku- Ukuxilonga ithebhu ukusiza ekuhloleni nasekulungiseni isixhumi esibonakalayo sememori yakho.
Example Designs	I Example Designs ithebhu ikuvumela ukuthi ukhiqize i-design examples for synthesis kanye nokulingiswa. I-ex yedizayini ekhiqiziweampI-le iwuhlelo oluphelele lwe-EMIF oluhlanganisa i-EMIF IP kanye nomshayeli okhiqiza ithrafikhi engahleliwe ukuze aqinisekise isixhumi esibonakalayo sememori.

Ukuze uthole ulwazi oluningiliziwe ngamapharamitha angawodwana, bheka isahluko esifanele sephrothokholi yakho yememori ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.

Ikhiqiza i-Synthesizable EMIF Design Example

Ngekhithi yokuthuthukisa ye-Intel Agilex, kwanele ukushiya iningi lezilungiselelo ze-Intel Agilex EMIF IP ngamanani azo azenzakalelayo. Ukukhiqiza i-design synthesizeable example, landela lezi zinyathelo:

1. Ku-Example Designs ithebhu, qinisekisa ukuthi ibhokisi le-Synthesis lithikhiwe.
   • Uma usebenzisa i-interface eyodwa example design, lungiselela i-EMIF IP bese uchofoza File➤ Londoloza ukuze ulondoloze ukulungiselelwa kwamanje ekuhlukeni kwe-IP yomsebenzisi file ( .ip).
     • Uma usebenzisa i-exampidizayini enokuxhumana okuningi, cacisa Inani lama-IP enani elifiswayo lezindawo zokusebenzelana. Ungabona inani lenombolo ye-EMIF ID efana nenombolo ekhethiwe yama-IPs. Landela lezi zinyathelo ukuze ulungiselele isixhumi esibonakalayo ngasinye:
   •  Khetha i-Cal-IP ukuze ucacise uxhumano lwesixhumi esibonakalayo ku-IP Yokulinganisa.
   • Lungiselela i-EMIF IP ngokufanele kuyo yonke Ithebhu Yomhleli Wepharamitha.
   • Buyela ku-Example Dizayini ithebhu bese uchofoza Thwebula i-EMIF ID oyifunayo.
   • Phinda isinyathelo a ukuya ku-c kuwo wonke ama-ID we-EMIF.
   • Ungase uchofoze inkinobho ethi Sula ukuze ususe amapharamitha athathiwe bese uphinda isinyathelo esingu-a ukuya ku-c ukuze wenze izinguquko ku-EMIF IP.
   • Chofoza File➤ Londoloza ukuze ulondoloze ukulungiselelwa kwamanje ekuhlukeni kwe-IP yomsebenzisi file ( .ip).
2. Chofoza okuthi Khiqiza Isibample Design ekhoneni eliphezulu kwesokudla sewindi.
3. Cacisa uhla lwemibhalo lwe-EMIF design example bese uchofoza OK. Ukukhiqiza ngempumelelo i-EMIF design example idala okulandelayo filesetha ngaphansi kwemibhalo ye-qii.
4. Chofoza File ➤ Phuma ukuze uphume ewindini le-IP Parameter Editor Pro. Isistimu iyazisa, Izinguquko zakamuva azenziwanga. Khiqiza manje? Chofoza Cha ukuze uqhubeke nokugeleza okulandelayo.
5. Ukuvula i-example design, chofoza File ➤ Vula iphrojekthi, bese uzulazula uye ku /ample_name>/qii/ed_synth.qpf bese uchofoza Vula.
   Qaphela: Ukuze uthole ulwazi ngokuhlanganisa nokuhlela i-ex designample, bhekisa ku
   Ukuhlanganisa nokuhlela i-Intel Agilex EMIF Design Example.

Umfanekiso 4. Idizayini Ekhiqiziwe Ye-Synthesizable Example File Isakhiwo

Ukuze uthole ulwazi ngokwakha isistimu enenkumbulo yangaphandle emibili noma ngaphezulu, bheka kokuthi Ukudala I-Design Example ene-Multiple EMIF Interfaces, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide. Ukuze uthole ulwazi mayelana nokulungisa iphutha lezokuxhumana eziningi, bheka kokuthi Ukunika amandla Ikhithi yamathuluzi ye-EMIF Kumklamo Okhona, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.

Qaphela: Uma ungakhethi ibhokisi lokuhlola lokulingisa noma le-Synthesis, uhla lwemibhalo lwendawo luqukethe kuphela idizayini ye-Platform Designer. files, ezingahlanganiswa yi-Intel Quartus Prime software ngokuqondile, kodwa ongakwazi view noma hlela Kumklami Wenkundla. Kulesi simo ungasebenzisa imiyalo elandelayo ukuze ukhiqize ukuhlanganisa nokulingisa file amasethi.

• Ukuze udale iphrojekthi ehlanganisekayo, kufanele usebenzise i-quartus_sh -t make_qii_design.tclscript ohlwini lwemibhalo okuyiwa kulo.
• Ukuze udale iphrojekthi yokulingisa, kufanele uqalise iskripthi se-quartus_sh -t make_sim_design.tcl kumkhombandlela wendawo.

Qaphela: Uma ukhiqize i-ex designample bese wenza izinguquko kuyo kusihleli sepharamitha, kufanele uvuselele i-ex yokuklamaampukuze ubone izinguquko zakho zisetshenziswa. I-ex yedizayini esanda kukhiqizwaampi-le ayibhali ngaphezulu i-ex yomklamo ekhonaample files.

Ukukhiqiza i-EMIF Design Example for Simulation

Ngekhithi yokuthuthukisa ye-Intel Agilex, kwanele ukushiya iningi lezilungiselelo ze-Intel Agilex EMIF IP ngamanani azo azenzakalelayo. Ukukhiqiza i-design example ngokulingisa, landela lezi zinyathelo:

1. Ku-Example Designs ithebhu, qinisekisa ukuthi ibhokisi Lokulingisa lithikhiwe. Futhi khetha ifomethi edingekayo yokulingisa i-HDL, i-Verilog noma i-VHDL.
2. Lungiselela i-EMIF IP bese uchofoza File ➤ Londoloza ukuze ulondoloze ukulungiselelwa kwamanje ekuhlukeni kwe-IP yomsebenzisi file ( .ip).
3. Chofoza okuthi Khiqiza Isibample Design ekhoneni eliphezulu kwesokudla sewindi.
4. Cacisa uhla lwemibhalo lwe-EMIF design example bese uchofoza OK. Ukukhiqiza ngempumelelo i-EMIF design example kudala amaningi file amasethi ezifanisi ezihlukahlukene ezisekelwayo, ngaphansi kohla lwemibhalo lwe-sim/ed_sim.
5. Chofoza File ➤ Phuma ukuze uphume ewindini le-IP Parameter Editor Pro. Isistimu iyazisa, Izinguquko zakamuva azenziwanga. Khiqiza manje? Chofoza Cha ukuze uqhubeke nokugeleza okulandelayo.

Idizayini Yokulingisa Ekhiqiziwe Isibample File Isakhiwo

Qaphela: I-External Memory Interfaces Intel Agilex FPGA IP okwamanje isekela kuphela izilingisi ze-VCS, ModelSim/QuestaSim, ne-Xcelium. Ukwesekwa kwesifanisi okwengeziwe kuhlelwa ekukhishweni okuzayo.

Qaphela: Uma ungakhethi ibhokisi lokuhlola lokulingisa noma le-Synthesis, uhla lwemibhalo lwendawo luqukethe kuphela idizayini ye-Platform Designer. files, ezingahlanganiswa yi-Intel Quartus Prime software ngokuqondile, kodwa ongakwazi view noma hlela Kumklami Wenkundla. Kulesi simo ungasebenzisa imiyalo elandelayo ukuze ukhiqize ukuhlanganisa nokulingisa file amasethi.

• Ukuze udale iphrojekthi ehlanganisekayo, kufanele uqalise iskripthi se-quartus_sh -t make_qii_design.tcl kumkhombandlela wendawo.
• Ukuze udale iphrojekthi yokulingisa, kufanele uqalise iskripthi se-quartus_sh -t make_sim_design.tcl kumkhombandlela wendawo.

Qaphela: Uma ukhiqize i-ex designample bese wenza izinguquko kuyo kusihleli sepharamitha, kufanele uvuselele i-ex yokuklamaampukuze ubone izinguquko zakho zisetshenziswa. I-ex yedizayini esanda kukhiqizwaampi-le ayibhali ngaphezulu i-ex yomklamo ekhonaample files.

Ukulingisa Kuqhathaniswa Nokusetshenziswa Kwezingxenyekazi Zekhompyutha
Ukuze ulingise inkumbulo yangaphandle, ungakhetha ukweqa ukulinganisa noma ukulinganisa okugcwele kuthebhu ethi Diagnostics ngesikhathi sokukhiqiza i-IP.

Amamodeli Wokulingisa we-EMIF
Leli thebula liqhathanisa izici zokulinganisa ukweqa namamodeli wokulinganisa agcwele.

Ithebula 2. Amamodeli Okulingisa we-EMIF: Yeqa Ukulinganisa Ngokuqhathanisa Nokulinganiswa Okugcwele

Yeqa Ukulinganisa	Ukulinganisa Okugcwele
Ukulingisa kwezinga lesistimu okugxile kungqondongqondo yomsebenzisi.	Ukulingisa isixhumi esibonakalayo sememori okugxile ekulinganisweni.
Imininingwane yokulinganiswa ayithwetshulwa.	Ithwebula konke u-stagukulinganisa.
Inamandla okugcina futhi ithole idatha.	Kufaka ileveli, i-per-bit deskew, njll.
Imele ukusebenza kahle okunembile.
Ayicabangi i-skew yebhodi.

I-RTL Simulation Versus Hardware Implementation
Leli thebula ligqamisa umehluko oyinhloko phakathi kokulingiswa kwe-EMIF nokusebenzisa izingxenyekazi zekhompuyutha.

Ithebula 3. I-EMIF RTL Simulation Versus Hardware Implementation

Ukulingisa kwe-RTL	Ukuqaliswa kwe-Hardware
Ukuqaliswa kwe-Nios® nekhodi yokulinganisa kusebenzisa ngokuhambisana.	Ukuqaliswa kwe-Nios nekhodi yokulinganisa kusebenzisa ngokulandelana.
I-interface igomela isignali ye-cal_done ngesikhathi esisodwa ekulingiseni.	Imisebenzi ye-Fitter inquma ukuhleleka kokulinganisa, futhi izixhumanisi aziphikisi ukuthi kwenziwe kanyekanye.

Kufanele uqalise ukulingisa kwe-RTL ngokusekelwe kumaphethini wethrafikhi wohlelo lwakho lokusebenza lomklamo. Qaphela ukuthi ukulingisa kwe-RTL akubonisi ukubambezeleka kokulandelela kwe-PCB okungase kubangele umehluko ekubambeni kwesikhathi phakathi kokulingiswa kwe-RTL nokusebenzisa izingxenyekazi zekhompuyutha.

 Ukulingisa I-Memory Interface Yangaphandle IP Nge-ModelSim
Le nqubo ibonisa indlela yokulingisa i-EMIF design example.

1. Yethula isofthiwe ye-Mentor Graphics* ModelSim bese ukhetha File ➤ Shintsha Uhla lwemibhalo. Zulazulela kumkhombandlela we-sim/ed_sim/mentor ngaphakathi komklamo okhiqiziwe example folda.
2. Qinisekisa ukuthi iwindi le-Transcript liboniswa phansi kwesikrini. Uma iwindi le-Transcript lingabonakali, libonise ngokuchofoza View ➤ Okulotshiweyo.
3. Ewindini Lombhalo Obhaliwe, sebenzisa umthombo msim_setup.tcl.
4. Ngemva kokuthi umthombo msim_setup.tcl uqedile ukusebenza, sebenzisa i-ld_debug ewindini Lombhalo Olotshiwe.
5. Ngemuva kokuthi i-ld_debug iqede ukusebenza, qinisekisa ukuthi iwindi Lezinto liyavezwa. Uma iwindi Lezinto lingabonakali, libonise ngokuchofoza View ➤ Izinto.
6. Ewindini Lezinto, khetha amasiginali ofuna ukuzenza ngokuchofoza kwesokudla bese ukhetha Engeza igagasi.
7. Ngemva kokuqeda ukukhetha amasiginali wokulingisa, sebenzisa u-run -konke efasiteleni le-Transcript. Ukulingisa kuqhubeka kuze kuqedwe.
8. Uma ukulingisa kungabonakali, chofoza View ➤ Igagasi.

Phina Ukubekwa kwe-Intel Agilex EMIF IP
Lesi sihloko sihlinzeka ngemihlahlandlela yokubeka iphinikhodi.

Kuphelileview
I-Intel Agilex FPGAs inesakhiwo esilandelayo:

• Idivayisi ngayinye iqukethe amabhange angu-8 e-I/O.
• Ibhange ngalinye le-I/O linamabhange angu-2 angaphansi kwe-I/O.
• Ibhange ngalinye elingaphansi kwe-I/O liqukethe imizila emi-4.
• Umzila ngamunye uqukethe izikhonkwane eziyi-12 zenhloso evamile ye-I/O (GPIO).

Izinkombandlela zephinikhodi ezijwayelekile
Okulandelayo imihlahlandlela yephinikhodi evamile.

Qaphela: Ukuze uthole ukwaziswa okwengeziwe ngephinikhodi, bheka Iphinikhodi ye-Intel Agilex FPGA EMIF IP kanye nesigaba Sokuhlela Izisetshenziswa kusahluko esiqondene nephrothokholi yephrothokholi yakho yememori yangaphandle, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.

• Qinisekisa ukuthi izikhonkwane zesixhumi esibonakalayo sememori yangaphandle zihlala ngaphakathi komugqa we-I/O ofanayo.
• Izixhumi ezibonakalayo ezisebenza emabhange amaningi kufanele zihlangabezane nezidingo ezilandelayo:
  •  Amabhange kumele akhelene. Ukuze uthole ulwazi ngamabhange aseduze, bheka isihloko se-EMIF Architecture: I/O Bank ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.
•  Wonke amakheli nomyalo namaphinikhodi ahlobene kufanele ahlale ngaphakathi kwebhange elincane elilodwa.
• Ikheli nemiyalo namaphinikhodi wedatha angabelana ngebhange elincane ngaphansi kwalezi zimo ezilandelayo:
  • Ikheli nemiyalo namaphinikhodi wedatha awakwazi ukwabelana ngomzila we-I/O.
  • Umzila we-I/O ongasetshenzisiwe kuphela ekhelini nasebhange lomyalo ongaqukatha amaphini edatha.

Ithebula 4. Izithiyo Zephini Ezivamile

Uhlobo Lwesiginali	Ukucindezela
Idatha Strobe	Wonke amasignali eqembu le-DQ kufanele ahlale emzileni ofanayo we-I/O.
Idatha	Amaphinikhodi e-DQ ahlobene kufanele ahlale emzileni ofanayo we-I/O. Kumaphrothokholi angayisekeli imigqa yedatha eqondiswa kabili, amasignali afundwayo kufanele aqoqwe ngokwehlukana namasignali okubhala.
Ikheli kanye nomyalo	Ikheli kanye nezikhonkwane zomyalo kufanele zihlale ezindaweni ezichazwe ngaphambilini ngaphakathi kwebhange elincane le-I/O.

Qaphela: Ukuze uthole ukwaziswa okwengeziwe ngephinikhodi, bheka Iphinikhodi ye-Intel Agilex FPGA EMIF IP kanye nesigaba Sokuhlela Izisetshenziswa kusahluko esiqondene nephrothokholi yephrothokholi yakho yememori yangaphandle, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.

• Qinisekisa ukuthi izikhonkwane zesixhumi esibonakalayo sememori yangaphandle zihlala ngaphakathi komugqa we-I/O ofanayo.
• Izixhumi ezibonakalayo ezisebenza emabhange amaningi kufanele zihlangabezane nezidingo ezilandelayo:
  • Amabhange kumele akhelene. Ukuze uthole ulwazi ngamabhange aseduze, bheka isihloko se-EMIF Architecture: I/O Bank ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.
• Wonke amakheli nomyalo namaphinikhodi ahlobene kufanele ahlale ngaphakathi kwebhange elincane elilodwa.
• Ikheli nemiyalo namaphinikhodi wedatha angabelana ngebhange elincane ngaphansi kwalezi zimo ezilandelayo:
  • Ikheli nemiyalo namaphinikhodi wedatha awakwazi ukwabelana ngomzila we-I/O.
  • Umzila we-I/O ongasetshenzisiwe kuphela ekhelini nasebhange lomyalo ongaqukatha amaphini edatha.

Ukukhiqiza i-Design Example nge-TG Configuration Option

Idizayini ekhiqiziwe ye-EMIF exampihlanganisa ibhulokhi ekhiqiza i-traffic (TG). Ngokuzenzakalelayo, i-design exampI-le isebenzisa ibhulokhi ye-TG elula (altera_tg_avl) engasethwa kabusha kuphela ukuze iqalise kabusha iphethini yethrafikhi enekhodi eqinile. Uma kunesidingo, ungase ukhethe ukunika amandla ijeneretha yethrafikhi elungisekayo (TG2) esikhundleni salokho. Kujeneretha yethrafikhi elungisekayo (TG2) (altera_tg_avl_2), ungamisa iphethini yethrafikhi ngesikhathi sangempela ngamarejista okulawula—okusho ukuthi akudingekile ukuthi uphinde uhlanganise idizayini ukuze ushintshe noma uqalise kabusha iphethini yethrafikhi. Le generator yethrafikhi ihlinzeka ngokulawula okuhle kohlobo lwethrafikhi eluthumela kusixhumi esibonakalayo sokulawula se-EMIF. Ukwengeza, inikeza amarejista esimo aqukethe imininingwane yokwehluleka enemininingwane.

Ukunika amandla i-Traffic Generator ku-Design Example

Ungakwazi ukunika amandla ijeneretha yethrafikhi elungisekayo kusukela kuthebhu ethi Diagnostics kusihleli sepharamitha ye-EMIF. Ukuze unike amandla ijeneretha yethrafikhi elungisekayo, vula Sebenzisa i-traffic generator 2.0 ye-Avalon elungisekayo kuthebhu ethi Ukuxilongwa.

Umfanekiso 6.

• Ungakhetha ukukhubaza iphethini yethrafikhi ezenzakalelayo stage noma ithrafikhi elungiselelwe umsebenzisi stage, kodwa kufanele okungenani ube ne-s eyodwatage inikwe amandla. Ukuze uthole ulwazi ngalezi stages, bheka Iphethini Yethrafikhi Ezenzakalelayo kanye Nephethini Yethrafikhi Elungiselelwe Umsebenzisi Ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.
• Ipharamitha yesikhathi sokuhlolwa kwe-TG2 isebenza kuphela kuphethini yethrafikhi ezenzakalelayo. Ungakhetha ubude besikhathi sokuhlola obufushane, obumaphakathi, noma obungapheli.
• ungakhetha noma yiliphi kwamanani amabili epharamitha ye-TG2 Configuration Interface Mode:
  • JTAG: Ivumela ukusetshenziswa kwe-GUI kukhonsoli yesistimu. Ukuze uthole ulwazi olwengeziwe, bheka ku-Traffic Generator Configuration Interface ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.
  • Khipha: Ivumela ukusetshenziswa komqondo we-RTL wangokwezifiso ukulawula iphethini yethrafikhi.

Ukusebenzisa i-Design Example nge-EMIF Debug Toolkit

Ngaphambi kokwethula i-EMIF Debug Toolkit, qiniseka ukuthi ululungisele uhlelo lwakho idivayisi. file ene-EMIF Debug Toolkit enikwe amandla. Ukuze uqalise ikhithi yamathuluzi yokususa iphutha ye-EMIF, landela lezi zinyathelo:

1. Kusofthiwe ye-Intel Quartus Prime, vula Ikhonsoli Yesistimu ngokukhetha Amathuluzi ➤ Amathuluzi Okulungisa Amaphutha ➤ Ikhonsoli Yesistimu.
2. [Yeqa lesi sinyathelo uma iphrojekthi yakho isivele ivuliwe kusofthiwe ye-Intel Quartus Prime.] Ku-System Console, layisha into ye-SRAM file (.sof) ohlele ngalo ibhodi (njengoba kuchazwe Ezimfuneko Zokusebenzisa Ikhithi Yamathuluzi Yokususa I-EMIF, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide).
3. Khetha izimo ukuze ulungise iphutha.
4. Khetha I-EMIF Calibration Debug Toolkit yokulungisa iphutha le-EMIF, njengoba kuchazwe kokuthi Ukukhiqiza I-Design Ex.ample Ngenketho Yokulungisa Iphutha. Noma, khetha I-EMIF TG Configuration Toolkit yokulungisa amaphutha ejeneretha yethrafikhi, njengoba kuchazwe kokuthi Ukukhiqiza I-Design Ex.ample nge-TG Configuration Option.
5. Chofoza Vula Ikhithi yamathuluzi ukuze uvule okuyinhloko view ye-EMIF Debug Toolkit.
6. Uma kunezimo ze-EMIF eziningi kumklamo ohleliwe, khetha ikholomu (indlela eya ku-JTAG master) kanye ne-ID yesixhumi esibonakalayo sememori yesibonelo se-EMIF okumele uvule kuso ikhithi yamathuluzi.
7. Chofoza okuthi Yenza Kusebenze Isixhumi esibonakalayo ukuze uvumele ikhithi yamathuluzi ukuthi ifunde imingcele yesixhumi esibonakalayo nesimo sokulinganisa.
8. Kufanele ulungise isixhumi esibonakalayo esisodwa ngesikhathi; ngakho-ke, ukuxhuma kwesinye isixhumi esibonakalayo ekwakhiweni, kufanele uqale uvale isixhumi esibonakalayo samanje.

Okulandelayo yi-exampOkulandelayo ngemibiko evela ku-EMIF Calibration Debug Toolkit kanye ne-EMIF TG Configuration Toolkit:, ngokulandelana.

Qaphela: Ukuze uthole imininingwane yokulungisa iphutha, bheka Ukulungisa iphutha Ngethuluzi Lamathuluzi Lokususa Isiphazamiso Senkumbulo Yangaphandle, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.

Qaphela: Ukuze uthole imininingwane yokulungisa iphutha lejeneretha yethrafikhi, bheka ku-Traffic Generator Configuration User Interface, ku-External Memory Interfaces Intel Agilex FPGA IP User Guide.

I-Design Example Incazelo ye-Memory Interfaces Yangaphandle Intel Agilex FPGA IP

Uma wenza ipharamitha futhi ukhiqiza i-EMIF IP yakho, ungacacisa ukuthi isistimu idala izinkomba zokulingisa nokuhlanganisa. file setha, futhi ukhiqize i- file isetha ngokuzenzakalelayo. Uma ukhetha Ukulingisa noma Ukuhlanganisa ngaphansi kwe-Example Design Files ku-Example Designs ithebhu, isistimu idala ukulingisa okuphelele file isethi noma i-synthesis ephelele file setha, ngokuhambisana nokukhetha kwakho.

I-Synthesis Design Example
Umklamo we-synthesis exampI-le iqukethe amabhulokhi amakhulu aboniswe esithombeni esingezansi.

• Ijeneretha yethrafikhi, okuyi-Avalon®-MM exampumshayeli osebenzisa iphethini yamanga yokungahleliwe yokufunda futhi abhalele inombolo yamakheli enepharamitha. Ijeneretha yethrafikhi iphinde igade idatha efundwa kumemori ukuze iqinisekise ukuthi ifana nedatha ebhaliwe futhi igomela ukwehluleka uma kungenjalo.
• Isibonelo se-memory interface, esifaka:
  • Isilawuli senkumbulo esongamela phakathi kwesixhumi esibonakalayo se-Avalon-MM nesixhumi esibonakalayo se-AFI.
  • I-PHY, esebenza njengesixhumi esibonakalayo phakathi kwesilawuli sememori namadivayisi enkumbulo angaphandle ukwenza imisebenzi yokufunda nokubhala.

Umfanekiso 7. I-Synthesis Design Example

Qaphela: Uma i-PLL Sharing Mode eyodwa noma ngaphezulu, i-DLL Sharing Mode, noma i-OCT Sharing Mode isethelwe kunoma yiliphi inani ngaphandle kokuthi Akukho Ukwabelana, i-synthesis design ex.ampI-le izoqukatha izenzakalo ezimbili ze-traffic generator/memory interface. Izimo ezimbili zokusebenzelana kwethrafikhi/inkumbulo zihlobene kuphela ngoxhumo olwabiwe lwe-PLL/DLL/OCT njengoba kuchazwe izilungiselelo zepharamitha. Izimo zokusebenzelana kwethrafikhi/inkumbulo zibonisa ukuthi ungakwenza kanjani lokhu kuxhumana ngemiklamo yakho.

Idizayini yokulingisa Isibample
Idizayini yokulingisa isibampI-le iqukethe amabhulokhi amakhulu aboniswe emfanekisweni olandelayo.

• Isibonelo somklamo we-synthesis example. Njengoba kuchazwe esigabeni esandulele, i-synthesis design exampI-le iqukethe ijeneretha yethrafikhi, ingxenye yokulinganisa, kanye nesibonelo sesixhumi esibonakalayo sememori. Lokhu kuvimbela okuzenzakalelayo kumamodeli wokulingisa abstract lapho kufanele khona ukulingiswa okusheshayo.
• Imodeli yenkumbulo, esebenza njengemodeli ejwayelekile enamathela ezicacisweni zephrothokholi yememori. Imvamisa, abathengisi bememori bahlinzeka ngamamodeli wokulingisa wezingxenye zabo zememori ezithile ongazilanda kusuka kubo webamasayithi.
• Isihloli sesimo, esiqapha amasiginali wesimo asuka kusixhumi esibonakalayo sememori yangaphandle ye-IP kanye nejeneretha yethrafikhi, ukuze sisayine isimo sokudlula sisonke noma sokuhluleka.

Umfanekiso 10. Umklamo Wokulingisa Example

ExampIthebhu Yesixhumi Esibonakalayo Semiklamo
Umhleli wepharamitha uhlanganisa i-Example Designs ithebhu ekuvumela ukuthi wenze ipharamitha futhi ukhiqize i-ex yakho yedizayiniampLes.

I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi

Izinguqulo ze-IP ziyefana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kufika ku-v19.1. Kusukela ku-Intel Quartus Prime Design Suite software version 19.2 noma kamuva, ama-IP anohlelo olusha lwenguqulo ye-IP. Uma inguqulo ye-IP eyinhloko ingekho ohlwini, umhlahlandlela womsebenzisi wenguqulo yangaphambilini ye-IP iyasebenza.

Inguqulo ye-IP Core	Umhlahlandlela Womsebenzisi
2.4.0	I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi
2.3.0	I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi
2.3.0	I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi
2.1.0	I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi
19.3	I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi

Umlando Wokubuyekezwa Kombhalo Wezixhumanisi Zenkumbulo Yangaphandle Intel Agilex FPGA IP Design Example Umhlahlandlela Womsebenzisi

Inguqulo Yedokhumenti	Inguqulo ye-Intel Quartus Prime	Inguqulo ye-IP	Izinguquko
2021.06.21	21.2	2.4.2	Kwe I-Design Exampne-Quick Start isahluko: • Kwengezwe inothi ku Ukuhlanganisa nokuhlela i-Intel Agilex EMIF Design Example isihloko. • Kulungiswe isihloko se- Ukukhiqiza i-Design Example Ngenketho Yokulungisa Iphutha isihloko. • Kwengezwe i Ukukhiqiza i-Design Example nge-TG Configuration Option futhi Ukunika amandla i-Traffic Generator ku-Design Example izihloko. • Izinyathelo ezilungisiwe 2, 3, no-4, zibuyekeze izibalo ezimbalwa, futhi zengeza inothi, ku Ukusebenzisa i-Design Example nge-EMIF Debug Toolkit isihloko.
2021.03.29	21.1	2.4.0	Kwe I-Design Exampne-Quick Start isahluko: • Kwengezwe inothi ku Ikhiqiza i-Synthesizable EMIF Design Example futhi Ukukhiqiza i-EMIF Design Example for Simulation izihloko. • Kubuyekezwe i File Umdwebo wesakhiwo ku- Ukukhiqiza i-EMIF Design Example for Simulation isihloko.
2020.12.14	20.4	2.3.0	Kwe I-Design Exampne-Quick Start isahluko, yenza izinguquko ezilandelayo: • Kubuyekezwe i Ikhiqiza i-Synthesizable EMIF Design Example isihloko ukufaka imiklamo ye-EMIF eminingi. • Kubuyekezwe isibalo sesinyathelo sesi-3, ku Ukukhiqiza i-EMIF Design Example for Simulation isihloko.
2020.10.05	20.3	2.3.0	Kwe I-Design Exampne-Quick Start Guide isahluko, yenza izinguquko ezilandelayo: • Ngena Ukudala Iphrojekthi ye-EMIF, ibuyekeze isithombe esinyathelweni sesi-6. • Ngena Ikhiqiza i-Synthesizable EMIF Design Example, ibuyekeze isibalo esinyathelweni sesi-3. • Ngena Ukukhiqiza i-EMIF Design Example for Simulation, ibuyekeze isibalo esinyathelweni sesi-3. • Ngena Ukulingisa Kuqhathaniswa Nokusetshenziswa Kwezingxenyekazi Zekhompyutha, ilungise iphutha elincane kuthebula lesibili. • Ngena Ukusebenzisa i-Design Example nge-EMIF Debug Toolkit, isinyathelo sesi-6 esilungisiwe, sengezwe izinyathelo 7 no-8.
waqhubeka...

Inguqulo Yedokhumenti	Inguqulo ye-Intel Quartus Prime	Inguqulo ye-IP	Izinguquko
2020.04.13	20.1	2.1.0	• Ku Mayelana isahluko, uguqule itafula ku Khipha Ulwazi isihloko. • Ku I-Design Exampne-Quick Start Guide isahluko: - Isinyathelo sesi-7 esilungisiwe kanye nesithombe esihlobene, ku- Ikhiqiza i-Synthesizable EMIF Design Example isihloko. - Kushintshwe i- Ukukhiqiza I-Design Example ngenketho yokususa iphutha isihloko. - Kushintshwe i- Ukusebenzisa i-Design Example nge-EMIF Debug Toolkit isihloko.
2019.12.16	19.4	2.0.0	• Ku I-Design Exampne-Quick Start isahluko: - Kubuyekezwe umfanekiso esinyathelweni sesi-6 se Ukudala Iphrojekthi ye-EMIF isihloko. - Kubuyekezwe umfanekiso esinyathelweni sesi-4 se Ikhiqiza i-Synthesizable EMIF Design Example isihloko. - Kubuyekezwe umfanekiso esinyathelweni sesi-4 se Ukukhiqiza i-EMIF Design Example for Simulation isihloko. - Isinyathelo sesi-5 esishintshiwe ku- Ukukhiqiza i-EMIF Design Example for Simulation isihloko. - Kushintshwe i- Izinkombandlela zephinikhodi ezijwayelekile futhi Amabhange Aseduze izingxenye ze- Phina Ukubekwa kwe-Intel Agilex EMIF IP isihloko.
2019.10.18	19.3		• Ku Ukudala Iphrojekthi ye-EMIF isihloko, ibuyekeze isithombe ngephuzu lesi-6. • Ku Ikhiqiza futhi Ilungiselela i-EMIF IP isihloko, ibuyekeze isibalo ngesinyathelo 1. • Etafuleni ku Intel Agilex EMIF Ipharamitha Imihlahlandlela Yomhleli isihloko, siguqule incazelo ye Ibhodi ithebhu. • Ku Ikhiqiza i-Synthesizable EMIF Design Example futhi Ukukhiqiza i-EMIF Design Example for Simulation izihloko, ibuyekeze isithombe esisesinyathelweni sesi-3 sesihloko ngasinye. • Ku Ukukhiqiza i-EMIF Design Example for Simulation isihloko, ibuyekeziwe i Idizayini Yokulingisa Ekhiqiziwe Isibample File Isakhiwo isibalo futhi yashintsha inothi ngokulandela isibalo. • Ku Ikhiqiza i-Synthesizable EMIF Design Example isihloko, sengeze isinyathelo kanye nesibalo sezindawo zokusebenzelana eziningi.
2019.07.31	19.2	1.2.0	• Kwengezwe Mayelana ne-External Memory Interfaces Intel Agilex FPGA IP isahluko kanye Nokwaziswa Okukhishiwe. • Amadethi abuyekeziwe nezinombolo zenguqulo. • Ukuthuthukiswa okuncane ku- I-Synthesis Design Example umfanekiso ku I-Synthesis Design Example isihloko.
2019.04.02	19.1		• Ukukhishwa kokuqala.

Umlando Wokubuyekezwa Kombhalo Wezixhumanisi Zenkumbulo Yangaphandle Intel Agilex FPGA IP Design Example Umhlahlandlela Womsebenzisi

Amadokhumenti / Izinsiza

I-intel UG-20219 I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example [pdf] Umhlahlandlela Womsebenzisi I-UG-20219 Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example, UG-20219, I-Memory Interfaces Yangaphandle Intel Agilex FPGA IP Design Example, Interfaces Intel Agilex FPGA IP Design Example, Agilex FPGA IP Design Example

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