intel UG-01173 Fa'asa'o tui FPGA IP Core
Fa'aletonu Tu'i Intel® FPGA IP Autu Tagata Ta'iala
O le Fault Injection Intel® FPGA IP core e tu'ia mea sese i le fa'atulagaina o le RAM (CRAM) o se masini FPGA. O lenei faʻataʻitaʻiga faʻataʻitaʻiga mea sese e mafai ona tupu i le taimi masani ona o faʻalavelave faʻafuaseʻi (SEUs). SEUs e seasea tupu ma o lea e faigata ai ona suʻeina. A maeʻa ona e faʻapipiʻi le Fault Injection IP core i lau mamanu ma faʻapipiʻi lau masini, e mafai ona e faʻaogaina le meafaigaluega a le Intel Quartus® Prime Fault Injection Debugger e faʻaosofia ai mea sese i le FPGA e suʻe ai le tali a le faiga i nei mea sese.
Fa'amatalaga Fa'atatau
- Fa'alavelave Ta'itasi
- AN 737: SEU Su'esu'ega ma Toe Fa'aleleia i Intel Arria 10 Masini
Vaega
- Fa'ataga oe e iloilo tali faiga mo le fa'aitiitia o fa'alavelave fa'alavelave ta'itasi (SEFI).
- Fa'atagaina oe e fa'atino le fa'ailoga SEFI i totonu o le fale, fa'ate'aina le mana'oga mo su'ega fa'alava atoa. Nai lo lena, e mafai ona e fa'atapula'aina le su'ega o le la'au i fa'aletonu i le taimi (FIT)/Mb fua ile tulaga ole masini.
- Fua fua FIT e tusa ai ma le fa'ailoga a le SEFI e fa'atatau i lau fausaga ata. E mafai ona e fa'asoa fa'afuase'i tui fa'aletonu i totonu o le masini atoa, po'o le fa'atonuina i vaega fa'atino fa'apitoa e fa'avave ai su'ega.
- Fa'alelei lau mamanu e fa'aitiitia ai fa'alavelave e mafua mai i se fa'alavelave se tasi (SEU).
Lagolago masini
O le Fault Injection IP core e lagolagoina Intel Arria® 10, Intel Cyclone® 10 GX ma Stratix® V masini aiga. E lagolagoina e le aiga o le Afa V le Fault Injection i masini ma le suffix -SC i le code ordering. Fa'afeso'ota'i lou sui fa'atau fa'apitonu'u mo le okaina o fa'amatalaga ile -SC suffix Cyclone V masini.
Fa'aaogaina o Punaoa ma Fa'atinoga
O le polokalama Intel Quartus Prime e fa'atupuina ai le tala fa'atatau o punaoa nei mo le Stratix V A7 FPGA. I'uga mo isi masini e tutusa.
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel, ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie i ai i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel ina ia maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua. *O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
Fa'aitu'i Fa'aletonu IP Core FPGA Fa'atinoga ma le Fa'aaogaina o Punaoa
| Meafaigaluega | ALM | Logic Registers | M20K | |
| Peraimeri | Lua | |||
| Stratix V A7 | 3,821 | 5,179 | 0 | 0 |
O le Intel Quartus Prime software installation e aofia ai le Intel FPGA IP library. O lenei faletusi e maua ai le tele o pusa IP aoga mo lau fa'aoga gaosiga e aunoa ma le mana'omia o se laisene fa'aopoopo. O nisi Intel FPGA IP cores e manaʻomia le faʻatauina o se laisene ese mo le faʻaogaina o le gaosiga. O le Intel FPGA IP Evaluation Mode e mafai ai ona e iloiloina nei laisene Intel FPGA IP cores i faʻataʻitaʻiga ma meafaigaluega, aʻo leʻi filifili e faʻatau se laisene faʻapipiʻi atoatoa IP. E na'o lou mana'omia e fa'atau se laisene gaosiga atoatoa mo Intel IP cores pe a mae'a su'ega meafaigaluega ma ua sauni e fa'aoga le IP ile gaosiga. O le Intel Quartus Prime software e faʻapipiʻi ai pusa IP i nofoaga nei ona o le faaletonu:
Auala Fa'apipi'i IP Core
Nofoaga Fa'apipi'i IP Core
| Nofoaga | Polokalama | Fa'avae |
| :\intelFPGA_pro\quartus\ip\altera | Intel Quartus Prime Pro Edition | Pupuni * |
| :\intelFPGA\quartus\ip\altera | Intel Quartus Prime Standard Edition | Pupuni |
| :/intelFPGA_pro/quartus/ip/altera | Intel Quartus Prime Pro Edition | Linux* |
| :/intelFPGA/quartus/ip/altera | Intel Quartus Prime Standard Edition | Linux |
Fa'aaliga: O le polokalama Intel Quartus Prime e le lagolagoina avanoa i le auala faʻapipiʻi.
Fa'asinomaga ma Fausiaina IP Cores
E mafai ona e fa'avasegaina 'autu IP e lagolago ai le tele o ituaiga talosaga. O le Intel Quartus Prime IP Catalog ma le faʻataʻitaʻiga faʻataʻitaʻiga e faʻatagaina oe e vave filifili ma faʻapipiʻi pusa autu IP, foliga, ma gaioiga. files.
IP Catalog ma Parameter Editor
O le IP Catalog o loʻo faʻaalia ai pusa IP o loʻo avanoa mo lau poloketi, e aofia ai le Intel FPGA IP ma isi IP e te faʻaopopo i le ala suʻesuʻe o le IP Catalog.
- Filter IP Catalog e Fa'aali le IP mo le aiga masini po'o le Fa'aali IP mo aiga masini uma. Afai e leai sau poloketi e tatala, filifili le Device Family in IP Catalog.
- Tu'i i totonu o le Su'esu'e fanua e su'e ai so'o se igoa atoa po'o se vaega ole IP ile IP Catalog.
- Kiliki-matau se igoa IP autu ile IP Catalog e faʻaalia ai faʻamatalaga e uiga i masini lagolago, e tatala ai le pusa faʻapipiʻi o le IP core, ma mo fesoʻotaʻiga i faʻamaumauga IP.
- Kiliki Saili mo Partner IP to access partner IP information on the web.
O le fa'atonu fa'ata'ita'i e fa'atonuina oe e fa'ama'oti se igoa ole suiga ole IP, ports e filifili ai, ma mea e fai file filifiliga o tupulaga. O le fa'atonu fa'ata'ita'i e fa'atupuina ai se Intel Quartus Prime IP pito i luga file (.ip) mo se suiga IP i galuega faatino a le Intel Quartus Prime Pro Edition. O le fa'atonu fa'ata'ita'i e fa'atupuina se tulaga maualuga Quartus IP file (.qip) mo se suiga IP i galuega faatino a le Intel Quartus Prime Standard Edition. O nei files e fai ma sui o le fesuiaiga o le IP i le poloketi, ma teuina faʻamatalaga faʻasologa.
IP Parameter Editor (Intel Quartus Prime Standard Edition)
Galuega Fa'atupuina Autu IP (Intel Quartus Prime Pro Edition)
O le polokalama Intel Quartus Prime e fa'atupuina ai le gaioiga o lo'o mulimuli mai file fausaga mo IP ta'ito'atasi cores e le o se vaega o le Platform Designer system.
Ta'ito'atasi IP Autu Tupulaga Galuega (Intel Quartus Prime Pro Edition)
- Afai e lagolagoina ma mafai mo lau suiga autu IP.
Tuuina atu Files o Intel FPGA IP Tupulaga
| File Igoa | Fa'amatalaga |
| <lau_ip>.ip | Suiga IP tulaga maualuga file o loʻo i ai le faʻavasegaina o se IP autu i lau poloketi. Afai o le fesuiaiga o le IP o se vaega o le Platform Designer system, o le faatonu o le parameter e faʻatupuina foi se .qsys file. |
| <lau_ip>.cmp | Le VHDL Component Declaration (.cmp) file ose tusitusiga file o lo'o iai fa'amatalaga fa'alotoifale ma fa'auiga o lo'o fa'aogaina ile VHDL design files. |
| <lau_ip>_tupulaga.rpt | IP po'o le Platform Designer generation log file. Fa'aalia se aotelega o fe'au i le taimi o le fa'atupuina o le IP. |
| faaauau… | |
| File Igoa | Fa'amatalaga |
| <lau_ip>.qgsimc (Na'o faiga a le Fa'ailoga Fa'avae) | Fa'ata'ita'iga fa'akomepiuta file e fa'atusatusa le .qsys ma le .ip files fa'atasi ai ma le fa'asologa o lo'o i ai nei o le Platform Designer system ma IP core. O lenei faʻatusatusaga e iloa ai pe mafai e le Platform Designer ona faaseʻeina le toe faʻafouina o le HDL. |
| <lau_ip>.qgsynth (Na'o faiga a le Fa'ailoga Fa'avae) | Fa'apipi'i fa'apipi'i file e fa'atusatusa le .qsys ma le .ip files fa'atasi ai ma le fa'asologa o lo'o i ai nei o le Platform Designer system ma IP core. O lenei faʻatusatusaga e iloa ai pe mafai e le Platform Designer ona faaseʻeina le toe faʻafouina o le HDL. |
| <lau_ip>.qip | O lo'o iai fa'amatalaga uma e tu'ufa'atasia ma tu'ufa'atasia le vaega IP. |
| <lau_ip>.csv | O loʻo i ai faʻamatalaga e uiga i le faʻaleleia tulaga o le vaega IP. |
| .bsf | O se fa'atusa fa'atusa o le fesuiaiga o le IP mo le fa'aogaina i le Block Diagram Files (.bdf). |
| <lau_ip>.spd | Ulufale file e manaʻomia e le ip-make-simscript le faʻatupuina o faʻasologa faʻasologa. O le .spd file o lo'o i ai se lisi o files e te gaosia mo faʻataʻitaʻiga, faʻatasi ai ma faʻamatalaga e uiga i manatuaga e te amataina. |
| <lau_ip>.ppf | Le Fuafuaga Pin File (.ppf) teu le uafu ma le node tofitofiga mo vaega IP e te fatuina mo le faaaogaina ma le Fuafuaga Pin. |
| <lau_ip>_bb.v | Fa'aoga le pusa uliuli Verilog (_bb.v) file e pei o se ta'utinoga module gaogao mo le fa'aaogaina o se pusa uliuli. |
| <lau_ip>_inst.v po'o le _inst.vhd | HDL example faʻataʻitaʻiga faʻataʻitaʻiga. Kopi ma faapipii mea o loʻo i totonu o lenei mea file i lau HDL file e faʻaalia le suiga o le IP. |
| <lau_ip>.regmap | Afai o le IP o loʻo i ai faʻamatalaga resitala, o le Intel Quartus Prime software e gaosia le .regmap file. Le .regmap file o lo'o fa'amatala ai le fa'amatalaga fa'afanua tusi resitala o feso'ota'iga matai ma pologa. Lenei file faaatoatoa
le .sopcinfo file e ala i le tu'uina atu o fa'amatalaga au'ili'ili o le resitala e uiga i le faiga. Lenei file e mafai ai ona fa'aalia le resitala views ma fa'amaumauga fa'apitoa fa'apitoa ile System Console. |
| <lau_ip>.svd | Fa'ataga meafaigaluega a le HPS System Debug e view le resitalaina o fa'afanua o peripheral e feso'ota'i atu i le HPS i totonu o se faiga fa'atusa.
I le taimi o le tuufaatasia, o le polokalama Intel Quartus Prime e teuina le .svd files mo le fa'aoga pologa o lo'o va'aia e matai o le System Console i le .sof file i le sauniga debug. E faitau e le System Console lenei vaega, lea e fesiligia e le Platform Designer mo le resitalaina o faʻamatalaga faʻafanua. Mo pologa faiga, Platform Designer maua le resitala ile igoa. |
| <lau_ip>.v
<lau_ip>.vhd |
HDL files e fa'apena fa'ata'ita'i ta'iala ta'itasi po'o le tamaititi IP autu mo le tu'ufa'atasiga po'o le fa'ata'ita'iga. |
| faufautua/ | O lo'o iai se msim_setup.tcl tusitusiga e fa'atutu ma fa'atino se fa'ata'ita'iga. |
| aldec/ | O lo'o iai se tusitusiga rivierapro_setup.tcl e fa'atulaga ma fa'agasolo ai se fa'ata'ita'iga. |
| /synopsys/vcs
/synopsys/vcsmx |
O lo'o iai se atigi script vcs_setup.sh e fa'atutu ma fa'atino se fa'ata'ita'iga.
O lo'o iai se atigi tusitusiga vcsmx_setup.sh ma synopsys_sim.setup file e fa'atulaga ma fa'atautaia se fa'ata'ita'iga. |
| / fa'aoso | O lo'o iai se atigi tusitusiga ncsim_setup.sh ma isi seti files e fa'atulaga ma fa'atautaia se fa'ata'ita'iga. |
| /xcelium | O lo'o i ai se fa'asologa o le atigi simulator tutusa xcelium_setup.sh ma isi seti files e fa'atulaga ma fa'atautaia se fa'ata'ita'iga. |
| /submodules | E iai le HDL files mo le submodule autu IP. |
| <IP submodule>/ | Platform Designer e fa'atupuina /synth ma /sim sub-directories mo ta'iala IP ta'itasi e fa'atupuina e Platform Designer. |
Fa'amatalaga Fa'atino
Faatasi ai ma le Fault Injection IP core, e mafai e tagata mamanu ona faʻaalia le SEFI i totonu o le fale, fua FIT fua faatatau e tusa ai ma le SEFI faʻamatalaga, ma faʻalelei mamanu e faʻaitiitia ai le aafiaga o SEUs.
Fa'ato'a Fa'aleaga Mea e Tasi
O ta'amilosaga tu'ufa'atasi ma masini fa'apolokalame fa'apolokalame e pei o FPGA e faigofie ona maua i SEU. O SEU o ni mea fa'afuase'i, e le fa'aleagaina, e mafua mai i puna tetele e lua: vaega o le alpha ma neutrons mai ave o le lagi. E mafai e le fa'avevela ona fa'aoso ai le resitara fa'atatau, pusi manatua fa'apipi'i, po'o se vaega RAM (CRAM) fa'aopoopo e fa'asolo ai lona tulaga, ma o'o atu ai i le fa'aogaina o masini e le'i mafaufauina. Intel Arria 10, Intel Cyclone 10 GX, Arria V, Cyclone V, Stratix V ma masini fou o loʻo i ai le CRAM gafatia:
- Su'esu'ega Fa'aletonu Fa'ata'amilomilo (EDCRC)
- Fa'asa'oga otometi o se CRAM fa'aletonu (sulu)
- Malosiaga e fatu ai se tulaga le fiafia o le CRAM (tuiina sese)
Mo nisi faʻamatalaga e uiga i le faʻaitiitia o le SEU i masini Intel FPGA, faʻafesoʻotaʻi le SEU Mitigation mataupu i le tusitaulima masini taʻitasi.
Fa'amatalaga Fa'asinomaga IP Fa'asinomaga
O le Fault Injection IP core e aofia ai pine I/O nei.
Fa'aleaga Injection IP Core I/O Pins
| Igoa Pin | Fa'asinoga Pin | Fa'amatalaga Pin |
| crcerror_pin | fa'aoga | Fa'aulu mai le Error Message Register Unloader Intel FPGA IP (EMR Unloader IP). O lenei faailo e faʻamaonia pe a iloa se mea sese CRC e le EDCRC a le masini. |
| emr_data | fa'aoga | Fa'amatalaga Fa'amatalaga Fa'amatalaga Sese (EMR). Va'ai i le tusitaulima masini talafeagai mo fanua EMR.
O lenei fa'aoga e ogatasi ma le Avalon Streaming data interface signal. |
| emr_valid | fa'aoga | Fa'ailoa mai emr_data mea fa'aoga o lo'o iai fa'amaumauga aoga. Ole Avalon Streaming lea ole fa'ailoga fa'aoga talafeagai. |
| Toe setiina | fa'aoga | Fa'aoga toe setiina le module. O le toe setiina e pulea atoatoa e le Fault Injection Debugger. |
| sese_tu'i | galuega faatino | Fa'ailoa mai o se mea sese na tui ile CRAM e pei ona fa'atonuina ile JTAG feso'ota'iga. Ole umi ole taimi e fa'ailoa mai e lenei fa'ailoga e fa'alagolago i au fa'atulagaina ole JTAG TCK ma pulea poloka poloka. E masani lava, o le taimi e tusa ma le 20 uati taamilosaga o le faailo TCK. |
| error_scrubbed | galuega faatino | Fa'ailoa mai ua mae'a le fufuluina o masini e pei ona fa'atonuina ile JTAG feso'ota'iga. Ole umi ole taimi e fa'ailoa mai e lenei fa'ailoga e fa'alagolago i au fa'atulagaina ole JTAG TCK ma pulea poloka poloka. E masani lava, o le taimi e tusa ma le 20 uati taamilosaga o le faailo TCK. |
| intosc | galuega faatino | Fa'atonuga. O le Fault Injection IP e fa'aoga le uati lea, mo fa'ata'ita'igaample, e loka le poloka EMR_unloader. |
Fa'ailoga Fa'aletonu IP Pin Ata
Fa'aaogaina o le Fault Injection Debugger ma Fault Injection IP Core
E galulue fa'atasi le Fault Injection Debugger ma le Fault Injection IP core. Muamua, e te faʻapipiʻi le IP i lau mamanu, faʻapipiʻi, ma download le faʻatulagaina o taunuuga file i lau masini. Ona e ta'avale lea o le Fault Injection Debugger mai totonu ole Intel Quartus Prime software po'o le laina o le poloaiga e fa'ata'ita'i ai mea sese vaivai.
- O le Fault Injection Debugger e mafai ai ona e fa'atino su'ega tui fa'aletonu i feso'ota'iga po'o fa'atonuga fa'aputuga, ma fa'atagaina oe e fa'ama'oti vaega talafeagai i lau mamanu mo tui fa'aletonu.
- O le fa'atonuga laina fa'atonu e aoga mo le fa'agaioia o le debugger e ala i se tusitusiga.
Manatua
O le Fault Injection Debugger e fesoʻotaʻi ma le Fault Injection IP core e ala i le JTAG feso'ota'iga. O le Fault Injection IP e talia poloaiga mai le JTAG interface ma lipoti le tulaga i tua e ala i le JTAG feso'ota'iga. O le Fault Injection IP core o loʻo faʻatinoina i le faʻaogaina vaivai i lau masini; o le mea lea, e tatau ona e faʻamatalaina mo lenei faʻaoga faʻaoga i lau mamanu. O le tasi metotia o le fa'ailogaina o le tali a lau mamanu i le SEU i totonu o le fale su'esu'e ona aveese lea o le IP autu mai lau fa'asologa mulimuli na tu'uina atu.
E te fa'aogaina le Fault Injection IP core fa'atasi ai ma le IP cores nei:
- O le Error Message Register Unloader IP core, lea e faitau ma teu ai fa'amaumauga mai le fa'ama'a'aina o mea sese i masini Intel FPGA.
- (Filifili) O le Advanced SEU Detection Intel FPGA IP core, lea e faʻatusatusa ai nofoaga sese e tasi i se faʻafanua maʻaleʻale i le taimi o le faʻaogaina o masini e iloa ai pe afaina ai se mea sese vaivai.
Fa'aleaga tui Debugger Ua umaview Ata poloka
Fa'amatalaga:
-
O le Fault Injection IP e fa'aliliuina vaega o le fa'atatauga.
-
O le Fault Injection Debugger ma le Advanced SEU Detection IP e faʻaaogaina le EMR Unloader faʻataʻitaʻiga tutusa.
-
Ole Advanced SEU Detection IP core e filifili.
Fa'amatalaga Fa'atatau
- E uiga i le SMH Files i le itulau e 13
- E uiga ile EMR Unloader IP Core ile itulau 10
- E uiga ile Advanced SEU Detection IP Core ile itulau 11
Fa'atonuina ole Fault Injection IP Core
FAAMANATU
Ole Fault Injection IP core e le manaʻomia oe e setiina soʻo se tapulaʻa. Mo le faʻaogaina o le IP core, fatuina se faʻataʻitaʻiga IP fou, faʻapipiʻi i totonu o lau Platform Designer (Standard) system, ma faʻafesoʻotaʻi faʻailoga pe a talafeagai. E tatau ona e fa'aogaina le Fault Injection IP core ma le EMR Unloader IP core. Ole Fault Injection ma le EMR Unloader IP cores o loʻo maua ile Platform Designer ma le IP Catalog. Ile filifiliga, e mafai ona e vave fa'apipi'i sa'o i lau mamanu RTL, fa'aaoga Verilog HDL, SystemVerilog, po'o le VHDL.
E uiga ile EMR Unloader IP Core
O le EMR Unloader IP core e maua ai se atina'e i le EMR, lea e fa'afouina pea e le EDCRC a le masini e siaki ai CRAM bits CRC o le masini mo mea sese vaivai.
Example Platform Designer System e aofia ai le Fault Injection IP Core ma le EMR Unloader IP Core
Example Fault Injection IP Core ma le EMR Unloader IP Core Block Diagram
Fa'amatalaga Fa'atatau
Fa'ailoga Fa'amatalaga Tusi Resitala Unloader Intel FPGA IP Core User Guide
E uiga i le Advanced SEU Detection IP Core
Fa'aoga le Advanced SEU Detection (ASD) IP core pe'ā fai le fa'apalepale SEU ose popolega mamanu. E tatau ona e fa'aogaina le EMR Unloader IP core ma le ASD IP core. O le mea lea, afai e te faʻaogaina le ASD IP ma le Fault Injection IP i le mamanu tutusa, e tatau ona latou faʻasoa le EMR Unloader gaioiga e ala i le Avalon®-ST splitter component. O le ata o loʻo i lalo o loʻo faʻaalia ai le Platform Designer system lea e tufatufa atu ai e le Avalon-ST mea e aofia ai le EMR i totonu ole ASD ma Fault Injection IP cores.
Fa'aaogāina ole ASD ma Fault Injection IP ile Faiga Fa'ata'ita'i Tulaga tutusa
Fa'amatalaga Fa'atatau
Avatu SEU Su'esu'ega Intel FPGA IP Autu Tagata Ta'iala
Fa'ailoaina o Ituaiga Fa'aletonu
E mafai ona e fa'amalamalamaina vaega fa'apitoa o le FPGA mo tui fa'aletonu e fa'aaoga ai le Fa'aulutala Fa'afanua Sensitivity (.smh) file. O le SMH file teuina fa'amaopoopoina o le masini CRAM bits, o latou itulagi tofia (ASD Region), ma le taua. I le faagasologa o le mamanu e te faʻaaogaina le faʻatonuga tagging e fausia le itulagi. Ona, i le taimi o le tuufaatasia, o le Intel Quartus Prime Assembler e gaosia le SMH file. O le Fault Injection Debugger e fa'atapulaaina tui sese i vaega o masini fa'apitoa e te fa'amatalaina ile SMH file.
Fa'atinoina o le Fa'atonu Tagging
E te fa'amatalaina le FPGA itulagi mo su'ega e ala i le tu'uina atu o se ASD Region i le nofoaga. E mafai ona e fa'amaonia se tau ASD Region mo so'o se vaega o lau fa'asologa o fa'ata'ita'iga e fa'aaoga ai le Fa'amalama Fa'ailoga Fa'ailoga.
- Filifili Tofiga ➤ Fa'ailoga Vaevaega Fa'amalama.
- Kiliki taumatau i soo se mea i le laina ulutala ma ki le ASD Region e faʻaalia ai le koluma ASD Region (pe afai e leʻi faʻaalia).
- Ulufale se tau mai le 0 i le 16 mo soʻo se vaeluaga e tuʻuina atu i se ASD Region.
- ASD itulagi 0 o lo'o fa'aagaga mo vaega e le'i fa'aaogaina o le masini. E mafai ona e tuʻuina atu se vaeluaga i lenei itulagi e faʻamaonia ai e le taua.
- ASD itulagi 1 o le itulagi faaletonu. O vaega uma o lo'o fa'aaogaina o le masini e tu'uina atu i lenei itulagi se'i vagana ua e suia manino le tofiga ASD Region.
E uiga i le SMH Files
O le SMH file o lo'o iai fa'amatalaga nei:
- Afai e te le o faʻaaogaina le faʻatonuga tagging (fa'atusa, o le mamanu e leai ni fa'atonuga a le ASD Region i le fa'asologa o mamanu), le SMH file lisi uma CRAM bit ma faʻaalia pe maaleale mo le mamanu.
- Afai na e faia le hierarchy tagging ma suia tofitofiga a le ASD Region, le SMH file lisi uma CRAM bit ma ua tofia ASD itulagi.
Ole Fault Injection Debugger e mafai ona fa'atapula'aina tui ile tasi po'o le sili atu o vaega fa'apitoa. Fa'atonu le Assembler e gaosia se SMH file:
- Filifili Tofiga ➤ Meafaigaluega ➤ Meafaigaluega ma Pin Filifiliga ➤ Fa'ailoga Sese CRC.
- Fa'aola le fa'afanua Fa'atupu SEU maaleale file (.smh) filifiliga.
Fa'aaogaina o le Fault Injection Debugger
FAAMANATU
Ina ia faʻaogaina le Fault Injection Debugger, e te faʻafesoʻotaʻi i lau masini e ala i le JTAG feso'ota'iga. Ona, fetuutuunai le masini ma fai tui sese. Ina ia fa'alauiloa le Fault Injection Debugger, filifili Meafaigaluega ➤ Fault Injection Debugger i le polokalama Intel Quartus Prime. O le fa'atulagaina po'o le fa'apolokalameina o le masini e tutusa ma le fa'agasologa o lo'o fa'aogaina mo le Polokalama po'o le Signal Tap Logic Analyzer.
Debugger tui fa'aletonu
Ina ia fetuunai lau JTAG filifili:
- Kiliki Seti Meafaigaluega. O lo'o fa'aalia e le meafaigaluega le polokalame polokalame e feso'ota'i ma lau komepiuta.
- Filifili le polokalame polokalame e te mana'o e fa'aoga.
- Kiliki Tapuni.
- Kiliki Auto Su'esu'e, lea e fa'atumuina ai le filifili masini i masini fa'apipi'i o lo'o maua i le JTAG filifili.
Fa'amatalaga Fa'atatau
Fa'atatau ile Tu'iina ole Fa'aletonu ile itulau 21
Meafaigaluega ma Polokalama Manaoga
O meafaigaluega ma polokalama nei e mana'omia e fa'aoga ai le Fault Injection Debugger:
- FEATURE laina i lau Intel FPGA laisene e mafai ai le Fault Injection IP autu. Mo nisi fa'amatalaga, fa'afeso'ota'i lou sui fa'atau Intel FPGA.
- La'u uaea (Intel FPGA Download Cable, Intel FPGA Download Cable II, , po'o II).
- Intel FPGA atinaʻe pusa poʻo le faʻaogaina e le tagata faʻapipiʻi faʻatasi ma se JTAG feso'ota'iga i le masini o lo'o fa'ata'ita'iina.
- (Filifili) FEATURE laina i lau Intel FPGA laisene lea e mafai ai le Advanced SEU Detection IP core.
Fa'atonu lau masini ma le Fault Injection Debugger
E fa'aogaina e le Fault Injection Debugger se .sof ma (filifiliga) se Ulutala Fa'afanua Sensitivity (.smh) file. Le Polokalama Fa'amoemoe File (.sof) configures le FPGA. O le .smh file fa'amatala le maaleale o fasi CRAM i totonu o le masini. Afai e te le tuʻuina atu se .smh file, o le Fault Injection Debugger e tu'i fa'afuase'i fa'aletonu i vaega uma o le CRAM. Ina ia fa'ailoa mai se .sof:
- Filifili le FPGA e te manaʻo e faʻapipiʻi i le pusa filifili masini.
- Kiliki Filifili File.
- Su'e i le .sof ma kiliki le OK. E faitau e le Fault Injection Debugger le .sof.
- (Filifili) Filifili le SMH file.
Afai e te le fa'ailoaina se SMH file, o le Fault Injection Debugger e tui fa'afuase'i fa'aletonu i le masini atoa. Afai e te faʻamaonia se SMH file, e mafai ona fa'agata tui i vaega fa'aoga o lau masini.- Kiliki taumatau le masini i le pusa filifili masini ona kiliki lea Filifili SMH File.
- Filifili lau SMH file.
- Kiliki OK.
- Fa'aola Polokalama/Configure.
- Kiliki Amata.
O le Fault Injection Debugger e faʻapipiʻi le masini e faʻaaoga ai le .sof.
Fa'asinomaga Menu mo le Filifilia o le SMH File
Itulagi Fa'asalaina mo Tu'u'aga Fa'aletonu
Ina ua uma ona utaina se SMH file, e mafai ona e fa'atonuina le Fault Injection Debugger e fa'agaioi i na'o vaega patino ASD. Ina ia fa'amaoti le ASD itulagi (s) e tui ai fa'aletonu:
- Kiliki taumatau le FPGA i le atigipusa filifili masini, ma kiliki le Fa'aali Fa'afanua Fa'atonu Mea.
- Filifili le itulagi ASD (s) mo tui sese.
Fa'afanua ma'ale'ale Mea Viewer
Fa'ailoaina Ituaiga Fa'aletonu
E mafai ona e faʻamaonia ituaiga eseese o mea sese mo tui.
- Fa'aletonu e tasi (SE)
- Fa'alua fa'atasi mea sese (DAE)
- Fa'aletonu tele-bit e le mafai ona fa'asa'oina (EMBE)
O masini Intel FPGA e mafai ona fa'asa'o e le tagata lava ia mea sese ta'itasi ma fa'alua fa'atasi pe a mafai ona fa'aogaina le mea e fufulu ai. E le mafai e masini Intel FPGA ona fa'asa'o mea sese tele. Vaʻai ile mataupu ile faʻaitiitia o SEUs mo nisi faʻamatalaga e uiga i le faʻaogaina o nei mea sese. E mafai ona e fa'amaoti le fa'afefiloi o fa'aletonu e tui ma le taimi ole tui. Ina ia faʻamaonia le taimi ole tui:
- I le Fault Injection Debugger, filifili Meafaigaluega ➤ Filifiliga.
- Toso le pule mumu i le fefiloi o mea sese. I le isi itu, e mafai ona e faʻamaonia le faʻafefiloi i numera.
- Fa'ailoa le taimi ole taimi ole tui.
- Kiliki OK.
Ata 12. Fa'ailoaina ole Fa'afefiloi o Ituaiga Fa'aletonu SEU
Fa'amatalaga Fa'atatau Fa'aitiitia le le fiafia o mea na tupu
Tuiina Mea Sese
E mafai ona e tui mea sese i ni auala:
- Tu'i tasi mea sese i luga o le poloaiga
- Tu'i le tele o mea sese ile fa'atonuga
- Tuiina mea sese seia faatonuina e taofi
Ina ia tui ia faaletonu:
- Fa'aola le filifiliga Inject Fault.
- Filifili pe e te manaʻo e fai se tui tui mo le tele o faʻasalalauga pe seʻia tuʻu:
- Afai e te filifili e tamoe seia taofi, o le Fault Injection Debugger e tuiina mea sese i le vaeluaga o loʻo faʻamaonia i le Tools ➤ Options dialog box.
- Afai e te manaʻo e faʻasolo le tui sese mo se numera patino o faʻasalalauga, faʻapipiʻi le numera.
- Kiliki Amata.
Fa'aaliga: Ole Fault Injection Debugger e tamoe mo le numera faʻamaonia o faʻasalalauga pe seʻia taofi. O le Intel Quartus Prime Messages window o loʻo faʻaalia ai feʻau e uiga i mea sese o loʻo tui. Mo fa'amatalaga fa'aopoopo i fa'aletonu ua tui, kiliki le Faitau EMR. E faitau e le Fault Injection Debugger le EMR a le masini ma fa'aalia mea o lo'o i totonu o le fa'amalama o Savali.
Intel Quartus Prime Error Injection ma EMR Content Messages
Fa'amaumauga o Mea Sese
E mafai ona e fa'amaumau le nofoaga o so'o se fa'aletonu ua tui e ala i le matauina o fa'amaufa'ailoga o lo'o lipotia i le Intel Quartus Prime Messages window. Afai, mo example, o se faaletonu tui e iu i amioga e te manaʻo e toe taʻalo, e mafai ona e taulaʻi i lena nofoaga mo tui. E te fa'atinoina tui fa'atatau ile fa'aogaina ole Fault Injection Debugger command line interface.
Fa'amamaina o mea sese ua tui
Ina ia toe faʻafoʻi le galuega masani a le FPGA, kiliki Scrub. A e fufuluina se mea sese, o le EDCRC galuega a le masini e faʻaoga e faʻasaʻo ai mea sese. O le masini fufulu e tutusa ma le faʻaaogaina i le taimi o le faʻaogaina o masini.
Fa'atonu-Laina Fa'aoga
E mafai ona e fa'agasolo le Fault Injection Debugger i le laina fa'atonu ma le quartus_fid executable, lea e aoga pe afai e te mana'o e fai se tui sese mai se tusitusiga.
Fuafuaga 5. Fa'atonuga laina Fa'afinauga mo Fa'aga Fa'aletonu
| Finauga Puupuu | Fa'aupuga umi | Fa'amatalaga |
| c | uaea | Fa'ailoa mea faigaluega po'o le uaea. (Manaomia) |
| i | faasino igoa | Fa'ailoa mai le masini gaioi e tui fa'aletonu. (Manaomia) |
| n | numera | Fa'ailoa le numera o mea sese e tui. Ole tau fa'aletonu ole
1. (Filifili) |
| t | taimi | Taimi va ole tui. (Filifili) |
Fa'aaliga: Fa'aaoga le quartus_fid –fesoasoani e view avanoa uma. O le fa'ailoga o lo'o i lalo e maua ai exampfa'aaoga le Fault Injection Debugger commandline interface.
############################################
- # Saili po o fea uaea USB o loʻo avanoa mo lenei faʻataʻitaʻiga
- # O le iʻuga e faʻaalia ai e tasi le uaea o loʻo avanoa, e igoa "USB-Blaster" #
- $ quartus_fid –lisi . . .
- Fa'amatalaga: Poloaiga: quartus_fid –list
- USB-Blaster i luga ole sj-sng-z4 [USB-0] Fa'amatalaga: Intel Quartus Prime 64-Bit Fault Injection Debugger na manuia. 0 mea sese, 0 lapataiga
- ##############################################
- # Saili po o fea masini e maua ile USB-Blaster cable
- # O le iʻuga e faʻaalia ai masini e lua: o le Stratix V A7, ma le MAX V CPLD. #
- $ quartus_fid –cable USB-Blaster -a
- Fa'amatalaga: Poloaiga: quartus_fid –cable=USB-Blaster -a
- Fa'amatalaga (208809): Fa'aogaina o le uaea polokalame "USB-Blaster on sj-sng-z4 [USB-0]"
- USB-Blaster ile sj-sng-z4 [USB-0]
- 029030DD 5SGXEA7H(1|2|3)/5SGXEA7K1/..
- 020A40DD 5M2210Z/EPM2210
- Fa'amatalaga: Intel Quartus Prime 64-Bit Fault Injection Debugger na manuia.
- 0 mea sese, 0 lapataiga
- ##############################################
- # Polokalama le masini Stratix V
- # O le -index filifiliga o loʻo faʻamaonia ai gaioiga e faia i luga o se masini fesoʻotaʻi.
- # “=svgx.sof” fa'afeso'ota'i se .sof file ma le masini
- # “#p” o lona uiga polokalame le masini #
- $ quartus_fid –cable USB-Blaster –index “@1=svgx.sof#p” . . .
- Fa'amatalaga (209016): Fa'atulaga le fa'asino igoa 1
- Fa'amatalaga (209017): Meafaigaluega 1 o lo'o iai JTAG ID code 0x029030DD
- Fa'amatalaga (209007): Ua manuia le fa'atulagaina - 1 masini (s) fa'atulagaina
- Fa'amatalaga (209011): Fa'atino galuega (s) manuia
- Fa'amatalaga (208551): Saini polokalame ile masini 1.
- Fa'amatalaga: Intel Quartus Prime 64-Bit Fault Injection Debugger na manuia.
- 0 mea sese, 0 lapataiga
- ##############################################
- # Tusia se faaletonu i le masini.
- # O le #i fa'agaioiga e fa'ailoa mai e tui fa'aletonu
- # -n 3 o loʻo faʻaalia e tui 3 faʻaletonu #
- $ quartus_fid –cable USB-Blaster –index “@1=svgx.sof#i” -n 3
- Fa'amatalaga: Poloaiga: quartus_fid –cable=USB-Blaster –index=@1=svgx.sof#i -n 3
- Fa'amatalaga (208809): Fa'aogaina o le uaea polokalame "USB-Blaster on sj-sng-z4 [USB-0]"
- Fa'amatalaga (208521): Tu'i 3 mea sese i totonu o masini
- Fa'amatalaga: Intel Quartus Prime 64-Bit Fault Injection Debugger na manuia.
- 0 mea sese, 0 lapataiga
- ##############################################
- # Faiga Fesootaiga.
- # O le fa'aogaina o le #i fa'atasi ma le -n 0 e tu'u ai le fa'apalapala i le faiga fa'afeso'ota'i.
- # Manatua e 3 faʻaletonu na tui i le vasega muamua;
- # "E" faitau fa'aletonu i le taimi nei i le EMR Unloader IP core. #
- $ quartus_fid –cable USB-Blaster –index “@1=svgx.sof#i” -n 0
- Fa'amatalaga: Poloaiga: quartus_fid –cable=USB-Blaster –index=@1=svgx.sof#i -n 0
- Fa'amatalaga (208809): Fa'aogaina o le uaea polokalame "USB-Blaster on sj-sng-z4 [USB-0]"
- Ulufale:
- 'F' e tui fa'aletonu
- 'E' e faitau EMR
- 'S' e fufulu ai mea sese
- 'Q' e tu'u E
- Fa'amatalaga (208540): Faitauga EMR array
- Fa'amatalaga (208544): 3 fa'avaa mea sese na iloa ile masini 1.
- Fa'amatalaga (208545): Sese #1 : Tasi se mea sese ile fa'avaa 0x1028 ile bit 0x21EA.
- Fa'amatalaga (10914): Sese #2 : E le mafai ona fa'asa'oina le tele-bit sese i le fa'avaa 0x1116.
- Fa'amatalaga (208545): Sese #3 : Tasi se mea sese ile fa'avaa 0x1848 ile bit 0x128C.
- 'F' e tui fa'aletonu
- 'E' e faitau EMR
- 'S' e fufulu ai mea sese
- 'Q' e tu'u le Q
- Fa'amatalaga: Na manuia le Intel Quartus Prime 64-Bit Fault Injection Debugger. 0 mea sese, 0 lapataiga
- Fa'amatalaga: Manatu faakomepiuta maualuga: 1522 megabytes
- Fa'amatalaga: Fa'ai'uga fa'agasologa: Mon Nov 3 18:50:00 2014
- Fa'amatalaga: Elapsed time: 00:00:29
- Fa'amatalaga: Aofa'i taimi CPU (i luga o fa'agaioiga uma): 00:00:13
Faiga Fa'asu'iina Fa'aletonu
Manatua
Ole Fault Injection Debugger e tui fa'aletonu ile FPGA fa'afuase'i. Ae ui i lea, o le faʻaogaina o le Fault Fault Injection e mafai ai ona e tui faʻaletonu i nofoaga faʻatatau ile CRAM. Atonu e aoga lenei ta'aloga, mo se fa'ata'ita'igaample, pe afai na e matauina se mea na tupu SEU ma e te manaʻo e faʻataʻitaʻi le FPGA poʻo le tali atu i le mea lava e tasi pe a uma ona suia se fuafuaga toe faʻaleleia. O le Fa'asinomaga Fault Injection e maua na'o le laina fa'atonu. E mafai ona e faʻamaonia o mea sese o loʻo tui mai le laina faʻatonu poʻo le faʻaogaina vave. Fa'amatalaga Fa'atatau
AN 539: Metotia o Su'ega po'o Su'esu'ega Sese ma Toe Fa'aleleia e fa'aaoga ai le CRC i Intel FPGA Devices
Fa'ailoaina o se Lisi Sese Mai le Laina Poloaiga
O le faʻaogaina o le Fault Injection feature e mafai ai ona e faʻamaonia se lisi o mea sese mai le laina faʻatonu, e pei ona faʻaalia i le faʻataʻitaʻiga o loʻo mulimuli mai.ample: c:\Users\sng> quartus_fid -c 1 – i “@1= svgx.sof#i ” -n 2 -user=”@1= 0x2274 0x05EF 0x2264 0x0500″ O fea: c 1 o lo'o fa'atonuina le FPGA. e ala i le uaea muamua i lau komepiuta. i “@1= six.sof#i ” o loʻo faʻaalia ai o le masini muamua i le filifili o loʻo utaina i le mea file svgx.sof ma o le a tui i mea sese. n 2 o loʻo faʻaalia ai e lua faʻaletonu o le a tui. tagata fa'aoga =”@1= 0x2274 0x05EF 0x2264 0x0500” o se lisi fa'apitoa o fa'aletonu e tui. I lenei example, masini 1 e lua faaletonu: i le faavaa 0x2274, bit 0x05EF ma le faavaa 0x2264, bit 0x0500.
Fa'amaoti se Lisi Sese Mai Faiga Fa'anatinati
E mafai ona e fa'agaoioia le Fa'asinomaga Fault Injection fa'afeso'ota'i e ala i le fa'ailoaina o le numera o fa'aletonu e 0 (-n 0). O le Fault Injection Debugger o loʻo tuʻuina atu ai faʻatonuga faʻavavevave ma a latou faʻamatalaga.
| Fa'atonu Faiga Fa'anatinati | Fa'amatalaga |
| F | Tu'i se mea sese |
| E | Faitau le EMR |
| S | Fufulu mea sese |
| Q | Tu'u |
I le faiga vave, e mafai ona e tuʻuina atu le poloaiga F naʻo oe e tui se mea sese i se nofoaga faʻafuaseʻi i le masini. I le exampO le faʻaaogaina o le F command i le vave faʻavave, e tolu mea sese e tui. F #3 0x12 0x34 0x56 0x78 * 0x9A 0xBC +
- Sese 1 – Tasi mea sese i le faavaa 0x12, bit 0x34
- Mease 2 – Fa'asa'o sese i le fa'avaa 0x56, bit 0x78 (o le * fa'aalia ai se mea sese tele)
- Mea sese 3 - Fa'alua-fa'atasi mea sese i le fa'avaa 0x9A, bit 0xBC (a + fa'aalia se mea sese fa'alua)
F 0x12 0x34 0x56 0x78 * E tasi le mea sese (valea) ua tui: Sese 1 - Tasi mea sese i le faavaa 0x12, bit 0x34. E le amana'ia nofoaga pe a uma le fa'avaa/bit nofoaga muamua. F #3 0x12 0x34 0x56 0x78 * 0x9A 0xBC + 0xDE 0x00
E tolu mea sese ua tui:
- Sese 1 – Tasi mea sese i le faavaa 0x12, bit 0x34
- Mease 2 – Fa'asa'o sese i le fa'avaa 0x56, bit 0x78
- Sese 3 - Fa'alua-fa'atasi mea sese i le fa'avaa 0x9A, bit 0xBC
- O nofoaga pe a mae'a le 3 fa'avaa/bit paipa muamua e le amana'ia
Fuaina o nofoaga o le CRAM Bit
Fa'aaliga:
Pe a iloa e le Fault Injection Debugger se mea sese CRAM EDCRC, o le Error Message Register (EMR) o loʻo i ai le maʻi, numera faʻavaa, nofoaga puʻupuʻu, ma le ituaiga mea sese (tasi, faalua, poʻo le tele-bit) o le mea sese CRAM ua iloa. A'o su'esu'eina faiga, fa'asaoina mea o lo'o i totonu o le EMR na lipotia mai e le Fault Injection Debugger pe a e iloa se fa'aletonu EDCRC. Fa'atasi ai ma fa'amaumauga EMR fa'amaumau, e mafai ona e tu'uina atu le fa'avaa ma le numera o numera i le Fault Injection Debugger e toe fa'afo'i mea sese na ta'ua i le taimi o su'ega faiga, e fa'aopoopo atili ai le mamanu, ma fa'ailoga se tali toe fa'aleleia o le faiga i lena mea sese.
Fa'amatalaga Fa'atatau
AN 539: Fa'ata'ita'iga Su'ega po'o Su'esu'ega Sese ma Toe Fa'aleleia e fa'aaoga ai le CRC i Intel FPGA Devices
Filifiliga Fa'atonu-Laina Sili: ASD Itulagi ma Fa'ailoga Tulaga Fa'amamafa
E mafai ona e fa'aogaina le Fault Injection Debugger command-line interface e tui ai mea sese i totonu ole ASD itulagi ma mamafa ituaiga mea sese. Muamua, e te faʻamaoti le faʻafefiloi o ituaiga mea sese (tamaʻi tasi, faʻalua faʻatasi, ma le tele-bit e le mafai ona faʻasaʻoina) faʻaaoga le -weight . . filifiliga. Mo example, mo se faʻafefiloi o 50% tasi mea sese, 30% faʻalua faʻatasi mea sese, ma 20% tele-bit uncorrectable sese, faʻaaoga le filifiliga -weight=50.30.20. Ona, e faʻatatau i se itulagi ASD, faʻaaoga le -smh filifiliga e aofia ai le SMH file ma fa'ailoa le itulagi ASD e fa'atatau. Mo example: $ quartus_fid –cable=USB-BlasterII –index “@1=svgx.sof#pi” –weight=100.0.0 –smh=”@1=svgx.smh#2″ –numera=30
O lenei example poloaiga:
- Polokalama le masini ma tui fa'aletonu (fi manoa)
- Tu'i 100% fa'aletonu e tasi (100.0.0)
- Na'o tui ile ASD_REGION 2 (fa'ailoa e le #2)
- Tu'i 30 sese
Fault Injection IP Core User Guide Archives
| IP Core Version | Fa'aoga Taiala |
| 18.0 | Fault Injection Intel FPGA IP Core User Guide |
| 17.1 | Intel FPGA Fault Injection IP Core User Guide |
| 16.1 | Altera Fault Injection IP Core Taiala mo Tagata Fa'aoga |
| 15.1 | Altera Fault Injection IP Core Taiala mo Tagata Fa'aoga |
Afai e le o lisiina se fa'asologa autu o le IP, e fa'aoga le ta'iala mo le fa'asologa muamua o le IP.
Fa'amatalaga Toe Iloiloga o Fa'amaumauga mo Fa'ailoga Fa'aletonu IP Ta'iala mo Tagata Fa'aoga
| Fa'amatalaga Fa'amaumauga | Intel Quartus Prime Version | Suiga |
| 2019.07.09 | 18.1 | Fa'afouina le Fa'amatalaga Fa'asinomaga IP Fa'asinomaga autu e faamanino ai le Toe setiina, error_injected, ma error_scrubbed faailoilo. |
| 2018.05.16 | 18.0 | • Faaopoopo i ai autu nei mai le Intel Quartus Prime Pro Edition Handbook:
— Fa'ailoaina o Ituaiga Fa'aletonu ma mataupu laiti. — Fa'aaogaina o le Fault Injection Debugger ma mataupu laiti. — Fa'atonu-Laina Fa'aoga ma mataupu laiti. • Toe fa'aigoa le Intel FPGA Fault Injection IP core i le Fault Injection Intel FPGA IP. |
| Aso | Fa'aliliuga | Suiga |
| 2017.11.06 | 17.1 | • Toe fa'ailogaina o le Intel.
• Fa'aopoopo Intel Cyclone 10 GX lagolago masini. |
| 2016.10.31 | 16.1 | Fa'afou lagolago masini. |
| 2015.12.15 | 15.1 | • Suia le Quartus II i le polokalama Quartus Prime.
• Fa'amauina le feso'ota'iga fa'asino-tagata. |
| 2015.05.04 | 15.0 | Fa'asalalauga muamua. |
Pepa / Punaoa
 |
intel UG-01173 Fa'asa'o tui FPGA IP Core [pdf] Taiala mo Tagata Fa'aoga UG-01173 Fa'asagaga Fa'aletonu FPGA IP Autu, UG-01173, Fa'asagaga Fa'aletonu FPGA IP Autu, Tu'i c, Tu'u FPGA IP Core |
