intel UG-01173 Laifin allurar FPGA IP Core

Laifi Injection Intel® FPGA IP Core User Guide

Laifin Injection Intel® FPGA IP core yana shigar da kurakurai cikin tsarin RAM (CRAM) na na'urar FPGA. Wannan hanya tana kwatanta kurakurai masu laushi waɗanda zasu iya faruwa yayin aiki na yau da kullun saboda tashin hankali guda ɗaya (SEUs). SEUs sune abubuwan da ba a saba gani ba kuma saboda haka suna da wahalar gwadawa. Bayan kun kunna ainihin Injection IP core a cikin ƙirar ku kuma saita na'urar ku, zaku iya amfani da Intel Quartus® Prime Fault Injection Debugger kayan aiki don jawo kurakuran ganganci a cikin FPGA don gwada martanin tsarin ga waɗannan kurakurai.

Bayanai masu alaƙa

• Abubuwan Tashin Hankali Daya
• AN 737: Gano SEU da Farfadowa a cikin na'urorin Intel Arria 10

Siffofin

• Yana ba ku damar kimanta martanin tsarin don rage katsewar aiki guda ɗaya (SEFI).
• Yana ba ku damar yin sifa ta SEFI a cikin gida, kawar da buƙatar duk gwajin katako na tsarin. Madadin haka, zaku iya iyakance gwajin katako zuwa gazawar lokaci (FIT)/Mb a matakin na'urar.
• Matsakaicin ƙimar FIT bisa ga sifa ta SEFI wacce ta dace da ƙirar ƙirar ku. Kuna iya rarraba alluran kuskure ba da gangan ba cikin duk na'urar, ko tilasta su zuwa takamaiman wuraren aiki don hanzarta gwaji.
• Haɓaka ƙirar ku don rage rushewar da ta haifar da tashin hankali guda ɗaya (SEU).

Tallafin na'ura

Fault Injection IP core yana goyan bayan Intel Arria® 10, Intel Cyclone® 10 GX da na'urorin iyali na Stratix® V. Iyalin Cyclone V suna goyan bayan allurar kuskure akan na'urori tare da suffix -SC a cikin lambar tsari. Tuntuɓi wakilin tallace-tallace na gida don yin odar bayani akan -SC suffix Cyclone V na'urorin.

Amfani da Kayan aiki da Ayyuka
Software na Intel Quartus Prime yana haifar da ƙididdigar albarkatu masu zuwa don Stratix V A7 FPGA. Sakamako na sauran na'urori iri ɗaya ne.

Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka. *Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.

Laifin Allurar IP Core Ayyukan FPGA da Amfani da Albarkatu

Na'ura	ALMs	Logic Rajista		M20K
		Firamare	Sakandare
Farashin VA7	3,821	5,179	0	0

Shigar da software na Intel Quartus Prime ya haɗa da ɗakin karatu na Intel FPGA IP. Wannan ɗakin karatu yana ba da yawancin abubuwan amfani na IP don amfanin samarwa ku ba tare da buƙatar ƙarin lasisi ba. Wasu Intel FPGA IP cores suna buƙatar siyan lasisi daban don amfanin samarwa. Yanayin Ƙimar IP na Intel FPGA yana ba ku damar kimanta waɗannan lasisin Intel FPGA IP cores a cikin kwaikwaiyo da kayan aiki, kafin yanke shawarar siyan cikakken lasisin tushen IP na samarwa. Kuna buƙatar siyan cikakken lasisin samarwa don masu lasisi na Intel IP bayan kun kammala gwajin kayan aiki kuma kuna shirye don amfani da IP a samarwa. Software na Intel Quartus Prime yana shigar da kayan kwalliyar IP a cikin wurare masu zuwa ta tsohuwa:

Hanyar Shigar da Core IP

Wuraren Shigar Core IP

Wuri	Software	Dandalin
:\intelFPGA_pro\quartus\ip\altera	Intel Quartus Prime Pro Edition	Windows *
:\intelFPGA\quartus\ip\altera	Intel Quartus Prime Standard Edition	Windows
:/intelFPGA_pro/quartus/ip/altera	Intel Quartus Prime Pro Edition	Linux *
:/intelFPGA/quartus/ip/altera	Intel Quartus Prime Standard Edition	Linux

Lura: Intel Quartus Prime software baya goyan bayan sarari a hanyar shigarwa.

Keɓancewa da Samar da Ƙwararrun IP
Kuna iya keɓance maƙallan IP don tallafawa aikace-aikace iri-iri. Kayan Intel Quartus Prime IP Catalog da editan sigar suna ba ku damar zaɓar da saita mahimman tashoshin IP, fasali, da fitarwa da sauri. files.

IP Catalog da Editan Parameter
Catalog na IP yana nuna abubuwan da ke akwai don aikin ku, gami da Intel FPGA IP da sauran IP waɗanda kuka ƙara zuwa hanyar bincike na Catalog na IP.

• Tace Katalogin IP don Nuna IP don dangin na'ura mai aiki ko Nuna IP don duk dangin na'urar. Idan ba ku da aikin buɗewa, zaɓi Iyalin Na'ura a cikin Kas ɗin IP.
• Buga a cikin filin Bincike don nemo kowane cikakken ko wani bangare na ainihin sunan IP a cikin Catalog na IP.
• Danna dama-dama sunan ainihin IP a cikin Catalog na IP don nuna cikakkun bayanai game da na'urori masu goyan baya, don buɗe babban fayil ɗin shigarwa na IP core, da hanyoyin haɗi zuwa takaddun IP.
• Danna Bincika Partner IP to access partner IP information on the web.

Editan siga yana sa ka saka sunan bambancin IP, tashar jiragen ruwa na zaɓi, da fitarwa file zabin tsara. Editan siga yana haifar da babban matakin Intel Quartus Prime IP file (.ip) don bambancin IP a cikin ayyukan Intel Quartus Prime Pro Edition. Editan siga yana haifar da babban matakin Quartus IP file (.qip) don bambancin IP a cikin ayyukan Intel Quartus Prime Standard Edition. Wadannan files wakiltar bambance-bambancen IP a cikin aikin, da adana bayanan daidaitawa.

Editan Sigar IP (Intel Quartus Prime Standard Edition)

Fitowar Ƙarfafa Ƙwararru ta IP (Intel Quartus Prime Pro Edition)

Software na Intel Quartus Prime yana haifar da fitarwa mai zuwa file tsari don nau'ikan nau'ikan IP guda ɗaya waɗanda ba sa cikin tsarin Tsarin Platform.

Fitowar Ƙarfafa Ƙwararrun Ƙwararru na Mutum ɗaya (Intel Quartus Prime Pro Edition)

• Idan an goyan baya kuma an kunna shi don ainihin bambancin IP ɗin ku.

Fitowa Files na Intel FPGA IP Generation

File Suna	Bayani
<ka_ip> .ip	Babban matakin IP bambancin file wanda ya ƙunshi ma'auni na tushen IP a cikin aikin ku. Idan bambancin IP wani ɓangare ne na tsarin Platform Designer, editan sigar kuma yana haifar da .qsys file.
<ka_ip> cmp	Sanarwar Bangaren VHDL (.cmp) file rubutu ne file wanda ya ƙunshi jigon gida da ma'anar tashar jiragen ruwa waɗanda kuke amfani da su a ƙirar VHDL files.
<ka_ip>_generation.rpt	Login tsararrun IP ko Platform Designer file. Yana nuna taƙaitaccen saƙon yayin tsara IP.
ci gaba…

File Suna	Bayani
<ka_ip>.qgsimc (Tsarin Zane-zane kawai)	Simulators caching file wanda ya kwatanta .qsys da .ip files tare da ma'auni na yanzu na tsarin Platform Designer da IP core. Wannan kwatancen yana ƙayyadaddun idan Mai tsara Platform zai iya tsallake sabuntawar HDL.
<ka_ip>.qgsynth (Tsarin Masu Zane-zane kawai)	caching synthesis file wanda ya kwatanta .qsys da .ip files tare da ma'auni na yanzu na tsarin Platform Designer da IP core. Wannan kwatancen yana ƙayyadaddun idan Mai tsara Platform zai iya tsallake sabuntawar HDL.
<ka_ip>.qip	Ya ƙunshi duk bayanan don haɗawa da haɗa bangaren IP.
<ka_ip> csv	Ya ƙunshi bayani game da haɓakawa na bangaren IP.
.bsf	Alamar alama ta bambancin IP don amfani a cikin Tsarin Toshe Files (.bdf).
<ka_ip>.spd	Shigarwa file cewa ip-make-simscript yana buƙatar samar da rubutun kwaikwayo. .spd file ya ƙunshi jerin files da kuka ƙirƙira don simulation, tare da bayanai game da abubuwan da kuka fara farawa.
<ka_ip> ppf	Mai Tsara Pin File (.ppf) yana adana tashar tashar jiragen ruwa da ayyukan kumburi don abubuwan IP da kuka ƙirƙira don amfani tare da Mai tsara Pin.
<ka_ip> _bb.v	Yi amfani da akwatin baƙar fata na Verilog (_bb.v) file a matsayin sanarwa mara komai don amfani azaman akwatin baki.
<ka_ip> _inst.v ko _inst.vhd	HDL misaliampda instantiation samfuri. Kwafi da liƙa abubuwan da ke cikin wannan file cikin HDL ku file don aiwatar da bambance-bambancen IP.
<ka_ip>. regmap	Idan IP ɗin ya ƙunshi bayanin rajista, Intel Quartus Prime software yana haifar da .regmap file. Tsarin .regmap file ya bayyana bayanin taswirar rijistar mahaɗan master da bawa. Wannan file kari da .sopcinfo file ta hanyar samar da ƙarin cikakkun bayanan rajista game da tsarin. Wannan file yana ba da damar nunin rajista views da ƙididdigar ƙididdiga masu amfani a cikin System Console.
<ka_ip>.svd	Yana ba da damar kayan aikin gyara tsarin HPS zuwa view taswirorin rijistar abubuwan da ke haɗawa da HPS a cikin tsarin Tsarin Platform. Yayin haɗawa, Intel Quartus Prime software yana adana .svd files don mu'amalar bawa da ake iya gani ga masanan System Console a cikin .sof file a cikin zaman gyara kuskure. System Console yana karanta wannan sashe, wanda Platform Designer yayi tambaya don yin rijistar bayanan taswira. Don tsarin bayi, Platform Designer yana samun damar yin rijista da suna.
<ka_ip> v <ka_ip> vhd	HDL files wanda ke hanzarta kowane ƙaramin abu ko ainihin IP na yara don haɗawa ko kwaikwaya.
jagora/	Ya ƙunshi rubutun msim_setup.tcl don saitawa da gudanar da simulation.
aldec/	Ya ƙunshi rubutun rivierapro_setup.tcl don saitawa da gudanar da simulation.
/synopsys/vcs /synopsys/vcsmx	Ya ƙunshi rubutun harsashi vcs_setup.sh don saitawa da gudanar da simulation. Ya ƙunshi rubutun harsashi vcsmx_setup.sh da synopsys_sim.setup file don saita da gudanar da simulation.
/kasance	Ya ƙunshi rubutun harsashi ncsim_setup.sh da sauran saitin files don saita da gudanar da simulation.
/xcelium	Ya ƙunshi Parallel na'urar kwaikwayo harsashi script xcelium_setup.sh da sauran saitin files don saita da gudanar da simulation.
/ submodules	Ya ƙunshi HDL files don IP core submodule.
<IP submodule>/	Platform Designer yana haifar da /synth da / sim sub-directories don kowane kundin adireshin IP ɗin da Platform Designer ya haifar.

Bayanin Aiki
Tare da Fault Injection IP core, masu zanen kaya za su iya yin halayyar SEFI a cikin gida, ma'auni na FIT bisa ga yanayin SEFI, da kuma inganta ƙira don rage tasirin SEUs.

Rage Rage Ra'ayin Abu Daya

Haɗin kewayawa da na'urorin dabaru masu shirye-shirye kamar FPGAs suna da sauƙi ga SEUs. SEUs sune bazuwar, abubuwan da ba su lalacewa ba, waɗanda manyan maɓuɓɓuka biyu suka haifar: alpha barbashi da neutrons daga haskoki na sararin samaniya. Radiation na iya haifar da ko dai rajistar dabaru, ƙwanƙwasa ƙwaƙwalwar ajiya, ko bit ɗin RAM (CRAM) don jujjuya yanayin sa, don haka yana haifar da aikin na'urar da ba a zata ba. Intel Arria 10, Intel Cyclone 10 GX, Arria V, Cyclone V, Stratix V da sabbin na'urori suna da damar CRAM masu zuwa:

• Kuskuren Ganowar Rage Cyclical (EDCRC)
• Gyaran CRAM ta atomatik (shafewa)
• Ability don ƙirƙirar yanayin CRAM mai bacin rai (allurar kuskure)

Don ƙarin bayani game da rage SEU a cikin na'urorin Intel FPGA, koma zuwa babin Ragewar SEU a cikin littafin jagorar na'urar.

Bayanin Pin na IP na allurar kuskure

Ƙimar Injection IP core ta ƙunshi nau'ikan I/O masu zuwa.

Laifin Allurar IP Core I/O Fil

Sunan Pin	Hanyar Pin	Bayanin Pin
crcerror_pin	shigarwa	Shigarwa daga Kuskuren Saƙon Rijista Mai Sauke Mai Sauke Intel FPGA IP (EMR Unloader IP). Ana tabbatar da wannan siginar lokacin da EDCRC na na'urar ta gano kuskuren CRC.
emr_data	shigarwa	Abubuwan da ke cikin Rijistar Saƙon Kuskure (EMR). Koma zuwa littafin jagorar na'urar da ya dace don filayen EMR. Wannan shigarwar ta dace da siginar dubawar bayanan Avalon Streaming.
emr_mai inganci	shigarwa	Yana nuna bayanan emr_data ƙunshi ingantattun bayanai. Wannan sigina ce mai inganci ta Avalon Streaming.
Sake saiti	shigarwa	shigarwar sake saitin tsarin. Sake saitin yana da cikakken sarrafa shi ta Mai gyara kuskuren allurar.
kuskure_ allura	fitarwa	Yana nuna kuskure an shigar da shi cikin CRAM kamar yadda aka umarta ta hanyar JTAG dubawa. Tsawon lokacin da wannan siginar ke faɗi ya dogara da saitunan ku na JTAG TCK da sarrafa toshe sigina. Yawanci, lokacin yana kusa da zagayowar agogo 20 na siginar TCK.
kuskure_ goge	fitarwa	Yana nuna an gama goge na'urar kamar yadda aka umarta ta hanyar JTAG dubawa. Tsawon lokacin da wannan siginar ke faɗi ya dogara da saitunan ku na JTAG TCK da sarrafa toshe sigina. Yawanci, lokacin yana kusa da zagayowar agogo 20 na siginar TCK.
shiga	fitarwa	Fitarwa na zaɓi. Laifin Injection IP yana amfani da wannan agogon, misaliample, don kunna toshe EMR_unloader.

Zane-zanen Alurar IP ɗin kuskure

Amfani da Laifin Injection Debugger da Laifin Injection IP Core

Mai gyara kuskuren Injection yana aiki tare tare da tushen IP na kuskuren Injection. Da farko, kuna aiwatar da ainihin tushen IP a cikin ƙirar ku, tattarawa, da zazzage tsarin da aka samu file cikin na'urar ku. Sa'an nan, kuna gudanar da Debugger Fault Injection daga cikin Intel Quartus Prime software ko daga layin umarni don kwaikwayi kurakurai masu laushi.

• Mai gyara kuskuren allurar kuskure yana ba ku damar yin gwaje-gwajen allura ta hanyar mu'amala ko ta hanyar batch umarni, kuma yana ba ku damar tantance wuraren ma'ana a cikin ƙirar ku don yin allurar kuskure.
• Ƙididdigar layin umarni yana da amfani don tafiyar da mai gyara ta hanyar rubutun.

Lura

Mai gyara kuskuren Injection na kuskure yana sadarwa tare da ainihin Injection IP ta hanyar JTAG dubawa. Laifin Injection IP yana karɓar umarni daga JTAG dubawa da rahoton halin da ake ciki ta hanyar JTAG dubawa. Ana aiwatar da ainihin Injection IP ɗin a cikin tunani mai laushi a cikin na'urarka; Don haka, dole ne ku lissafta wannan amfani da dabaru a cikin ƙirar ku. Hanya ɗaya ita ce siffanta martanin ƙirar ku ga SEU a cikin lab sannan ku tsallake ainihin IP daga ƙirar ku ta ƙarshe.

Kuna amfani da ainihin Injection IP core tare da waɗannan abubuwan IP masu zuwa:

• Saƙon Kuskuren Rijistar Unloader IP core, wanda ke karantawa da adana bayanai daga kewayen gano kurakurai masu ƙarfi a cikin na'urorin Intel FPGA.
• (Na zaɓi) Babban Gano SEU Intel FPGA IP core, wanda ke kwatanta wuraren kuskure guda ɗaya zuwa taswirar hankali yayin aikin na'urar don tantance ko kuskure mai laushi ya shafe shi.

Laifi Mai Kashe Injection Overview Tsarin zane

Bayanan kula:

1. Laifin Injection IP yana jujjuya ɓangarorin dabaru da aka yi niyya.
2. Maɓallin Injection na kuskure da Advanced SEU Detection IP suna amfani da misalin EMR Unloader iri ɗaya.
3. Advanced SEU Gane IP core na zaɓi ne.

Bayanai masu alaƙa

• Bayani na SMH Files shafi na 13
• Game da EMR Unloader IP Core a shafi na 10
• Game da Advanced SEU Detection IP Core a shafi na 11

Ƙaddamar da Laifin Injection IP Core

NOTE

Ƙimar Injection IP core ba ya buƙatar ka saita kowane sigogi. Don amfani da ainihin IP, ƙirƙiri sabon misali na IP, haɗa shi a cikin tsarin Mai tsara Platform (Standard), kuma haɗa siginar yadda ya dace. Dole ne ku yi amfani da ainihin Injection IP core tare da EMR Unloader IP core. Ana samun allurar Laifin da EMR Unloader IP cores a Platform Designer da IP Catalog. Zabi, zaku iya sanya su kai tsaye cikin ƙirar RTL ɗinku, ta amfani da Verilog HDL, SystemVerilog, ko VHDL.

Game da EMR Unloader IP Core
EMR Unloader IP core yana ba da haɗin kai ga EMR, wanda EDCRC na na'urar ke sabuntawa ta ci gaba da bincika raƙuman CRAM na na'urar don kurakurai masu laushi.

Example Platform Designer System Haɗe da Laifin allurar IP Core da EMR Unloader IP Core

Example Fault Injection IP Core da EMR Unloader IP Core Block zane

Bayanai masu alaƙa
Kuskuren Rijistar Mai Sauke Saƙon Mai Sauke Intel FPGA IP Core User Guide

Game da Advanced SEU Ganewar IP Core

Yi amfani da Advanced SEU Detection (ASD) IP core lokacin da haƙurin SEU shine damuwa mai ƙira. Dole ne ku yi amfani da EMR Unloader IP core tare da ASD IP core. Don haka, idan kun yi amfani da ASD IP da Fault Injection IP a cikin ƙira ɗaya, dole ne su raba fitarwar Unloader na EMR ta hanyar ɓangaren Avalon®-ST. Hoto na gaba yana nuna tsarin Platform Designer wanda Avalon-ST splitter ke rarraba abubuwan EMR zuwa ASD da Fault Injection IP cores.

Amfani da ASD da Laifin Injection IP a cikin Tsarin Tsarin Platform iri ɗaya

Bayanai masu alaƙa
Advanced SEU Ganewar Intel FPGA IP Core User Guide

Ma'anar Wuraren allurar Laifi
Kuna iya ayyana takamaiman yankuna na FPGA don allurar kuskure ta amfani da Babban Taswirar Hankali (.smh) file. Farashin SMH file tana adana madaidaitan na'urar CRAM bits, yankin da aka sanya su (Yankin ASD), da mahimmanci. Yayin tsarin ƙira kuna amfani da matsayi tagging don ƙirƙirar yankin. Sannan, yayin haɗawa, Intel Quartus Prime Assembler yana haifar da SMH file. Laifin Injection Debugger yana iyakance alluran kuskure zuwa takamaiman yankunan na'urar da kuka ayyana a cikin SMH file.

Yin Sarauta Tagcin gindi
Kuna ayyana yankunan FPGA don gwaji ta hanyar sanya yankin ASD zuwa wurin. Kuna iya ƙididdige ƙimar yankin ASD don kowane yanki na tsarin ƙirar ku ta amfani da Tagar Ƙirar Ƙira.

1. Zaɓi Ayyuka ➤ Tagan Rarraba Ƙira.
2. Danna-dama a ko'ina a cikin layi na kai kuma kunna yankin ASD don nuna ginshiƙin Yankin ASD (idan ba a riga an nuna shi ba).
3. Shigar da ƙima daga 0 zuwa 16 don kowane bangare don sanya shi zuwa takamaiman yankin ASD.
   • An keɓe yankin ASD 0 zuwa sassan da ba a yi amfani da su na na'urar ba. Kuna iya sanya bangare ga wannan yanki don tantance shi a matsayin mara mahimmanci.
   • Yankin ASD 1 shine yankin tsoho. Dukkan sassan da aka yi amfani da su na na'urar ana sanya su zuwa wannan yankin sai dai idan kun canza aikin yankin ASD a sarari.

Bayani na SMH Files

Farashin SMH file ya ƙunshi bayanai masu zuwa:

• Idan ba ku amfani da matsayi tagging (watau ƙirar ba ta da takamaiman ayyuka na yankin ASD a cikin tsarin ƙira), SMH file ya lissafa kowane bit CRAM kuma yana nuna ko yana da mahimmanci ga ƙira.
• Idan kun yi matsayi tagging kuma canza tsoffin ayyukan yanki na ASD, SMH file ya lissafa kowane bit CRAM kuma an sanya shi yankin ASD.

Mai gyara kuskuren allurar na iya iyakance alluran zuwa yanki ɗaya ko fiye da takamaiman yanki. Don jagorantar Mai Taruwa don samar da SMH file:

• Zaɓi Ayyuka ➤ Na'ura ➤ Na'ura da Zaɓuɓɓukan Fil ➤ Gano Kuskuren CRC.
• Kunna taswirar ji na SEU file (.smh) zaɓi.

Amfani da Laifin Injection Debugger

NOTE
Don amfani da Debugger na Injection na kuskure, kuna haɗa zuwa na'urar ku ta hanyar JTAG dubawa. Sannan, saita na'urar kuma yi allurar kuskure. Don ƙaddamar da mai gyara kuskuren allura, zaɓi Kayan Aikin ➤ Laifin Injection Debugger a cikin Intel Quartus Prime software. Saita ko tsara na'urar yayi kama da tsarin da ake amfani da shi don Ma'aikaci ko Siginar Tap Logic Analyzer.

Matsalolin allurar kuskure

Don saita JTAG sarkar:

1. Danna Saitin Hardware. Kayan aikin yana nuna kayan aikin shirye-shirye da aka haɗa zuwa kwamfutarka.
2. Zaɓi kayan aikin shirye-shirye da kuke son amfani da su.
3. Danna Rufe.
4. Danna Auto Detect, wanda ke cika sarkar na'urar tare da na'urorin da ake iya aiwatarwa da aka samu a cikin JTAG sarkar.

Bayanai masu alaƙa
Fasalin allurar Laifin da aka yi niyya akan shafi na 21

Bukatun Hardware da Software

Ana buƙatar kayan masarufi masu zuwa da software don amfani da Matsalolin Injection Debugger:

• FEATURE layin a cikin lasisin Intel FPGA ɗinku wanda ke ba da damar Injection IP core. Don ƙarin bayani, tuntuɓi wakilin tallace-tallace na Intel FPGA na gida.
• Zazzage kebul (Intel FPGA Zazzage Cable, Intel FPGA Zazzage Cable II, , ko II).
• Kit ɗin ci gaban Intel FPGA ko allon ƙira mai amfani tare da JTAG haɗi zuwa na'urar da ake gwadawa.
• (ZABI) LAYIN FALALA a cikin lasisin Intel FPGA ɗinku wanda ke ba da damar Advanced SEU Detection IP core.

Haɓaka Na'urarka da Matsalolin Injection na Kuskure

Mai gyara kuskuren allurar yana amfani da .sof da (na zaɓi) Babban Taswirar Hankali (.smh) file. Abun Software File (.sof) yana saita FPGA. Da .smh file yana bayyana ma'anar jin daɗin raƙuman CRAM a cikin na'urar. Idan ba ku samar da .smh ba file, Fault Injection Debugger yana shigar da kurakurai ba da gangan ba a cikin raƙuman CRAM. Don ƙayyade .sof:

1. Zaɓi FPGA da kuke son saitawa a cikin akwatin sarkar na'ura.
2. Danna Zaɓi File.
3. Je zuwa .sof kuma danna Ok. Mai gyara kuskuren allura yana karanta .sof.
4. (Na zaɓi) Zaɓi SMH file.
   Idan ba ku ƙayyade SMH ba file, Fault Injection Debugger yana shigar da kurakurai ba da gangan ba a duk na'urar. Idan ka saka SMH file, za ka iya ƙuntata allura zuwa wuraren da aka yi amfani da na'urarka.
   • Danna dama na na'urar a cikin akwatin sarkar na'ura sannan danna Zaɓi SMH File.
   • Zaɓi SMH ɗin ku file.
   • Danna Ok.
5. Kunna Shirin/Sanya.
6. Danna Fara.

Kuskuren Injection Debugger yana daidaita na'urar ta amfani da .sof.

Menu na yanayi don Zaɓin SMH File

Takurawa Yankuna don Aikata Laifi

Bayan loda wani SMH file, za ka iya ba da umarnin mai gyara kuskuren allura don yin aiki akan takamaiman yankuna na ASD kawai. Don tantance yanki(s) na ASD da za a yi kurakurai a ciki:

1. Danna-dama FPGA a cikin akwatin sarkar na'ura, kuma danna Nuna Taswirar Hannun Na'ura.
2. Zaɓi yankin (s) ASD don allurar kuskure.

Taswirar Hannun Na'urar Viewer

Ƙayyadaddun Nau'in Kuskure

Kuna iya ƙayyade nau'ikan kurakurai daban-daban don allura.

• Kurakurai guda ɗaya (SE)
• Kurakurai masu kusa da biyu (DAE)
• Kurakurai da yawa da ba za a iya gyara su ba (EMBE)

Na'urorin Intel FPGA na iya gyara kansu guda ɗaya da kurakurai masu kusa biyu idan an kunna fasalin gogewa. Na'urorin Intel FPGA ba za su iya gyara kurakurai da yawa ba. Koma zuwa babin kan rage SEUs don ƙarin bayani game da gyara waɗannan kurakurai. Kuna iya ƙididdige cakuɗen kurakuran don yin allurar da tazarar lokacin allurar. Don ƙayyade tazarar lokacin allurar:

1. A cikin Laifin Injection Debugger, zaɓi Kayan aiki ➤ Zabuka.
2. Jawo mai sarrafa ja zuwa ga cakuda kurakurai. A madadin, zaku iya ƙididdige haɗin a lamba.
3. Ƙayyade lokacin tazarar allura.
4. Danna Ok.

Hoto 12. Ƙayyadaddun Cakuɗin Nau'in Laifin SEU

Bayanai masu alaƙa Rage Hatsin Abu Daya

Kurakurai na allura

Kuna iya allurar kurakurai ta hanyoyi da yawa:

• Allurar kuskure ɗaya akan umarni
• Allurar kurakurai da yawa akan umarni
• Allurar kurakurai har sai an umarce su da su daina

Don allurar waɗannan kurakuran:

1. Kunna zaɓin Laifin Inject.
2. Zaɓi ko kuna son gudanar da alluran kuskure don yawan maimaitawa ko har sai an tsaya:
   • Idan kun zaɓi yin aiki har sai an tsaya, Maɓallin Injection na kuskure yana shigar da kurakurai a tazarar da aka ƙayyade a cikin Akwatin maganganu na Kayan aiki ➤ Zabuka.
   • Idan kuna son gudanar da allurar kuskure don takamaiman adadin maimaitawa, shigar da lambar.
3. Danna Fara.

Lura: Mai gyara kuskuren allurar yana aiki don ƙayyadaddun adadin maimaitawa ko har sai an tsaya. Tagar Intel Quartus Prime Messages tana nuna saƙonni game da kurakuran da aka yi musu allura. Don ƙarin bayani kan kurakuran allurar, danna Karanta EMR. Mai gyara kuskuren allura yana karanta EMR na na'urar kuma yana nuna abubuwan da ke cikin taga Saƙonni.

Kuskuren Intel Quartus Prime Kuskuren allurar da saƙon abun ciki na EMR

Kurakurai na rikodi
Kuna iya yin rikodin wurin kowane kuskuren allura ta hanyar lura da sigogin da aka ruwaito a cikin taga Intel Quartus Prime Messages. Idan, don exampTo, kuskuren allurar yana haifar da halayen da kuke son sake kunnawa, zaku iya niyya wurin yin allura. Kuna yin allurar da aka yi niyya ta amfani da layin umarni na Fault Injection Debugger.

Share kurakurai masu allura
Don dawo da aikin FPGA na yau da kullun, danna gogewa. Lokacin da kuka goge kuskure, ana amfani da ayyukan EDCRC na na'urar don gyara kurakurai. Tsarin gogewa yayi kama da wanda ake amfani dashi yayin aikin na'urar.

Interface na Command-Line
Kuna iya gudanar da Debugger Injection na kuskure a layin umarni tare da aiwatar da quartus_fid, wanda ke da amfani idan kuna son yin allurar kuskure daga rubutun.

Tebur 5. Hujjar layin umarni don allurar kuskure

Takaitaccen Hujja	Dogon Hujja	Bayani
c	na USB	Ƙayyade kayan aikin shirye-shirye ko kebul. (Ana bukata)
i	index	Ƙayyade na'urar da ke aiki don yin kuskure. (Ana bukata)
n	lamba	Ƙayyade adadin kurakurai don yin allura. Tsohuwar ƙimar ita ce 1. (Na zaɓi)
t	lokaci	Lokacin tazara tsakanin allura. (Na zaɓi)

Lura: Yi amfani da quartus_fid-taimako zuwa view duk samuwa zažužžukan. Lambar mai zuwa tana ba da exampamfani da Fault Injection Debugger dubawar layin umarni.
##################################

• # Nemo waɗanne kebul na USB don wannan misalin
• # Sakamakon ya nuna cewa akwai kebul guda ɗaya, mai suna "USB-Blaster" #
• $ quartus_fid -jerin . . .
• Bayani: Umurni: quartus_fid -list
  1. USB-Blaster akan sj-sng-z4 [USB-0] Bayani: Intel Quartus Prime 64-Bit Fault Injection Debugger ya yi nasara. 0 kurakurai, 0 gargadi
• ###################################
• # Nemo waɗanne na'urori ne akan kebul na USB-Blaster
• # Sakamakon yana nuna na'urori guda biyu: Stratix V A7, da MAX V CPLD. #
• $ quartus_fid -cable USB-Blaster -a
• Bayani: Umurnin: quartus_fid –cable=USB-Blaster -a
• Bayani (208809): Yin amfani da kebul na shirye-shirye "USB-Blaster akan sj-sng-z4 [USB-0]"
  1. USB-Blaster akan sj-sng-z4 [USB-0]
• 029030DD 5SGXEA7H(1|2|3)/5SGXEA7K1/..
• 020A40DD 5M2210Z/EPM2210
• Bayani: Intel Quartus Prime 64-Bit Fault Injection Debugger ya yi nasara.
• 0 kurakurai, 0 gargadi
• ###################################
• # Shirya na'urar Stratix V
• # Zaɓin -index yana ƙayyade ayyukan da aka yi akan na'urar da aka haɗa.
• # "=svgx.sof" yana haɗin .sof file tare da na'urar
• # "#p" yana nufin shirin na'urar #
• $ quartus_fid - USB-Blaster na USB -index "@1=svgx.sof#p" . . .
• Bayani (209016): Yana saita fihirisar na'ura 1
• Bayani (209017): Na'urar 1 ta ƙunshi JTAG Lambar ID 0x029030DD
• Bayani (209007): Kanfigareshan ya yi nasara - na'urar(s) 1 da aka saita
• Bayani (209011): Ayyukan da aka yi cikin nasara
• Bayani (208551): Sa hannun shirin cikin na'urar 1.
• Bayani: Intel Quartus Prime 64-Bit Fault Injection Debugger ya yi nasara.
• 0 kurakurai, 0 gargadi
• ###################################
• # Zuba laifi a cikin na'urar.
• # Mai aiki da #i yana nuna allurar kuskure
• # -n 3 yana nuna allura guda 3 #
• $ quartus_fid - USB-Blaster na USB -index "@1=svgx.sof#i" -n 3
• Bayani: Umurnin: quartus_fid –cable=USB-Blaster –index=@1=svgx.sof#i -n 3
• Bayani (208809): Yin amfani da kebul na shirye-shirye "USB-Blaster akan sj-sng-z4 [USB-0]"
• Bayani (208521): Yana shigar da kuskure 3 cikin na'ura (s)
• Bayani: Intel Quartus Prime 64-Bit Fault Injection Debugger ya yi nasara.
• 0 kurakurai, 0 gargadi
• ###################################
• # Yanayin hulɗa.
• # Yin amfani da aikin #i tare da -n 0 yana sanya mai cirewa cikin yanayin hulɗa.
• # Lura cewa an yi allurar kurakurai 3 a zaman da ya gabata;
• # "E" yana karanta kurakuran a halin yanzu a cikin EMR Unloader IP core. #
• $ quartus_fid - USB-Blaster na USB -index "@1=svgx.sof#i" -n 0
• Bayani: Umurnin: quartus_fid –cable=USB-Blaster –index=@1=svgx.sof#i -n 0
• Bayani (208809): Yin amfani da kebul na shirye-shirye "USB-Blaster akan sj-sng-z4 [USB-0]"
• Shiga:
• 'F' don allurar laifi
• 'E' don karanta EMR
• 'S' don goge kuskure(s)
• 'Q' don barin E
• Bayani (208540): Karatun tsararrun EMR
• Bayani (208544): An gano kuskuren firam 3 a cikin na'urar 1.
• Bayani (208545): Kuskure #1: Kuskure guda ɗaya a cikin firam 0x1028 a bit 0x21EA.
• Bayani (10914): Kuskure #2: Kuskuren Multi-bit wanda ba a iya gyarawa a cikin firam 0x1116.
• Bayani (208545): Kuskure #3: Kuskure guda ɗaya a cikin firam 0x1848 a bit 0x128C.
• 'F' don allurar laifi
• 'E' don karanta EMR
• 'S' don goge kuskure(s)
• 'Q' don barin Q
• Bayani: Intel Quartus Prime 64-Bit Fault Injection Debugger ya yi nasara. 0 kurakurai, 0 gargadi
• Bayani: Mafi girman ƙwaƙwalwar ajiya: 1522 megabyte
• Bayani: An gama aiwatarwa: Litinin 3 ga Nuwamba 18:50:00 2014
• Bayani: Lokacin wucewa: 00:00:29
• Bayani: Jimlar lokacin CPU (a kan duk masu sarrafawa): 00:00:13

Siffar allurar da aka yi niyya

Lura

Mai gyara kuskuren allurar kuskure yana shigar da kurakurai a cikin FPGA ba da gangan ba. Koyaya, fasalin Injection Laifin Niyya yana ba ku damar shigar da kurakurai zuwa wuraren da aka yi niyya a cikin CRAM. Wannan aikin na iya zama da amfani, ga misaliample, idan kun lura da taron SEU kuma kuna son gwada FPGA ko tsarin amsawa ga wannan taron bayan gyaggyara dabarun dawowa. Siffar allurar kuskuren da aka yi niyya tana samuwa ne kawai daga layin umarni. Kuna iya ƙayyade cewa ana shigar da kurakurai daga layin umarni ko cikin yanayin gaggawa. Bayanai masu alaƙa

AN 539: Hanyar Gwaji ko Gano Kuskure da Farfadowa ta amfani da CRC a cikin Na'urorin Intel FPGA

Ƙayyadaddun Lissafin Kuskure Daga Layin Umurni

Siffar allurar da aka yi niyya tana ba ku damar tantance jerin kuskure daga layin umarni, kamar yadda aka nuna a cikin tsohon mai zuwa.ample: c: \ Users \ sng> quartus_fid -c 1 - i "@1= svgx.sof#i" -n 2 -user="@1= 0x2274 0x05EF 0x2264 0x0500" Inda: c 1 yana nuna cewa FPGA ana sarrafa shi. ta kebul na farko akan kwamfutarka. i "@1= six.sof#i" yana nuna cewa na'urar farko a cikin sarkar tana lodi da abu file svgx.sof kuma za a yi masa allura da kurakurai. n 2 yana nuna cewa za a yi allurar kurakurai biyu. mai amfani=”@1= 0x2274 0x05EF 0x2264 0x0500” jerin kurakuran da aka ayyana mai amfani ne da za a yi allura. A cikin wannan example, na'urar 1 tana da kuskure biyu: a firam 0x2274, bit 0x05EF kuma a firam 0x2264, bit 0x0500.

Ƙayyadaddun Lissafin Kuskure Daga Yanayin Gaggawa

Kuna iya aiki da fasalin Injection Laifin Niyya ta hanyar mu'amala ta hanyar ƙididdige adadin kurakuran su zama 0 (-n 0). Mai gyara kuskuren allura yana gabatar da umarnin yanayin gaggawa da kwatancensu.

Umurnin Yanayin gaggawa	Bayani
F	Allurar laifi
E	Karanta EMR
S	Goge kurakurai
Q	Bar

A cikin yanayin gaggawa, zaku iya ba da umarnin F kadai don yin allurar kuskure ɗaya a cikin bazuwar wuri a cikin na'urar. A cikin wadannan exampko ta amfani da umarnin F a yanayin gaggawa, ana allurar kurakurai uku. F #3 0x12 0x34 0x56 0x78 * 0x9A 0xBC +

• Kuskure 1 - Kuskuren bit guda ɗaya a firam 0x12, bit 0x34
• Kuskure 2 - Kuskuren da ba a iya gyarawa a firam 0x56, bit 0x78 (wani * yana nuna kuskuren Multi-bit)
• Kuskure 3 - Kuskuren kusa da sau biyu a firam 0x9A, bit 0xBC (a + yana nuna kuskuren bit biyu)

F 0x12 0x34 0x56 0x78 * Kuskure ɗaya (tsoho) an yi allurar: Kuskure 1 - Kuskuren bit guda ɗaya a firam 0x12, bit 0x34. Wuraren da aka yi watsi da su bayan firam/bit na farko. F #3 0x12 0x34 0x56 0x78 * 0x9A 0xBC + 0xDE 0x00

Ana allurar kurakurai guda uku:

• Kuskure 1 - Kuskuren bit guda ɗaya a firam 0x12, bit 0x34
• Kuskure 2 - Kuskuren da ba a iya gyarawa a firam 0x56, bit 0x78
• Kuskure 3 - Kuskuren kusa da sau biyu a firam 0x9A, bit 0xBC
• Wurare bayan farkon 3 firam/bit nau'i-nau'i an yi watsi da su

Ƙayyade wuraren CRAM Bit

Lura: 

Lokacin da Maɓallin Injection Debugger ya gano kuskuren CRAM EDCRC, Rijistar Saƙon Kuskure (EMR) ya ƙunshi ciwo, lambar firam, wurin bit, da nau'in kuskure (guda ɗaya, biyu, ko multi-bit) na kuskuren CRAM da aka gano. Yayin gwajin tsarin, adana abubuwan da ke cikin EMR da aka ruwaito ta hanyar kuskuren Injection Debugger lokacin da kuka gano laifin EDCRC. Tare da abubuwan da ke cikin EMR da aka yi rikodi, zaku iya ba da firam da lambobi kaɗan zuwa ga Mai gyara kuskuren allurar don sake kunna kurakuran da aka lura yayin gwajin tsarin, don ƙara ƙira, da siffata martanin dawo da tsarin ga wannan kuskuren.

Bayanai masu alaƙa
AN 539: Hanyar Gwaji ko Gano Kuskure da Farfadowa ta amfani da CRC a cikin Na'urorin Intel FPGA

Babban Zaɓuɓɓukan Layin Umurni: Yankunan ASD da Nau'in Nau'in Kuskure

Kuna iya amfani da layin umarni na kuskuren Injection Debugger don shigar da kurakurai cikin yankunan ASD da nauyin nau'ikan kuskuren. Na farko, kun ƙididdige haɗakar nau'ikan kuskure (bit guda ɗaya, kusa da biyu, da Multi-bit wanda ba a daidaita shi ba) ta amfani da -weight . . zaɓi. Don misaliample, don haɗuwa na 50% kurakurai guda ɗaya, 30% kurakurai biyu na kusa, da 20% kurakurai masu yawa da ba za a iya gyara su ba, yi amfani da zaɓi -weight=50.30.20. Bayan haka, don ƙaddamar da yankin ASD, yi amfani da zaɓin -smh don haɗawa da SMH file da kuma nuna yankin ASD don kaiwa hari. Don misaliample: $ quartus_fid –cable=USB-BlasterII –index “@1=svgx.sof#pi” –weight=100.0.0 –smh=”@1=svgx.smh#2″ –lamba=30

Wannan exampda umurnin:

• Yana tsara na'urar kuma yana shigar da kurakurai (pi string)
• Yana allura 100% kurakuran-bit guda (100.0.0)
• Ana allura cikin ASD_REGION 2 kawai (#2 ya nuna)
• Aikata laifuffuka 30

Taskokin Jagororin Jagorar Mai Amfani na Laifi IP

IP Core Version	Jagorar Mai Amfani
18.0	Laifi Injection Intel FPGA IP Core User Guide
17.1	Intel FPGA Fault Injection IP Core User Guide
16.1	Altera Fault Injection IP Core User Guide
15.1	Altera Fault Injection IP Core User Guide

Idan ba a jera sigar ainihin IP ba, jagorar mai amfani don sigar ainihin IP ta baya tana aiki.

Tarihin Bita daftarin aiki don Laifin Allurar IP Core User Guide

Sigar Takardu	Intel Quartus Prime Version	Canje-canje
2019.07.09	18.1	An sabunta ta Bayanin Pin na IP na allurar kuskure Taken don fayyace Sake saitin, error_injected, da kuma siginar gogewa.
2018.05.16	18.0	• Ƙara batutuwa masu zuwa daga Intel Quartus Prime Pro Handbook: —   Ma'anar Wuraren allurar Laifi da kuma batutuwa. —   Amfani da Laifin Injection Debugger da kuma batutuwa. —   Interface na Command-Line da kuma batutuwa. • Sake suna Intel FPGA Fault Injection IP core zuwa Laifin Injection Intel FPGA IP.

Kwanan wata	Sigar	Canje-canje
2017.11.06	17.1	• Sake suna a matsayin Intel. • Ƙara tallafin na'urar Intel Cyclone 10 GX.
2016.10.31	16.1	Sabunta tallafin na'ura.
2015.12.15	15.1	• Canza Quartus II zuwa software na Quartus Prime. • Kafaffen hanyar haɗin kai mai alaƙa.
2015.05.04	15.0	Sakin farko.

 

Takardu / Albarkatu

intel UG-01173 Laifin allurar FPGA IP Core [pdf] Jagorar mai amfani UG-01173 Laifin Injection FPGA IP Core, UG-01173

Magana

• Manual mai amfani