intel UG-01173 Hoʻokomo hewa FPGA IP Core
Hoʻopili hewa Intel® FPGA IP Core alakaʻi hoʻohana
Hoʻokomo ka Fault Injection Intel® FPGA IP core i nā hewa i loko o ka RAM hoʻonohonoho (CRAM) o kahi mea FPGA. Hoʻohālikelike kēia kaʻina hana i nā hewa palupalu i hiki ke hana i ka wā o ka hana maʻamau ma muli o nā hanana hanana hoʻokahi (SEUs). He mau hanana kakaikahi ka SEU a no laila paʻakikī ke hoʻāʻo. Ma hope o kou hoʻokomo koke ʻana i ke kikowaena IP Fault Injection i kāu hoʻolālā a hoʻonohonoho i kāu hāmeʻa, hiki iā ʻoe ke hoʻohana i ka mea hana Intel Quartus® Prime Fault Injection Debugger no ka hoʻoulu ʻana i nā hewa manaʻo i ka FPGA e hoʻāʻo i ka pane ʻana o ka ʻōnaehana i kēia mau hewa.
ʻIke pili
- Hoʻokahi hanana hanana ʻino
- AN 737: ʻIke a me ka hoʻihoʻi hou ʻana o SEU ma nā polokalamu Intel Arria 10
Nā hiʻohiʻona
- Hāʻawi iā ʻoe e loiloi i ka pane ʻana o ka ʻōnaehana no ka hoʻēmi ʻana i nā hana hoʻopau hana hoʻokahi (SEFI).
- Hāʻawi iā ʻoe e hana i ka SEFI characterization i loko o ka hale, e hoʻopau ana i ka pono no ka hoʻāʻo ʻana o ka ʻōnaehana holoʻokoʻa. Akā, hiki iā ʻoe ke kaupalena i ka hoʻāʻo ʻana i ka beam i nā hemahema i ka manawa (FIT)/Mb ana ma ka pae o ka hāmeʻa.
- E hoʻonui i nā kumukūʻai FIT e like me ke ʻano SEFI e pili ana i kāu hoʻolālā hoʻolālā. Hiki iā ʻoe ke puʻunaue like ʻole i nā injections hewa i loko o ka hāmeʻa holoʻokoʻa, a i ʻole e kāohi iā lākou i nā wahi hana kikoʻī e wikiwiki ai ka hoʻāʻo.
- E hoʻolālā i kāu hoʻolālā e hōʻemi i ka hoʻohaunaele i hoʻokumu ʻia e kahi hanana hanana hoʻokahi (SEU).
Kākoʻo Mea Hana
Kākoʻo ka Fault Injection IP core iā Intel Arria® 10, Intel Cyclone® 10 GX a me nā polokalamu ʻohana Stratix® V. Kākoʻo ka ʻohana Cyclone V i ka Fault Injection ma nā polokalamu me ka suffix -SC ma ke code kauoha. E kelepona i kāu luna kūʻai kūloko no ke kauoha ʻana i ka ʻike ma nā mea hana -SC suffix Cyclone V.
Hoʻohana waiwai a me ka hana
Hoʻokumu ka polokalamu Intel Quartus Prime i kēia koho kumu waiwai no ka Stratix V A7 FPGA. Ua like nā hopena no nā mea hana ʻē aʻe.
Huina Intel. Ua mālama ʻia nā kuleana āpau. ʻO Intel, ka Intel logo, a me nā hōʻailona Intel ʻē aʻe he mau hōʻailona o Intel Corporation a i ʻole kāna mau lālā. Mālama ʻo Intel i ka hana o kāna mau huahana FPGA a me semiconductor i nā kikoʻī o kēia manawa e like me ka palapala hōʻoia maʻamau o Intel, akā aia ke kuleana e hoʻololi i nā huahana a me nā lawelawe i kēlā me kēia manawa me ka ʻole o ka hoʻolaha. ʻAʻole ʻo Intel i kuleana a i ʻole kuleana e puka mai ana mai ka noi a i ʻole ka hoʻohana ʻana i kekahi ʻike, huahana, a i ʻole lawelawe i wehewehe ʻia ma ʻaneʻi koe wale nō i ʻae ʻia ma ke kākau ʻana e Intel. Manaʻo ʻia nā mea kūʻai aku Intel e loaʻa i ka mana hou o nā kikoʻī o nā hāmeʻa ma mua o ka hilinaʻi ʻana i kekahi ʻike i paʻi ʻia a ma mua o ke kau ʻana i nā kauoha no nā huahana a i ʻole nā lawelawe. * Hiki ke koi ʻia nā inoa a me nā hōʻailona ʻē aʻe ma ke ʻano he waiwai o nā poʻe ʻē aʻe.
Hoʻohana hewa ʻo IP Core FPGA a me ka hoʻohana waiwai
| Mea lako | ALM | Nā papa inoa noʻonoʻo | M20K | |
| Papahana | lua | |||
| Stratix V A7 | 3,821 | 5,179 | 0 | 0 |
Aia ka Intel Quartus Prime software hoʻokomo i ka hale waihona puke Intel FPGA IP. Hāʻawi kēia waihona i nā cores IP pono no kāu hoʻohana ʻana me ka ʻole o ka laikini hou. Pono kekahi mau cores Intel FPGA IP e kūʻai i laikini kaʻawale no ka hoʻohana ʻana i ka hana. ʻO ka Intel FPGA IP Evaluation Mode hiki iā ʻoe ke loiloi i kēia mau kikowaena Intel FPGA IP i laikini ʻia ma ka simulation a me ka lako, ma mua o ka hoʻoholo ʻana e kūʻai i kahi laikini IP hana piha. Pono ʻoe e kūʻai i kahi laikini hana piha no nā cores Intel IP i laikini ʻia ma hope o kou hoʻopau ʻana i ka hoʻāʻo ʻana i ka lako a mākaukau e hoʻohana i ka IP i ka hana. Hoʻokomo ka polokalamu Intel Quartus Prime i nā cores IP ma kēia mau wahi ma ka paʻamau:
Alanui Hoʻokomo IP Core
Nā wahi hoʻokomo IP Core
| Wahi | lako polokalamu | Papahana |
| :\intelFPGA_pro\quartus\ip\altera | ʻO Intel Quartus Prime Pro Edition | ʻO Windows * |
| :\intelFPGA\quartus\ip\altera | ʻO Intel Quartus Prime Standard Edition | Windows |
| :/intelFPGA_pro/quartus/ip/altera | ʻO Intel Quartus Prime Pro Edition | Linux * |
| :/intelFPGA/quartus/ip/altera | ʻO Intel Quartus Prime Standard Edition | Linux |
Nānā: ʻAʻole kākoʻo ka polokalamu Intel Quartus Prime i nā hakahaka ma ke ala hoʻokomo.
Hoʻopilikino a hana ʻana i nā Kohu IP
Hiki iā ʻoe ke hana i nā cores IP e kākoʻo i nā ʻano noi like ʻole. ʻO ka Intel Quartus Prime IP Catalog a me ka mea hoʻoponopono hoʻoponopono e ʻae iā ʻoe e koho wikiwiki a hoʻonohonoho i nā awa kumu IP, nā hiʻohiʻona, a me nā mea hoʻopuka. files.
IP Catalog a me Parameter Lunahooponopono
Hōʻike ka IP Catalog i nā cores IP i loaʻa no kāu papahana, me ka Intel FPGA IP a me nā IP ʻē aʻe āu e hoʻohui ai i ke ala huli IP Catalog.
- Kānana IP Catalog e hōʻike i ka IP no ka ʻohana mea hana a i ʻole Hōʻike IP no nā ʻohana hāmeʻa āpau. Inā ʻaʻohe papahana i wehe ʻia, koho i ka ʻohana Device ma IP Catalog.
- E kikokiko i ka kahua Huli no ka huli ʻana i ka inoa kumu IP piha a hapa paha ma ka IP Catalog.
- E kaomi ʻākau i kahi inoa kumu IP ma IP Catalog e hōʻike i nā kikoʻī e pili ana i nā mea i kākoʻo ʻia, e wehe i ka waihona hoʻonohonoho IP core, a no nā loulou i ka palapala IP.
- Kaomi Huli no Partner IP to access partner IP information on the web.
Koi aku ka mea hoʻoponopono hoʻoponopono iā ʻoe e kuhikuhi i kahi inoa hoʻololi IP, nā awa koho, a me ka hoʻopuka file nā koho hanauna. Hoʻokumu ka mea hoʻoponopono parameter i kahi Intel Quartus Prime IP kiʻekiʻe file (.ip) no kahi hoʻololi IP ma nā papahana Intel Quartus Prime Pro Edition. Hoʻopuka ka mea hoʻoponopono hoʻohālikelike i kahi Quartus IP kiʻekiʻe file (.qip) no kahi hoʻololi IP ma nā papahana Intel Quartus Prime Standard Edition. ʻO kēia mau mea files hōʻike i ka IP hoʻololi i loko o ka papahana, a mālama 'ike parameterization.
Lunahooponopono IP Parameter (Intel Quartus Prime Standard Edition)
Hunahu Hoʻopuka Koko IP (Intel Quartus Prime Pro Edition)
Hoʻopuka ka polokalamu Intel Quartus Prime i kēia huahana file hale no nā cores IP ponoʻī ʻaʻole ʻāpana o kahi ʻōnaehana Platform Designer.
Hoʻopuka Huakaʻi Koho IP Kūʻokoʻa (Intel Quartus Prime Pro Edition)
- Inā kākoʻo ʻia a ʻae ʻia no kāu hoʻololi kumu IP.
Hoʻopuka Files o Intel FPGA IP Generation
| File inoa | wehewehe |
| <kou_ip>.ip | Hoʻololi IP kūlana kiʻekiʻe file aia i loko o ka parameterization o kahi IP core i kāu papahana. Inā he ʻāpana ka hoʻololi IP o kahi ʻōnaehana Platform Designer, hoʻopuka ka mea hoʻoponopono hoʻohālikelike i kahi .qsys file. |
| <kou_ip>.cmp | ʻO ka VHDL Component Declaration (.cmp) file he kikokikona file Loaʻa nā wehewehe kikoʻī kūloko a me nā awa āu e hoʻohana ai i ka hoʻolālā VHDL files. |
| <kou_ip>_generation.rpt | IP a i ʻole ka papa hana hoʻolālā papahana file. Hōʻike i kahi hōʻuluʻulu o nā memo i ka wā o ka hana IP. |
| hoʻomau… | |
| File inoa | wehewehe |
| <kou_ip>.qgsimc (Platform Designer system only) | Hoʻokohu hoʻohālikelike file e hoohalike ana i ka .qsys a me ka .ip files me ka hoʻohālikelike o kēia manawa o ka ʻōnaehana Platform Designer a me IP core. Hoʻoholo kēia hoʻohālikelike inā hiki i ka Platform Designer ke hoʻokuʻu i ka hana hou ʻana o ka HDL. |
| <kou_ip>.qgsynth (Platform Designer system only) | Ka hoʻopaʻa inoa ʻana file e hoohalike ana i ka .qsys a me ka .ip files me ka hoʻohālikelike o kēia manawa o ka ʻōnaehana Platform Designer a me IP core. Hoʻoholo kēia hoʻohālikelike inā hiki i ka Platform Designer ke hoʻokuʻu i ka hana hou ʻana o ka HDL. |
| <kou_ip>.qip | Loaʻa i nā ʻike āpau e hoʻohui a hōʻuluʻulu i ka ʻāpana IP. |
| <kou_ip>.csv | Loaʻa ka ʻike e pili ana i ke kūlana hoʻonui o ka mea IP. |
| .bsf | He hōʻailona hōʻailona o ka hoʻololi IP no ka hoʻohana ʻana ma Block Diagram Files (.bdf). |
| <kou_ip>.spd | Hookomo file ʻO kēlā ip-make-simscript pono e hana i nā palapala hoʻohālikelike. ʻO ka .spd file he papa inoa o files ʻoe e hoʻopuka no ka simulation, me ka ʻike e pili ana i nā hoʻomanaʻo āu i hoʻomaka ai. |
| <kou_ip>.ppf | Ka Pin Planner File (.ppf) mālama i ke awa a me ka node i nā ʻāpana IP āu i hana ai no ka hoʻohana ʻana me ka Pin Planner. |
| <kou_ip>_bb.v | E hoʻohana i ka pahu ʻeleʻele Verilog (_bb.v) file ma ke ʻano he ʻōlelo hoʻolaha ʻokoʻa no ka hoʻohana ʻana ma ke ʻano he pahu ʻeleʻele. |
| <kou_ip>_inst.v a i ʻole _inst.vhd | HDL example instantiation template. E kope a paʻi i nā mea o kēia file i kāu HDL file e hoʻololi koke i ka hoʻololi IP. |
| <kou_ip>.regmap | Inā loaʻa i ka IP ka ʻike hoʻopaʻa inoa, hana ka polokalamu Intel Quartus Prime i ka .regmap file. ʻO ka .regmap file wehewehe i ka ʻike palapala palapala o ka haku a me ke kauā. ʻO kēia file hoʻokō
ka .sopcinfo file ma ka hāʻawi ʻana i ka ʻike kikoʻī kikoʻī e pili ana i ka ʻōnaehana. ʻO kēia file hiki ke hōʻike i ke kākau inoa views a me nā helu helu hoʻohana maʻamau ma System Console. |
| <kou_ip>.svd | Hāʻawi i nā mea hana hoʻopololei Pūnaewele HPS view nā palapala 'āina o nā peripheral e pili ana iā HPS i loko o kahi ʻōnaehana Platform Designer.
I ka wā o ka synthesis, mālama ka polokalamu Intel Quartus Prime i ka .svd files no ke kaula kauā i ʻike ʻia e nā haku Pūnaehana Console ma ka .sof file i ke kau debug. Heluhelu ʻo System Console i kēia ʻāpana, kahi e nīnau ai ʻo Platform Designer no ka hoʻopaʻa inoa ʻana i ka ʻike palapala. No nā kauā ʻōnaehana, hiki i ka mea hoʻolālā Platform ke komo i nā papa inoa ma ka inoa. |
| <kou_ip>.v
<kou_ip>.vhd |
HDL files e hoʻomaka koke i kēlā me kēia submodule a i ʻole keiki IP core no ka synthesis a i ʻole ka hoʻohālikelike. |
| kumu aʻo/ | Loaʻa i kahi palapala msim_setup.tcl e hoʻonohonoho a holo i kahi hoʻohālike. |
| aldec/ | Loaʻa i kahi palapala rivierapro_setup.tcl e hoʻonohonoho a holo i kahi hoʻohālike. |
| /synopsys/vcs
/synopsys/vcsmx |
Loaʻa i kahi hōʻailona shell vcs_setup.sh e hoʻonohonoho a holo i kahi hoʻohālike.
Loaʻa i kahi huaʻōlelo shell vcsmx_setup.sh a me synopsys_sim.setup file e hoʻonohonoho a holo i kahi hoʻohālike. |
| /kaulele | Loaʻa i ka shell script ncsim_setup.sh a me nā hoʻonohonoho ʻē aʻe files e hoʻonohonoho a holo i kahi simulation. |
| /xcelium | Loaʻa i kahi ʻatikala ʻo Parallel simulator shell xcelium_setup.sh a me nā hoʻonohonoho ʻē aʻe files e hoʻonohonoho a holo i kahi hoʻohālike. |
| /submodules | Loaʻa iā HDL files no ka submodule kumu IP. |
| <IP submodule>/ | Hoʻokumu ʻo Platform Designer i nā sub-directories / synth a me / sim no kēlā me kēia papa kuhikuhi submodule IP i hana ʻia e Platform Designer. |
Ka wehewehe hana
Me ka Fault Injection IP core, hiki i nā mea hoʻolālā ke hana i ka hōʻailona SEFI i loko o ka hale, ka nui o ka helu FIT e like me ke ʻano SEFI, a me ka hoʻolālā hoʻolālā e hōʻemi i ka hopena o SEU.
Hoʻokahi hanana hoʻohaʻahaʻa
ʻO nā kaapuni i hoʻohui ʻia a me nā polokalamu logic programmable e like me FPGAs hiki ke maʻalahi i nā SEU. ʻO nā SEU he mau hanana maʻamau, ʻaʻole luku, i kumu ʻia e nā kumu nui ʻelua: nā ʻāpana alpha a me nā neutrons mai nā kukuna cosmic. Hiki i ka ho'olala ke ho'ololi i kona moku'āina, no laila ke alaka'i 'ana i ka hana i mana'o 'ole 'ia. Loaʻa iā Intel Arria 10, Intel Cyclone 10 GX, Arria V, Cyclone V, Stratix V a me nā mea hou aʻe i kēia mau mana CRAM:
- ʻO ka ʻike hewa ʻana i ka Cyclical Redundance Checking (EDCRC)
- Hoʻoponopono ʻakomi i kahi CRAM huhū
- Hiki ke hana i kahi kūlana CRAM huhū (fault injection)
No ka ʻike hou aku e pili ana i ka hoʻēmi ʻana i ka SEU ma nā polokalamu Intel FPGA, e nānā i ka mokuna SEU Mitigation i loko o ka puke paʻi lima.
ʻO ka wehewehe ʻana i ka IP Pin i ka hewa
Loaʻa i ka Fault Injection IP core nā pine I/O.
Nā Paʻi I/ʻO IP Core I/O Hoʻohewa
| Inoa Pin | Kuhikuhi Pin | Hōʻike Pin |
| crcerror_pin | hookomo | Hoʻokomo mai ka Error Message Register Unloader Intel FPGA IP (EMR Unloader IP). Hōʻike ʻia kēia hōʻailona ke ʻike ʻia kahi hewa CRC e ka EDCRC o ka mea hana. |
| emr_data | hookomo | Nā maʻiʻo o ke kākau inoa Error Message (EMR). E nānā i ka puke paʻi lima kūpono no nā kahua EMR.
Hoʻopili kēia hoʻokomo i ka hōʻailona hoʻokaʻawale ʻikepili Avalon Streaming. |
| emr_valid | hookomo | Hōʻike i nā hoʻokomo emr_data loaʻa nā ʻikepili kūpono. ʻO kēia kahi hōʻailona kikowaena Avalon Streaming. |
| Hoʻoponopono hou | hookomo | Hoʻokomo hou ʻia ka module. Hoʻomalu piha ʻia ka hoʻoponopono ʻana e ka Fault Injection Debugger. |
| error_injected | hoʻopuka | Hōʻike i kahi hewa i hoʻokomo ʻia i CRAM e like me ke kauoha ʻana ma o ka JTAG interface. ʻO ka lōʻihi o ka manawa a kēia hōʻailona e pili ana i kāu mau hoʻonohonoho o ka JTAG TCK a me nā hōʻailona poloka. ʻO ka maʻamau, ʻo ka manawa ma kahi o 20 mau pōʻaiapuni o ka hōʻailona TCK. |
| error_scrubbed | hoʻopuka | E hōʻike ana i ka pau ʻana o ka holoi ʻana i ka hāmeʻa e like me ke kauoha ma o ka JTAG interface. ʻO ka lōʻihi o ka manawa a kēia hōʻailona e pili ana i kāu mau hoʻonohonoho o ka JTAG TCK a me nā hōʻailona poloka. ʻO ka maʻamau, ʻo ka manawa ma kahi o 20 mau pōʻaiapuni o ka hōʻailona TCK. |
| intosc | hoʻopuka | Hoʻopuka koho. Hoʻohana ka Fault Injection IP i kēia uaki, no ka example, e wati i ka poloka EMR_unloader. |
Hoʻopili hewa IP Pin Diagram
Ke hoʻohana nei i ka Fault Injection Debugger a me Fault Injection IP Core
Hana pū ka Fault Injection Debugger me ka Fault Injection IP core. ʻO ka mea mua, hoʻomaka koke ʻoe i ka IP core i kāu hoʻolālā, hoʻohui, a hoʻoiho i ka hoʻonohonoho hopena file i kāu hāmeʻa. A laila, holo ʻoe i ka Fault Injection Debugger mai loko o ka polokalamu Intel Quartus Prime a i ʻole mai ka laina kauoha e hoʻohālikelike i nā hewa palupalu.
- ʻO ka Fault Injection Debugger hiki iā ʻoe ke hana i nā hoʻokolohua hoʻokolohua hewa a i ʻole ma nā kauoha pūʻulu, a hiki iā ʻoe ke kuhikuhi i nā wahi kūpono i kāu hoʻolālā no nā hoʻoheheʻe hewa.
- He mea pono ka laina kauoha no ka holo ʻana i ka debugger ma o ka palapala.
Nānā
Ke kamaʻilio nei ka Fault Injection Debugger me ka Fault Injection IP core ma o ka JTAG interface. Ua ʻae ka Fault Injection IP i nā kauoha mai ka JTAG interface a hōʻike i ke kūlana ma o ka JTAG interface. Hoʻokomo ʻia ke kumu Fault Injection IP i loko o ka loiloi palupalu i kāu hāmeʻa; no laila, pono ʻoe e helu no kēia hoʻohana ʻana i ka loiloi i kāu hoʻolālā. Hoʻokahi ʻano hana e hōʻike i ka pane o kāu hoʻolālā iā SEU ma ka lab a laila haʻalele i ka IP core mai kāu hoʻolālā hoʻolālā hope loa.
Ke hoʻohana nei ʻoe i ka Fault Injection IP core me kēia mau cores IP:
- ʻO ka Error Message Register Unloader IP core, nāna e heluhelu a mālama i ka ʻikepili mai ka circuitry ʻike hewa paʻakikī i nā polokalamu Intel FPGA.
- (Kūpono) ʻO ka Advanced SEU Detection Intel FPGA IP core, e hoʻohālikelike ana i nā wahi hewa hoʻokahi-bit me ka palapala ʻāina ʻike i ka wā e hana ai ka mea hana e hoʻoholo ai inā pili ka hewa palupalu iā ia.
Hoʻopau ka Debugger Injectionview Papa Kuhikuhi
Nā memo:
-
Hoʻopili ka Fault Injection IP i nā ʻāpana o ka loiloi i manaʻo ʻia.
-
Hoʻohana ka Fault Injection Debugger a me Advanced SEU Detection IP i ka laʻana EMR Unloader like.
-
He koho ka Advanced SEU Detection IP core.
ʻIke pili
- E pili ana iā SMH Files ma ka aoao 13
- E pili ana i ka EMR Unloader IP Core ma ka ʻaoʻao 10
- E pili ana i ka Advanced SEU Detection IP Core ma ka ʻaoʻao 11
Hoʻomaka koke i ka Fault Injection IP Core
HOOLAHA
ʻAʻole koi ʻo Fault Injection IP core iā ʻoe e hoʻonohonoho i nā ʻāpana. No ka hoʻohana ʻana i ka IP core, e hana i kahi hiʻohiʻona IP hou, e hoʻokomo iā ia i kāu ʻōnaehana Platform Designer (Standard), a hoʻohui i nā hōʻailona e like me ke kūpono. Pono ʻoe e hoʻohana i ka Fault Injection IP core me ka EMR Unloader IP core. Loaʻa ka Fault Injection a me ka EMR Unloader IP cores ma Platform Designer a me ka IP Catalog. ʻO ke koho, hiki iā ʻoe ke hoʻokomo pololei iā lākou i kāu hoʻolālā RTL, me ka hoʻohana ʻana iā Verilog HDL, SystemVerilog, a i ʻole VHDL.
E pili ana i ka EMR Unloader IP Core
Hāʻawi ka EMR Unloader IP core i kahi interface i ka EMR, i hoʻonui mau ʻia e ka EDCRC o ka mea hana e nānā i nā CRAM bits CRC o ka mea no nā hewa palupalu.
ExampʻO ka Pūnaehana Hoʻolālā Platform e komo pū me ka Fault Injection IP Core a me EMR Unloader IP Core
Example Fault Injection IP Core a me EMR Unloader IP Core Block Diagram
ʻIke pili
Hoʻopaʻa inoa i ka memo Hapa Unloader Intel FPGA IP Core alakaʻi hoʻohana
E pili ana i ka Advanced SEU Detection IP Core
E hoʻohana i ka Advanced SEU Detection (ASD) IP core i ka wā e hoʻolālā ʻia ai ka hoʻomanawanui SEU. Pono ʻoe e hoʻohana i ka EMR Unloader IP core me ka ASD IP core. No laila, inā ʻoe e hoʻohana i ka ASD IP a me ka Fault Injection IP i ka hoʻolālā like, pono lākou e kaʻana like i ka hoʻopuka EMR Unloader ma o kahi mea hoʻokaʻawale Avalon®-ST. Hōʻike kēia kiʻi i kahi ʻōnaehana Platform Designer kahi e puʻunaue ai kahi mea hoʻokaʻawale Avalon-ST i nā ʻike EMR i nā cores ASD a me Fault Injection IP.
Ke hoʻohana nei i ka ASD a me ka Fault Injection IP i loko o ka Pūnaehana Hoʻolālā Platform
ʻIke pili
Kiʻekiʻe SEU Detection Intel FPGA IP Core alakaʻi hoʻohana
Ka wehewehe ʻana i nā wahi hoʻoheheʻe hewa
Hiki iā ʻoe ke wehewehe i nā ʻāpana kikoʻī o ka FPGA no ka hoʻokomo hewa ʻana me ka hoʻohana ʻana i kahi Sensitivity Map Header (.smh) file. ʻO ka SMH file mālama i nā hoʻonohonoho o ka mea CRAM bits, ko lākou ʻāpana i hāʻawi ʻia (ASD Region), a me ka koʻikoʻi. I ke kaʻina hana hoʻolālā e hoʻohana ʻoe i ka hierarchy tagging e hana i ka ʻāina. A laila, i ka wā o ka hōʻuluʻulu ʻana, hana ka Intel Quartus Prime Assembler i ka SMH file. Hoʻopau ka Fault Injection Debugger i nā hoʻoheheʻe hewa i nā ʻāpana mea pono āu e wehewehe ai ma ka SMH file.
Hana i ka Hierarchy Tagging
Wehewehe ʻoe i nā ʻāpana FPGA no ka hoʻāʻo ʻana ma ka hāʻawi ʻana i kahi ASD Region i kahi. Hiki iā ʻoe ke kuhikuhi i kahi waiwai ASD Region no kekahi ʻāpana o kāu hierarchy hoʻolālā me ka hoʻohana ʻana i ka Window Partitions Design.
- E koho i nā hāʻawi ➤ Design Partitions Window.
- E kaomi ʻākau ma nā wahi a pau o ka lālani poʻomanaʻo a hoʻā i ka ASD Region e hōʻike i ke kolamu ASD Region (inā ʻaʻole i hōʻike ʻia).
- E hoʻokomo i ka waiwai mai ka 0 a hiki i ka 16 no kekahi ʻāpana e hāʻawi iā ia i kahi ʻāpana ASD.
- Mālama ʻia ka ʻāpana ASD 0 i nā ʻāpana i hoʻohana ʻole ʻia o ka hāmeʻa. Hiki iā ʻoe ke hoʻokaʻawale i kahi ʻāpana i kēia ʻāina e kuhikuhi iā ia he koʻikoʻi ʻole.
- ʻO ka ʻāpana ASD 1 ka ʻāpana paʻamau. Hāʻawi ʻia nā ʻāpana āpau i hoʻohana ʻia i kēia ʻāpana ke ʻole ʻoe e hoʻololi maopopo i ka hāʻawi ASD Region.
E pili ana iā SMH Files
ʻO ka SMH file Loaʻa nā ʻike penei:
- Inā ʻaʻole ʻoe e hoʻohana i ka hierarchy tagging (ʻo ia hoʻi, ʻaʻohe wahi kikoʻī o ka ASD Region i ka hierarchy hoʻolālā), ka SMH file papa inoa i kēlā me kēia ʻāpana CRAM a hōʻike inā paʻakikī ia no ka hoʻolālā.
- Inā ʻoe i hana i ka hierarchy tagging a hoʻololi i nā haʻawina paʻamau ASD Region, ka SMH file papa inoa i kēlā me kēia ʻāpana CRAM a ua hāʻawi ʻia i ka ʻāina ASD.
Hiki i ka Fault Injection Debugger ke hoʻopaʻa i nā injections i hoʻokahi a ʻoi aku paha nā wahi i kuhikuhi ʻia. E kuhikuhi i ka Assembler e hana i kahi SMH file:
- E koho i nā hāʻawi ➤ Mea Hana ➤ Mea Hana a me nā koho Pin ➤ ʻIke Hapa CRC.
- E ho'ā i ka palapala 'āina Generate SEU sensitivity file (.smh) koho.
Ke hoʻohana nei i ka Fault Injection Debugger
HOOLAHA
No ka hoʻohana ʻana i ka Fault Injection Debugger, hoʻopili ʻoe i kāu kelepona ma o ka JTAG interface. A laila, hoʻonohonoho i ka hāmeʻa a hana i ka hoʻopiʻi hewa. No ka hoʻomaka ʻana i ka Fault Injection Debugger, koho i nā mea hana ➤ Fault Injection Debugger ma ka polokalamu Intel Quartus Prime. ʻO ka hoʻonohonoho ʻana a i ʻole ka hoʻonohonoho ʻana i ka hāmeʻa e like me ke kaʻina hana no ka Programmer a i ʻole Signal Tap Logic Analyzer.
Mea hoʻoheheʻe i ka hewa
No ka hoʻonohonoho ʻana i kāu JTAG kaulahao:
- Kaomi iā Hardware Setup. Hōʻike ka hāmeʻa i ka lako polokalamu i hoʻopili ʻia i kāu kamepiula.
- E koho i ka lako polokalamu āu e makemake ai e hoʻohana.
- Kaomi iā Close.
- Kaomi iā Auto Detect, nāna e hoʻopiha i ke kaulahao mea me nā polokalamu polokalamu i loaʻa ma ka JTAG kaulahao.
ʻIke pili
ʻO ka hiʻohiʻona i hoʻopaʻa ʻia ma ka ʻaoʻao 21
Pono nā lako lako a me nā lako polokalamu
Pono nā lako a me nā lako polokalamu e hoʻohana ai i ka Fault Injection Debugger:
- laina FEATURE i kāu laikini Intel FPGA e hiki ai i ka Fault Injection IP core. No ka ʻike hou aku, e kelepona i kāu luna kūʻai kūʻai Intel FPGA kūloko.
- Hoʻoiho i ke kelepona (Intel FPGA Download Cable, Intel FPGA Download Cable II, , a i ʻole II).
- ʻO ka pahu hoʻomohala Intel FPGA a i ʻole ka papa hana hoʻohana me kahi JTAG pili i ka mea hana ma lalo o ka ho'āʻo.
- (Koho) laina HIʻona i kāu laikini Intel FPGA e hiki ai i ka Advanced SEU Detection IP core.
Ke hoʻonohonoho ʻana i kāu hāmeʻa a me ka Debugger Injection Fault
Ke hoʻohana nei ka Fault Injection Debugger i kahi .sof a me (ke koho) i kahi Poʻomanaʻo palapala ʻāina Sensitivity (.smh) file. ʻO ka mea lako polokalamu File (.sof) hoʻonohonoho i ka FPGA. ʻO ka .smh file wehewehe i ka naʻau o nā ʻāpana CRAM i ka hāmeʻa. Inā ʻaʻole ʻoe e hāʻawi i kahi .smh file, ka Fault Injection Debugger e hoʻokomo i nā hewa ma nā ʻāpana CRAM. No ka wehewehe ʻana i kahi .sof:
- E koho i ka FPGA āu e makemake ai e hoʻonohonoho i ka pahu kaulahao Device.
- Kaomi koho File.
- E hoʻokele i ka .sof a kaomi iā OK. Heluhelu ka Fault Injection Debugger i ka .sof.
- (Koho) E koho i ka SMH file.
Inā ʻaʻole ʻoe e kuhikuhi i kahi SMH file, ka Fault Injection Debugger e hoʻokomo i nā hewa ma ka ʻaoʻao holoʻokoʻa. Inā ʻoe e kuhikuhi i kahi SMH file, hiki iā ʻoe ke hoʻopaʻa i nā injections i nā wahi i hoʻohana ʻia o kāu hāmeʻa.- E kaomi akau i ka mea ma ka pahu kaulahao Device a laila kaomi i ke koho SMH File.
- E koho i kāu SMH file.
- Kaomi OK.
- E ho'ā i ka Polokalamu/Configure.
- Kaomi hoʻomaka.
Hoʻonohonoho ka Fault Injection Debugger i ka mea hoʻohana me ka .sof.
Papa Kuhikuhi no ke koho ana i ka SMH File
Kāohi i nā ʻāpana no ka hoʻokomo hewa
Ma hope o ka hoʻouka ʻana i kahi SMH file, hiki iā ʻoe ke kuhikuhi i ka Fault Injection Debugger e hana ma nā wahi ASD kikoʻī wale nō. No ka wehewehe ʻana i ka ʻāina ASD kahi e hoʻokomo ai i nā hewa:
- E kaomi akau i ka FPGA ma ka pahu kaulahao Device, a kaomi Show Device Sensitivity Map.
- E koho i ka (s) wahi ASD no ka hoʻokomo hewa.
Palapala ʻāina noʻonoʻo o nā mea hana Viewer
Ke kuhikuhi nei i nā ʻano hewa
Hiki iā ʻoe ke kuhikuhi i nā ʻano hewa like ʻole no ka injection.
- Nā hewa hoʻokahi (SE)
- Nā hewa pili ʻelua (DAE)
- ʻAʻole hiki ke hoʻoponopono ʻia nā hewa he nui-bit (EMBE)
Hiki i nā mea hana Intel FPGA ke hoʻoponopono iā ia iho i nā hewa hoʻokahi a me ka lua-pili inā hiki ke hoʻohana ʻia ka hiʻohiʻona scrubbing. ʻAʻole hiki i nā polokalamu Intel FPGA ke hoʻoponopono i nā hewa he nui. E nānā i ka mokuna e hoʻemi i nā SEU no ka ʻike hou aku e pili ana i ka hoʻopau ʻana i kēia mau hewa. Hiki iā ʻoe ke kuhikuhi i ka hui ʻana o nā hewa e hoʻokomo ʻia a me ka manawa o ka injection. No ka wehewehe ʻana i ka manawa o ka injection:
- Ma ka Fault Injection Debugger, koho i nā mea hana ➤ Nā koho.
- E kauo i ka mea hoʻoponopono ʻulaʻula i ka hui ʻana o nā hewa. ʻO kahi koho, hiki iā ʻoe ke kuhikuhi i ka hui ʻana ma ka helu.
- E wehewehe i ka manawa o ka Injection.
- Kaomi OK.
Kiʻi 12. E wehewehe ana i ka hui ʻana o nā ʻano hewa SEU
ʻIke pili Hoʻoemi i ka hana ʻino hoʻokahi
Ke kuhi hewa
Hiki iā ʻoe ke hoʻokomo i nā hewa i kekahi mau ʻano:
- Hoʻokomo i hoʻokahi hewa ma ke kauoha
- Hoʻokomo i nā hewa he nui ma ke kauoha
- Inject hewa a hiki i ke kauoha ʻia e hooki
No ka hoʻokomo ʻana i kēia mau hewa:
- E ho'ā i ke koho Inject Fault.
- E koho inā makemake ʻoe e holo hewa no kekahi mau ʻike a i ʻole a pau:
- Inā koho ʻoe e holo a hoʻōki, hoʻokomo ka Fault Injection Debugger i nā hewa i ka wā i ʻōlelo ʻia ma ka pahu dialog Tools ➤ Options.
- Inā makemake ʻoe e hoʻokele hewa no kahi helu kikoʻī o nā iteration, e hoʻokomo i ka helu.
- Kaomi hoʻomaka.
Nānā: E holo ana ka Fault Injection Debugger no ka helu o ka hoʻomaʻamaʻa ʻana a i ʻole ka pau ʻana. Hōʻike ka puka makani Intel Quartus Prime Messages i nā memo e pili ana i nā hewa i hoʻokomo ʻia. No ka ʻike hou aku e pili ana i nā hewa i hoʻopaʻa ʻia, kaomi Heluhelu EMR. Heluhelu ka Fault Injection Debugger i ka EMR o ka mea hana a hōʻike i nā mea i loko o ka pukaaniani Messages.
ʻO Intel Quartus Prime Error Injection a me EMR Content Messages
Hapa Hoopaa
Hiki iā ʻoe ke hoʻopaʻa i kahi o kahi hewa i hoʻopaʻa ʻia ma ka nānā ʻana i nā ʻāpana i hōʻike ʻia ma ka puka aniani Intel Quartus Prime Messages. Inā, no exampʻO ka hewa i hoʻopaʻa ʻia i ka hana āu e makemake ai e hoʻokani hou, hiki iā ʻoe ke kuhikuhi i kēlā wahi no ka injection. Hana ʻoe i ka ʻinikua i hoʻopaʻa ʻia me ka hoʻohana ʻana i ka laina kauoha Fault Injection Debugger.
Holoi i nā hewa i hoʻokomo ʻia
No ka hoʻihoʻi ʻana i ka hana maʻamau o ka FPGA, kaomi iā Scrub. Ke holoi ʻoe i kahi hewa, hoʻohana ʻia nā hana EDCRC o ka hāmeʻa e hoʻoponopono i nā hewa. Ua like ka mīkini scrub me ka mea i hoʻohana ʻia i ka wā e hana ai ka mīkini.
Kauā-Line Interface
Hiki iā ʻoe ke holo i ka Fault Injection Debugger ma ka laina kauoha me ka quartus_fid executable, he mea pono inā makemake ʻoe e hana hewa mai kahi palapala.
Papa 5. Nā ʻōlelo hoʻopaʻapaʻa laina kauoha no ka hoʻokomo hewa
| Hoʻopaʻapaʻa pōkole | Hoʻopaʻapaʻa lōʻihi | wehewehe |
| c | uwea | E wehewehe i ka lako polokalamu a i ʻole ke kaula. (Koi ʻia) |
| i | kuhikuhi | E wehewehe i ka mea hana e hoʻokomo i ka hewa. (Koi ʻia) |
| n | helu | E wehewehe i ka helu o nā hewa e hoʻokomo. ʻO ka waiwai paʻamau
1. (Ke koho) |
| t | manawa | ʻO ka manawa waena ma waena o nā injections. (Koho) |
Nānā: E hoʻohana i ka quartus_fid –kōkua i view nā koho a pau i loaʻa. Hāʻawi kēia code i examples me ka hoʻohana ʻana i ke kikowaena laina kauoha Fault Injection Debugger.
##############################################
- # E ʻike i nā kelepona USB i loaʻa no kēia manawa
- # Hōʻike ka hopena i loaʻa kahi kelepona, kapa ʻia ʻo "USB-Blaster" #
- $ quartus_fid –papa inoa . . .
- ʻIke: Kauoha: quartus_fid –list
- USB-Blaster ma sj-sng-z4 [USB-0] ʻIke: Ua holomua ʻo Intel Quartus Prime 64-Bit Fault Injection Debugger. 0 hewa, 0 ʻōlelo aʻo
- ##############################################
- # E ʻimi i nā mea i loaʻa ma ke kelepona USB-Blaster
- # Hōʻike ka hopena i ʻelua mau mea hana: kahi Stratix V A7, a me kahi MAX V CPLD. #
- $ quartus_fid – uwea USB-Blaster -a
- ʻIke: Kauoha: quartus_fid –cable=USB-Blaster -a
- ʻIke (208809): Ke hoʻohana nei i ke kaula hoʻonohonoho "USB-Blaster ma sj-sng-z4 [USB-0]"
- USB-Blaster ma sj-sng-z4 [USB-0]
- 029030DD 5SGXEA7H(1|2|3)/5SGXEA7K1/..
- 020A40DD 5M2210Z/EPM2210
- ʻIke: Ua holomua ʻo Intel Quartus Prime 64-Bit Fault Injection Debugger.
- 0 hewa, 0 mau ʻōlelo aʻo
- ##############################################
- # Hoʻopololei i ka polokalamu Stratix V
- # ʻO ke koho -index e kuhikuhi i nā hana i hana ʻia ma kahi mea pili.
- # "=svgx.sof" pili i kahi .sof file me ka mea hana
- # "#p" ʻo ia hoʻi ka papahana i ka mea hana #
- $ quartus_fid –uila USB-Blaster –index “@1=svgx.sof#p” . . .
- ʻIke (209016): Ka hoʻonohonoho ʻana i ka helu helu 1
- ʻIke (209017): Aia ka mea 1 i ka JTAG Ka helu ID 0x029030DD
- ʻIke (209007): Ua holomua ka hoʻonohonoho — 1 mea (mau) i hoʻonohonoho ʻia
- ʻIke (209011): Hoʻokō pono ʻia nā hana
- ʻIke (208551): Pūlima papahana i ka mea hana 1.
- ʻIke: Ua holomua ʻo Intel Quartus Prime 64-Bit Fault Injection Debugger.
- 0 hewa, 0 mau ʻōlelo aʻo
- ##############################################
- # Hoʻokomo i kahi hewa i ka hāmeʻa.
- # Hōʻike ka mea hana #i e hoʻokomo i nā hewa
- Hōʻike ʻo # -n 3 e hoʻokomo i 3 mau hewa #
- $ quartus_fid –uila USB-Blaster –index “@1=svgx.sof#i” -n 3
- ʻIke: Kauoha: quartus_fid –cable=USB-Blaster –index=@1=svgx.sof#i -n 3
- ʻIke (208809): Ke hoʻohana nei i ke kaula hoʻonohonoho "USB-Blaster ma sj-sng-z4 [USB-0]"
- ʻIke (208521): Hoʻokomo i 3 hewa i loko o ka mea hana.
- ʻIke: Ua holomua ʻo Intel Quartus Prime 64-Bit Fault Injection Debugger.
- 0 hewa, 0 mau ʻōlelo aʻo
- ##############################################
- # Keʻano pāʻani.
- # Ke hoʻohana nei i ka hana #i me -n 0 e hoʻokomo i ka debugger i ke ʻano pāʻani.
- # E hoʻomaopopo he 3 mau hewa i hoʻopaʻa ʻia i ka hālāwai ma mua;
- Heluhelu ʻo # "E" i nā hewa i kēia manawa ma ka EMR Unloader IP core. #
- $ quartus_fid –uila USB-Blaster –index “@1=svgx.sof#i” -n 0
- ʻIke: Kauoha: quartus_fid –cable=USB-Blaster –index=@1=svgx.sof#i -n 0
- ʻIke (208809): Ke hoʻohana nei i ke kaula hoʻonohonoho "USB-Blaster ma sj-sng-z4 [USB-0]"
- E komo:
- 'F' e hoʻokomo i ka hewa
- 'E' e heluhelu i ka EMR
- 'S' e holoi i nā hewa
- 'Q' e haʻalele iā E
- ʻIke (208540): Heluhelu ʻia ka papa kuhikuhi EMR
- ʻIke (208544): Ua ʻike ʻia he 3 hewa kiʻi ma ka hāmeʻa 1.
- ʻIke (208545): Hapa #1 : Hoʻokahi hewa i ke kiʻi 0x1028 ma ka bit 0x21EA.
- ʻIke (10914): Hapa #2 : ʻAʻole hiki ke hoʻoponopono ʻia ka hewa multi-bit ma ke kiʻi 0x1116.
- ʻIke (208545): Hapa #3 : Hoʻokahi hewa i ke kiʻi 0x1848 ma ka bit 0x128C.
- 'F' e hoʻokomo i ka hewa
- 'E' e heluhelu i ka EMR
- 'S' e holoi i nā hewa
- 'Q' e haʻalele iā Q
- ʻIkepili: Ua holomua ʻo Intel Quartus Prime 64-Bit Fault Injection Debugger. 0 hewa, 0 mau ʻōlelo aʻo
- ʻIkepili: ʻO ka hoʻomanaʻo virtual kiʻekiʻe: 1522 megabytes
- ʻIkepili: Ua pau ke kaʻina hana: Mon Nov 3 18:50:00 2014
- ʻIkepili: Ka manawa i hala: 00:00:29
- ʻIkepili: Ka nui o ka manawa CPU (ma nā mea hana a pau): 00:00:13
Hiʻona hoʻoheheʻe hewa ʻia
Nānā
Hoʻokomo ka Fault Injection Debugger i nā hewa i loko o ka FPGA me ka ʻole. Eia naʻe, ʻo ka hiʻohiʻona Targeted Fault Injection hiki iā ʻoe ke hoʻokomo i nā hewa i nā wahi i hoʻopaʻa ʻia i ka CRAM. Pono paha kēia hana, no ka exampe, inā ʻike ʻoe i kahi hanana SEU a makemake ʻoe e hoʻāʻo i ka FPGA a i ʻole ka pane ʻōnaehana i ka hanana like ma hope o ka hoʻololi ʻana i kahi hoʻolālā hoʻihoʻi. Loaʻa ka hiʻohiʻona Targeted Fault Injection mai ka laina kauoha. Hiki iā ʻoe ke kuhikuhi i nā hewa i hoʻokomo ʻia mai ka laina kauoha a i ke ʻano wikiwiki. ʻIke pili
AN 539: ʻO ke ʻano hoʻāʻo a i ʻole ka ʻike hewa a me ka hoʻihoʻi ʻana me ka hoʻohana ʻana i ka CRC ma nā polokalamu Intel FPGA
Ke kuhikuhi nei i kahi papa inoa hewa mai ka laina kauoha
ʻO ka hiʻohiʻona Targeted Fault Injection hiki iā ʻoe ke kuhikuhi i kahi papa inoa hewa mai ka laina kauoha, e like me ka mea i hōʻike ʻia ma kēia ex.ample: c:\Users\sng> quartus_fid -c 1 – i “@1= svgx.sof#i ” -n 2 -user=”@1= 0x2274 0x05EF 0x2264 0x0500″ Kahi: c 1 hōʻike i ka mana o ka FPGA e ke kaula mua ma kāu kamepiula. i “@1= six.sof#i ” e hōʻike ana ua hoʻouka ʻia ka mea hana mua ma ke kaulahao me ka mea file svgx.sof a e hoʻokomo ʻia me nā hewa. n 2 hōʻike e hoʻokomo ʻia nā hewa ʻelua. mea hoʻohana =”@1= 0x2274 0x05EF 0x2264 0x0500” he papa inoa o nā hewa i kuhikuhi ʻia e ka mea hoʻohana. Ma keia exampʻO ka mea, ʻelua mau hewa o ka mea 1: ma ke kiʻi 0x2274, ka bit 0x05EF a ma ke kiʻi 0x2264, ka bit 0x0500.
Ke kuhikuhi ʻana i kahi papa inoa hewa mai ke ʻano Prompt
Hiki iā ʻoe ke hoʻohana i ka hiʻohiʻona Targeted Fault Injection me ka wehewehe ʻana i ka helu o nā hewa he 0 (-n 0). Hāʻawi ka Fault Injection Debugger i nā kauoha mode wikiwiki a me kā lākou wehewehe.
| Kauoha kaʻina hana | wehewehe |
| F | Hoʻokomo i kahi hewa |
| E | Heluhelu i ka EMR |
| S | Holoi hewa |
| Q | Haʻalele |
Ma ke ʻano wikiwiki, hiki iā ʻoe ke hoʻopuka i ke kauoha F wale nō e hoʻokomo i hoʻokahi hewa i kahi wahi maʻamau i ka hāmeʻa. Ma ka exampI ka hoʻohana ʻana i ke kauoha F ma ke ʻano wikiwiki, ua hoʻokomo ʻia ʻekolu mau hewa. F #3 0x12 0x34 0x56 0x78 * 0x9A 0xBC +
- Hapa 1 – Hoʻokahi hapa hapa ma ke kiʻi 0x12, bit 0x34
- Hapa 2 - Hapa hiki ʻole ke hoʻoponopono ʻia ma ke kiʻi 0x56, bit 0x78 (ʻo kahi * e hōʻike ana i kahi hewa multi-bit)
- Hapa 3 – Hapalua pili pili ma ke kiʻi 0x9A, bit 0xBC (a + e hōʻike ana i kahi hewa ʻelua)
F 0x12 0x34 0x56 0x78 * Hoʻokahi hewa (paʻamau) i hoʻokomo ʻia: Hapa 1 – Hoʻokahi hapa hapa ma ke kiʻi 0x12, bit 0x34. ʻAʻole mālama ʻia nā wahi ma hope o ke kiʻi/bit wahi mua. F #3 0x12 0x34 0x56 0x78 * 0x9A 0xBC + 0xDE 0x00
ʻEkolu hewa i hoʻokomo ʻia:
- Hapa 1 – Hoʻokahi hapa hapa ma ke kiʻi 0x12, bit 0x34
- Hapa 2 - Hapa hiki ʻole ke hoʻoponopono ʻia ma ke kiʻi 0x56, bit 0x78
- Hapa 3 – ʻAlua-pili hewa ma ke kiʻi 0x9A, bit 0xBC
- ʻAʻole mālama ʻia nā wahi ma hope o nā pā 3 kiʻi/bit
Ka Hoʻoholo ʻana i nā wahi Bit CRAM
Nānā:
Ke ʻike ka Fault Injection Debugger i kahi hewa CRAM EDCRC, aia ka Error Message Register (EMR) i ka maʻi, helu helu, wahi bit, a me ke ʻano hewa (hoʻokahi, pālua, a i ʻole multi-bit) o ka hewa CRAM i ʻike ʻia. I ka hoʻāʻo ʻana o ka ʻōnaehana, mālama i nā mea EMR i hōʻike ʻia e ka Fault Injection Debugger ke ʻike ʻoe i kahi hewa EDCRC. Me nā ʻike EMR i hoʻopaʻa ʻia, hiki iā ʻoe ke hāʻawi i ke kiʻi a me nā helu bit i ka Fault Injection Debugger e hoʻokani hou i nā hewa i ʻike ʻia i ka wā o ka hoʻāʻo ʻana o ka ʻōnaehana, e hoʻolālā hou aʻe, a e hōʻike i kahi pane hoʻihoʻi ʻōnaehana i kēlā hewa.
ʻIke pili
AN 539: Hoʻāʻo ʻana a i ʻole ka ʻike hewa a me ka hoʻihoʻi ʻana me ka hoʻohana ʻana i ka CRC ma nā polokalamu Intel FPGA
ʻO nā koho laina kauoha kiʻekiʻe: nā ʻāpana ASD a me ke kaupaona ʻano hewa
Hiki iā ʻoe ke hoʻohana i ka interface laina kauoha Fault Injection Debugger e hoʻokomo i nā hewa i nā ʻāpana ASD a kaupaona i nā ʻano hewa. ʻO ka mea mua, kuhikuhi ʻoe i ka hui ʻana o nā ʻano hewa (hoʻokahi bit, pālua pili, a multi-bit uncorrectable) me ka hoʻohana ʻana i ka -weight . . koho. No exampa, no ka hui ʻana o 50% mau hewa hoʻokahi, 30% mau hewa pili ʻelua, a me 20% mau hewa multi-bit uncorrectable, e hoʻohana i ke koho –weight=50.30.20. A laila, no ka huli ʻana i kahi ʻāina ASD, e hoʻohana i ke koho -smh e hoʻokomo i ka SMH file a hōʻike i ka ʻāina ASD e hoʻoholo ai. No example: $ quartus_fid –cable=USB-BlasterII –index “@1=svgx.sof#pi” –weight=100.0.0 –smh=”@1=svgx.smh#2″ –number=30
ʻO kēia example kauoha:
- Hoʻopololei i ka mea hana a hoʻokomo i nā hewa (pi string)
- Hoʻokomo i nā hewa 100% hoʻokahi-bit (100.0.0)
- Hoʻokomo wale ʻia i loko o ASD_REGION 2 (hōʻike ʻia e ka #2)
- Injects 30 hewa
ʻO nā waihona alakaʻi alakaʻi alakaʻi IP Core
| Manaʻo IP Core | Ke alakaʻi hoʻohana |
| 18.0 | Hoʻokomo hewa Intel FPGA IP Core alakaʻi hoʻohana |
| 17.1 | Intel FPGA Fault Injection IP Core alakaʻi hoʻohana |
| 16.1 | Altera Fault Injection IP Core alakaʻi hoʻohana |
| 15.1 | Altera Fault Injection IP Core alakaʻi hoʻohana |
Inā ʻaʻole i helu ʻia kahi mana IP core, pili ke alakaʻi mea hoʻohana no ka mana IP mua.
Moʻolelo Hoʻoponopono Palapala no ka Hoʻohālua IP Core Alakaʻi Mea hoʻohana
| Palapala Palapala | ʻO Intel Quartus Prime Version | Nā hoʻololi |
| 2019.07.09 | 18.1 | Hoʻohou i ka ʻO ka wehewehe ʻana i ka IP Pin i ka hewa kumuhana e wehewehe i nā hōʻailona Reset, error_injected, a me error_scrubbed. |
| 2018.05.16 | 18.0 | • Hoʻohui ʻia nā kumuhana mai ka Intel Quartus Prime Pro Edition Handbook:
— Ka wehewehe ʻana i nā wahi hoʻoheheʻe hewa a me nā kumuhana. — Ke hoʻohana nei i ka Fault Injection Debugger a me nā kumuhana. — Kauā-Line Interface a me nā kumuhana. • Kapa hou 'ia 'o Intel FPGA Fault Injection IP core i Fault Injection Intel FPGA IP. |
| Lā | Manao | Nā hoʻololi |
| 2017.11.06 | 17.1 | • Ua kapa hou ʻia ʻo Intel.
• Hoʻohui i ke kākoʻo mea hana Intel Cyclone 10 GX. |
| 2016.10.31 | 16.1 | Kākoʻo mea hana hou. |
| 2015.12.15 | 15.1 | • Hoʻololi ʻo Quartus II i ka polokalamu Quartus Prime.
• Hoʻopaʻa i ka loulou pili pili. |
| 2015.05.04 | 15.0 | Hoʻokuʻu mua. |
Palapala / Punawai
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intel UG-01173 Hoʻokomo hewa FPGA IP Core [pdf] Ke alakaʻi hoʻohana UG-01173 FPGA IP Core, UG-01173, FPGA IP Core, Injection c, Injection FPGA IP Core |
