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Intel MAX 10 FPGA Amadivayisi Nge-UART ene-Nios II Processor

I-intel-MAX-10-FPGA-Devices-Over-UART-with-the-Nios-II-Processor-PRODUCT

Ulwazi Lomkhiqizo

Idizayini yesithenjwa ihlinzeka ngohlelo lokusebenza olulula olusebenzisa izici eziyisisekelo zokucushwa okukude kumasistimu asekelwe ku-Nios II kumadivayisi angu-MAX 10 FPGA. I-interface ye-UART efakwe ku-MAX 10 FPGA Development Kit isetshenziswa kanye ne-Altera UART IP core ukuze kuhlinzekwe ngokusebenza kokucushwa kwesilawuli kude. Amadivayisi we-MAX10 FPGA ahlinzeka ngamandla okugcina izithombe zokucushwa ezifika kwezimbili ezithuthukisa ngokwengeziwe isici sokuthuthukisa isistimu yesilawuli kude.

Izifinyezo

Isifinyezo Incazelo
I-Avalon-MM Imemori ye-Avalon Memory-Mapped Configuration Flash
CFM Isixhumi esibonakalayo somsebenzisi
I-ICB Ibhithi Yokulungiselela Yokuqalisa
I-MAP/.imephu Imephu Yenkumbulo File
I-Nios II EDS I-Nios II Embedded Design Suite Support
PFL I-Parallel Flash Loader IP core
I-POF/.pof Into Yomhleli File
QSPI I-Quad serial peripheral interface
I-RPD/.rpd Idatha yokuhlela engahluziwe
I-SBT Amathuluzi Okwakha Isofthiwe
SOF/.sof Into ye-SRAM File
INQALI Isamukeli/i-transmitter ehambisanayo yonke indawo
UFM Imemori ye-flash yomsebenzisi

Imiyalo yokusetshenziswa komkhiqizo

Okudingekayo

Ukusetshenziswa kwalo mklamo wesithenjwa kudinga ukuthi ube nezinga elibonisiwe lolwazi noma isipiliyoni kulezi zindawo ezilandelayo:

Izimfuneko:

Okulandelayo yizimfuneko zezingxenyekazi zekhompiyutha kanye nesofthiwe yomklamo wereferensi:

I-Reference Design Files

File Igama Incazelo
Isithombe_sasefekthri Kumodi yokucushwa kwezithombe ezimbili, i-CFM1 ne-CFM2
zihlanganiswa zibe isitoreji esisodwa se-CFM.
uhlelo_lwesithombe_1 Idizayini yehadiwe ye-Quartus II file lokho kuthatha indawo ye-app_image_2
ngesikhathi sokuthuthukiswa kwesistimu yesilawuli kude.
uhlelo_lwesithombe_2 Ikhodi ye-software ye-Nios II isebenza njengesilawuli se
idizayini yesistimu yokuthuthukisa kude.
Remote_system_upgrade.c
factory_application1.pof Uhlelo lwe-Quartus II file equkethe isithombe semboni kanye
isithombe sohlelo lokusebenza 1, sizohlelwa sibe yi-CFM0 ne-CFM1 & CFM2
ngokulandelana ekuqaleni stage.
factory_application1.rpd
isicelo_image_1.rpd
isicelo_image_2.rpd
Nios_application.pof

Idizayini yesithenjwa ihlinzeka ngohlelo lokusebenza olulula olusebenzisa izici eziyisisekelo zokucushwa kwesilawuli kude kumasistimu asekelwe ku-Nios II kumadivayisi angu-MAX 10 FPGA. I-interface ye-UART efakwe ku-MAX 10 FPGA Development Kit isetshenziswa kanye ne-Altera UART IP core ukuze kuhlinzekwe ngokusebenza kokucushwa kwesilawuli kude.

Ulwazi Oluhlobene

I-Reference Design Files

Ukuthuthukiswa Kwesistimu Ekude nge-MAX 10 FPGA Overview

Ngesici sokuthuthukisa isistimu yesilawuli kude, izithuthukisi nokulungiswa kweziphazamisi kumadivayisi e-FPGA kungenziwa ukude. Endaweni yesistimu eshumekiwe, i-firmware idinga ukubuyekezwa njalo ngohlobo oluhlukile lwephrothokholi, njenge-UART, Ethernet, ne-I2C. Uma isistimu eshumekiwe ihlanganisa i-FPGA, izibuyekezo ze-firmware zingafaka izibuyekezo zesithombe sehadiwe ku-FPGA.
Amadivayisi we-MAX10 FPGA ahlinzeka ngamandla okugcina izithombe zokucushwa ezifika kwezimbili ezithuthukisa ngokwengeziwe isici sokuthuthukisa isistimu yesilawuli kude. Esinye sezithombe kuzoba yisithombe esiyisipele esilayishwayo uma kwenzeka iphutha esithombeni samanje.

Izifinyezo

Ithebula 1: Uhlu Lwezifinyezo

Isifinyezo Incazelo
I-Avalon-MM I-Avalon Memory-Mapped
CFM Imemori ye-flash yokucushwa
I-GUI Isixhumi esibonakalayo somsebenzisi
I-ICB Ibhithi Yokulungiselela Yokuqalisa
I-MAP/.imephu Imephu Yenkumbulo File
I-Nios II EDS I-Nios II Embedded Design Suite Support
PFL I-Parallel Flash Loader IP core
I-POF/.pof Into Yomhleli File
  • Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, i-Altera, i-Arria, i-Cyclone, i-Enpirion, i-MAX, i-Nios, i-Quartus ne-Stratix amagama namalogo yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo e-US kanye/noma kwamanye amazwe. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo ye-semiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi.
  • Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Okudingekayo

Isifinyezo

QSPI

Incazelo

I-Quad serial peripheral interface

I-RPD/.rpd Idatha yokuhlela engahluziwe
I-SBT Amathuluzi Okwakha Isofthiwe
SOF/.sof Into ye-SRAM File
UART Isamukeli/i-transmitter ehambisanayo yonke indawo
UFM Imemori ye-flash yomsebenzisi

Okudingekayo

  • Ukusetshenziswa kwalo mklamo wesithenjwa kudinga ukuthi ube nezinga elibonisiwe lolwazi noma isipiliyoni kulezi zindawo ezilandelayo:
  • Ulwazi olusebenzayo lwezinhlelo ze-Nios II kanye namathuluzi wokuzakha. Lezi zinhlelo namathuluzi ahlanganisa isofthiwe ye-Quartus® II, i-Qsys, ne-Nios II EDS.
  • Ulwazi lwezindlela zokumisa ze-Intel FPGA namathuluzi, njengokucushwa kwangaphakathi kwe-MAX 10 FPGA, isici sokuthuthukisa isistimu ekude kanye ne-PFL.

Izimfuneko

  • Okulandelayo yizimfuneko zezingxenyekazi zekhompiyutha kanye nesofthiwe yomklamo wereferensi:
  • Ikhithi yokuthuthukisa ye-FPGA engu-MAX 10
  • Inguqulo ye-Quartus II engu-15.0 ene-Nios II EDS
  • Ikhompyutha enomshayeli we-UART osebenzayo nesixhumi esibonakalayo
  • Noma iyiphi kanambambili/hexadecimal file umhleli

I-Reference Design Files

Ithebula 2: Idizayini Files Kufakwe ku-Reference Design

File Igama

Isithombe_sasefekthri

Incazelo

• Idizayini yehadiwe ye-Quartus II file igcinwe ku-CFM0.

• Isithombe/isithombe sasefekthri esizosetshenziswa uma iphutha lenzeka ekulandeni isithombe sohlelo lokusebenza.

uhlelo_lwesithombe_1 • Idizayini yehadiwe ye-Quartus II file izogcinwa ku-CFM1 naku-CFM2.(1)

• Isithombe sokuqala sohlelo lokusebenza esilayishwe kudivayisi.

  1. Kumodi yokumisa izithombe ezimbili zokucushwa, i-CFM1 ne-CFM2 zihlanganiswa zibe isitoreji esisodwa se-CFM.
File Igama

uhlelo_lwesithombe_2

Incazelo

Idizayini yehadiwe ye-Quartus II file okungena esikhundleni se-app_image_2 phakathi nokuthuthukiswa kwesistimu yesilawuli kude.

Remote_system_ upgrade.c Ikhodi yesofthiwe ye-Nios II esebenza njengesilawuli sedizayini yesistimu yokuthuthukisa ukude.
I-Terminal.exe yesilawuli kude • Iyasebenziseka file nge GUI.

• Isebenza njengetheminali yomsingathi ukuze ahlanganyele nekhithi yokuthuthukisa ye-MAX 10 FPGA.

• Ithumela idatha yokuhlela nge-UART.

• Ikhodi yomthombo yalesi siphetho ifakiwe.

Ithebula 3: Master Files Kufakwe ku-Reference Design

Ungasebenzisa lezi master files ngomklamo wereferensi ngaphandle kokuhlanganisa umklamo files.

File Igama

 

factory_application1.pof factory_application1.rpd

Incazelo

Uhlelo lwe-Quartus II file esiqukethe isithombe sefekthri kanye nesithombe sohlelo lokusebenza 1, esizohlelwa sibe yi-CFM0 kanye ne-CFM1 & CFM2 ngokulandelanayo ekuqalenitage.

factory_application2.pof factory_application2.rpd • Uhlelo lwe-Quartus II file esiqukethe isithombe sefekthri nesithombe sohlelo lokusebenza 2.

• Isithombe sohlelo lokusebenza 2 sizokhishwa kamuva ukuze singene esikhundleni sesithombe sohlelo lokusebenza 1 phakathi nokuthuthukiswa kwesistimu yesilawuli kude, esiqanjwe isicelo_ image_2.rpd ngezansi.

isicelo_image_1.rpd Idatha ye-Quartus II yokuhlela eluhlaza file eziqukethe uhlelo lokusebenza 1 kuphela.
isicelo_image_2.rpd Idatha ye-Quartus II yokuhlela eluhlaza file equkethe isithombe sohlelo lokusebenza 2 kuphela.
Nios_application.pof • Ukuhlela file ehlanganisa ukusetshenziswa kwesoftware ye-Nios II .hex file kuphela.

• Ukuze ifakwe ku-flash ye-QSPI yangaphandle.

pfl.sof • I-Quartus II .sof equkethe i-PFL.

• Kuhlelwe ku-QSPI flash kukhithi yokuthuthukisa ye-MAX 10 FPGA.

Incazelo Esebenzayo Yomklamo WereferensiI-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-1

Iphrosesa ye-Nios II Gen2

  • Iphrosesa ye-Nios II Gen2 ekwakhiweni kwereferensi inemisebenzi elandelayo:
  • Ibhasi eliwumpetha ophethe yonke imisebenzi yokuxhumana ngomongo we-Altera On-Chip Flash IP ohlanganisa ukufunda, ukubhala, nokusula.
  • Ihlinzeka nge-algorithm kusofthiwe ukuze yamukele ukusakazwa kwebhithi yezinhlelo kusuka kukhompuyutha engusokhaya futhi iqalise ukulungiswa kabusha ngomongo we-IP Yokucushwa Okubili.
  • Udinga ukusetha kabusha i-vector ye-processor ngokufanele. Lokhu okokuqinisekisa ukuthi iphrosesa ifaka ikhodi yohlelo lokusebenza elungile kusuka ku-UFM noma i-QSPI flash yangaphandle.
  • Qaphela: Uma ikhodi yesicelo se-Nios II inkulu, i-Intel incoma ukuthi ugcine ikhodi yohlelo lokusebenza ku-flash ye-QSPI yangaphandle. Kulo mklamo wereferensi, i-vector yokusetha kabusha ikhomba ku-flash ye-QSPI yangaphandle lapho kugcinwa khona ikhodi yesicelo se-Nios II.

Ulwazi Oluhlobene

  • I-Nios II Gen2 Tutorial Development Hardware
  • Inikeza ulwazi olwengeziwe mayelana nokuthuthukisa i-Nios II Gen2 Processor.

I-Altera On-Chip Flash IP Core

  • I-Altera On-Chip Flash IP core isebenza njengesixhumi esibonakalayo ukuze iphrosesa ye-Nios II yenze umsebenzi wokufunda, ukubhala noma ukusula ku-CFM naku-UFM. I-Altera On-Chip Flash IP core inikeza ikuvumela ukuthi ufinyelele, usule futhi ubuyekeze i-CFM ngokusakaza okusha kokucushwa kwebhithi. Isihleli sepharamitha ye-Altera On-Chip Flash IP sibonisa ububanzi bekheli obunqunywe kusengaphambili kumkhakha ngamunye wenkumbulo.

Ulwazi Oluhlobene

  • I-Altera On-Chip Flash IP Core
  • Inikeza ulwazi olwengeziwe mayelana ne-Altera On-Chip Flash IP Core.

I-Altera Dual Configuration IP Core

  • Ungasebenzisa i-Altera Dual Configuration IP ukuze ufinyelele ibhulokhi yokuthuthukisa isistimu ekude kumadivayisi angu-MAX 10 FPGA. I-Altera Dual Configuration IP core ikuvumela ukuthi uqalise ukulungisa kabusha uma isithombe esisha sesilandiwe.

Ulwazi Oluhlobene

  • I-Altera Dual Configuration IP Core
  • Inikeza ulwazi olwengeziwe mayelana ne-Altera Dual Configuration IP Core

I-Altera UART IP Core

  • I-UART IP core ivumela ukuxhumana kokusakazwa kwezinhlamvu ze-serial phakathi kwesistimu eshumekiwe ku-MAX 10 FPGA nedivayisi yangaphandle. Njengengcweti ye-Avalon-MM, iphrosesa ye-Nios II ixhumana ne-UART IP core, okuyisigqila se-Avalon-MM. Lokhu kuxhumana kwenziwa ngokulawula ukufunda nokubhala kanye namarejista edatha.
  • Umnyombo usebenzisa isikhathi sephrothokholi ye-RS-232 futhi unikeza izici ezilandelayo:
  • izinga le-baud elilungisekayo, ukulinganiswa, ukumisa, nezingcezu zedatha
  • amasiginali okulawula ukugeleza kwe-RTS/CTS angakhethwa

Ulwazi Oluhlobene

  • UART Core
  • Inikeza ulwazi olwengeziwe mayelana ne-UART Core.

I-Generic Quad SPI Controller IP Core

  • I-Generic Quad SPI Controller IP core isebenza njengesixhumi esibonakalayo phakathi kuka-MAX 10 FPGA, iflash yangaphandle kanye nesibani se-QSPI esisebhodini. Umongo unikeza ukufinyelela ku-flash ye-QSPI ngokufunda, ukubhala nokusula imisebenzi.
    Lapho uhlelo lokusebenza lwe-Nios II lukhula ngemiyalo eyengeziwe, i file usayizi we-hex file okukhiqizwa kuhlelo lokusebenza lwe-Nios II luzoba lukhudlwana. Ngale komkhawulo kasayizi othile, i-UFM ngeke ibe nesikhala esanele sokugcina i-hex yohlelo lokusebenza file. Ukuxazulula lokhu, ungasebenzisa i-QSPI flash yangaphandle etholakala kukhithi ye-MAX 10 FPGA Development ukugcina i-hex yohlelo lokusebenza. file.

I-Nios II EDS Software Application Design

  • Idizayini yereferensi ifaka ikhodi yohlelo lokusebenza lwesoftware ye-Nios II elawula ukwakheka kwesistimu yokuthuthukisa ukude. Izimpendulo zekhodi yesofthiwe ye-Nios II kutheminali yomsingathi nge-UART ngokwenza imiyalelo ethile.

Ibuyekeza izithombe zohlelo lokusebenza ukude

  • Ngemva kokudlulisa ukusakaza kancane kokuhlela file usebenzisa i-Remote Terminal, i-software ye-Nios II yakhelwe ukwenza lokhu okulandelayo:
  1. Setha i-Altera On-Chip Flash IP core Control Register ukuze ungavikeli umkhakha we-CFM1 & 2.
  2. Yenza umsebenzi wokusula umkhakha ku-CFM1 naku-CFM2. Isofthiwe iphenya irejista yesimo ye-Altera On-Chip Flash IP core ukuze kuqinisekiswe ukuthi ukusula okuyimpumelelo kuqediwe.
  3. Thola amabhayithi angu-4 okusakaza kancane ngesikhathi kusuka ku-stdin. Okokufaka okujwayelekile nokukhishwayo kungasetshenziswa ukuthola idatha ngokuqondile kutheminali yomsingathi futhi uphrinte okukhiphayo kuyo. Izinhlobo zenketho evamile yokufaka nokuphumayo zingasethwa ngomhleli we-BSP kuthuluzi le-Nios II Eclipse Build.
  4. Ihlehlisa i-oda lebhithi lebhayithi ngayinye.
    • Qaphela: Ngenxa yokucushwa kwe-Altera On-Chip Flash IP Core, yonke ibhayithi yedatha idinga ukuhlehliswa ngaphambi kokuyibhala ku-CFM.
  5. Qala ukubhala amabhayithi angu-4 edatha ngesikhathi esisodwa ku-CFM1 naku-CFM2. Le nqubo iqhubeka kuze kube sekupheleni kokusakazwa kwebhithi yokuhlela.
  6. Iphenya irejista yesimo ye-Altera On-Chip Flash IP ukuze kuqinisekiswe umsebenzi wokubhala ngempumelelo. Ithumela umlayezo ukukhombisa ukuthi ukuthunyelwa kuqediwe.
    • Qaphela: Uma umsebenzi wokubhala wehluleka, itheminali izomisa inqubo yokuthumela i-bit stream futhi ikhiqize umlayezo wephutha.
  7. Isetha Irejista Yokulawula ukuthi ivikele kabusha i-CFM1 ne-CFM2 ukuze kuvinjelwe noma yikuphi ukubhala okungafuneki.

Ulwazi Oluhlobene

  • pof Generation ngokusebenzisa Convert Programming Files ku
  • Inikeza ulwazi mayelana nokudala i-rpd files ngesikhathi sokuguqula izinhlelo files.

Icupha Ukumisa Kabusha ukude

  • Ngemuva kokuthi ukhethe ukucupha ukusebenza kokucushwa kabusha ku-Remote Terminal yokusingatha, uhlelo lokusebenza lwesofthiwe ye-Nios II luzokwenza okulandelayo:
  1. Thola umyalo ovela kokufakwayo okujwayelekile.
  2. Qala ukumisa kabusha ngokubhala okubili okulandelayo:
  • Bhala 0x03 ekhelini le-offset lika-0x01 kumongo we-IP Yokucushwa Okubili. Lo msebenzi ukhipha iphinikhodi ye-CONFIG_SEL engokoqobo futhi usethe Isithombe 1 njengesithombe esilandelayo sokulungiselela ukuqalisa.
  • Bhala 0x01 ekhelini le-offset lika-0x00 kumongo we-IP Yokucushwa Okubili. Lokhu kusebenza kubangela ukucushwa kabusha kwesithombe sohlelo lokusebenza ku-CFM1 ne-CFM2

I-Reference Design WalkthroughI-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-2

Ukukhiqiza Programming Files

  • Kufanele ukhiqize uhlelo olulandelayo files ngaphambi kokuthi ukwazi ukusebenzisa ukuthuthukiswa kwesistimu ekude kukhithi Yokuthuthukisa ye-MAX 10 FPGA:

Okwe-QSPI Programming:

  • sof - sebenzisa i-pfl.sof efakwe ekwakhiweni kwesithenjwa noma ungakhetha ukudala i-.sof ehlukile equkethe idizayini yakho ye-PFL
  • pof - ukucushwa file ekhiqizwe ku-.hex futhi yahlelwa ku-QSPI flash.
  • Ngoba Ukuthuthukiswa Kwesistimu okukude:
  • pof - ukucushwa file ekhiqizwe ku-.sof futhi yahlelwa kufuleshi lwangaphakathi.
  • rpd-iqukethe idatha ye-flash yangaphakathi ehlanganisa izilungiselelo ze-ICB, i-CFM0, i-CFM1 ne-UFM.
  • imephu - ibamba ikheli lomkhakha ngamunye wenkumbulo wezilungiselelo ze-ICB, CFM0, CFM1 kanye ne-UFM.

Iyakhiqiza files ye-QSPI Programming

Ukukhiqiza i-.pof file ngohlelo lwe-QSPI, yenza lezi zinyathelo ezilandelayo:

  1. Yakha iphrojekthi ye-Nios II futhi ukhiqize i-HEX file.
    • Qaphela: Bheka i-AN730: Izindlela Zokuqalisa Iphrosesa ye-Nios II Kumadivayisi angu-MAX 10 ukuze uthole ulwazi mayelana nokwakha iphrojekthi ye-Nios II kanye nokukhiqiza i-HEX file.
  2. Use File menu, chofoza Guqula Ukuhlela Files.
  3. Ngaphansi kohlelo lokuphumayo file, khetha Into Yomhleli File (.pof) ku-Programming file thayipha uhlu.
  4. Ohlwini Lwemodi, khetha i-1-bit Passive Serial.
  5. Ohlwini lwedivayisi yokucushwa, khetha i-CFI_512Mb.
  6. Kwe File ibhokisi legama, cacisa i file igama lohlelo file ufuna ukudala.
  7. Kokufakayo files ukuguqula uhlu, susa Izinketho kanye nomugqa wedatha we-SOF. Chofoza okuthi Engeza Idatha ye-Hex bese kuvela ibhokisi lengxoxo le-Add Hex Data. Ebhokisini elithi Engeza Idatha ye-Hex, khetha ikheli elithi Absolute bese ufaka .hex file ekhiqizwe ku-Nios II EDS Build Tools.
  8. Ngemva kokuthi wonke amasethingi asethiwe, chofoza okuthi Khiqiza ukuze ukhiqize izinhlelo ezihlobene file.

Ulwazi Oluhlobene

I-AN730: Izindlela Zokuqalisa Iphrosesa ye-Nios II Kumadivayisi angu-MAX 10 FPGA
Iyakhiqiza files Yokuthuthukisa Isistimu Ekude

Ukukhiqiza i-.pof, .map ne-.rpd files ukuze uthuthukise isistimu yesilawuli kude, yenza lezi zinyathelo ezilandelayo:

  1. Buyisela i-Factory_image, application_image_1 kanye nesicelo_image_2, futhi uhlanganise yonke imiklamo emithathu.
  2. Khiqiza ezimbili .pof filekuchazwe kulelithebula elilandelayo:
    • Qaphela: Bheka .pof Generation ngokusebenzisa Convert Programming Files ngezinyathelo zokukhiqiza i-.pof files.I-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-3
  3. Vula i-app2.rpd usebenzisa noma yimuphi umhleli we-hex.
  4. Kumhleli we-hex, khetha ibhulokhi kanambambili yedatha esekelwe ekuqaleni nesiphetho ngokubhekisela ku-.map file. I-offset yokuqala nesiphetho yedivayisi ye-10M50 i-0x12000 kanye ne-0xB9FFF ngokulandelanayo. Kopishela leli bhulokhi kwelisha file futhi uyilondoloze ku-.rpd ehlukile file. Le .rpd entsha file iqukethe isithombe sohlelo lokusebenza 2 kuphela.I-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-4

pof Generation ngokusebenzisa Convert Programming Files

Ukuguqula .sof files kuya .pof files, landela lezi zinyathelo:

  1. Use File menu, chofoza Guqula Ukuhlela Files.
  2. Ngaphansi kohlelo lokuphumayo file, khetha Into Yomhleli File (.pof) ku-Programming file thayipha uhlu.
  3. Ohlwini Lwemodi, khetha Ukucushwa Kwangaphakathi.
  4. Kwe File ibhokisi legama, cacisa i file igama lohlelo file ufuna ukudala.
  5. Ukwakha Imephu Yenkumbulo File (.map), vula okuthi Dala Imephu Yenkumbulo File (Yenza ngokuzenzakalelayo okukhiphayo_file.imephu). Imephu .iqukethe ikheli le-CFM ne-UFM nesilungiselelo se-ICB osisetha ngenketho Yolwazi Lokukhetha/Lokuqalisa.
  6.  Ukuze ukhiqize i-Raw Programming Data (.rpd), vula okuthi Dala idatha yokumisa i-RPD (Khiqiza okukhiphayo_file_auto.rpd).
    Ngosizo Lwemephu Yenkumbulo File, ungakwazi ukubona kalula idatha yebhulokhi ngayinye esebenzayo ku-.rpd file. Ungakwazi futhi ukukhipha idatha ye-flash yamathuluzi okuhlela ezinkampani zangaphandle noma ubuyekeze ukucushwa noma idatha yomsebenzisi nge-Altera On-Chip Flash IP.
  7. I-.sof ingangezwa Ngokufaka files ukuguqula uhlu futhi ungakwazi ukwengeza kufika kokubili .sof files.
    • Ngezinjongo zokuthuthukisa isistimu okude, ungagcina idatha yekhasi lokuqala elingu-0 ku-.pof, bese ushintsha idatha yekhasi 1 nge-.sof entsha. file. Ukuze wenze lokhu, udinga ukungeza i-.pof file ekhasini 0, ke
      engeza ikhasi elithi .sof, bese wengeza i-.sof entsha file ku
  8. Ngemva kokuthi wonke amasethingi asethiwe, chofoza okuthi Khiqiza ukuze ukhiqize izinhlelo ezihlobene file.

Ukuhlela i-QSPI

Ukuze uhlele ikhodi yesicelo ye-Nios II ku-flash ye-QSPI, yenza lezi zinyathelo ezilandelayo:

  1. Kukhithi Yokuthuthukisa ye-FPGA engu-MAX 10, shintsha i-MAX10_BYPASSn iye ku-0 ukuze udlule idivayisi ye-VTAP (MAX II) esebhodini.
  2. Xhuma Ikhebuli Yokulanda ye-Intel FPGA (eyayiyi-USB Blaster) ku-JTAG unhlokweni.
  3. Ewindini Lomhleli, chofoza Ukusethwa Kwezingxenyekazi zekhompuyutha bese ukhetha i-USB Blaster.
  4. Ohlwini Lwemodi, khetha okuthi JTAG.
  5. Chofoza inkinobho ethi Thola ngokuzenzakalelayo kufasitelana elingakwesokunxele.
  6. Khetha idivayisi ezohlelwa, bese uchofoza Engeza File.
  7. Khetha ifayela elithi pfl.sof.
  8. Chofoza okuthi Qala ukuze uqale ukuhlela.
  9. Ngemva kokuba ukuhlela kube yimpumelelo, ngaphandle kokucisha ibhodi, chofoza inkinobho ethi Thola Okuzenzakalelayo efasiteleni elingakwesokunxele futhi. Uzobona ukukhanya kwe-QSPI_512Mb kuvela efasiteleni lomhleli.
  10. Khetha idivayisi ye-QSPI, bese uchofoza Engeza File.
  11. Khetha i-.pof file ekhiqizwe ngaphambilini kusuka ku-.hex file.
  12. Chofoza okuthi Qala ukuze uqale ukuhlela iflash ye-QSPI.

Ukuhlela i-FPGA ngesithombe sokuqala kusetshenziswa i-JTAG

Kufanele uhlele i-app1.pof ku-FPGA njengesithombe sokuqala sedivayisi. Ukuze uhlele i-app1.pof ku-FPGA, yenza lezi zinyathelo ezilandelayo:

  1. Ewindini Lomhleli, chofoza Ukusethwa Kwezingxenyekazi zekhompuyutha bese ukhetha i-USB Blaster.
  2. Ohlwini Lwemodi, khetha okuthi JTAG.
  3. Chofoza inkinobho ethi Thola ngokuzenzakalelayo kufasitelana elingakwesokunxele.
  4. Khetha idivayisi ezohlelwa, bese uchofoza Engeza File.
  5. Khetha i-app1.pof.
  6. Chofoza okuthi Qala ukuze uqale ukuhlela.

Ibuyekeza isithombe kanye nokucupha ukumisa kabusha usebenzisa i-UART

Ukuze ulungiselele ukude ikhithi yakho yokuthuthukisa ye-MAX10 FPGA, yenza lezi zinyathelo ezilandelayo:

  1. Qaphela: Ngaphambi kokuthi uqale, qinisekisa lokhu okulandelayo:
    • iphinikhodi ye-CONFIG_SEL ebhodini isethelwe ku-0
    • Imbobo yebhodi ye-UART yebhodi yakho ixhunywe kukhompyutha yakho
    • Vula i-Remote Terminal.exe bese kuvula isixhumi esibonakalayo seSiteshi Esikude.
  2. Chofoza Izilungiselelo kanye newindi lezilungiselelo zembobo ye-serial lizovela.
  3. Setha amapharamitha wetheminali yesilawuli kude ukuze afane nezilungiselelo ze-UART ezikhethwe kumongo we-IP we-Quartus II UART. Ngemva kokuqeda ukusetha, chofoza okuthi KULUNGILE.I-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-5
  4. Cindezela inkinobho ye-nCONFIG kukhithi yokuthuthukisa noma ukhiye wokungena ku-1 ebhokisini lombhalo elithi Thumela, bese ushaya u-Enter.
    • Uhlu lwezinketho zokusebenza luzovela kutheminali, njengoba kuboniswe ngezansi:I-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-6
    • Qaphela: Ukuze ukhethe okuzokwenziwa, cindezela inombolo esebhokisini elithi Thumela, bese ushaya u-Enter.
  5. Ukuze ubuyekeze isithombe sohlelo lokusebenza 1 ngesithombe sohlelo lokusebenza 2, khetha ukusebenza 2. Uzocelwa ukuthi ufake ikheli lokuqala nelokugcina le-CFM1 ne-CFM2.
    • Qaphela: Ikheli eliboniswe kumephu file ihlanganisa izilungiselelo ze-ICB, i-CFM ne-UFM kodwa i-Altera On-Chip
    • I-Flash IP ingafinyelela ku-CFM naku-UFM kuphela. Ngakho-ke, kukhona i-offset yekheli phakathi kwekheli eliboniswe kumephu file kanye nefasitela lepharamitha yepharamitha ye-Altera On-Chip Flash IP.
  6. Ukhiye ekhelini ngokusekelwe ekhelini elicaciswe yifasitela lepharamitha yepharamitha ye-Altera On-Chip Flash IP.I-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-7
    • Ukusula kuzoqala ngokuzenzakalelayo ngemva kokufaka ikheli lokugcina.I-intel-MAX-10-FPGA-Amadivayisi-Ngaphezulu-UART-nge-Nios-II-Processor-FIG-8
  7. Ngemva kokusula ngempumelelo, uzocelwa ukuthi ufake uhlelo .rpd file isithombe sohlelo lokusebenza 2.
    • Ukuze ulayishe isithombe, chofoza okuthi ThumelaFile inkinobho, bese ukhetha i-.rpd equkethe isithombe sohlelo lokusebenza 2 kuphela bese uchofoza okuthi Vula.
    • Qaphela: Ngaphandle kwesithombe sohlelo lokusebenza 2, ungasebenzisa noma yisiphi isithombe esisha ofisa ukusibuyekeza usifake kudivayisi.
    • Inqubo yokubuyekeza izoqala ngokuqondile futhi ungakwazi ukuqapha inqubekelaphambili ngokusebenzisa itheminali. Imenyu yokusebenza izokwazisa ukuthi Kwenziwe futhi manje ungakhetha ukusebenza okulandelayo.
  8. Ukuze uqalise ukumisa kabusha, khetha ukusebenza 4. Ungakwazi ukubona ukuziphatha kwe-LED okubonisa isithombe esihlukile esilayishwe ocingweni.
Isithombe Isimo se-LED (Iyasebenza Phansi)
Isithombe Sefekthri 01010
Isithombe sohlelo lokusebenza 1 10101
Isithombe sohlelo lokusebenza 2 01110

Umlando Wokubuyekeza Idokhumenti

Usuku Inguqulo Izinguquko
Februwari 2017 2017.02.21 Iqanjwe kabusha njenge-Intel.
Juni 2015 2015.06.15 Ukukhishwa kokuqala.

Amadokhumenti / Izinsiza

Intel MAX 10 FPGA Amadivayisi Nge-UART ene-Nios II Processor [pdf] Umhlahlandlela Womsebenzisi
MAX 10 FPGA Amadivayisi Nge-UART ene-Nios II Processor, MAX 10 FPGA Devices, Over UART nge-Nios II Processor, Over UART, Nios II Processor UART, Nios II, Processor UART

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