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intel MAX 10 FPGA Zvishandiso Pamusoro peUART ine Nios II processor

intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-PRODUCT

Product Information

Iyo referensi dhizaini inopa yakapusa application iyo inoshandisa ekutanga kure dhizaini maficha muNios II-based masisitimu eMAX 10 FPGA zvishandiso. Iyo UART interface inosanganisirwa muMAX 10 FPGA Development Kit inoshandiswa pamwe chete neAltera UART IP musimboti kupa iyo kure yekumisikidza kushanda. MAX10 FPGA zvishandiso zvinopa kugona kuchengetedza kusvika kumifananidzo miviri yekumisikidza iyo inowedzera kuwedzera kure kure system yekusimudzira chimiro.

Madimburiko

Kudimbudzira Tsanangudzo
Avalon-MM Avalon Memory-Mapped Configuration Flash memory
CFM Graphical mushandisi interface
ICB Initialization Configuration Bit
MAP/.map Memory Mepu File
Nios II EDS Nios II Embedded Design Suite Tsigiro
PFL Parallel Flash Loader IP musimboti
POF/.pof Programmer Object File
QSPI Quad serial peripheral interface
RPD/.rpd Raw programming data
SBT Software Kuvaka Zvishandiso
SOF/.sof SRAM Chinhu File
CART Yese asynchronous receiver/transmitter
UFM Mushandisi flash memory

Mirayiridzo Yekushandiswa Kwechigadzirwa

Prerequisite

Iko kushandiswa kweiyi referensi dhizaini inoda kuti iwe uve neyakaratidzirwa nhanho yeruzivo kana ruzivo munzvimbo dzinotevera:

Zvinodiwa:

Izvi zvinotevera hardware uye software zvinodiwa zvereferensi dhizaini:

Reference Design Files

File Zita Tsanangudzo
Factory_image Mune mbiri mbiri yekumisikidza mifananidzo yekumisikidza modhi, CFM1 uye CFM2
zvinosanganiswa kuita imwechete CFM yekuchengetedza.
app_image_1 Quartus II hardware dhizaini file iyo inotsiva app_image_2
panguva yekusimudzira hurongwa huri kure.
app_image_2 Nios II software application kodhi inoshanda semutongi we
iyo kure kusimudzira system dhizaini.
Remote_system_upgrade.c
factory_application1.pof Quartus II chirongwa file iyo inosanganisira mufananidzo wefekitari uye
application mufananidzo 1, kuti ugadziriswe muCFM0 uye CFM1 & CFM2
zvakateerana pakutanga stage.
factory_application1.rpd
application_image_1.rpd
application_image_2.rpd
Nios_application.pof

Iyo referensi dhizaini inopa yakapusa application iyo inoshandisa ekutanga kure dhizaini maficha muNios II-based masisitimu eMAX 10 FPGA zvishandiso. Iyo UART interface inosanganisirwa muMAX 10 FPGA Development Kit inoshandiswa pamwe chete neAltera UART IP musimboti kupa iyo kure yekumisikidza kushanda.

Related Information

Reference Design Files

Remote System Simudzira neMAX 10 FPGA Pamusoroview

Neyekure sisitimu yekusimudzira chimiro, zvigadziriso uye bug kugadzirisa kweFPGA zvishandiso zvinogona kuitwa kure. Munzvimbo yakamisikidzwa system, firmware inoda kuvandudzwa nguva nenguva pamusoro pemhando dzakasiyana dzeprotocol, senge UART, Ethernet, uye I2C. Kana iyo yakadzamirirwa sisitimu ichisanganisira iyo FPGA, firmware zvigadziriso zvinogona kusanganisira zvigadziriso zvemufananidzo wehardware paFPGA.
MAX10 FPGA zvishandiso zvinopa kugona kuchengetedza kusvika kumifananidzo miviri yekumisikidza iyo inowedzera kuwedzera kure kure system yekusimudzira chimiro. Imwe yemifananidzo ichave iyo yekudzosera mufananidzo iyo inotakurwa kana kukanganisa kukaitika mumufananidzo wazvino.

Madimburiko

Tafura 1: Rondedzero yeMapfupiso

Tsanangudzo Yekupfupisa
Avalon-MM Avalon Memory-Mapped
CFM Kugadzirisa flash memory
GUI Graphical mushandisi interface
ICB Initialization Configuration Bit
MAP/.map Memory Mepu File
Nios II EDS Nios II Embedded Design Suite Tsigiro
PFL Parallel Flash Loader IP musimboti
POF/.pof Programmer Object File
  • Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus uye Stratix mazwi uye logos zviratidzo zveIntel Corporation kana masangano ayo muUS uye/kana dzimwe nyika. Intel inobvumidza kuita kwayo FPGA uye semiconductor zvigadzirwa kune zvazvino zvirevo zvinoenderana neIntel's standard waranti, asi inochengetera kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi.
  • Mamwe mazita nemhando anogona kunzi zvinhu zvevamwe.

Prerequisite

Kudimbudzira

QSPI

Tsanangudzo

Quad serial peripheral interface

RPD/.rpd Raw programming data
SBT Software Kuvaka Zvishandiso
SOF/.sof SRAM Chinhu File
UART Yese asynchronous receiver/transmitter
UFM Mushandisi flash memory

Prerequisite

  • Iko kushandiswa kweiyi referensi dhizaini inoda kuti iwe uve neyakaratidzirwa nhanho yeruzivo kana ruzivo munzvimbo dzinotevera:
  • Kushanda ruzivo rweNios II masisitimu uye maturusi ekuavaka. Aya masisitimu uye maturusi anosanganisira iyo Quartus® II software, Qsys, uye iyo Nios II EDS.
  • Kuziva kweIntel FPGA kumisikidza nzira uye maturusi, senge MAX 10 FPGA yemukati kumisikidzwa, kure system kusimudzira chimiro uye PFL.

Zvinodiwa

  • Izvi zvinotevera hardware uye software zvinodiwa zvereferensi dhizaini:
  • MAX 10 FPGA yekuvandudza kit
  • Quartus II vhezheni 15.0 ine Nios II EDS
  • Komputa ine inoshanda UART mutyairi uye interface
  • Chero binary / hexadecimal file mupepeti

Reference Design Files

Tafura 2: Design Files Inosanganisirwa muReference Design

File Zita

Factory_image

Tsanangudzo

• Quartus II hardware design file ichachengetwa muCFM0.

• The fallback mufananidzo/fekitari mufananidzo kushandiswa kana kukanganisa kuitika Anwendung mufananidzo mufananidzo.

app_image_1 • Quartus II hardware design file ichachengetwa muCFM1 neCFM2.(1)

• The kwokutanga Anwendung mufananidzo akatakura mudziyo.

  1. Mune mbiri mbiri yekumisikidza mifananidzo yekumisikidza modhi, CFM1 uye CFM2 zvinosanganiswa kune imwechete CFM yekuchengetedza.
File Zita

app_image_2

Tsanangudzo

Quartus II hardware dhizaini file iyo inotsiva app_image_2 panguva yekusimudzira sisitimu.

Remote_system_ upgrade.c Nios II software application kodhi inoshanda semutongi weiyo kure kusimudzira system dhizaini.
Remote Terminal.exe • Zvinogoneka file ine GUI.

• Inoshanda seteminari yekuti mugamuchiri adyidzane neMAX 10 FPGA yekuvandudza kit.

• Inotumira data yepurogiramu kuburikidza neUART.

• Kunobva kodhi iyi terminal inosanganisirwa.

Tafura 3: Tenzi Files Inosanganisirwa muReference Design

Unogona kushandisa idzi tenzi files yereferensi dhizaini pasina kunyora dhizaini files.

File Zita

 

factory_application1.pof factory_application1.rpd

Tsanangudzo

Quartus II chirongwa file iyo ine mufananidzo wefekitori uye chimiro chekushandisa 1, kuti igadziriswe muCFM0 uye CFM1 & CFM2 zvakateerana pakutanga s.tage.

factory_application2.pof factory_application2.rpd • Quartus II purogiramu file iyo ine fekitori mufananidzo uye application mufananidzo 2.

• Chishandiso chemufananidzo 2 chichazotorwa pave paya kuti chitsive chishandiswa chemufananidzo 1 panguva yekuvandudza sisitimu iri kure, ine zita application_ image_2.rpd pazasi.

application_image_1.rpd Quartus II raw programming data file ine application mufananidzo 1 chete.
application_image_2.rpd Quartus II raw programming data file iyo ine application mufananidzo 2 chete.
Nios_application.pof • Kuronga file iyo ine Nios II processor software applica .hex file chete.

• Kuti igadziriswe kuva kunze QSPI flash.

pfl.sof • Quartus II .sof ine PFL.

• Yakarongwa muQSPI flash paMAX 10 FPGA Development kit.

Reference Dhizaini Inoshanda Tsanangurointel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-1

Nios II Gen2 processor

  • Iyo Nios II Gen2 processor mune referensi dhizaini ine anotevera mabasa:
  • Bhazi tenzi rinobata zvese interface mashandiro neAltera On-Chip Flash IP musimboti kusanganisira kuverenga, kunyora, uye kudzima.
  • Inopa algorithm musoftware kuti igamuchire iyo programming bit stream kubva kune inotambira komputa uye inokonzeresa kugadzirisa kuburikidza neDual Configuration IP musimboti.
  • Iwe unofanirwa kuseta reset vector ye processor zvinoenderana. Izvi ndezvekuona kuti processor inobhutsu iyo chaiyo yekushandisa kodhi kubva kuUFM kana yekunze QSPI flash.
  • Cherechedza: Kana iyo Nios II application kodhi yakakura, Intel inokurudzira kuti uchengetedze kodhi yekushandisa mune yekunze QSPI flash. Mune ino referensi dhizaini, iyo reset vector iri kunongedza kune yekunze QSPI flash panochengetwa Nios II kodhi yekushandisa.

Related Information

  • Nios II Gen2 Hardware Development Tutorial
  • Inopa rumwe ruzivo nezve kugadzira Nios II Gen2 processor.

Altera On-Chip Flash IP Core

  • Iyo Altera On-Chip Flash IP yakakosha inoshanda senge interface yeNios II processor kuita kuverenga, kunyora kana kudzima oparesheni kuCFM neUFM. Iyo Altera On-Chip Flash IP musimboti inopa inobvumidza iwe kuti uwane, kudzima uye kugadzirisa iyo CFM neiyo nyowani yekumisikidza bit stream. Iyo Altera On-Chip Flash IP parameter mupepeti inoratidza yakafanotemerwa kero renji kune yega yega chikamu chekurangarira.

Related Information

  • Altera On-Chip Flash IP Core
  • Inopa rumwe ruzivo nezve Altera On-Chip Flash IP Core.

Altera Dual Configuration IP Core

  • Iwe unogona kushandisa iyo Altera Dual Configuration IP musimboti kuti uwane iri kure system yekusimudzira block muMAX 10 FPGA zvishandiso. Iyo Altera Dual Configuration IP musimboti inokutendera kuti utange kugadziridza kana mufananidzo mutsva watorwa.

Related Information

  • Altera Dual Configuration IP Core
  • Inopa rumwe ruzivo nezve Altera Dual Configuration IP Core

Kuchinja UART IP Core

  • Iyo UART IP musimboti inobvumira kutaurirana kwe serial hunhu hova pakati peyakadzamidzirwa sisitimu muMAX 10 FPGA uye yekunze mudziyo. SeAvalon-MM tenzi, iyo Nios II processor inotaurirana neiyo UART IP musimboti, inova Avalon-MM muranda. Kukurukurirana uku kunoitwa nekuverenga nekunyora kutonga uye marejista edata.
  • Iyo yakakosha inoshandisa iyo RS-232 protocol nguva uye inopa zvinotevera maficha:
  • inogadziriswa baud rate, parity, mira, uye data bits
  • sarudzo RTS/CTS kuyerera kwekudzora masaini

Related Information

  • UART Core
  • Inopa rumwe ruzivo nezve UART Core.

Generic Quad SPI Controller IP Core

  • Iyo Generic Quad SPI Controller IP yakakosha inoshanda senge interface pakati peMAX 10 FPGA, iyo yekunze flash uye iri-bhodhi QSPI flash. Iyo yakakosha inopa mukana weiyo QSPI flash kuburikidza nekuverenga, kunyora uye kudzima mashandiro.
    Kana iyo Nios II application ichiwedzera nemimwe mirairo, iyo file saizi yehex file inogadzirwa kubva kuNios II application ichave yakakura. Kupfuura imwe saizi muganho, iyo UFM haizove nenzvimbo yakakwana yekuchengetedza iyo hex yekushandisa file. Kugadzirisa izvi, unogona kushandisa yekunze QSPI flash inowanikwa pane MAX 10 FPGA Development kit kuchengetedza application hex. file.

Iyo Nios II EDS Software Chikumbiro Dhizaini

  • Iyo referensi dhizaini inosanganisira Nios II software application kodhi inodzora kure kure kusimudzira system dhizaini. Iyo Nios II software application kodhi mhinduro kune iyo host terminal kuburikidza neUART nekuita chaiyo mirairo.

Kuvandudza maApplication Images kure

  • Mushure mekunge watumira chirongwa chechirongwa file uchishandisa Remote Terminal, iyo Nios II software application yakagadzirirwa ita zvinotevera:
  1. Seta iyo Altera On-Chip Flash IP musimboti Kudzora Rejista kuti usadzivirire iyo CFM1 & 2 chikamu.
  2. Ita basa rekudzima chikamu paCFM1 uye CFM2. Iyo software inovhota chimiro chekunyoresa cheAltera On-Chip Flash IP musimboti kuona kuti kudzima kwakabudirira kwapera.
  3. Gamuchira 4 bytes yebit stream panguva kubva kustdin. Yakajairwa kupinza uye kubuda inogona kushandiswa kugamuchira data zvakananga kubva kune iyo host terminal uye kudhinda inobuda pairi. Mhando dzeyakajairwa yekupinza uye yekubuda sarudzo inogona kusetwa kuburikidza neBSP Mharidzo muNios II Eclipse Kuvaka chishandiso.
  4. Inodzoreredza bitodha yebhaiti yega yega.
    • Cherechedza: Nekuda kwekugadziriswa kweAltera On-Chip Flash IP Core, yega yega yedata inoda kudzoserwa kumashure isati yanyora muCFM.
  5. Tanga kunyora 4 bytes yedata panguva imwe muCFM1 uye CFM2. Iyi nzira inoenderera kusvika pakupera kweprogramming bit stream.
  6. Inoona rejista yemamiriro eAltera On-Chip Flash IP kuti ive nechokwadi chekubudirira kunyora kushanda. Inotumira meseji kuratidza kuti kutumira kwapera.
    • Cherechedza: Kana basa rekunyora rikatadza, iyo terminal inomisa iyo bit stream kutumira maitiro uye kuburitsa meseji yekukanganisa.
  7. Seta Rejista Yekudzora kuchengetedza zvakare CFM1 uye CFM2 kudzivirira chero kusada kunyora kushanda.

Related Information

  • pof Generation kuburikidza neConvert Programming Filemwanakomana
  • Inopa ruzivo nezve kugadzira rpd files panguva yekushandura purogiramu files.

Kukurudzira Reconfiguration Remote

  • Mushure mekusarudza kukonzeresa mashandiro ekugadzirisa mune inotambira Remote Terminal, iyo Nios II software application ichaita zvinotevera:
  1. Gamuchira murairo kubva kune yakajairwa kuisa.
  2. Tanga kugadziridza zvakare neanotevera maviri ekunyora mashandiro:
  • Nyora 0x03 kune iyo offset kero ye0x01 muDual Configuration IP musimboti. Kuvhiya uku kunodzima pini yeCONFIG_SEL uye yoseta Mufananidzo 1 semufananidzo unotevera wekugadzirisa boot.
  • Nyora 0x01 kune iyo yekubvisa kero ye0x00 muDual Configuration IP musimboti. Kuvhiya uku kunokonzeresa kugadziridzwa kumufananidzo wekushandisa muCFM1 uye CFM2

Reference Design Walkthroughintel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-2

Kugadzira Programming Files

  • Iwe unofanirwa kugadzira iyo inotevera programming files usati wakwanisa kushandisa kure kure system kusimudzira paMAX 10 FPGA Development kit:

YeQSPI Chirongwa:

  • sof-kushandisa iyo pfl.sof inosanganisirwa mureferensi dhizaini kana iwe unogona kusarudza kugadzira akasiyana .sof ine yako wega PFL dhizaini
  • pof-kugadzirisa file yakagadzirwa kubva ku .hex uye yakarongwa muQSPI flash.
  • For kure System Upgrade:
  • pof-kugadzirisa file yakagadzirwa kubva ku .sof uye yakarongedzwa mukati memukati meflash.
  • rpd-ine iyo data yemukati flash iyo inosanganisira ICB marongero, CFM0, CFM1 uye UFM.
  • mepu-inobata iyo kero yeiyo yega yega chikamu chendangariro cheICB marongero, CFM0, CFM1 uye UFM.

Generating files yeQSPI Programming

Kugadzira iyo .pof file yeQSPI programming, ita zvinotevera:

  1. Vaka Nios II Project uye gadzira HEX file.
    • Cherechedza: Tarisa ku AN730: Nios II processor Booting Methods MuMAX gumi Madhivhisi eruzivo nezve kuvaka Nios II chirongwa uye kugadzira HEX. file.
  2. On the File menyu, tinya Convert Programming Files.
  3. Under Output programming file, sarudza Programmer Object File (.pof) muChirongwa file type list.
  4. Mune Modhi rondedzero, sarudza 1-bit Passive Serial.
  5. Mune iyo Configuration mudziyo runyorwa, sarudza CFI_512Mb.
  6. Mu File zita bhokisi, tsanangura iyo file zita rechirongwa file iwe unoda kugadzira.
  7. Mune Input files kushandura rondedzero, bvisa iyo Sarudzo uye SOF data mutsara. Dzvanya Wedzera Hex Data uye Wedzera Hex Data dialog box ionekwe. MuAdd Hex Data box, sarudza Absolute addressing woisa .hex file inogadzirwa kubva kuNios II EDS Vaka Zvishandiso.
  8. Mushure mese kuseta, tinya Gadzira kuti ugadzire zvine hukama hurongwa file.

Related Information

AN730: Nios II processor Booting Nzira muMAX 10 FPGA Zvishandiso
Generating files ye Remote System Upgrade

Kugadzira iyo .pof, .map uye .rpd files yekusimudzira kure system, ita matanho anotevera:

  1. Dzosera iyo Factory_image, application_image_1 uye application_image_2, uye unganidza ese matatu madhizaini.
  2. Gadzira maviri .pof filezvinotsanangurwa patafura inotevera:
    • Cherechedza: Refer .pof Generation kubudikidza Convert Programming Files yematanho ekugadzira .pof files.intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-3
  3. Vhura iyo app2.rpd uchishandisa chero hex mupepeti.
  4. Mumupepeti wehex, sarudza bhinari data block zvichienderana nekutanga uye kupera kwekugadzirisa nekutaura kune .map file. Kutanga uye kupera kwekugadzirisa kweiyo 10M50 mudziyo ndeye 0x12000 uye 0xB9FFF zvichiteerana. Kopa bhuroka iyi kune itsva file uye chengetedza mune imwe .rpd file. Iyi itsva .rpd file ine application mufananidzo 2 chete.intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-4

pof Generation kuburikidza neConvert Programming Files

Kushandura .sof files kune .pof files, tevera matanho aya:

  1. On the File menyu, tinya Convert Programming Files.
  2. Under Output programming file, sarudza Programmer Object File (.pof) muChirongwa file type list.
  3. MuModhi rondedzero, sarudza Internal Configuration.
  4. Mu File zita bhokisi, tsanangura iyo file zita rechirongwa file iwe unoda kugadzira.
  5. Kugadzira Memory Mepu File (.mepu), batidza Gadzira Memori Mepu File (Gadzira otomatiki zvinobuda_file.map). Iyo .mepu ine kero yeCFM neUFM ine ICB marongero aunoseta kuburikidza neOption/Boot Info sarudzo.
  6.  Kuti ugadzire Raw Programming Data (.rpd), batidza Gadzira config data RPD (Gadzira zvinobuda_file_auto.rpd).
    Nerubatsiro rweMemory Mepu File, unogona kuona zviri nyore data kune yega yega inoshanda block mu.rpd file. Iwe unogona zvakare kubvisa iyo flash data kune yechitatu bato hurongwa maturusi kana kugadzirisa iyo kumisikidza kana mushandisi data kuburikidza neAltera On-Chip Flash IP.
  7. Iyo .sof inogona kuwedzerwa kuburikidza neInput files kushandura rondedzero uye unogona kuwedzera kusvika maviri .sof files.
    • Nekuda kwezvinangwa zvekuvandudza masisitimu, unogona kuchengetedza iyo yekutanga peji 0 data mu.pof, uye kutsiva peji 1 data neitsva .sof file. Kuti uite izvi, unofanirwa kuwedzera iyo .pof file papeji 0, ipapo
      add .sof peji, wobva wawedzera iyo itsva .sof file ku
  8. Mushure mese kuseta, tinya Gadzira kuti ugadzire zvine hukama hurongwa file.

Kugadzira iyo QSPI

Kuronga iyo Nios II application kodhi muQSPI flash, ita matanho anotevera:

  1. PaMAX 10 FPGA Development Kit, chinja MAX10_BYPASSn kuenda ku0 kuti upfuure pabhodhi VTAP (MAX II) mudziyo.
  2. Batanidza iyo Intel FPGA Dhawunirodha Cable (yaimbova USB Blaster) kune iyo JTAG musoro.
  3. MuProgrammer hwindo, tinya Hardware Setup uye sarudza USB Blaster.
  4. Muchinyorwa cheModhi, sarudza JTAG.
  5. Dzvanya Auto Detect bhatani pane yekuruboshwe.
  6. Sarudza mudziyo uchagadzirirwa, wobva wadzvanya Wedzera File.
  7. Sarudza pfl.sof.
  8. Dzvanya Tanga kuti utange purogiramu.
  9. Mushure mekunge chirongwa chabudirira, pasina kudzima bhodhi, tinya Auto Detect bhatani pane yekuruboshwe zvakare. Iwe uchaona QSPI_512Mb flash ichionekwa pahwindo remugadziri.
  10. Sarudza QSPI mudziyo, uye tinya Wedzera File.
  11. Sarudza iyo .pof file yakagadzirwa kare kubva .hex file.
  12. Dzvanya Tanga kuti utange kuronga iyo QSPI flash.

Kuronga iyo FPGA neYekutanga Mufananidzo uchishandisa JTAG

Iwe unofanirwa kuronga app1.pof muFPGA semufananidzo wekutanga wemudziyo. Kuronga iyo app1.pof muFPGA, ita zvinotevera:

  1. MuProgrammer hwindo, tinya Hardware Setup uye sarudza USB Blaster.
  2. Muchinyorwa cheModhi, sarudza JTAG.
  3. Dzvanya Auto Detect bhatani pane yekuruboshwe.
  4. Sarudza mudziyo uchagadzirirwa, wobva wadzvanya Wedzera File.
  5. Sarudza iyo app1.pof.
  6. Dzvanya Tanga kuti utange purogiramu.

Kugadziridza Mufananidzo uye Kukonzeresa Reconfiguration uchishandisa UART

Kugadzirisa kure kure MAX10 FPGA yekuvandudza kit, ita zvinotevera:

  1. Cherechedza: Usati watanga, simbisa zvinotevera:
    • iyo CONFIG_SEL pini pabhodhi yakaiswa ku0
    • UART yebhodhi yako yakabatana nekombuta yako
    • Vhura Remote Terminal.exe uye Remote Terminal interface inovhura.
  2. Dzvanya Settings uye Serial port zvigadziriso hwindo richaonekwa.
  3. Seta maparamendi eiyo kure terminal kuti ienderane neiyo UART marongero akasarudzwa muQuartus II UART IP musimboti. Kana kuseta kwapera, tinya OK.intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-5
  4. Dzvanya bhatani renCONFIG pane kit yekuvandudza kana kiyi-mu 1 muSend text box, wobva warova Enter.
    • Rondedzero yesarudzo yekushanda ichaonekwa pane terminal, sezvinoratidzwa pazasi:intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-6
    • Cherechedza: Kuti usarudze oparesheni, kiyi munhamba iri muSend text box, wobva wabaya Enter.
  5. Kuti uvandudze application image 1 ine application image 2, sarudza oparesheni 2. Unozokumbirwa kuisa kero yekutanga neyokupedzisira yeCFM1 neCFM2.
    • Cherechedza: Kero inoratidzwa pamepu file inosanganisira ICB marongero, CFM uye UFM asi iyo Altera On-Chip
    • Flash IP inogona kuwana CFM neUFM chete. Saka, pane kero yekubvisa pakati pekero inoratidzwa pamepu file uye Altera On-Chip Flash IP parameter hwindo.
  6. Kiyi mukero inoenderana nekero yakatsanangurwa neAltera On-Chip Flash IP parameter hwindo.intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-7
    • Kudzima kunobva kwatanga mushure mekuisa kero yekupedzisira.intel-MAX-10-FPGA-Devices-Kupfuura-UART-ine-the-Nios-II-Processor-FIG-8
  7. Mushure mekudzima kwabudirira, unozokurudzirwa kuisa programming .rpd file yemufananidzo wekushandisa 2.
    • Kuti uise mufananidzo, tinya SendFile bhatani, uye wosarudza .rpd ine Anwendung mufananidzo 2 chete uye baya Open.
    • Cherechedza: Kunze kwechishandiso mufananidzo 2, unogona kushandisa chero mufananidzo mutsva waunoda kuvandudza mumudziyo.
    • Iyo yekuvandudza maitiro ichatanga zvakananga uye iwe unogona kutarisa kufambira mberi kuburikidza neiyo terminal. Menyu yekuvhiya ichakurudzira Kuitwa uye iwe unogona ikozvino kusarudza iyo inotevera oparesheni.
  8. Kuti utangezve kugadzirisa, sarudza kushanda 4. Unogona kutarisa maitiro e LED anoratidza mufananidzo wakasiyana wakaiswa muchigadzirwa.
Image Mamiriro e LED (Active Low)
Mufananidzo weFactory 01010
Mufananidzo Wekushandisa 1 10101
Mufananidzo Wekushandisa 2 01110

Document Revision History

Date Version Kuchinja
Kukadzi 2017 2017.02.21 Yakadzorerwa seIntel.
Chikumi 2015 2015.06.15 Kusunungurwa kwekutanga.

Zvinyorwa / Zvishandiso

intel MAX 10 FPGA Zvishandiso Pamusoro peUART ine Nios II processor [pdf] Bhuku reMushandisi
MAX 10 FPGA Midziyo Pamusoro peUART ine Nios II processor, MAX 10 FPGA Midziyo, Pamusoro peUART ine Nios II processor, Pamusoro peUART, Nios II processor UART, Nios II, processor UART.

References

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