intel MAX 10 FPGA Devices Over UART nrog Nios II Processor

Cov ntaub ntawv khoom

Cov qauv siv siv muab ib daim ntawv thov yooj yim uas siv cov chaw taws teeb teeb tsa yooj yim hauv Nios II-based systems rau MAX 10 FPGA li. UART interface suav nrog MAX 10 FPGA Development Kit yog siv ua ke nrog Altera UART IP core los muab cov chaw taws teeb teeb tsa ua haujlwm. MAX10 FPGA cov cuab yeej muab lub peev xwm khaws cia txog li ob lub teeb tsa cov duab uas txuas ntxiv txhim kho cov chaw taws teeb hloov kho tshiab.

Cov ntawv luv

Cov ntawv luv	Kev piav qhia
Avalon-MM	Avalon Memory-Mapped Configuration Flash nco
CFM	Graphical neeg siv interface
ICB	Initialization Configuration Bit
MAP/.map	Daim ntawv qhia nco File
Nios II EDS	Nios II Embedded Design Suite Support
PFL	Parallel Flash Loader IP core
POF/.pof	Programmer Object File
QSPI	Quad serial peripheral interface
RPD/.rpd	Raw programming cov ntaub ntawv
SBT	Software Tsim Cov Cuab Yeej
SOF/.sof	SRAM Object File
CART	Universal asynchronous receiver / transmitter
UFM	Cov neeg siv flash nco

Cov lus qhia siv khoom

Yam yuavtsum tau kawm uantej

Daim ntawv thov ntawm tus qauv siv no xav kom koj muaj qib qhia paub lossis kev paub hauv cov hauv qab no:

Yuav tsum muaj:

Cov hauv qab no yog cov kev cai kho vajtse thiab software rau kev siv tsim:

Kev Tsim Qauv Files

File Lub npe	Kev piav qhia
Factory_ duab	Nyob rau hauv dual configuration duab configuration hom, CFM1 thiab CFM2 tau muab tso rau hauv ib qho CFM cia.
app_image_1	Quartus II kho vajtse tsim file uas hloov app_image_2 thaum lub sij hawm hloov kho tej thaj chaw deb.
app_image_2	Nios II software daim ntawv thov code ua raws li tus maub los rau qhov chaw taws teeb upgrade system tsim.
Chaw taws teeb_system_upgrade.c
factory_application1.pof	Quartus II programming file uas muaj cov duab Hoobkas thiab daim ntawv thov duab 1, yuav tsum tau programmed rau CFM0 thiab CFM1 & CFM2 raws li qhov pib stage.
factory_application1.rpd
application_image_1.rpd
application_image_2.rpd
Nios_application.pof

Cov qauv siv siv muab ib daim ntawv thov yooj yim uas siv cov chaw taws teeb teeb tsa yooj yim hauv Nios II-based systems rau MAX 10 FPGA li. UART interface suav nrog MAX 10 FPGA Development Kit yog siv ua ke nrog Altera UART IP core los muab cov chaw taws teeb teeb tsa ua haujlwm.

Cov ntaub ntawv ntsig txog

Kev Tsim Qauv Files

Chaw taws teeb hloov kho nrog MAX 10 FPGA Tshajview

Nrog rau cov chaw taws teeb hloov kho feature, kev txhim kho thiab kho kab rau FPGA li tuaj yeem ua tau nyob deb. Nyob rau hauv ib puag ncig embedded system, firmware yuav tsum tau hloov kho tas li ntawm ntau hom raws tu qauv, xws li UART, Ethernet, thiab I2C. Thaum lub kaw lus embedded suav nrog FPGA, firmware hloov tshiab tuaj yeem suav nrog hloov kho cov duab kho vajtse ntawm FPGA.
MAX10 FPGA cov cuab yeej muab lub peev xwm khaws cia txog li ob lub teeb tsa cov duab uas txuas ntxiv txhim kho cov chaw taws teeb hloov kho tshiab. Ib qho ntawm cov duab yuav yog cov duab thaub qab uas tau thauj khoom yog tias muaj teeb meem tshwm sim hauv daim duab tam sim no.

Cov ntawv luv

Table 1: Daim ntawv teev npe luv

Abbreviation Description
Avalon-MM	Avalon Memory-Mapped
CFM	Configuration flash nco
GUI	Graphical neeg siv interface
ICB	Initialization Configuration Bit
MAP/.map	Daim ntawv qhia nco File
Nios II EDS	Nios II Embedded Design Suite Support
PFL	Parallel Flash Loader IP core
POF/.pof	Programmer Object File

• Intel Corporation. Txhua txoj cai. Intel, Intel lub logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus thiab Stratix cov lus thiab lub logo yog cov cim lag luam ntawm Intel Corporation lossis nws cov koom tes hauv Asmeskas thiab / lossis lwm lub tebchaws. Intel lav kev ua tau zoo ntawm nws cov FPGA thiab cov khoom lag luam semiconductor rau cov kev qhia tshwj xeeb tam sim no raws li Intel tus qauv kev lees paub, tab sis muaj txoj cai los hloov cov khoom thiab cov kev pabcuam txhua lub sijhawm yam tsis muaj ntawv ceeb toom. Intel xav tias tsis muaj lub luag haujlwm lossis kev lav phib xaub uas tshwm sim los ntawm daim ntawv thov lossis siv cov ntaub ntawv, cov khoom lag luam, lossis cov kev pabcuam uas tau piav qhia hauv no tshwj tsis yog raws li tau pom zoo hauv kev sau ntawv los ntawm Intel. Intel cov neeg siv khoom tau qhia kom tau txais qhov tseeb version ntawm cov cuab yeej tshwj xeeb ua ntej tso siab rau cov ntaub ntawv tshaj tawm thiab ua ntej muab xaj rau cov khoom lossis cov kev pabcuam.
• Lwm lub npe thiab cov npe yuav raug lees paub tias yog cov cuab yeej ntawm lwm tus.

Yam yuavtsum tau kawm uantej

Cov ntawv luv QSPI	Kev piav qhia Quad serial peripheral interface
RPD/.rpd	Raw programming cov ntaub ntawv
SBT	Software Tsim Cov Cuab Yeej
SOF/.sof	SRAM Object File
UART	Universal asynchronous receiver / transmitter
UFM	Cov neeg siv flash nco

Yam yuavtsum tau kawm uantej

• Daim ntawv thov ntawm tus qauv siv no xav kom koj muaj qib qhia paub lossis kev paub hauv cov hauv qab no:
• Ua haujlwm paub txog Nios II systems thiab cov cuab yeej los tsim lawv. Cov tshuab thiab cov cuab yeej no suav nrog Quartus® II software, Qsys, thiab Nios II EDS.
• Kev paub txog Intel FPGA configuration methodologies thiab cov cuab yeej, xws li MAX 10 FPGA configuration nyob rau hauv, tej thaj chaw deb system upgrade feature thiab PFL.

Kev xav tau

• Cov hauv qab no yog cov kev cai kho vajtse thiab software rau kev siv tsim:
• MAX 10 FPGA cov khoom siv txhim kho
• Quartus II version 15.0 nrog Nios II EDS
• Lub khoos phis tawj nrog UART tsav tsheb ua haujlwm thiab interface
• Ib qho binary / hexadecimal file editor

Kev Tsim Qauv Files

Table 2: Tsim Files Muaj nyob rau hauv Reference Design

File Lub npe Factory_ duab	Kev piav qhia • Quartus II kho vajtse tsim file khaws cia hauv CFM0. • Cov duab poob rov qab / lub Hoobkas duab yuav raug siv thaum qhov yuam kev tshwm sim hauv daim ntawv thov duab rub tawm.
app_image_1	• Quartus II kho vajtse tsim file khaws cia hauv CFM1 thiab CFM2.(1) • Thawj daim ntawv thov duab loaded nyob rau hauv lub ntaus ntawv.

1. Nyob rau hauv dual configuration dluab configuration hom, CFM1 thiab CFM2 yog ua ke rau ib tug CFM cia.

File Lub npe app_image_2	Kev piav qhia Quartus II kho vajtse tsim file uas hloov app_image_2 thaum hloov kho tej thaj chaw deb.
Remote_system_ upgrade.c	Nios II software daim ntawv thov code ua raws li tus maub los rau cov chaw taws teeb hloov kho qhov system tsim.
Chaw taws teeb Terminal.exe	• Ua tau file nrog GUI. • Ua haujlwm raws li lub davhlau ya nyob twg rau tus tswv tsev los cuam tshuam nrog MAX 10 FPGA cov khoom tsim kho. • Xa cov ntaub ntawv programming los ntawm UART. • Qhov chaw code rau lub davhlau ya nyob twg no suav nrog.

Table 3: Tswv Files Muaj nyob rau hauv Reference Design

Koj tuaj yeem siv cov tswv no files rau cov qauv siv siv tsis suav cov qauv tsim files.

File Lub npe   factory_application1.pof factory_application1.rpd	Kev piav qhia Quartus II programming file uas muaj lub Hoobkas duab thiab daim ntawv thov daim duab 1, yuav tsum tau programmed rau hauv CFM0 thiab CFM1 & CFM2 feem ntawm thawj stage.
factory_application2.pof factory_application2.rpd	• Quartus II programming file uas muaj cov duab Hoobkas thiab daim ntawv thov duab 2. • Daim ntawv thov duab 2 yuav raug muab rho tawm tom qab los hloov daim ntawv thov daim duab 1 thaum lub sij hawm hloov kho tej thaj chaw deb, hu ua application_ image_2.rpd hauv qab no.
application_image_1.rpd	Quartus II raw programming data file uas muaj daim ntawv thov duab 1 nkaus xwb.
application_image_2.rpd	Quartus II raw programming data file uas muaj daim ntawv thov duab 2 nkaus xwb.
Nios_application.pof	• Programming file uas muaj Nios II processor software applic-tion .hex file nkaus xwb. • Yuav tsum tau programmed rau sab nraud QSPI flash.
pfl ua	• Quartus II .sof muaj PFL. • Programmed rau hauv QSPI flash ntawm MAX 10 FPGA Development kit.

Reference Design Functional Description

Nios II Gen2 Processor

• Nios II Gen2 Processor nyob rau hauv kev siv tsim muaj cov haujlwm hauv qab no:
• Tus tswv tsheb npav uas tswj hwm txhua qhov haujlwm cuam tshuam nrog Altera On-Chip Flash IP core suav nrog nyeem, sau, thiab lwv.
• Muab ib qho algorithm hauv software kom tau txais cov programming me ntsis kwj los ntawm lub khoos phis tawj tswj hwm thiab ua kom rov kho dua los ntawm Dual Configuration IP core.
• Koj yuav tsum teem caij rov pib vector ntawm lub processor raws li. Qhov no yog los xyuas kom meej lub processor khau raj qhov tseeb daim ntawv thov code los ntawm UFM los yog sab nraud QSPI flash.
• Nco tseg: Yog tias Nios II daim ntawv thov code loj, Intel xav kom koj khaws cov ntawv thov code rau sab nraud QSPI flash. Hauv kev tsim qauv siv no, rov pib dua vector yog taw rau sab nraud QSPI flash qhov twg Nios II daim ntawv thov code khaws cia.

Cov ntaub ntawv ntsig txog

• Nios II Gen2 Hardware Development Tutorial
• Muab cov ntaub ntawv ntau ntxiv txog kev tsim Nios II Gen2 Processor.

Altera On-Chip Flash IP Core

• Lub Altera On-Chip Flash IP core ua haujlwm raws li qhov cuam tshuam rau Nios II processor los ua kev nyeem, sau lossis tshem tawm haujlwm rau CFM thiab UFM. Lub Altera On-Chip Flash IP core muab tso cai rau koj nkag mus, tshem tawm thiab hloov kho CFM nrog cov kev teeb tsa tshiab me ntsis. Altera On-Chip Flash IP parameter editor qhia qhov chaw nyob ua ntej rau txhua qhov chaw nco.

Cov ntaub ntawv ntsig txog

• Altera On-Chip Flash IP Core
• Muab cov ntaub ntawv ntau ntxiv txog Altera On-Chip Flash IP Core.

Altera Dual Configuration IP Core

• Koj tuaj yeem siv Altera Dual Configuration IP core nkag mus rau cov chaw taws teeb hloov kho qhov thaiv hauv MAX 10 FPGA li. Lub Altera Dual Configuration IP core tso cai rau koj los ua kom rov tsim kho dua thaum cov duab tshiab tau rub tawm.

Cov ntaub ntawv ntsig txog

• Altera Dual Configuration IP Core
• Muab cov ntaub ntawv ntau ntxiv txog Altera Dual Configuration IP Core

Altera UART IP tub ntxhais

• UART IP core tso cai rau kev sib txuas lus ntawm serial cim kwj ntawm ib qho system embedded hauv MAX 10 FPGA thiab ib qho khoom siv sab nraud. Raws li tus tswv Avalon-MM, Nios II processor sib txuas lus nrog UART IP core, uas yog Avalon-MM qhev. Qhov kev sib txuas lus no yog ua los ntawm kev nyeem ntawv thiab sau ntawv tswj thiab sau cov ntaub ntawv.
• Cov tub ntxhais siv lub sijhawm RS-232 raws tu qauv thiab muab cov yam ntxwv hauv qab no:
• adjustable baud tus nqi, parity, nres, thiab cov ntaub ntawv me me
• yeem RTS/CTS flow control signals

Cov ntaub ntawv ntsig txog

• UART Core
• Muab cov ntaub ntawv ntau ntxiv txog UART Core.

Generic Quad SPI Controller IP Core

• Lub Generic Quad SPI Controller IP core ua haujlwm raws li kev sib txuas ntawm MAX 10 FPGA, sab nraud flash thiab on-board QSPI flash. Lub hauv paus muab kev nkag mus rau QSPI flash los ntawm kev nyeem, sau thiab tshem tawm cov haujlwm.
  Thaum daim ntawv thov Nios II nthuav nrog cov lus qhia ntxiv, cov file loj hex file tsim los ntawm Nios II daim ntawv thov yuav loj dua. Tshaj li qhov txwv me me, UFM yuav tsis muaj chaw txaus los khaws daim ntawv thov hex file. Txhawm rau daws qhov no, koj tuaj yeem siv QSPI flash sab nraud muaj nyob rau ntawm MAX 10 FPGA Development kit los khaws daim ntawv thov hex file.

Nios II EDS Software Application Design

• Cov qauv siv suav nrog Nios II software daim ntawv thov code uas tswj cov chaw taws teeb hloov kho qhov system tsim. Nios II software code daim ntawv thov teb rau tus tswv tsev davhlau ya nyob twg los ntawm UART los ntawm kev ua raws cov lus qhia tshwj xeeb.

Hloov kho daim ntawv thov duab nyob deb

• Tom qab koj tau kis ib tug programming me ntsis kwj file siv lub chaw taws teeb tswj chaw taws teeb, Nios II software daim ntawv thov yog tsim los ua cov hauv qab no:

1. Teem lub Altera On-Chip Flash IP core Control Sau npe kom tsis txhob tiv thaiv CFM1 & 2 sector.
2. Ua haujlwm tshem tawm cov haujlwm ntawm CFM1 thiab CFM2. Lub software ntsuam xyuas cov xwm txheej sau npe ntawm Altera On-Chip Flash IP core kom paub meej tias kev tshem tawm tau tiav lawm.
3. Tau txais 4 bytes ntawm ntsis kwj ib zaug los ntawm stdin. Standard input thiab tso zis yuav siv tau los txais cov ntaub ntawv ncaj qha los ntawm tus tswv lub davhlau ya nyob twg thiab luam tawm mus rau nws. Hom kev tawm tswv yim thiab kev xaiv tso zis tuaj yeem teeb tsa los ntawm BSP Editor hauv Nios II Eclipse Build tool.
4. Rov qab qhov kev txiav txim me ntsis rau txhua byte.
   • Nco tseg: Vim yog kev teeb tsa ntawm Altera On-Chip Flash IP Core, txhua byte ntawm cov ntaub ntawv yuav tsum tau thim rov qab ua ntej sau rau hauv CFM.
5. Pib sau 4 bytes ntawm cov ntaub ntawv ib zaug rau hauv CFM1 thiab CFM2. Cov txheej txheem no txuas ntxiv mus txog thaum kawg ntawm qhov programming me ntsis kwj.
6. Kev xaiv tsa cov xwm txheej ntawm Altera On-Chip Flash IP kom paub meej tias kev sau ntawv ua tiav. Prompts ib cov lus qhia tias kis tau tus mob tiav.
   • Nco tseg: Yog tias kev sau ntawv tsis ua haujlwm, lub davhlau ya nyob twg yuav nres cov txheej txheem xa tawm me ntsis thiab tsim cov lus yuam kev.
7. Teem lub Control Register kom rov tiv thaiv CFM1 thiab CFM2 los tiv thaiv kev ua haujlwm tsis xav sau.

Cov ntaub ntawv ntsig txog

• pof Generation los ntawm Convert Programming Files yog
• Muab cov ntaub ntawv hais txog kev tsim rpd files thaum hloov lub programming files.

Triggering Reconfiguration Remotely

• Tom qab koj xaiv qhov kev teeb tsa rov ua haujlwm nyob rau hauv tus tswv chaw taws teeb chaw taws teeb, Nios II software thov yuav ua cov hauv qab no:

1. Tau txais cov lus txib los ntawm tus qauv nkag.
2. Pib lub reconfiguration nrog ob txoj haujlwm sau hauv qab no:

• Sau 0x03 rau qhov chaw nyob offset ntawm 0x01 hauv Dual Configuration IP core. Qhov kev ua haujlwm no overwrites lub cev CONFIG_SEL tus pin thiab teeb duab 1 raws li cov duab kos duab tom ntej.
• Sau 0x01 rau qhov chaw nyob offset ntawm 0x00 hauv Dual Configuration IP core. Qhov kev ua haujlwm no ua rau rov tsim kho dua rau daim ntawv thov duab hauv CFM1 thiab CFM2

Reference Design Walkthrough

Tsim Programming Files

• Koj yuav tsum tsim cov programming hauv qab no files ua ntej tuaj yeem siv cov chaw taws teeb hloov kho tshiab ntawm MAX 10 FPGA Development cov khoom siv:

Rau QSPI Programming:

• sof- siv lub pfl.sof suav nrog hauv cov qauv siv los yog koj tuaj yeem xaiv los tsim qhov sib txawv .sof uas muaj koj tus kheej PFL tsim
• pof - configuration file tsim los ntawm .hex thiab programmed rau hauv QSPI flash.
• Rau Tej thaj chaw deb System Upgrade:
• pof - configuration file tsim los ntawm .sof thiab programmed rau hauv lub flash.
• rpd — muaj cov ntaub ntawv rau sab hauv flash uas suav nrog ICB nqis, CFM0, CFM1 thiab UFM.
• map-ua qhov chaw nyob rau txhua lub cim xeeb ntawm ICB nqis, CFM0, CFM1 thiab UFM.

Tsim files rau QSPI Programming

Los tsim lub .pof file rau QSPI programming, ua cov kauj ruam hauv qab no:

1. Tsim Nios II Project thiab tsim HEX file.
   • Nco tseg: Xa mus rau AN730: Nios II Processor Booting Methods Hauv MAX 10 Cov Khoom Siv rau cov ntaub ntawv hais txog kev tsim Nios II project thiab tsim HEX file.
2. Nyob ntawm File ntawv qhia zaub mov, nyem Hloov Programming Files.
3. Nyob rau hauv Output programming file, xaiv Programmer Object File (.pof) hauv Programming file hom ntawv.
4. Hauv hom npe, xaiv 1-ntsis Passive Serial.
5. Hauv daim ntawv teev cov khoom siv Configuration, xaiv CFI_512Mb.
6. Hauv File lub npe lub thawv, qhia lub file npe rau programming file koj xav tsim.
7. Hauv Input files los hloov cov npe, tshem tawm Cov Kev Xaiv thiab SOF cov ntaub ntawv kab. Nyem Ntxiv Hex Cov Ntaub Ntawv thiab ntxiv Hex Data dialog box tshwm. Hauv lub thawv Ntxiv Hex Cov Ntaub Ntawv, xaiv qhov chaw nyob tsis raug thiab ntxig rau .hex file tsim los ntawm Nios II EDS Tsim Cov Cuab Yeej.
8. Tom qab txhua qhov teeb tsa tau teeb tsa, nyem Tsim los tsim cov programming ntsig txog file.

Cov ntaub ntawv ntsig txog

AN730: Nios II Processor Booting Methods hauv MAX 10 FPGA Devices
Tsim files rau tej thaj chaw deb System Upgrade

Txhawm rau tsim cov .pof, .map thiab .rpd files rau kev hloov kho tej thaj chaw deb, ua cov kauj ruam hauv qab no:

1. Restore lub Factory_image, application_image_1 thiab application_image_2, thiab suav tag nrho peb tus qauv.
2. Tsim ob .pof files tau piav qhia hauv cov lus hauv qab no:
   • Nco tseg: Xa mus rau .pof tiam dhau los ntawm Hloov Programming Files rau cov kauj ruam ntawm kev tsim .pof files.
3. Qhib lub app2.rpd siv tej hex editor.
4. Hauv hex editor, xaiv binary cov ntaub ntawv thaiv raws li qhov pib thiab xaus offset los ntawm kev xa mus rau .map file. Qhov pib thiab xaus offset rau 10M50 ntaus ntawv yog 0x12000 thiab 0xB9FFF feem. Luam qhov thaiv no mus rau qhov tshiab file thiab txuag nws hauv qhov sib txawv .rpd file. Qhov nov .rpd file muaj daim ntawv thov duab 2 nkaus xwb.

pof Generation los ntawm Convert Programming Files

convert .sof files .pof files, ua raws li cov kauj ruam no:

1. Nyob ntawm File ntawv qhia zaub mov, nyem Hloov Programming Files.
2. Nyob rau hauv Output programming file, xaiv Programmer Object File (.pof) hauv Programming file hom ntawv.
3. Hauv hom npe, xaiv Internal Configuration.
4. Hauv File lub npe lub thawv, qhia lub file npe rau programming file koj xav tsim.
5. Tsim ib daim ntawv qhia nco File (.map), tig rau Tsim Daim Ntawv Qhia Memory File (Auto generate output_file.map). Daim ntawv qhia .map muaj qhov chaw nyob ntawm CFM thiab UFM nrog rau ICB qhov chaw uas koj tau teeb tsa los ntawm Kev Xaiv/Boot Info xaiv.
6.  Txhawm rau tsim cov ntaub ntawv Raw Programming (.rpd), tig rau Tsim cov ntaub ntawv teeb tsa RPD (Tsim cov zis tawm_file_auto.rpd).
   Nrog kev pab ntawm Memory Map File, koj tuaj yeem txheeb xyuas cov ntaub ntawv yooj yim rau txhua qhov ua haujlwm thaiv hauv .rpd file. Koj tuaj yeem rho tawm cov ntaub ntawv flash rau lwm tus neeg siv cov cuab yeej programming lossis hloov kho cov teeb tsa lossis cov ntaub ntawv siv los ntawm Altera On-Chip Flash IP.
7. Lub .sof tuaj yeem muab ntxiv los ntawm Cov Lus Qhia files hloov npe thiab koj tuaj yeem ntxiv txog ob .sof files.
   • Rau cov chaw taws teeb hloov kho lub hom phiaj, koj tuaj yeem khaws cov nplooj ntawv qub 0 cov ntaub ntawv hauv .pof, thiab hloov nplooj ntawv 1 cov ntaub ntawv tshiab nrog .sof file. Txhawm rau ua qhov no, koj yuav tsum ntxiv .pof file xa 0,pa
     ntxiv .sof nplooj ntawv, ces ntxiv qhov tshiab .sof file rau
8. Tom qab txhua qhov teeb tsa tau teeb tsa, nyem Tsim los tsim cov programming ntsig txog file.

Programming QSPI

Txhawm rau program Nios II daim ntawv thov code rau hauv QSPI flash, ua cov kauj ruam hauv qab no:

1. Ntawm MAX 10 FPGA Kev Txhim Kho Cov Khoom Siv, hloov MAX10_BYPASSn mus rau 0 kom dhau los ntawm on-board VTAP (MAX II) ntaus ntawv.
2. Txuas Intel FPGA Download Cable (yav tas los USB Blaster) rau JTAG taub hau.
3. Hauv Programmer qhov rais, nyem Hardware Setup thiab xaiv USB Blaster.
4. Hauv hom npe, xaiv JTAG.
5. Nyem Pib Tshawb Pom khawm ntawm sab laug pane.
6. Xaiv lub cuab yeej yuav tsum tau programmed, thiab nyem Ntxiv File.
7. Xaiv lub pfl.sof.
8. Nyem Start kom pib programming.
9. Tom qab programming ua tiav, yam tsis tau tig-tawm ntawm lub rooj tsavxwm, nyem Auto Detect khawm ntawm sab laug pane dua. Koj yuav pom QSPI_512Mb flash tshwm nyob rau hauv lub qhov rais programmer.
10. Xaiv lub QSPI ntaus ntawv, thiab nyem Ntxiv File.
11. Xaiv lub .pof file generated dhau los ntawm .hex file.
12. Nyem Pib pib programming QSPI flash.

Programming FPGA nrog Initial Image siv JTAG

Koj yuav tsum program app1.pof rau hauv FPGA raws li cov cuab yeej pib duab. Txhawm rau program app1.pof rau hauv FPGA, ua cov kauj ruam hauv qab no:

1. Hauv Programmer qhov rais, nyem Hardware Setup thiab xaiv USB Blaster.
2. Hauv hom npe, xaiv JTAG.
3. Nyem Pib Tshawb Pom khawm ntawm sab laug pane.
4. Xaiv lub cuab yeej yuav tsum tau programmed, thiab nyem Ntxiv File.
5. Xaiv lub app1.pof.
6. Nyem Start kom pib programming.

Hloov kho cov duab thiab rov tsim kho dua tshiab siv UART

Txhawm rau txhim kho koj lub MAX10 FPGA cov khoom siv txhim kho, ua cov kauj ruam hauv qab no:

1. Nco tseg: Ua ntej koj pib, xyuas cov hauv qab no:
   • tus CONFIG_SEL tus pin ntawm lub rooj tsavxwm yog teem rau 0
   • koj lub rooj tsavxwm UART chaw nres nkoj txuas nrog koj lub computer
   • Qhib tej thaj chaw deb Terminal.exe thiab tej thaj chaw deb Terminal interface qhib.
2. Nyem Chaw thiab Serial chaw nres nkoj qhov rai yuav tshwm.
3. Teem cov kev txwv tsis pub dhau lub davhlau ya nyob twg kom phim UART qhov chaw xaiv hauv Quartus II UART IP core. Tom qab kev teeb tsa tiav, nyem OK.
4. Nias lub pob nCONFIG ntawm cov khoom siv txhim kho lossis tus yuam sij-hauv 1 hauv Xa ntawv lub thawv, thiab tom qab ntawd ntaus Enter.
   • Ib daim ntawv teev cov kev xaiv ua haujlwm yuav tshwm sim ntawm lub davhlau ya nyob twg, raws li qhia hauv qab no:
   • Nco tseg: Txhawm rau xaiv qhov kev ua haujlwm, nyem rau ntawm tus lej hauv Xa ntawv lub thawv, thiab tom qab ntawd ntaus Enter.
5. Txhawm rau hloov kho daim ntawv thov daim duab 1 nrog daim ntawv thov duab 2, xaiv cov haujlwm 2. Koj yuav raug ceeb toom kom ntxig qhov chaw pib thiab xaus ntawm CFM1 thiab CFM2.
   • Nco tseg: Qhov chaw nyob qhia hauv daim ntawv qhia file suav nrog ICB nqis, CFM thiab UFM tab sis Altera On-Chip
   • Flash IP tuaj yeem nkag mus rau CFM thiab UFM nkaus xwb. Li no, muaj qhov chaw nyob offset ntawm qhov chaw nyob uas qhia hauv daim ntawv qhia file thiab Altera On-Chip Flash IP parameter qhov rai.
6. Qhov tseem ceeb hauv qhov chaw nyob raws li qhov chaw nyob tau teev tseg los ntawm Altera On-Chip Flash IP parameter qhov rai.
   • Erase yuav pib pib tom qab koj nkag mus rau qhov chaw nyob kawg.
7. Tom qab tshem tawm ua tiav, koj yuav raug ceeb toom kom nkag mus rau programming .rpd file rau daim ntawv thov duab 2.
   • Txhawm rau upload duab, nyem XaFile khawm, thiab tom qab ntawd xaiv .rpd uas muaj daim ntawv thov duab 2 nkaus xwb thiab nyem Qhib.
   • Nco tseg: Lwm yam tshaj li daim ntawv thov duab 2, koj tuaj yeem siv cov duab tshiab uas koj xav hloov kho rau hauv lub cuab yeej.
   • Cov txheej txheem hloov tshiab yuav pib ncaj qha thiab koj tuaj yeem saib xyuas qhov kev nce qib hauv lub davhlau ya nyob twg. Cov ntawv qhia ua haujlwm yuav hais kom Ua tiav thiab tam sim no koj tuaj yeem xaiv txoj haujlwm tom ntej.
8. Txhawm rau ua kom rov tsim kho dua tshiab, xaiv cov haujlwm 4. Koj tuaj yeem soj ntsuam tus cwj pwm LED qhia txog cov duab sib txawv uas tau ntim rau hauv lub cuab yeej.

Duab	LED Status (Active Low)
Lub Hoobkas duab	01010
Daim ntawv thov duab 1	10101
Daim ntawv thov duab 2	01110

Cov ntaub ntawv kho dua tshiab

Hnub tim	Version	Hloov
Lub Ob Hlis 2017	2017.02.21	Rebranded li Intel.
Lub Rau Hli 2015	2015.06.15	Kev tso tawm thawj zaug.

Cov ntaub ntawv / Cov ntaub ntawv

intel MAX 10 FPGA Devices Over UART nrog Nios II Processor [ua pdf] Cov neeg siv phau ntawv qhia MAX 10 FPGA Devices Over UART nrog Nios II Processor, MAX 10 FPGA Devices, Tshaj UART nrog Nios II Processor, Tshaj UART, Nios II Processor UART, Nios II, Processor UART

Cov ntaub ntawv

• Cov neeg siv phau ntawv