MICROCHIP Kukanganisa Kuona uye Kugadzirisa paRTG4 LSRAM Memory

Revision History

Nhoroondo yekudzokorora inotsanangura shanduko dzakaitwa mugwaro. Kuchinja kwacho kunorongwa nekudzokorora, kutanga nebhuku razvino uno.

Kudzokorora 4.0
Inotevera ipfupiso yeshanduko dzakaitwa mudzokororo iyi.

• Yakagadziridza gwaro reLibero SoC v2021.2.
• Yakawedzerwa Appendikisi 1: Kuronga Chishandiso Uchishandisa FlashPro Express, peji 14.
• Yakawedzerwa Appendikisi 2: Running the TCL Script, peji 16.
• Yakabvisa mareferensi kunhamba dzeshanduro yeLibero.

Kudzokorora 3.0
Yakagadziridza gwaro reLibero v11.9 SP1 software kuburitswa.

Kudzokorora 2.0
Yakagadziridza gwaro reLibero v11.8 SP2 software kuburitswa.

Kudzokorora 1.0
Kuburitswa kwekutanga kwegwaro iri.

Kukanganisa Kuonekwa uye Kugadzirisa paRTG4 LSRAM Memory

Iyi referensi dhizaini inotsanangura kutadza kuona uye kugadzirisa (EDAC) kugona kweRTG4™ FPGA LSRAMs. Muchiitiko chimwechete chakagumbura (SEU) nharaunda inokonzeresa, RAM inotarisana nekukanganisa kwenguva pfupi kunokonzerwa nemaion anorema. Zvikanganiso izvi zvinogona kuonekwa uye kugadziriswa nekushandisa kukanganisa kugadzirisa macode (ECCs). Iwo RTG4 FPGA RAM mabhuroko ane akavakirwa-mukati maEDAC controller kuti aburitse macode ekugadzirisa kukanganisa ekugadzirisa 1-bit kukanganisa kana kuona 2-bit kukanganisa.

Kana kukanganisa kwe-1-bit kukaonekwa, mutongi weEDAC anogadzirisa kukanganisa bhiti uye oisa mureza wekugadzirisa kukanganisa (SB_CORRECT) kuenda kumusoro. Kana kukanganisa kwe2-bit kukaonekwa, mutongi weEDAC anoseta mureza wekuona kukanganisa (DB_DETECT) kuti ushande kumusoro.
Kuti uwane rumwe ruzivo nezve RTG4 LSRAM EDAC mashandiro, tarisa kuUG0574: RTG4 FPGA Fabric

User Guide.
Mune ino referensi dhizaini, iyo 1-bit kukanganisa kana 2-bit kukanganisa inounzwa kuburikidza neSmartDebug GUI. EDAC inoonekwa ichishandisa graphical mushandisi interface (GUI), uchishandisa iyo UART interface kuwana iyo LSRAM yedata rekuverenga / kunyora, Libero® System-on-Chip (SoC) SmartDebug (JTAG) inoshandiswa kubaya zvikanganiso muLSRAM ndangariro.

Zvido zvekugadzira
Tafura 1 inodonongodza mareferensi dhizaini zvinodiwa pakumhanyisa RTG4 LSRAM EDAC demo.

Tafura 1 • Zvido zvekugadzira

Software

• Libero SoC
• FlashPro Express
• SmartDebug
• Gamuchira madhiraivha ePC USB kune vatyairi veUART

Cherechedza: Libero SmartDesign uye dhizaini yekumisikidza inoratidzwa mugwaro iri ndeyekuenzanisira chete.
Vhura iyo Libero dhizaini kuti uone zvichangobva kuitika.

Prerequisites
Usati watanga:
Dhawunirodha uye isa Libero SoC (sezvinoratidzwa mu websaiti yeiyi dhizaini) paPC inotambira kubva kunzvimbo inotevera: https://www.microsemi.com/product-directory/design-resources/1750-libero-soc

Demo Dhizaini
Dhawunirodha demo dhizaini files kubva kuMicrosemi websaiti pa: http://soc.microsemi.com/download/rsc/?f=rtg4_dg0703_df

Iyo demo dhizaini files dzinosanganisira:

• Libero SoC chirongwa
• GUI Installer
• Programming files
• Readme.txt file
• TCL_Scripts

Iyo GUI application pane inotambira PC nyaya inoraira kune RTG4 mudziyo kuburikidza ne USB-UART interface. Iyi UART interface yakagadzirwa neCoreUART, inova ine logic IP kubva kuLibero SoC IP catalog. Iyo CoreUART IP mumucheka weRTG4 inogamuchira mirairo uye inoiendesa kune yekuraira decoder logic. Iyo yekuraira decoder logic inosarudza kuverenga kana kunyora kuraira, iyo inoitwa uchishandisa memory interface logic.

Iyo memory interface block inoshandiswa kuverenga / kunyora uye kutarisa iyo LSRAM kukanganisa mireza. Iyo yakavakirwa-mukati EDAC inogadzirisa 1-bit kukanganisa uchiverenga kubva kuLSRAM uye inopa yakagadziridzwa data kune mushandisi interface asi hainyore yakagadziridzwa data kuLSRAM. Iyo yakavakirwa-mukati LSRAM EDAC haiite yekukwesha chimiro. Iyo demo dhizaini inoshandisa scrub logic, iyo inotarisisa iyo 1-bit kururamisa mureza uye inogadziridza iyo LSRAM neyakagadziridzwa data kana kamwe kadiki kukanganisa kukaitika.
SmartDebug GUI inoshandiswa kubaya 1-bit kana 2-bit kukanganisa muLSRAM data.
Mufananidzo 1 unoratidza iyo yepamusoro-level block dhizaini yeRTG4 LSRAM EDAC demo dhizaini.

Mufananidzo 1 • Yepamusoro-Level Block Diagram

Izvi zvinotevera demo dhizaini zvigadziriso:

1. Iyo LSRAM yakagadzirirwa × 18 modhi uye EDAC inogoneswa nekubatanidza LSRAMs ECC_EN chiratidzo kusvika kumusoro.
   Cherechedza: Iyo LSRAM EDAC inotsigirwa chete × 18 uye × 36 modhi.
2. Iyo CoreUART IP yakarongedzerwa kuti itaurirane neanogamuchira PC application pachiyero che115200 baud.
3. Iyo RTG4FCCCECALIB_C0 yakagadziridzwa kuti iwachise iyo CoreUART uye mamwe machira logic pa80 MHz.

Features
Izvi zvinotevera demo dhizaini maficha:

• Verenga unyore kuLSRAM
• Baya 1-bit uye 2-bit kukanganisa uchishandisa SmartDebug
• Ratidza 1-bit uye 2-bit kukanganisa kuverenga kukosha
• Zvigadziro zvekubvisa kukanganisa kuverenga kukosha
• Gonesa kana kudzima iyo memory kukwesha logic

Tsanangudzo
Iyi demo dhizaini inosanganisira kuitwa kweanotevera mabasa:

• Kutanga uye kuwana LSRAM
  Iyo yekurangarira interface logic inoshandiswa mumucheka logic inogamuchira murairo wekutanga kubva kuGUI uye inotanga yekutanga 256 nzvimbo dzekuyeuka dzeLSRAM nekuwedzera data. Inoitawo mabasa ekuverenga nekunyora kune 256 nzvimbo dzekurangarira dzeLSRAM nekugamuchira kero uye data kubva kuGUI. Kuti uverenge mashandiro, dhizaini inotora data kubva kuLSRAM uye inopa kuGUI kuti iratidze. Tarisiro ndeyekuti dhizaini haizokonzerese zvikanganiso usati washandisa SmartDebug.

Cherechedza: Uninitialized memory nzvimbo dzinogona kunge dziine maitiro asina kujairika, uye SmartDebug inogona kuratidza imwe-bit kana kaviri-bit zvikanganiso munzvimbo idzodzo.

• Kupinza 1-bit kana 2-bit kukanganisa
  SmartDebug GUI inoshandiswa kubaya 1 bit kana 2-bit zvikanganiso munzvimbo yakataurwa yekurangarira yeLSRAM. Mabasa anotevera anoitwa uchishandisa SmartDebug kubaya 1-bit uye 2-bit zvikanganiso kuLSRAM:
  • Vhura SmartDebug GUI, tinya Debug FPGA Array.
  • Enda kuMemory Blocks tab, sarudza muenzaniso wekuyeuka, uye tinya-kurudyi Wedzera.
  • Kuti uverenge memory block, tinya Read Block.
  • jekiseni kamwechete-bit kana kaviri-bit kukanganisa mune chero nzvimbo yeLSRAM yehumwe kudzika.
  • Kuti unyore kunzvimbo yakagadziridzwa, tinya Nyora Block.
    Munguva yeLSRAM kuverenga nekunyora kushanda kuburikidza neSmartDebug (JTAG) interface, mutongi weEDAC anodarika uye haaverenge mabhiti eECC ekushanda kwekunyora munhanho e.
• Error Kuverenga
  8-bit macounter anoshandiswa kupa chikanganiso kuverenga uye idhizaini mune yejira yelogic kuverenga 1-bit kana 2-bit kukanganisa. Iyo yekuraira decoder logic inopa huwandu hwekuverenga kune iyo GUI paunogamuchira mirairo kubva kuGUI.

Chimiro Chekuvhara
Mune iyi demo dhizaini, pane imwe wachi domain. Iyo yemukati 50 MHz oscillator inotyaira iyo RTG4FCCC, iyo inowedzera kutyaira RTG4FCCCECALIB_C0. Iyo RTG4FCCCECALIB_C0 inogadzira wachi ye80 MHz inopa wachi sosi kuCOREUART, cmd_decoder, TPSRAM_ECC, uye RAM_RW modules.
Iyi inotevera nhamba inoratidza clocking chimiro chedemo dhizaini.

Mufananidzo 2 • Chimiro Chekuvhara

Reset Structure
Mune iyi demo dhizaini, siginecha yekusetazve kuCOREUART, cmd_decoder, uye RAM_RW modules inopihwa kuburikidza neLOCK port yeRTG4FCCCECALIB_C0. Iyi inotevera nhamba inoratidza reset chimiro chedemo dhizaini.

Mufananidzo 3 • Reset Structure

Kugadzira iyo Demo Dhizaini
Zvikamu zvinotevera zvinotsanangura nzira yekumisikidza iyo RTG4 Development Kit uye GUI yekumhanyisa demo dhizaini.

Jumper Settings

1. Batanidza majumper paRTG4 Development Kit, sezvakaratidzwa muTable 2.
   Tafura 2 • Jumper Settings

   Jumper	Pini (Kubva)	Pini (Ku)	Comments
   J11, J17, J19, J21, J23, J26, J27, J28	1	2	Default
   J16	2	3	Default
   J32	1	2	Default
   J33	1	3	Default
   	2	4

   Cherechedza: Dzima switch yemagetsi, SW6, uchibatanidza majumper.

2. Batanidza tambo ye USB (mini USB kuType-A USB tambo) kuJ47 yeRTG4 Development Kit uye kumwe kumagumo kwetambo kuchiteshi che USB chePC inotambira.
3. Ita shuwa kuti USB kune UART madhiraivha mabhiriji anongoonekwa otomatiki. Izvi zvinogona kusimbiswa mumudziyo maneja wePC inotambira.
   Mufananidzo 4 unoratidza USB 2.0 serial port zvivakwa uye yakabatana COM31 uye USB serial converter C.

Mufananidzo 4 • USB kuUART Bridge Driver

Cherechedza: Kana iyo USB kune UART bhiriji madhiraivha asina kuisirwa, dhawunirodha uye isa madhiraivha kubva www.microsemi.com//documents/CDM_2.08.24_WHQL_Certified.zip

Mufananidzo 5 unoratidza kuseta kwebhodhi yekumhanyisa demo reEDAC paRTG4 Development Kit.

Kuronga iyo Demo Dhizaini

1. Tanga Libero SOC software.
2. Kuronga iyo RTG4 Development Kit nebasa file inopiwa sechikamu chekugadzira files uchishandisa FlashPro Express software, tarisa kuAppendix 1: Kugadzira Chishandiso Uchishandisa FlashPro Express,peji 14.
   Cherechedza: Kana iyo purogiramu yaitwa nebasa file kuburikidza neFlashPro Express software, enda kuEDAC Demo GUI, peji 9. Zvikasadaro, enda kunhanho inotevera.
3. Mune Libero dhizaini inoyerera, tinya Run Chirongwa chiito.
4. Kana Kuronga kwapera, green tick inoonekwa pamberi pe 'Run Chirongwa chiitiko' inoratidza yakabudirira hurongwa hwedhizaini yedhizaini.

EDAC Demo GUI
Iyo EDAC demo inopihwa mushandisi-ane hushamwari GUI, sezvakaratidzwa muFigure 7, iyo inoshanda paPC inotambira, iyo inotaurirana neRTG4 Development Kit. Iyo UART inoshandiswa seyakadzika yekutaurirana protocol pakati peiyo inotambira PC neRTG4 Development Kit.

Iyo GUI ine zvikamu zvinotevera:

1. COM port sarudzo yekumisikidza iyo UART yekubatanidza kuRTG4 FPGA ine 115200 baud rate.
2. LSRAM Memory Nyora: Kunyora iyo 8-bit data kune yakatsanangurwa LSRAM memory kero.
3. Memory Scrubbing: Kugonesa kana kudzima pfungwa yekukwesha.
4. LSRAM Memory Read: Kuverenga iyo 8-bit data kubva kune yakatsanangurwa LSRAM memory kero.
5. Kuverengera Kukanganisa: Inoratidza nhamba yekukanganisa uye inopa sarudzo yekubvisa iyo counter kukosha kune zero.
6. 1-bit Kukanganisa Kuverenga: Inoratidza 1-bit kukanganisa kuverenga uye inopa sarudzo yekubvisa iyo counter kukosha kune zero.
7. 2-bit Kukanganisa Kuverenga: Inoratidza 2-bit kukanganisa kuverenga uye inopa sarudzo yekubvisa iyo counter kukosha kune zero.
8. Log Data: Inopa iyo mamiriro ruzivo rwese kuvhiya kunoitwa uchishandisa iyo GUI.

Kumhanya Demo
Matanho anotevera anotsanangura maitiro ekuita demo:

1. Enda ku \v1.2.2\v1.2.2\Exe wodzvanya kaviri EDAC_GUI.exe sezvinoratidzwa paMufananidzo 8.
2. Sarudza iyo COM31 chiteshi kubva pane iyo rondedzero uye tinya Batanidza.

Single bit error injection uye kugadzirisa

1. Mune yakapihwa Libero dhizaini, tinya kaviri paSmartDebug Dhizaini mukuyerera kwedhizaini.
2. MuSmartDebug GUI, tinya Debug FPGA Array.
3. MuDebug FPGA Array hwindo, enda kune Memory Blocks tab. Icharatidza iyo LSRAM block mudhizaini ine zvine musoro uye zvemuviri view. Zvidhinha zvine musoro zvinoratidzwa neiyo L icon, uye zvidhinha zvemuviri zvinoratidzwa neP icon.
4. Sarudza iyo yemuviri block muenzaniso uye tinya-kurudyi Wedzera.
5. Kuti uverenge memory block, tinya Read Block.
6. Baya jekiseni 1 bit kukanganisa mu8 bit data pane chero nzvimbo yeLSRAM kusvika pakadzika 256, sezvinoratidzwa mumufananidzo unotevera apo 1 bit kukanganisa kunobaiwa panzvimbo ye0 yeLSRAM.
7. Dzvanya Nyora Chivharo kuti unyore data yakagadziridzwa kunzvimbo yaunoda.
8. Enda kuEDAC GUI uye isa Kero ndima muchikamu cheLSRAM Memory Read uye tinya Verenga, sezvakaratidzwa mumufananidzo unotevera.
9. Tarisa 1 Bit Kanganiso Verenga uye Verenga Data minda muGUI. Iko kukanganisa kuverenga kukosha kunowedzera ne1.
   Iyo Read Data field inoratidza iyo data chaiyo sezvo EDAC inogadzirisa kukanganisa bit.

Cherechedza: Kana kukwesha ndangariro kukasagoneswa, saka kuverenga kwekukanganisa kunowedzerwa kune yega yega kuverenga kubva kune imwecheteyo kero yeLSRAM sezvo ichikonzera kukanganisa kwe1-bit.

Kaviri bhiti kukanganisa jekiseni uye Kuonekwa

1. Ita nhanho 1 kusvika nhanho 5 sekupihwa muIngle bit kukanganisa jekiseni uye kugadzirisa, peji 10.
2. Baya 2-bit kukanganisa mu8-bit data panzvimbo ipi zvayo yeLSRAM kusvika pakadzika 256, sezvinoratidzwa mumufananidzo unotevera apo kukanganisa kwe2-bit kunobaiwa panzvimbo 'A' yeLSRAM.
3. Dzvanya Nyora Block kuti unyore data yakagadziridzwa kunzvimbo yaunoda.
4. Enda kuEDAC GUI uye isa Kero ndima muchikamu cheLSRAM Memory Read uye tinya Verenga, sezvakaratidzwa mumufananidzo unotevera.
5. Tarisa 2-bit Chikanganiso Verenga uye Verenga minda yeData muGUI. Iko kukanganisa kuverenga kukosha kunowedzera ne1.
   Nzvimbo yeRead Data inoratidza data yakashatiswa.

Zvese zviito zvakaitwa muRTG4 zvakaiswa muSeri Console chikamu cheGUI.

Mhedziso
Iyi demo inosimbisa kugona kweEDAC kweRTG4 LSRAM ndangariro. Iyo 1-bit kukanganisa kana 2-bit kukanganisa inounzwa kuburikidza neSmartDebug GUI. 1-bit kukanganisa kukanganisa uye 2-bit yekuona kukanganisa kunoonekwa uchishandisa EDAC GUI.

Kugadzirisa Chishandiso Uchishandisa FlashPro Express

Ichi chikamu chinotsanangura maitiro ekuronga iyo RTG4 mudziyo nebasa rekugadzira file uchishandisa FlashPro Express.

Kuronga mudziyo, ita zvinotevera matanho:

1. Ita shuwa kuti iyo jumper marongero pabhodhi akafanana neakanyorwa muTafura 3 yeUG0617:
   RTG4 Yekuvandudza Kit Mushandisi Yekushandisa.
2. Sarudzo, jumper J32 inogona kusetwa kuti ibatanidze mapini 2-3 kana uchishandisa yekunze FlashPro4, FlashPro5, kana FlashPro6 programmer pachinzvimbo cheiyo default jumper kuseta kushandisa yakamisikidzwa FlashPro5.
   Cherechedza: Iyo magetsi emagetsi switch, SW6 inofanirwa kudzimwa paunenge uchigadzira jumper.
3. Batanidza tambo yemagetsi kuJ9 yekubatanidza pabhodhi.
4. Simba PAMUSORO pemagetsi chinja SW6.
5. Kana ukashandisa FlashPro5 yakamisikidzwa, batanidza tambo ye USB kune yekubatanidza J47 uye PC inotambira.
   Neimwe nzira, kana uchishandisa wekunze programmer, batanidza ribhoni tambo kuJTAG musoro J22 uye batanidza iyo programmer kune inotambira PC.
6. PaPC inotambira, tanga iyo FlashPro Express software.
7. Dzvanya Nyowani kana sarudza New Job Project kubva kuFlashPro Express Job kubva kuMenu yeProjekiti kuti ugadzire purojekiti yebasa idzva, sezvakaratidzwa mumufananidzo unotevera.
8. Pinda zvinotevera muNew Job Project kubva kuFlashPro Express Job dialog box:
   • Programming basa file: Tinya Bhurawuza, uye famba uchienda kunzvimbo ine .job file iripo uye sarudza iyo file. Nzvimbo yakasarudzika ndeiyi: \rtg4_dg0703_df\Programming_Job
   • FlashPro Express basa purojekiti nzvimbo: Dzvanya Bhurawuza uye famba uchienda kune yaunoda FlashPro Express purojekiti nzvimbo.
9. Dzvanya OK. Iyo inodiwa programming file inosarudzwa uye yakagadzirira kurongwa mumudziyo.
10. Iwindo reFlashPro Express richaonekwa, simbisa kuti nhamba yepurogiramu inoonekwa mumunda weProgrammer. Kana zvikasadaro, simbisa mabhodhi ekubatanidza uye tinya Refresh/Rescan Programmers.
11. Dzvanya RUN. Kana mudziyo ukarongwa zvinobudirira, chimiro cheRUN PASSED chinoratidzwa sezvakaratidzwa mumufananidzo unotevera.
12. Vhara FlashPro Express kana tinya Buda muProjekti tab.

Kumhanyisa iyo TCL Script

TCL zvinyorwa zvinopihwa mukugadzira files folda pasi pedhairekitori TCL_Scripts. Kana zvichidiwa, dhizaini
kuyerera kunogona kudzokororwa kubva Kudhizaini Implementation kusvika chizvarwa chebasa file.

Kuti uite TCL, tevera matanho ari pasi apa:

1. Tangisa Libero software
2. Sarudza Project> Execute Script….
3. Dzvanya Bhurawuza wosarudza script.tcl kubva paTCL_Scripts directory yakadhaunirodwa.
4. Dzvanya Run.

Mushure mekubudirira kwekuita kweTCL script, Libero chirongwa chinogadzirwa mukati meTCL_Scripts dhairekitori.
Kuti uwane rumwe ruzivo nezve zvinyorwa zveTCL, tarisa ku rtg4_dg0703_df/TCL_Scripts/readme.txt.
Tarisa kuLibero® SoC TCL Command Reference Guide kuti uwane rumwe ruzivo nezve TCL mirairo. Bata Rutsigiro rweTekinoroji kune chero mibvunzo yaungasangana nayo paunenge uchimhanyisa TCL script.

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Microsemi Proprietary DG0703 Kudzokorora 4.0

Zvinyorwa / Zvishandiso

MICROCHIP Kukanganisa Kuona uye Kugadzirisa paRTG4 LSRAM Memory [pdf] Bhuku reMushandisi DG0703 Demo, Kukanganisa Kuonekwa uye Kugadzirisa paRTG4 LSRAM Memory, Kuonekwa uye Kugadziriswa paRTG4 LSRAM Memory, RTG4 LSRAM Memory, LSRAM Memory.

References

• User Manual