MICROCHIP Su'esu'ega Sese ma Fa'asa'oga ile RTG4 LSRAM Memory

Toe Iloilo Tala'aga

O le tala fa'asolopito o lo'o fa'amatalaina suiga na fa'atinoina i le pepa. O suiga o lo'o lisiina e ala i toe iloiloga, amata i le lomiga aupito lata mai.

Toe Iloiloga 4.0
O lo'o i lalo le aotelega o suiga na faia i lenei toe iloiloga.

• Fa'afouina le pepa mo Libero SoC v2021.2.
• Fa'aopoopoina Fa'aopoopo 1: Fa'apolokalameina le Masini Fa'aaogā le FlashPro Express, itulau 14.
• Fa'aopoopoina Fa'aopoopo 2: Fa'agaoioi le TCL Script, itulau 16.
• Ave'ese fa'asinomaga i numera o lomiga Libero.

Toe Iloiloga 3.0
Fa'afou le pepa mo Libero v11.9 SP1 fa'asa'olotoga polokalama.

Toe Iloiloga 2.0
Fa'afou le pepa mo Libero v11.8 SP2 fa'asa'olotoga polokalama.

Toe Iloiloga 1.0
Le lomiga muamua o lenei pepa.

Su'esu'ega ma Fa'asa'oga Sese ile RTG4 LSRAM Memory

O lenei mamanu faʻasino e faʻamatalaina ai le faʻamaonia o mea sese ma le faʻasaʻoina (EDAC) gafatia o le RTG4™ FPGA LSRAMs. I se tasi mea na tupu le le fiafia (SEU) siʻosiʻomaga faigofie, o le RAM e faigofie i mea sese le tumau e mafua mai i ion mamafa. O nei mea sese e mafai ona iloa ma fa'asa'o e ala i le fa'aogaina o tulafono fa'asa'oga (ECCs). O poloka RTG4 FPGA RAM ua fausia i totonu o le EDAC controllers e faʻatupu ai tulafono faʻasaʻo mea sese mo le faʻasaʻoina o se mea sese 1-bit poʻo le suʻeina o se mea sese 2-bit.

Afai e iloa se mea sese 1-bit, e faasaʻo e le pule o le EDAC le mea sese ma seti le fuʻa faasaʻoga sese (SB_CORRECT) i le maualuga maualuga. Afai e iloa se mea sese 2-bit, e setiina e le pule o le EDAC le fu'a e iloa ai mea sese (DB_DETECT) i le maualuga maualuga.
Mo nisi fa'amatalaga e uiga i galuega RTG4 LSRAM EDAC, fa'asino ile UG0574: RTG4 FPGA Ie

Fa'aoga Taiala.
I lenei mamanu faʻasino, o le 1-bit sese poʻo le 2-bit sese e faʻafeiloaʻi e ala i SmartDebug GUI. O loʻo matauina le EDAC i le faʻaaogaina o se faʻaoga faʻaoga faʻaoga (GUI), faʻaaogaina le UART interface e faʻaoga ai le LSRAM mo faʻamatalaga faitau / tusitusi, Libero® System-on-Chip (SoC) SmartDebug (JTAG) e faʻaaogaina e tui ai mea sese i le LSRAM manatua.

Fuafuaga Manaomia
O le laulau 1 o lo'o lisiina ai mea e mana'omia mo le fa'atinoina o le RTG4 LSRAM EDAC demo.

Laulau 1 • Fuafuaga Manaomia

Polokalama

• Libero SoC
• FlashPro Express
• SmartDebug
• Talia avetaavale PC USB i avetaavale UART

Fa'aaliga: Libero SmartDesign ma ata fa'atulagaina o ata o lo'o fa'aalia i lenei ta'iala e mo na'o fa'ata'ita'iga.
Tatala le mamanu Libero e vaʻai i faʻafouga fou.

Mea e mana'omia muamua
Ae e te le'i amataina:
Tikia ma faʻapipiʻi Libero SoC (e pei ona faʻaalia i le webnofoaga mo lenei mamanu) i luga ole PC talimalo mai le nofoaga nei: https://www.microsemi.com/product-directory/design-resources/1750-libero-soc

Fa'ata'ita'iga Fuafuaga
La'u mai le mamanu fa'ata'oto files mai le Microsemi webnofoaga i: http://soc.microsemi.com/download/rsc/?f=rtg4_dg0703_df

Le mamanu demo filee aofia ai:

• Poloketi Libero SoC
• GUI fa'apipi'i
• Polokalama files
• Faitau.txt file
• TCL_Scripts

O le GUI talosaga i luga o le PC talimalo e tuʻuina atu poloaiga i le RTG4 masini e ala i le USB-UART interface. O lenei UART atinaʻe ua mamanuina ma CoreUART, o se faʻamatalaga IP mai le Libero SoC IP catalog. O le CoreUART IP i le RTG4 ie e mauaina faʻatonuga ma tuʻuina atu i latou i le faʻatonuga o le decoder logic. O le fa'atonuga decoder logic e fa'avasega le faitau po'o le tusi le fa'atonuga, lea e fa'atinoina e fa'aaoga ai le fa'aoga mafaufau.

O le poloka faʻaoga manatua e faʻaaogaina e faitau / tusitusi ma mataʻituina fuʻa sese a le LSRAM. O le EDAC ua fausia i totonu e faʻasaʻo le 1-bit sese aʻo faitau mai le LSRAM ma tuʻuina atu faʻamatalaga faʻasaʻo i le faʻaoga faʻaoga ae e le toe tusia faʻamaumauga faʻasaʻo i le LSRAM. O le LSRAM EDAC o loʻo fausia e le faʻaaogaina se mea e fufulu ai. O le faʻataʻitaʻiga faʻataʻitaʻiga o loʻo faʻaaogaina le faʻaogaina o le scrub logic, lea e mataʻituina le fuʻa faʻasaʻo 1-bit ma faʻafouina le LSRAM faʻatasi ai ma faʻamaumauga faʻasaʻo pe a tupu se mea sese.
SmartDebug GUI e faʻaaogaina e tui ai le 1-bit poʻo le 2-bit sese i totonu o faʻamaumauga LSRAM.
O le ata 1 o loʻo faʻaalia ai le ata pito i luga ole poloka o le RTG4 LSRAM EDAC demo design.

Ata 1 • Fa'afanua Poloka Tulaga Maualuga

O fa'ata'ita'iga fa'ata'ita'iga nei:

1. O le LSRAM o loʻo faʻatulagaina mo × 18 mode ma EDAC e mafai e ala i le faʻafesoʻotaʻi LSRAMs ECC_EN faailo i le maualuga.
   Fa'aaliga: Ole LSRAM EDAC e lagolagoina mo na'o ×18 ma ×36 modes.
2. O le CoreUART IP o loʻo faʻatulagaina e fesoʻotaʻi ma le polokalama PC talimalo ile 115200 baud rate.
3. O le RTG4FCCCECALIB_C0 o loʻo faʻatulagaina e faʻagata le CoreUART ma isi faʻamatalaga ie ile 80 MHz.

Vaega
O mea nei o fa'ata'ita'iga fa'ata'ita'iga:

• Faitau ma tusi ile LSRAM
• Tu'i le 1-bit ma le 2-bit sese e fa'aaoga ai SmartDebug
• Fa'aali le 1-bit ma le 2-bit numera o mea sese
• Tulaga e fa'amama le fa'asologa o mea sese
• Fa'aaga po'o le fa'amalo le manatu e fufulu ai manatua

Fa'amatalaga
O lenei mamanu faʻataʻitaʻiga e aofia ai le faʻatinoina o galuega nei:

• Amataina ma maua le LSRAM
  O le faʻaogaina o mafaufauga faʻaogaina i totonu o le ie logic e maua ai le faʻatonuga amata mai le GUI ma amataina le 256 nofoaga manatua muamua o le LSRAM faʻatasi ai ma faʻamatalaga faʻaopoopo. O lo'o fa'atinoina fo'i galuega faitau ma tusitusi i nofoaga e manatua ai 256 o le LSRAM e ala i le mauaina o le tuatusi ma fa'amaumauga mai le GUI. Mo se fa'agaioiga faitau, e aumai e le mamanu fa'amaumauga mai le LSRAM ma tu'uina atu i le GUI mo fa'aaliga. O le faʻamoemoe o le a le faʻaosoina e le mamanu ni mea sese aʻo leʻi faʻaaogaina SmartDebug.

Fa'aaliga: O nofoaga e le'i fa'ailoaina e manatua e ono iai ni fa'ailoga fa'afuase'i, ma e ono fa'aalia e SmartDebug ni mea sese e tasi pe fa'alua i na nofoaga.

• Tuiina 1-bit po'o 2-bit mea sese
  SmartDebug GUI o loʻo faʻaaogaina e tui ai le 1 bit poʻo le 2-bit mea sese i totonu o le nofoaga manatua o le LSRAM. O fa'agaioiga nei o lo'o fa'atinoina ile SmartDebug e tui ai mea sese 1-bit ma 2-bit ile LSRAM:
  • Tatala SmartDebug GUI, kiliki Debug FPGA Array.
  • Alu i le Memory Blocks tab, filifili le mea e manatua ai, ma kiliki-i luga Add.
  • Ina ia faitau le poloka manatua, kiliki Read Block.
  • Tu'i tasi-bit po'o lua-bit sese i so'o se nofoaga o le LSRAM o se loloto patino.
  • Ina ia tusi i le nofoaga ua suia, kiliki Tusi Block.
    I le taimi o le LSRAM faitau ma tusitusi gaioiga e ala i le SmartDebug (JTAG) fa'afeso'ota'i, o le EDAC controller e fa'afefe ma e le fa'atatauina le ECC bits mo le fa'agaioiga tusitusi i le la'asaga u.
• Fa'amatalaga Sese
  8-bit fa'atau e fa'aogaina e tu'uina atu ai se fa'asologa o mea sese ma o lo'o fa'atulagaina i totonu o le ie fa'atatau e faitau 1-bit po'o le 2-bit mea sese. O le faʻatonuga o le faʻatonuga o loʻo tuʻuina atu ai le tau aofaʻi i le GUI pe a maua mai poloaiga mai le GUI.

Fa'atulagaina o Uati
I lenei mamanu faʻataʻitaʻiga, e tasi le vaega o le uati. O le 50 MHz oscillator i totonu e faʻauluina le RTG4FCCC, lea e faʻateleina ai le RTG4FCCCECALIB_C0. O le RTG4FCCCECALIB_C0 e fa'atupuina se uati 80 MHz e maua ai se fa'apogai o le uati i le COREUART, cmd_decoder, TPSRAM_ECC, ma le RAM_RW modules.
O le ata o lo'o i lalo o lo'o fa'aalia ai le fa'atulagaina o le fa'asologa o le fa'ata'ita'iga.

Ata 2 • Fa'atulagaina o le Uati

Toe Toe Fa'atulagaina
I lenei faʻataʻitaʻiga faʻataʻitaʻiga, o le toe setiina o faʻailoga i le COREUART, cmd_decoder, ma le RAM_RW modules e tuʻuina atu e ala i le LOCK uafu o le RTG4FCCCECALIB_C0. O le ata o loʻo i lalo o loʻo faʻaalia ai le toe faʻatulagaina o le mamanu faʻataʻitaʻiga.

Ata 3 • Toe Toe Fa'atulagaina

Fa'atulaga le Fa'ata'ita'iga Design
O vaega nei o lo'o fa'amatalaina pe fa'apefea ona fa'atulaga le RTG4 Development Kit ma le GUI e fa'atino ai le fa'ata'ita'iga mamanu.

Fa'atonuga o le Jumper

1. Fa'afeso'ota'i mea osooso i le RTG4 Development Kit, e pei ona fa'aalia i le Laulau 2.
   Laulau 2 • Fa'atulagaina o le Jumper

   Tagata osooso	Pin (Mai)	Pin (I)	Fa'amatalaga
   J11, J17, J19, J21, J23, J26, J27, J28	1	2	Fa'atonu
   J16	2	3	Fa'atonu
   J32	1	2	Fa'atonu
   J33	1	3	Fa'atonu
   	2	4

   Fa'aaliga: Tape le ki o le sapalai eletise, SW6, a'o fa'afeso'ota'i le osooso.

2. Faʻafesoʻotaʻi le USB cable (mini USB i Type-A USB cable) i le J47 o le RTG4 Development Kit ma le isi pito o le uaea i le USB port o le PC talimalo.
3. Ia mautinoa o le USB i UART alalaupapa aveta'avale e otometi lava ona iloa. E mafai ona faʻamaonia lenei mea ile pule ole masini ole PC talimalo.
   O le ata 4 o lo'o fa'aalia ai le USB 2.0 serial port properties ma le feso'ota'iga COM31 ma le USB fa'aliliu fa'asologa C.

Ata 4 • USB i UART Bridge Aveta'avale

Fa'aaliga: Afai e le faʻapipiʻiina le USB i UART bridge drivers, download ma faʻapipiʻi avetaavale mai www.microsemi.com//documents/CDM_2.08.24_WHQL_Certified.zip

O le Ata 5 o lo'o fa'aalia ai le fa'atulagaina o le laupapa mo le fa'agaioia o le EDAC demo i le RTG4 Development Kit.

Polokalama le Demo Design

1. Tatala le polokalame Libero SOC.
2. Fa'apolokalame le RTG4 Development Kit ma le galuega file tu'uina atu o se vaega o le mamanu files fa'aogaina le polokalame FlashPro Express, va'ai ile Fa'aopoopo 1: Fa'apolokalameina le Masini Fa'aaogāina FlashPro Express,itulau 14.
   Fa'aaliga: A uma loa le polokalame i le galuega file e ala i le FlashPro Express software, alu i le EDAC Demo GUI, itulau 9. A leai, alu i le isi laasaga.
3. I le Libero design flow, kiliki Run Polokalama gaioiga.
4. A mae'a Polokalama, fa'ailoga lanu meamata i luma o le 'Run Program action' e fa'ailoa ai le manuia o polokalame o le fa'ata'ita'iga.

EDAC Demo GUI
O le EDAC demo o loʻo tuʻuina atu i se GUI faʻaoga-tagata, e pei ona faʻaalia i le Ata 7, o loʻo tamoʻe i luga o le PC talimalo, lea e fesoʻotaʻi ma le RTG4 Development Kit. O le UART o loʻo faʻaaogaina e fai ma fesoʻotaʻiga fesoʻotaʻiga i le va o le PC talimalo ma le RTG4 Development Kit.

O le GUI o loʻo i ai vaega nei:

1. Filifiliga o le taulaga COM e faʻavae ai le UART fesoʻotaʻiga ile RTG4 FPGA ma le 115200 baud rate.
2. LSRAM Memory Write: Ia tusi le 8-bit data i le tuatusi manatua LSRAM faʻamaonia.
3. Fufulu Fa'amanatu: E fa'aaga pe fa'amalo le manatu fa'amama.
4. LSRAM Memory Read: E faitau le 8-bit faʻamaumauga mai le tuatusi manatua LSRAM faʻamaonia.
5. Fa'ailoga Fa'ailoga: Fa'aalia le numera o mea sese ma tu'uina atu se filifiliga e fa'amama le tau fa'atau i le zero.
6. 1-bit Error Count: Fa'aalia le 1-bit numera sese ma maua ai se filifiliga e fa'amama ai le tau fa'atau i le zero.
7. 2-bit Error Count: Fa'aali le 2-bit numera sese ma maua ai se filifiliga e fa'amama le tau fa'atau i le zero.
8. Faʻamaumauga Faʻamaumauga: Tuʻuina atu faʻamatalaga tulaga mo taʻaloga uma e faʻaaogaina e faʻaaoga ai le GUI.

Fa'atino le Demo
O laasaga nei o loʻo faʻamatalaina pe faʻafefea ona faʻagasolo le demo:

1. Alu i le \v1.2.2\v1.2.2\Exe ma kiliki faalua EDAC_GUI.exe e pei ona faʻaalia i le Ata 8.
2. Filifili le taulaga COM31 mai le lisi ma kiliki Fesoʻotaʻi.

Tu'iina ma fa'asa'oga fa'aletonu

1. I totonu o le mamanu Libero ua tuʻuina atu, faʻalua-kiliki ile SmartDebug Design ile faʻasologa o mamanu.
2. I le SmartDebug GUI, kiliki Debug FPGA Array.
3. I le Debug FPGA Array window, alu i le Fa'ailoga Poloka Fa'amanatu. O le a faʻaalia le poloka LSRAM i le mamanu faʻatasi ai ma se faʻaoga talafeagai ma faaletino view. O poloka talafeagai e faʻaalia i se L icon, ma poloka faʻaletino o loʻo faʻaalia i se P icon.
4. Filifili le faʻataʻitaʻiga poloka faʻapitoa ma kiliki-matau Add.
5. Ina ia faitau le poloka manatua, kiliki Read Block.
6. Tuʻi le 1 bit sese i le 8 bit faʻamatalaga i soʻo se nofoaga o le LSRAM e oʻo atu i le loloto 256, e pei ona faʻaalia i le ata o loʻo i lalo lea e tui ai le 1 bit sese i le 0th nofoaga o le LSRAM.
7. Kiliki Tusi Block ina ia mafai ai ona tusi faʻamatalaga suiga i le nofoaga faʻamoemoeina.
8. Alu i le EDAC GUI ma ulufale i le tuatusi fanua i le LSRAM Memory Read vaega ma kiliki Faitau, e pei ona faʻaalia i le ata o loʻo i lalo.
9. Mataʻituina le 1 Bit Error Count ma Faitau Faʻamatalaga fanua ile GUI. O le numera o mea sese e faʻatuputeleina ile 1.
   O le fanua Read Data e faʻaalia ai faʻamatalaga saʻo aʻo faʻasaʻo e le EDAC le mea sese.

Fa'aaliga: Afai e le mafai ona fufulu manatua, ona faʻaopoopoina lea o le numera o mea sese mo faitauga uma mai le tuatusi LSRAM tutusa ona e mafua ai le 1-bit sese.

Fa'alua fasi sese tui ma Su'esu'ega

1. Fa'atino le Laasaga 1 e oo i le Laasaga 5 e pei ona tu'uina atu i le Tuiina ma le fa'asa'oga o mea sese e tasi, itulau 10.
2. Tuʻi le 2-bit sese i le 8-bit faʻamatalaga i soʻo se nofoaga o le LSRAM e oʻo atu i le loloto 256, e pei ona faʻaalia i le ata o loʻo i lalo o loʻo tui ai le mea sese 2-bit i le nofoaga 'A' o le LSRAM.
3. Kiliki le Tusia Block e tusi ai faʻamatalaga ua suia i le nofoaga faʻamoemoeina.
4. Alu i le EDAC GUI ma ulufale i le tuatusi fanua i le LSRAM Memory Read vaega ma kiliki Faitau, e pei ona faʻaalia i le ata o loʻo i lalo.
5. Mataʻituina le 2-bit Error Count ma Faitau Faʻamatalaga fanua ile GUI. O le numera o mea sese e faʻatuputeleina ile 1.
   O le Read Data field e fa'aalia ai fa'amatalaga leaga.

O gaioiga uma na faia i le RTG4 o loʻo faʻamauina i le vaega Serial Console o le GUI.

Fa'ai'uga
O lenei faʻataʻitaʻiga o loʻo faʻamaonia ai le gafatia EDAC o manatuaga RTG4 LSRAM. O le 1-bit error poʻo le 2-bit error o loʻo faʻalauiloaina e ala i SmartDebug GUI. 1-bit fa'asa'oga sese ma le 2-bit fa'amatalaga sese o lo'o matauina e fa'aaoga ai le EDAC GUI.

Polokalama le Masini Fa'aaoga FlashPro Express

O lenei vaega o loʻo faʻamatalaina pe faʻapefea ona faʻapipiʻi le masini RTG4 ma le galuega faʻatulagaina file fa'aaoga le FlashPro Express.

Ina ia faʻapipiʻi le masini, fai laasaga nei:

1. Ia mautinoa o tulaga osooso i luga o le laupapa e tutusa ma mea o loʻo lisiina i le Laulau 3 o le UG0617:
   RTG4 Development Kit Taiala mo Tagata Fa'aoga.
2. Ile filifiliga, e mafai ona seti le jumper J32 e fa'afeso'ota'i pine 2-3 pe a fa'aogaina se FlashPro4, FlashPro5, po'o le FlashPro6 i fafo nai lo le fa'aogaina o le fa'aogaina o le FlashPro5.
   Fa'aaliga: O le ki o le sapalai eletise, SW6 e tatau ona tape a'o faia le so'oga osooso.
3. Fa'afeso'ota'i le uaea sapalai eletise i le feso'ota'iga J9 i luga o le laupapa.
4. Malosi i luga ole ki o le sapalai eletise SW6.
5. Afai e fa'aogaina le FlashPro5 fa'apipi'i, fa'afeso'ota'i le uaea USB i le feso'ota'iga J47 ma le PC talimalo.
   I le isi itu, afai e faʻaaogaina se polokalame mai fafo, faʻafesoʻotaʻi le lipine uaea i le JTAG ulutala J22 ma faʻafesoʻotaʻi le polokalame ile PC talimalo.
6. I luga o le PC talimalo, faʻalauiloa le polokalama FlashPro Express.
7. Kiliki New pe filifili New Job Project mai le FlashPro Express Job mai le Project menu e fatu ai se galuega fou, e pei ona faʻaalia i le ata o loʻo i lalo.
8. Ulufale mea nei i le Galuega Fou Poloketi mai le FlashPro Express Job dialog box:
   • Galuega fa'apolokalame file: Kiliki Su'esu'e, ma fa'asaga i le nofoaga o lo'o i ai le .job file o lo'o i ai ma filifili le file. O le nofoaga e le masani ai o le: \rtg4_dg0703_df\Programming_Job
   • FlashPro Express galuega fa'atino nofoaga: Kiliki Su'esu'e ma fa'afeiloa'i i le nofoaga o lo'o mana'omia FlashPro Express poloketi.
9. Kiliki OK. Polokalame manaʻomia file ua filifilia ma sauni e fa'apolokalameina i le masini.
10. O le a aliali mai le faʻamalama FlashPro Express, faʻamaonia o loʻo faʻaalia se numera o le polokalame i le fanua Programmer. Afai e leai, faʻamaonia le fesoʻotaʻiga a le laupapa ma kiliki Toe Faʻafou/Rescan Programmers.
11. Kiliki RUN. A fa'apolokalame lelei le masini, e fa'aalia se tulaga RUN PASSED e pei ona fa'aalia i le ata o lo'o mulimuli mai.
12. Tapuni FlashPro Express pe kiliki i fafo i le Project tab.

Fa'atino le TCL Script

TCL tusitusiga o loʻo tuʻuina atu i le mamanu files faila i lalo o le lisi TCL_Scripts. Afai e manaʻomia, o le mamanu
e mafai ona toe fa'asolo mai le Fuafuaga Fa'atino se'ia o'o i le fa'atupuina o galuega file.

Ina ia faʻatautaia le TCL, mulimuli i laasaga o loʻo i lalo:

1. Tatala le polokalame Libero
2. Filifili Poloketi > Fa'atino le Tusia....
3. Kiliki Su'esu'e ma filifili le script.tcl mai le laiga TCL_Scripts directory.
4. Kiliki Run.

A mae'a le fa'atinoina o le TCL script, ua fa'atūina le poloketi Libero i totonu o le TCL_Scripts directory.
Mo nisi fa'amatalaga e uiga i tusitusiga TCL, va'ai i le rtg4_dg0703_df/TCL_Scripts/readme.txt.
Va'ai ile Libero® SoC TCL Command Reference Guide mo nisi fa'amatalaga ile TCL commands. Fa'afeso'ota'i le Lagolago Fa'atekinisi mo so'o se fa'afesili e maua pe a fa'agasolo le TCL script.

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MICROCHIP Su'esu'ega Sese ma Fa'asa'oga ile RTG4 LSRAM Memory [pdf] Taiala mo Tagata Fa'aoga DG0703 Fa'ata'ita'iga, Su'esu'ega Sese ma Fa'asa'oga ile RTG4 LSRAM Mana'oga, Su'esu'ega ma Fa'asa'oga ile RTG4 LSRAM Mana'oga, RTG4 LSRAM Mana'oga, LSRAM Fa'amanatu

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