Ujongano lweMemori yangaphandle Intel Stratix 10 FPGA IP Design Example

Uyilo Eksample Isikhokelo esiKhawulezayo sokuQala kwiMemori yaNgaphandle ye-Intel® Stratix® 10 FPGA IP

Ujongano olutsha kunye noyilo oluzenzekelayo example flow iyafumaneka kwi-Intel® Stratix® 10 ujongano lwememori yangaphandle. Example Uyilo ithebhu kumhleli weparameter ikuvumela ukuba ukhankanye ukuyilwa kodibaniso kunye nokulinganisa file iiseti onokuzisebenzisa ukuqinisekisa i-EMIF IP yakho. Unokwenza i-example uyilo ngokukodwa lwekiti yophuhliso lwe-Intel FPGA, okanye kuyo nayiphi na i-EMIF IP oyenzayo.

Umzobo 1. UYilo Jikelele Example Workflows

Umfanekiso 2. Ukuvelisa i-EMIF Example Yila Nge-Intel Stratix 10 yeKhiti yoPhuhliso

Ukudala iProjekthi ye-EMIF

Kwi-Intel Quartus® Prime software version 17.1 kwaye kamva, kufuneka wenze iprojekthi ye-Intel Quartus Prime ngaphambi kokuvelisa i-EMIF IP kunye noyilo ex.ample.

1. Qalisa isoftware ye-Intel Quartus Prime kwaye ukhethe File ➤ Umncedisi Weprojekthi Omtsha. Cofa Okulandelayo.
2. Chaza uvimba weefayili kunye ne-nme yeprojekthi ofuna ukuyenza. Cofa Okulandelayo.
3. Qinisekisa ukuba iProjekthi engenanto ikhethiwe. Cofa Okulandelayo amaxesha amabini.
4. Ngaphantsi kweGama lokucoca, chwetheza inombolo yenxalenye yesixhobo.
5. Ngaphantsi kwezixhobo ezifumanekayo, khetha isixhobo esifanelekileyo.
6. Cofa Gqiba.

Ukuvelisa kunye noLungiselelo lwe-EMIF IP

La manyathelo alandelayo abonisa indlela yokuvelisa kunye nokuqwalasela i-EMIF IP. Le ndlela yokuhamba yenza i-DDR4 interface, kodwa amanyathelo ayafana kwezinye iiprothokholi.

1. Kwifestile yeKhathalogu ye-IP, khetha i-Intel Stratix 10 yeMemori yangaphandle yeNdibaniselwano. (Ukuba ifestile yeKhathalogi ye-IP ayibonakali, khetha View ➤ Usetyenziso lweWindows ➤ IP Catalog.)
2. KuMhleli weParameter ye-IP, nika igama lequmrhu le-EMIF IP (igama olinikezile apha liba file igama le IP) kwaye ukhankanye uvimba weefayili. Cofa Yenza.
3. Umhleli weparameter uneethebhu ezininzi apho kufuneka uqwalasele iparameters ukubonisa uphumezo lwakho lweEMIF:

Intel Stratix 10 EMIF Izikhokelo zomhleli weParameter

Itheyibhile 1. Izikhokelo zomhleli weParameter ye-EMIF

Ithebhu yomhleli weParameter	Izikhokelo
Ngokubanzi	Qinisekisa ukuba ezi parameters zilandelayo zifakwe ngokuchanekileyo: • Inqanaba lesantya sesixhobo. • Ubuninzi bewotshi yememori. • Ubuninzi bewotshi yereferensi ye-PLL.
Inkumbulo	• Jonga kwiphepha ledatha kwisixhobo sakho sememori ukuze ufake iiparamitha kwi Inkumbulo ithebhu. • Kufuneka ufake indawo ethile ye-ALERT# iphini. (Isebenza kwiprotocol yememori yeDDR4 kuphela.)
UMem I/O	• Kuphando lokuqala lweprojekthi, ungasebenzisa useto olusisiseko kwi Mem I/O ithebhu. • Ukuqinisekisa uyilo oluphucukileyo, kufuneka wenze ukulinganisa kwebhodi ukufumana useto olululo lokuphelisa.
FPGA I/O	• Kuphando lokuqala lweprojekthi, ungasebenzisa useto olusisiseko kwi FPGA I/O ithebhu. • Ukuqinisekisa uyilo oluphucukileyo, kufuneka wenze ulinganiso lwebhodi kunye nemifuziselo ye-IBIS enxulumeneyo ukukhetha imigangatho ye-I/O efanelekileyo.
Mem Ixesha	• Kuphando lokuqala lweprojekthi, ungasebenzisa useto olusisiseko kwi Mem Ixesha ithebhu. • Ukuqinisekisa uyilo olukwinqanaba eliphezulu, kufuneka ufake iiparamitha ngokungqinelana nephepha ledatha lesixhobo sakho sememori.
Ibhodi	• Kuphando lokuqala lweprojekthi, ungasebenzisa useto olusisiseko kwi Ibhodi ithebhu. • Ukuqinisekisa uyilo oluphucukileyo kunye nokuvalwa kwexesha elichanekileyo, kufuneka wenze ukulinganisa kwebhodi ukufumana uphazamiseko oluchanekileyo lwe-intersymbol (ISI) / crosstalk kunye nebhodi kunye nolwazi lwe-skew, kwaye ulufake Ibhodi ithebhu.
Umlawuli	Cwangcisa iiparamitha zolawulo ngokoqwalaselo olufunwayo kunye nokuziphatha komlawuli wakho wememori.
Ukuxilongwa	Ungasebenzisa iiparameters kwi Ukuxilongwa isithuba ukuncedisa ekuvavanyeni nasekulungiseni inkumbulo yakho ujongano.
Example Designs	I Example Designs ithebhu ikuvumela ukuba wenze uyilo examples yokudibanisa kunye nokulinganisa. Uyilo oluvelisiweyo exampLe yinkqubo ye-EMIF epheleleyo equka i-EMIF IP kunye nomqhubi ovelisa i-traffic engahleliweyo ukuqinisekisa ujongano lwememori.

Ngolwazi oluneenkcukacha kwiiparameters zomntu ngamnye, jonga kwisahluko esifanelekileyo kwiprothokholi yakho yememori kwi-Intel Stratix 10 yangaphandle yeMemori ye-IP yeSikhokelo soMsebenzisi.

Ukwenziwa koYilo lwe-EMIF eSinthesizable Example

Kwikiti yophuhliso lwe-Intel Stratix 10, kwanele ukushiya uninzi lwe-Intel Stratix 10 EMIF IP useto kumaxabiso azo angagqibekanga. Ukuvelisa i-synthesizeble design exampLe, landela la manyathelo:

1. Kwi-Diagnostics tab, yenza i-EMIF Debug Toolkit/On-Chip Debug Port kunye ne-In-System-Sources-and-Probes ukubonelela ngokufikelela kwiifitsha zokucoca ezikhoyo.
2. KwiEksample uyilo isithuba, qinisekisa ukuba ibhokisi ye-Synthesis ikhangelwe.
3. Qwalasela i-EMIF IP kwaye ucofe ukuvelisa iExample Yila kwikona ephezulu ekunene yefestile.
4. Chaza uvimba weefayili woyilo lwe-EMIF example kwaye ucofe u-OK. Ukuveliswa okuyimpumelelo yoyilo lwe-EMIF example yenza oku kulandelayo filecwangcisa phantsi kolawulo lwe qii.

Umzobo 3. Uyilo oluVeliswe kwi-Synthesizable Example File Ulwakhiwo

Qaphela: Ukuba awukhethi Ufaniso okanye uQhagamshelwano lwebhokisi yokukhangela, ulawulo lwendawo luya kuqulatha uyilo loMyili weQonga. files, ezingadityaniswanga yi Intel Quartus Prime software ngqo, kodwa ingaba viewihlelwe okanye ihlelwe phantsi koMyili weQonga. Kule meko ungaqhuba le miyalelo ilandelayo ukwenza udibaniso kunye nokulinganisa file iiseti.

• Ukwenza iprojekthi edibeneyo, kufuneka usebenzise i-quartus_sh -t make_qii_design.tcl iskripthi kwindawo ekuyiwa kuyo.
• Ukwenza iprojekthi yokulinganisa, kufuneka usebenzise i-quartus_sh -t make_sim_design.tcl iskripthi kwindawo ekuyiwa kuyo.

Ulwazi olunxulumeneyo

• Udibaniso Eksample Yila kwiphepha lesi-19
• I-Intel Stratix 10 EMIF IP Inkcazo yeParamitha yeDDR3
• I-Intel Stratix 10 EMIF IP Inkcazo yeParamitha yeDDR4
• Intel Stratix 10 EMIF IP iiNkcazo zeParameter yeQDRII/II+/Xtreme
• I-Intel Stratix 10 EMIF IP iiNkcazo zeParamitha ye-QDR-IV
• Intel Stratix 10 EMIF IP iiNkcazo zeParamitha ye-RLDRAM 3

Ukuvelisa i-EMIF Design Example yokulinganisa
Kwi-Intel Stratix 10 kit yophuhliso, kwanele ukushiya uninzi lwe-Intel Stratix 10 EMIF IP useto kumaxabiso azo angagqibekanga. Ukuvelisa i-design example for
Ukulinganisa, landela la manyathelo:

1. Kwi-Diagnostics thebhu, ungakhetha phakathi kweendlela ezimbini zokulinganisa: Tsiba uLungiso kunye noLungiso olupheleleyo. (Ukufumana iinkcukacha kwezi ndlela, bhekisa kwiSimulation Versus Hardware Implementation, kamva kwesi sahluko.) Ukunciphisa ixesha lokulinganisa, khetha i-Abstract PHY yokulinganisa ngokukhawuleza.
2. KwiEksample uyilo isithuba, qinisekisa ukuba ibhokisi yokulinganisa ikhangelwe. Kwakhona khetha ifomathi yokulinganisa iHDL efunekayo, nokuba yiVerilog okanye iVHDL.
3. Qwalasela i-EMIF IP kwaye ucofe ukuvelisa iExample Yila kwikona ephezulu ekunene yefestile.
4. Chaza uvimba weefayili woyilo lwe-EMIF example kwaye ucofe u-OK.

Ukuveliswa okuyimpumelelo yoyilo lwe-EMIF example yenza ezininzi file iiseti zeendlela ezahlukeneyo zokulingisa ezixhaswayo, phantsi kwe-sim/ed_sim directory.

Umzobo 4. UYilo lokulinganisa oluveliswe Example File Ulwakhiwo

Phawula: Ukuba awukhethi Ufaniso okanye uQhagamshelwano lwebhokisi yokukhangela, ulawulo lwendawo luya kuqulatha uyilo loMyili weQonga files, ezingadityaniswanga yi Intel Quartus Prime software ngqo, kodwa ingaba viewihlelwe okanye ihlelwe phantsi koMyili weQonga. Kule meko ungaqhuba le miyalelo ilandelayo ukwenza udibaniso kunye nokulinganisa file iiseti.

• Ukwenza iprojekthi edibeneyo, kufuneka usebenzise i-quartus_sh -t make_qii_design.tcl iskripthi kwindawo ekuyiwa kuyo.
• Ukwenza iprojekthi yokulinganisa, kufuneka usebenzise i-quartus_sh -t make_sim_design.tcl iskripthi kwindawo ekuyiwa kuyo.

Ulwazi olunxulumeneyo
• Ukulinganisa Eksample Design on
• I-Intel Stratix 10 EMIF IP – Ukulinganisa iMemori IP
• Ukulinganisa kuNxamnye noMiselo lweHardware

Ukulinganisa kuNxamnye noMiselo lweHardware
Ukulinganisa ujongano lwenkumbulo yangaphandle, unokukhetha ukutsiba ulungelelwaniso okanye ulungelelwaniso olupheleleyo kwi-Diagnostics ithebhu ngexesha lesizukulwana se-IP.
Iimodeli zokulinganisa ze-EMIF
Le theyibhile ithelekisa iimpawu ze-skip calibration kunye neemodeli ezipheleleyo zokulinganisa.

Itheyibhile 2. Iimodeli zokulinganisa ze-EMIF: Tsiba ulungelelwaniso ngokuchasene noLungiso olupheleleyo

Tsiba uLungiso	Ulungelelwaniso olupheleleyo
Ukulinganisa inqanaba lenkqubo kugxile kwingqiqo yomsebenzisi.	Ukulinganisa ujongano lwememori olugxile kuhlengahlengiso.
Iinkcukacha zolungelelwaniso azifakwanga.	Ibamba zonke stagulungelelwaniso.
Iyakwazi ukugcina kwaye ikhuphe idatha.	Ibandakanya ukulinganisa, i-bit-deskew, njl.
Imele impumelelo echanekileyo.
Ayithatheli ngqalelo ibhodi skew.

Ukulinganisa kwe-RTL Versus Hardware Ukuphunyezwa

Le theyibhile igxininisa iiyantlukwano eziphambili phakathi kokulinganisa kwe-EMIF kunye nokuphunyezwa kwe-hardware.

Itheyibhile 3. Ukulinganisa kwe-EMIF RTL Versus Hardware Implementation

RTL Ukulinganisa	Ukuphunyezwa kweHardware
Ukuqaliswa kwe-Nios® kunye nekhowudi yokulinganisa iqhutywe ngokufanayo.	Ukuqaliswa kwe-Nios kunye nekhowudi yokulinganisa yenza ngokulandelelana.
Ujongano luqinisekisa isiginali ye-cal_yenziwe ngaxeshanye ekufaniseni.	Imisebenzi yeFitter imisela ulungelelwaniso lolungelelwaniso, kwaye ujongano alubangi ukuba kwenziwe ngaxeshanye.

Kuya kufuneka uqhube ukulinganisa kwe-RTL ngokusekwe kwiipateni zetrafikhi kwisicelo soyilo lwakho. Qaphela ukuba ukulinganisa kwe-RTL akubonisi ukulibaziseka kokulandelela kwe-PCB okunokubangela ukungafani kwi-latency phakathi kokulinganisa kwe-RTL kunye nokuphunyezwa kwe-hardware.

Ukulinganisa iMemori yangaphandle ye-IP kunye neModelSim

Le nkqubo ibonisa indlela yokulinganisa uyilo lwe-EMIF example.

1. Qalisa iMentor Graphics* ModelSim isoftwe kwaye ukhethe File ➤ Guqula uvimba weefayili. Yiya kulawulo lwe-sim/ed_sim/mentor ngaphakathi koyilo olwenziweyo example folda.
2. Qinisekisa ukuba ifestile ye-Transcript iboniswe ezantsi kwesikrini. Ukuba ifestile yokuKhutshelwa ayibonakali, yibonise ngokunqakraza View ➤ Ushicilelo.
3. Kwifestile yeSikripthi, sebenzisa umthombo msim_setup.tcl.
4. Emva kokuba umthombo msim_setup.tcl ugqibile ukusebenza, sebenzisa ld_debug kwiSikripthi sefestile.
5. Emva kokuba i-ld_debug igqibile ukusebenza, qinisekisa ukuba i-Objects ifestile ibonisiwe. Ukuba i-Objects window ayibonakali, yibonise ngokunqakraza View ➤ Izinto.
6. Kwifestile yeZinto, khetha imiqondiso ofuna ukuyilinganisa ngokucofa ekunene kwaye ukhethe Yongeza i-Wave.
7. Emva kokuba ugqibile ukukhetha imiqondiso yokulinganisa, yenza ukubaleka-konke kwiVTranscript window. Ukulinganisa kuqhuba de kugqitywe.
8. Ukuba ukulinganisa akubonakali, cofa View ➤ Amaza.

Ulwazi olunxulumeneyo
I-Intel Stratix 10 EMIF IP-Ukulinganisa iMemori ye-IP

I-Pin yokubekwa kwe-Intel Stratix 10 EMIF IP

Esi sihloko sibonelela ngezikhokelo zokubekwa kwephini.

Ngaphezuluview

I-Intel Stratix 10 FPGAs inesakhiwo esilandelayo:

• Isixhobo ngasinye siqulethe phakathi kwe-2 kunye ne-3 ye-I/O ikholamu.
• Ikholamu nganye ye-I/O iqulethe ukuya kuthi ga kwiibhanki ze-12 ze-I/O.
• Ibhanki nganye ye-I/O iqulethe iindlela ezi-4.
• Umzila ngamnye une-12 yenjongo jikelele-injongo ye-I/O (GPIO) izikhonkwane.

Izikhokelo zePin ngokubanzi
Ezi ngongoma zilandelayo zibonelela ngezikhokelo zephini ngokubanzi:

• Qinisekisa ukuba izikhonkwane zojongano lwenkumbulo yangaphandle zihlala ngaphakathi kwekholamu enye ye-I/O.
• Unxibelelwano olusebenza kwiibhanki ezininzi kufuneka lufezekise ezi mfuno zilandelayo:
  • Iibhanki kufuneka zibe kufuphi enye kwenye. Ngolwazi kwiibhanki ezikufutshane, bhekisa kwi-Intel Stratix 10 yangaphandle yeMemori ye-Interfaces ye-IP User Guide.
  • Idilesi kunye nebhanki yomyalelo kufuneka ihlale kwibhanki yeziko ukunciphisa ukubambezeleka. Ukuba ujongano lwememori lusebenzisa inani elilinganayo leebhanki, idilesi kunye nebhanki yomyalelo inokuhlala kuyo nayiphi na yezi bhanki zimbini.
• Izikhonkwane ezingasetyenziswanga zingasetyenziswa njengezikhonkwane ze-I/O zenjongo jikelele.
• Zonke iidilesi kunye nomyalelo kunye nezikhonkwane ezinxulumene nazo kufuneka zihlale ngaphakathi kwebhanki enye.
• Idilesi kunye nomyalelo kunye nezikhonkwane zedatha zingabelana ngebhanki phantsi kwezi meko zilandelayo:
  • Idilesi kunye nomyalelo kunye nezikhonkwane zedatha azikwazi ukwabelana ngomzila we-I/O.
  • Kuphela indlela ye-I / O engasetyenziswanga kwidilesi kunye nebhanki yomyalelo ingasetyenziselwa izikhonkwane zedatha.

Itheyibhile 4. Izithintelo zePin ngokubanzi

Uhlobo loMqondiso	Ukunyanzelwa
Idatha yeStrobe	Zonke iimpawu zeqela le-DQ kufuneka zihlale kumgca we-I/O ofanayo.
Idatha	Izikhonkwane ze-DQ ezinxulumeneyo kufuneka zihlale kumgca we-I/O ofanayo. Kwiiprothokholi ezingaxhasi imigca yedatha ye-bidirectional, imiqondiso yokufunda kufuneka ihlelwe ngokwahlukileyo kwimiqondiso yokubhala.
Idilesi kunye nomyalelo	Idilesi kunye nezikhonkwane zomyalelo kufuneka zihlale kwiindawo ezichazwe kwangaphambili ngaphakathi kwebhanki ye-I/O.

Iibhanki ezikufuphi

Ukuze iibhanki zithathelwe ingqalelo ezikufutshane, kufuneka zihlale kwikholam ye-I/O efanayo, Ukufumanisa ukuba iibhanki zikufuphi, bhekisa kwiiModyuli ze-I/O zebhanki Indawo kunye nokubalwa kwePin kwi-Stratix 10 Devices section ebekwe kwi-Stratix 10 General Purpose I. /O
Isikhokelo somsebenzisi.

Xa ubhekisa kwiitheyibhile ezikwiSikhokelo se-Stratix 10 General Purpose I/O User Guide, kukhuselekile ukucinga ukuba zonke iibhanki ezibonisiweyo zikufuphi, ngaphandle kokuba kukho u-' – ' uphawu; Isimboli ' – ' ibonisa ukuba ibhanki ayidityaniswanga kwiphakheji.
Izabelo zePini

Ukumisela iindawo kuzo zonke izikhonkwane ze-EMIF I/O kufuneka ubhekisele kwitafile yephini yesixhobo sakho. Xa kubhekiswa kwitafile yephini, iinombolo zebhanki, i-indices zebhanki ze-I/O, kunye namagama ephini zinikezelwe. Ungafumana izalathiso zezikhonkwane zedilesi kunye nezikhonkwane zomyalelo kwiStratix 10 Scheme Table ebekwe kwi Intel FPGA webindawo. Unokwenza izabelo zepin ngeendlela ezahlukeneyo. Indlela ecetyiswayo kukunyathela ngesandla imiqondiso ethile yojongano kwaye uvumele i-Intel Quartus Prime Fitter iphathe abanye. Le ndlela iqulathe ukubonisana neetafile zepin ukufumana izikhundla ezisemthethweni kwezinye izikhonkwane zojongano kwaye unikeze ngazo nge .qsf file eveliswa ngoyilo lwe-EMIF example. Ngale ndlela yokubekwa kwe-I/O, kufuneka ucinezele le miqondiso ilandelayo:

• CK0
• Iphini ye-DQS enye kwiqela ngalinye
• Iwotshi yereferensi ye-PLL
• RZQ

Ngokusekwe kule miqobo ingentla, i-Intel Quartus Prime Fitter ijikeleza izikhonkwane ngaphakathi kwendlela nganye njengoko kuyimfuneko. Lo mfanekiso ulandelayo ubonisa i-exampizabelo ze-pin ye-DDR3 x72 ujongano olunolu khetho lulandelayo:

• Idilesi kunye nephini yomyalelo ibekwe ebhankini 2M kwaye ifuna imizila emi-3.
  • U-CK0 unyanzelekile ukuba aqhoboshele u-8 ebhankini engu-2M.
  • Izikhonkwane zewotshi yereferensi ye-PLL zinyanzelwa kwizikhonkwane ze-24 kunye ne-25 kwibhanki ye-2M.
  • I-RZQ inyanzelekile ukuba ifake i-26 kwibhanki ye-2M.
• Idatha ibekwe kwiibhanki ze-2N, 2M, kunye ne-2L, kwaye ifuna imizila ye-9.
  • Amaqela e-DQS 1-4 abekwe ebhankini 2N.
  • DQS iqela 0 ibekwe ebhankini 2M.
  • Amaqela e-DQS 5-8 abekwe ebhankini 2L.

Umfanekiso 5. I-Pin Izabelo Eksample: DDR3 x73 Interface

Kule example, ukunyanzela CK0 ukuqhobosha 8 ebhankini 2M, ungadibanisa layini ilandelayo kwi .qsf file, ngokusekwe kwitafile efanelekileyo:

Ifomathi yesi sabelo sesikhonkwane singentla sinokusetyenziswa kuzo zonke izikhonkwane:

Ulwazi olunxulumeneyo

• IiBhanki ze-I / O zeModyuli kwi-Intel Stratix izixhobo ezili-10
• Intel Stratix 10 EMIF IP DDR3
• Intel Stratix 10 EMIF IP for DDR4
• Intel Stratix 10 EMIF IP for QDRII/II+/Xtreme
• I-Intel Stratix 10 EMIF IP ye-QDR-IV
• I-Intel Stratix 10 EMIF IP ye-RLDRAM 3

Ukuqulunqa kunye nokuCwangcisa i-Intel Stratix 10 EMIF Design Example

Emva kokuba wenze izabelo eziyimfuneko kwi-.qsf file, ungaqokelela uyilo example kwisoftware ye-Intel Quartus Prime.

1. Yiya kwi-Intel Quartus Prime ifolda equlathe uyilo example directory.
2. Vula iprojekthi ye-Intel Quartus Prime file, (.qpf).
3. Ukuqalisa ukuqulunqa, cofa Ukusetyenzwa ➤ Qalisa ukuHlanganisa. Ukugqitywa ngempumelelo koqulunqo kwenza i.sof file, eyenza uyilo lusebenze kwihardware.
4. Ukucwangcisa isixhobo sakho ngoyilo oluhlanganisiweyo, vula umcwangcisi ngokucofa iZixhobo ➤ uMcwangcisi.
5. Kumdwelisi wenkqubo, cofa i-Auto Detect ukubona izixhobo ezixhaswayo.
6. Khetha isixhobo se-Intel Stratix 10 uze ukhethe Guqula File.
7. Yiya kwi-ed_synth.sof eyenziweyo file uze ukhethe Vula.
8. Cofa uQalisa ukuqalisa ukucwangcisa isixhobo se-Intel Stratix 10. Xa isixhobo sicwangciswe ngempumelelo, ibar yenkqubela phambili ekunene kwefestile kufuneka ibonise 100% (Iphumelele).

Ukulungisa ingxaki ye-Intel Stratix 10 yoYilo lwe-EMIF Example
I-EMIF Debug Toolkit iyafumaneka ukuze incede ekulungiseni uyilo lojongano lwenkumbulo yangaphandle. I-toolkit ikuvumela ukuba ubonise ukufunda nokubhala imida kwaye uvelise imizobo yamehlo. Emva kokuba ucwangcise ikiti yophuhliso ye-Intel Stratix 10, ungaqinisekisa ukusebenza kwayo usebenzisa i-EMIF Debug Toolkit.

1. Ukuphehlelela i-EMIF Debug Toolkit, yiya kwiZixhobo ➤ Izixhobo zokulungisa iNkqubo ➤ Isixhobo soNxibelelwano lweMemori yangaphandle.
2. Cofa uQalisa uQhagamshelwano.
3. Cofa iLinki yeProjekthi kwisixhobo. Kuvela ifestile; qinisekisa ukuba isixhobo esichanekileyo sikhethiwe kwaye sichanekile .sof file ikhethiwe.
4. Cofa Yenza uQhakamshelwano lweMemori. Yamkela useto oluhlala lukhona ngokucofa u-Kulungile.

Ikhithi yophuhliso ye-Intel Stratix 10 ngoku isetelwe ukuba isebenze kunye ne-EMIF Debug Toolkit, kwaye unokuvelisa naziphi na ezi ngxelo zilandelayo ngokucofa kabini kukhetho oluhambelanayo:

• Phinda wenze ulungelelwaniso. Ivelisa ingxelo yolungelelwaniso eshwankathela ubume bolungelelwaniso ngeqela ngalinye le-DQ/DQS kunye nemida yephini nganye ye-DQ/DQS.
• Ukumakisha umqhubi. Uvelisa ingxelo eshwankathela ukufunda nokubhala imida ngokwe-I/O pin. Oku kwahlukile kukulungelelaniswa kolungelelwaniso ngenxa yokuba imajini yomqhubi ibanjwa ngexesha lemowudi yetrafikhi kunokuba ngexesha lolungelelaniso.
• Yenza umzobo wamehlo. Yenza ukufunda nokubhala imizobo yamehlo kwiphini nganye ye-DQ ngokusekelwe kwiipateni zedatha yokulinganisa.
• Ukulungelelanisa ukupheliswa. Utshayela amaxabiso ahlukeneyo okuphelisa kwaye anike ingxelo yemida ebonelelwa ngexabiso ngalinye lokuphelisa. Sebenzisa olu phawu ukunceda ekukhetheni ukupheliswa kwenkumbulo.

Ulwazi olunxulumeneyo
Intel Stratix 10 EMIF IP Debugging

Uyilo Eksample Inkcazo yeMemori yaNgaphandle Ujongano lweIntel Stratix 10 FPGA IP

Xa u parameterize kwaye uvelisa i EMIF IP yakho, ungakhankanya ukuba inkqubo yenza abalawuli bokulinganisa kunye nodibaniso. file iseti, kwaye wenze i file icwangcisa ngokuzenzekelayo. Ukuba ukhetha Ukulinganisa okanye uHlangano phantsi kwe-Eksample Design Files kwiEksample Uyilo tab, inkqubo yenza ukulinganisa okupheleleyo file iseti okanye indibaniselwano epheleleyo file cwangcisa, ngokuhambelana nokukhetha kwakho.

Udibaniso Eksample Design

Udibaniso exampuyilo luqulathe iibhloko ezinkulu eziboniswe kulo mfanekiso ungezantsi.

• Ijenereyitha yendlela, eyi-synthesizeble Avalon®-MM exampumqhubi osebenzisa ipateni engeyonyani yofundo kwaye abhalele inani leparameterized yeedilesi. I-generator ye-traffic iphinda ibeke iliso kwidatha efundwayo kwimemori ukuqinisekisa ukuba ihambelana nedatha ebhaliweyo kwaye ithi ukusilela ngenye indlela.
• Umzekelo wojongano lwenkumbulo, olubandakanya:
  • Umlawuli wememori omodareyitha phakathi kwe-interface ye-Avalon-MM kunye ne-interface ye-AFI.
  • I-PHY, esebenza njengojongano phakathi komlawuli wememori kunye nezixhobo zememori zangaphandle ukwenza imisebenzi yokufunda nokubhala.

Umzobo 6. Ukuhlanganiswa Example Design

Ukuba usebenzisa i-Ping Pong PHY isici, i-synthesis exampUyilo lwe-le lubandakanya iijeneretha ezimbini zendlela yokukhupha imiyalelo kwizixhobo ezimbini zememori ezizimeleyo ngokusebenzisa abalawuli ababini abazimeleyo kunye ne-PHY eqhelekileyo, njengoko kuboniswe kulo mfanekiso ulandelayo.

Umzobo 7. Ukuhlanganiswa Example Uyilo lwePing Pong PHY

Ukuba usebenzisa i-RLDRAM 3, umenzi wendlela kwi-synthesis example uyilo inxibelelana ngokuthe ngqo ne-PHY isebenzisa i-AFI, njengoko kubonisiwe kulo mfanekiso ulandelayo.

Umzobo 8. Ukuhlanganiswa Example UYilo lwe-RLDRAM 3 Ujongano

Qaphela: Ukuba enye okanye ngaphezulu kweNdlela yoKwaba ye-PLL, iNdlela yoKwabelana nge-DLL, okanye i-OCT yeNdlela yoKwabelana ngeeparamitha zicwangciswe kulo naliphi na ixabiso ngaphandle koKwabiwa, udibaniso ex.ampuyilo luya kuqulatha i-traffic generator/memory interface iimeko. Iimeko ezimbini ze-traffic generator/memory interface zihambelana kuphela ngoqhagamshelo lwe-PLL/DLL/OCT ekwabelwana ngalo njengoko kuchaziwe kwizicwangciso zeparameter. Ijenereyitha yendlela/imizekelo yojongano lwenkumbulo ibonisa indlela onokwenza ngayo uqhagamshelo kuyilo lwakho.
Phawula: Ukuhamba kokuhlanganiswa komntu wesithathu njengoko kuchaziwe kwi-Intel Quartus Prime Standard Standard Edition IsiKhokelo somsebenzisi: I-Third-party Synthesis ayikuko ukuqukuqela kwenkxaso ye-EMIF IP.
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Ukwenziwa koYilo lwe-EMIF eSinthesizable Example kwi

Ukulinganisa Eksample Design
Ukulinganisa example uyilo iqulethe iibhloko ezinkulu eziboniswe kulo mfanekiso ulandelayo.

• Umzekelo we-synthesis example uyilo. Njengoko kuchaziwe kwicandelo langaphambili, i-synthesis exampuyilo luqulathe umvelisi wendlela kunye nomzekelo wojongano lwenkumbulo. Ezi bloko zingagqibekanga kwiimodeli zokulinganisa ezingabonakaliyo apho kufanelekileyo ukulinganisa okukhawulezayo.
• Imodeli yememori, esebenza njengemodeli eqhelekileyo ebambelela kwiinkcukacha zeprotocol yememori. Rhoqo, abathengisi beememori babonelela ngeemodeli zokulinganisa kumacandelo abo enkumbulo onokuthi ukhuphele kuwo webiindawo.
• Umkhangeli wesimo, obeka iliso kwiimpawu zesimo ukusuka kwi-IP ye-interface yememori yangaphandle kunye nejeneretha ye-traffic, ukubonakalisa ukupasa jikelele okanye imeko yokungaphumeleli.

Umzobo 9. Ukulinganisa Example Design

Ukuba usebenzisa iPing Pong PHY isici, ukulinganisa exampUyilo lwe-le lubandakanya iijeneretha ezimbini zendlela yokukhupha imiyalelo kwizixhobo ezimbini zememori ezizimeleyo ngokusebenzisa abalawuli ababini abazimeleyo kunye ne-PHY eqhelekileyo, njengoko kuboniswe kulo mfanekiso ulandelayo.

Umzobo 10. Ukulinganisa Example Uyilo lwePing Pong PHY

Ukuba usebenzisa i-RLDRAM 3, ijenereyitha yetrafikhi kwi-simulation example uyilo inxibelelana ngokuthe ngqo ne-PHY isebenzisa i-AFI, njengoko kubonisiwe kulo mfanekiso ulandelayo.

Umzobo 11. Ukulinganisa Example UYilo lwe-RLDRAM 3 Ujongano

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Ukuvelisa i-EMIF Design Example yokulinganisa kwi

Example UYilo lweTab yoNxibelelwano
Umhleli weparameter uquka iExample yoYilo ithebhu ekuvumela ukuba wenze iparameter kwaye uvelise i-ex yakhoample uyilo.l
Ifumaneka Example iCandelo loYilo
I Khetha uyilo lokutsalwa likuvumela ukuba ukhethe i ex oyifunayoample uyilo. Okwangoku, i-EMIF Example Uyilo lolona khetho lukhoyo, kwaye lukhethwa ngokungagqibekanga.

Imbali yoHlaziyo lweNgxelo yoNxibelelwano lweMemori yaNgaphandle Intel Stratix 10 FPGA IP Design Example Isikhokelo somsebenzisi

Inguqulelo yoXwebhu	Intel Quartus Prime Version	Iinguqu
2021.03.29	21.1	• Kwi Example Yila uQalisa ngokukhawuleza isahluko, iimbekiselo ezisusiweyo kwi-NCSim* simulator.
2018.09.24	18.1	• Amanani ahlaziyiweyo kwi Ukwenziwa koYilo lwe-EMIF eSinthesizable Example kwaye Ukuvelisa i-EMIF Design Example yokulinganisa izihloko.
2018.05.07	18.0	• Kutshintshwe isihloko soxwebhu ukusuka Intel Stratix 10 Memory yangaphandle Interfaces IP Design Example Isikhokelo somsebenzisi ukuya Ujongano lweMemori yangaphandle Intel Stratix 10 FPGA IP Design Example Isikhokelo somsebenzisi. • Amanqaku embumbulu alungiswe Ngaphezuluview icandelo le I-Pin yokubekwa kwe-Intel Stratix 10 EMIF IP isihloko.

Umhla	Inguqulelo	Iinguqu
Novemba 2017	2017.11.06	Ukukhutshwa kokuqala.

Intel Corporation. Onke Amalungelo Agciniwe. I-Intel, ilogo ye-Intel, kunye nezinye iimpawu ze-Intel ziimpawu zorhwebo ze-Intel Corporation okanye iinkampani eziphantsi kwayo. I-Intel iqinisekisa ukusebenza kweFPGA yayo kunye neemveliso zesemiconductor kwiinkcukacha zangoku ngokuhambelana newaranti esemgangathweni ye-Intel, kodwa inelungelo lokwenza utshintsho kuzo naziphi na iimveliso kunye neenkonzo nangaliphi na ixesha ngaphandle kwesaziso. I-Intel ayithathi xanduva okanye ityala elivela kwisicelo okanye ukusetyenziswa kwalo naluphi na ulwazi, imveliso, okanye inkonzo echazwe apha ngaphandle kokuba kuvunyelwene ngokubhaliweyo yi-Intel. Abathengi be-Intel bayacetyiswa ukuba bafumane inguqulelo yamva nje yeenkcazo zesixhobo ngaphambi kokuba baxhomekeke kulo naluphi na ulwazi olupapashiweyo naphambi kokubeka iiodolo zeemveliso okanye iinkonzo. *Amanye amagama kunye neempawu zingabangwa njengempahla yabanye.

Amaxwebhu / Izibonelelo

intel iMemori yaNgaphandle Ujongano lweIntel Stratix 10 FPGA IP Design Example [pdf] Isikhokelo somsebenzisi Ujongano lweMemori yangaphandle Intel Stratix 10 FPGA IP Design Example, Yangaphandle, Memory Interfaces Intel Stratix 10 FPGA IP Design Example, Intel Stratix 10 FPGA IP Design Example, 10 FPGA IP Design Example

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