intel Native Loopback Accelerator Accelerator Functional Unit (AFU) Jagorar mai amfani

Abubuwan da ke ciki boye

1 intel Native Loopback Accelerator Accelerator Accelerator Unit (AFU)

2 Game da wannan Takardun

3 Ƙungiyar Maɗaukakiyar Ƙwararrun Ƙwararrun Ƙwararru (AFU)

4 Tarihin Bita na Daftarin aiki don Sashin Ayyukan Haɓaka Ayyukan Haɓakawa (AFU) Jagorar Mai Amfani

5 Takardu / Albarkatu

5.1 Magana

6 Labarai masu alaka

intel Native Loopback Accelerator Accelerator Accelerator Unit (AFU)

Game da wannan Takardun

Taro
Tebur 1. Takardun Takardun Takardun

Babban taro	Bayani
#	Gabatar da umarni wanda ke nuna umarnin shine a shigar dashi azaman tushen.
$	Yana nuna umarni da za a shigar da shi azaman mai amfani.
Wannan font	FileAna buga sunaye, umarni, da kalmomi masu mahimmanci a cikin wannan font. Ana buga dogayen layin umarni a cikin wannan font. Kodayake dogayen layukan umarni na iya naɗe zuwa layi na gaba, dawowar ba ta cikin umarnin; kar a danna shiga.
	Yana nuna rubutun maƙerin da ke bayyana tsakanin maƙallan kusurwa dole ne a maye gurbinsa da ƙimar da ta dace. Kada a shigar da maƙallan kusurwa.

Acronyms
Tebur 2. Gagarabadau

Acronyms	Fadadawa	Bayani
AF	Aikin Hanzarta	Haɗaɗɗen Hoton Hanzarta Hardware wanda aka aiwatar a cikin dabaru na FPGA wanda ke hanzarta aikace-aikace.
AFU	Rukunin Aiki na Hanzarta	Hardware Accelerator wanda aka aiwatar a cikin ma'ana ta FPGA wanda ke sauke aikin lissafi don aikace-aikace daga CPU don haɓaka aiki.
API	Interface Programming Application	Saitin ma'anoni na ƙasa da ƙasa, ƙa'idodi, da kayan aikin gina aikace-aikacen software.
ASE	AFU Simulation muhalli	Yanayin haɗin gwiwa wanda ke ba ku damar amfani da aikace-aikacen runduna iri ɗaya da AF a cikin yanayin kwaikwayo. ASE wani ɓangare ne na Intel® Acceleration Stack don FPGAs.
CCI-P	Core Cache Interface	CCI-P shine daidaitaccen ƙirar AFUs da ake amfani da su don sadarwa tare da mai watsa shiri.
CL	Layin cache	Layin cache 64-byte
DFH	Jigon Siffar Na'ura	Yana ƙirƙira jeri mai alaƙa na masu kan sifofi don samar da hanyar ƙara fasali mai iyawa.
FIM	FPGA Interface Manager	Kayan aikin FPGA mai ɗauke da FPGA Interface Unit (FIU) da musaya na waje don ƙwaƙwalwar ajiya, hanyar sadarwa, da sauransu. Ayyukan Accelerator (AF) suna mu'amala da FIM a lokacin gudu.
FIU	FPGA Interface Unit	FIU wani dandali ne wanda ke aiki a matsayin gada tsakanin musaya na dandamali kamar PCIe *, UPI da AFU-gefe musaya kamar CCI-P.
*ci gaba…*

Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka. *Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.

Acronyms	Fadadawa	Bayani
MPF	Ma'aikatar Kayayyakin Ƙwaƙwalwa	MPF shine Tushen Ginin Gine-gine (BBB) wanda AFUs za su iya amfani da su don samar da ayyukan siffanta zirga-zirgar CCI-P don ma'amaloli tare da FIU.
Msg	Sako	Saƙo – sanarwar sarrafawa
NLB	Loopback na asali	NLB tana karantawa da rubutawa zuwa hanyar haɗin CCI-P don gwada haɗin kai da fitarwa.
RdLine_I	Karanta Layi mara inganci	Buƙatar karanta ƙwaƙwalwar ajiya, tare da alamar cache na FPGA saita zuwa mara aiki. Ba a adana layin a cikin FPGA ba, amma yana iya haifar da gurɓataccen cache na FPGA. Lura: Ma'ajin tag yana bin matsayin buƙatun ga duk fitattun buƙatun akan Intel Ultra Path Interconnect (Intel UPI). Saboda haka, ko da yake RdLine_I ba shi da inganci bayan kammalawa, yana cinye cache tag na dan lokaci don bin diddigin halin buƙatar sama da UPI. Wannan aikin na iya haifar da korar layin cache, yana haifar da gurɓataccen ma'aji. Advantage na yin amfani da RdLine_I shine cewa ba a bin sawun ta hanyar kundin adireshin CPU; don haka yana hana snooping daga CPU.
RdLine-S	Karanta Layi Raba	Buƙatar karanta ƙwaƙwalwar ajiya tare da alamar cache na FPGA saita zuwa rabawa. Anyi ƙoƙari don adana shi a cikin ma'ajin FPGA a cikin jihar da aka raba.
WrLine_I	Rubutun Layi mara inganci	Buƙatar Rubutun Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwal ) an saita alamar cache na FPGA zuwa mara aiki. FIU yana rubuta bayanan ba tare da niyyar adana bayanan a cikin cache na FPGA ba.
WrLine_M	Rubutun Layi Gyara	Buƙatar Rubutun Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwa ) tare da alamar cache na FPGA saita zuwa Gyara. FIU yana rubuta bayanan kuma ya bar shi a cikin ma'ajin FPGA a cikin yanayin da aka gyara.

Gaggauta ƙamus
Tebur 3. Tarin Haɗawa don Intel Xeon® CPU tare da ƙamus na FPGAs

Lokaci	Gajarta	Bayani
Intel Acceleration Stack don Intel Xeon® CPU tare da FPGAs	Hanzarta Tari	Tarin software, firmware, da kayan aikin da ke ba da ingantaccen haɗin kai tsakanin Intel FPGA da na'ura mai sarrafa Intel Xeon.
Katin Haɗawa Mai Shirye-shiryen Intel FPGA (Intel FPGA PAC)	Farashin Intel FPGA PAC	PCIe FPGA accelerator katin. Ya ƙunshi Manajan Interface na FPGA (FIM) wanda ke haɗe tare da na'ura mai sarrafa Intel Xeon akan bas ɗin PCIe.

Ƙungiyar Maɗaukakiyar Ƙwararrun Ƙwararrun Ƙwararru (AFU)

Native Loopback (NLB) AFU Overview

Farashin NLBampLe AFUs sun ƙunshi saitin Verilog da System Verilog files don gwada ƙwaƙwalwar ajiya tana karantawa da rubutu, bandwidth, da latency.

Wannan kunshin ya ƙunshi AFU guda uku waɗanda zaku iya ginawa daga tushen RTL ɗaya. Tsarin ku na lambar tushe na RTL ya haifar da waɗannan AFUs.

Farashin NLB SampAyyukan Accelerator (AF)
Kudin $ OPAE_PLATFORM_ROOT/hw/samples directory yana adana lambar tushe don NLB s masu zuwaampda AFUs:

nlb_mode_0
nlb_mode_0_stp

nlb_mode_3

Lura: $DCP_LOC/hw/samples directory yana adana NLB samplambar tushe ta AFUs don fakitin sakin 1.0.

Don fahimtar NLB sampTsarin lambar tushe na AFU da yadda ake gina shi, koma zuwa ɗaya daga cikin Jagoran Farawa Mai sauri (ya danganta da abin da Intel FPGA PAC kuke amfani da shi):

Idan kana amfani da Intel PAC tare da Intel Arria® 10 GX FPGA, koma zuwa IntelProgrammable Acceleration Card tare da Intel Arria 10 GX FPGA.

Idan kana amfani da Intel FPGA PAC D5005, koma zuwa Intel Acceleration Stack Quick Start Guide for Intel FPGA Programmable Acceleration Card D5005.

Kunshin sakin yana samar da s guda uku masu zuwaampda AFs:

Yanayin NLB 0 AF: yana buƙatar hello_fpga ko fpgadiag mai amfani don yin gwajin lpbk1.
Yanayin NLB 3 AF: yana buƙatar fpgadiag utility don yin trupt, karanta, da rubuta gwaje-gwaje.

Yanayin NLB 0 stp AF: yana buƙatar hello_fpga ko fpgadiag mai amfani don yin gwajin lpbak1.
Lura: Nlb_mode_0_stp AFU iri ɗaya ne da nlb_mode_0 amma tare da kunna fasalin debug na Siginar.
Abubuwan fpgadiag da hello_fpga suna taimakawa AF da suka dace don tantancewa, gwadawa da bayar da rahoto kan kayan aikin FPGA.

Hoto 1. Native Loopback (nlb_lpbk.sv) Babban Matsayin Wrapper

Table 4. NLB Files

File Suna	Bayani
nlb_lpbk.sv	Kundin babban matakin NLB wanda ke ɗaukar mai nema da mai yanke hukunci.
arbiter.sv	Yana ƙaddamar da gwajin AF.
tambaya.sv	Yana karɓar buƙatun daga mai sasantawa kuma ya tsara buƙatun bisa ga ƙayyadaddun CCI-P. Hakanan yana aiwatar da sarrafa kwarara.
nlb_csr.sv	Yana aiwatar da rijistar karantawa/rubutu mai 64-bit da Matsayi (CSR). Rijistar suna tallafawa duka 32- da 64-bit suna karantawa da rubutawa.
nlb_gram_sdp.sv	Yana aiwatar da RAM mai tashar jiragen ruwa guda biyu tare da tashar rubutu ɗaya da tashar karantawa ɗaya.

NLB aiwatar da tunani ne na AFU mai jituwa tare da Intel Acceleration Stack don Intel Xeon CPU tare da FPGAs Core Cache Interface (CCI-P) Manual Reference. Babban aikin NLB shine tabbatar da haɗin kai ta hanyar amfani da tsarin samun damar ƙwaƙwalwar ajiya daban-daban. NLB kuma yana auna bandwidth da karanta / rubuta latency. Gwajin bandwidth yana da zaɓuɓɓuka masu zuwa:

100% karatu
100% rubuta

50% karanta kuma 50% ya rubuta

Bayanai masu alaƙa

Jagorar Farawa Mai sauri na Intel Acceleration Stack don Katin Haɗawa Mai Shirye-shiryen Intel tare da Arria 10 GX FPGA
Tarin Haɗawa don Intel Xeon CPU tare da FPGAs Core Cache Interface (CCI-P) Manual Reference

Jagorar Farawa Mai Saurin Haɗawar Intel don Intel FPGA Mai Shirye-shiryen Haɗawa Katin D5005

Bayanin Gudanar da Loopback na Ƙasa da Bayanin Rajista
Tebur 5. Sunayen CSR, Adireshi da Bayani

Adireshin Byte (OPAE)	Kalma Adireshin (CCI-P)	Shiga	Suna	Nisa	Bayani
0 x0000	0 x0000	RO	DFH	64	AF Feature Header.
0 x0008	0 x0002	RO	AFU_ID_L	64	AF ID low.
0 x0010	0 x0004	RO	AFU_ID_H	64	Babban darajar AF.
0 x0018	0 x0006	Rsvd	CSR_DFH_RSVD0	64	Ajiye Tilas 0.
0 x0020	0 x0008	RO	CSR_DFH_RSVD1	64	Ajiye Tilas 1.
0 x0100	0 x0040	RW	CSR_SCRATCHPAD0	64	Rajistar Scratchpad 0.
0 x0108	0 x0042	RW	CSR_SCRATCHPAD1	64	Rajistar Scratchpad 2.
0 x0110	0 x0044	RW	CSR_AFU_DSM_BASE L	32	Ƙananan 32-bits na adireshin tushe na AF DSM. Ƙananan 6-bits sune 4 × 00 saboda adireshin yana daidaitawa zuwa girman layin cache 64-byte.
0 x0114	0 x0045	RW	CSR_AFU_DSM_BASE H	32	Babban 32-bits na adireshin tushe na AF DSM.
0 x0120	0 x0048	RW	CSR_SRC_ADDR	64	Fara adireshin jiki don buffer tushe. Duk buƙatun karantawa sun shafi wannan yanki.
0 x0128	0x004A	RW	CSR_DST_ADDR	64	Fara adireshin jiki don buffer manufa. Duk buƙatun rubuta sun shafi wannan yanki
0 x0130	0x004c ku	RW	CSR_NUM_LINES	32	Adadin layukan cache.
0 x0138	0x004E	RW	CSR_CTL	32	Yana sarrafa kwararar gwaji, farawa, tsayawa, ƙarfin ƙarshe.
0 x0140	0 x0050	RW	CSR_CFG	32	Yana saita sigogin gwaji.
0 x0148	0 x0052	RW	CSR_INACT_THRESH	32	Iyakar rashin aiki.
0 x0150	0 x0054	RW	CSR_INTERRUPT0	32	SW yana ware ID na APIC mai Katsewa da Vector zuwa na'urar.
Taswirar Kayyade DSM
0 x0040	0 x0010	RO	DSM_MATSAYI	32	Matsayin gwaji da rajistar kuskure.

Tebur 6. CSR Bit Filaye tare da Examples
Wannan Teburin ya lissafa filayen CSR da suka dogara da ƙimar CSR_NUM_LINES, . A cikin example kasa = 14.

Suna	Filin Bit	Shiga	Bayani
CSR_SRC_ADDR	[63]]	RW	2^(N+6) MB mai daidaita adireshi yana nuni zuwa farkon buffer karanta.
CSR_SRC_ADDR	[-1:0.	RW	0x0 ku.
CSR_DST_ADDR	[63]]	RW	2^(N+6) MB mai daidaita adireshi yana nuni zuwa farkon buffer rubutu.
CSR_DST_ADDR	[-1:0.	RW	0x0 ku.
CSR_NUM_LINES	[31]]	RW	0x0 ku.
*ci gaba…*

Suna	Filin Bit	Shiga	Bayani
	[-1:0.	RW	Adadin layukan cache don karantawa ko rubutawa. Wannan bakin kofa na iya bambanta ga kowane gwajin AF. Lura: Tabbatar cewa tushen tushe da wuraren buffer suna da girma isa don ɗaukar nauyin layin cache. CSR_NUM_LINES ya kamata ya zama ƙasa da ko daidaita .
Don dabi'u masu zuwa, ɗauka =14. Sannan, CSR_SRC_ADDR da CSR_DST_ADDR sun karɓi 2^20 (0x100000).
CSR_SRC_ADDR	[31:14]	RW	1MB mai daidaita adireshin.
CSR_SRC_ADDR	[13:0]	RW	0x0 ku.
CSR_DST_ADDR	[31:14]	RW	1MB mai daidaita adireshin.
CSR_DST_ADDR	[13:0]	RW	0x0 ku.
CSR_NUM_LINES	[31:14]	RW	0x0 ku.
CSR_NUM_LINES	[13:0]	RW	Adadin layukan cache don karantawa ko rubutawa. Wannan bakin kofa na iya bambanta ga kowane gwajin AF. Lura: Tabbatar cewa tushen tushe da wuraren buffer suna da girma isa don ɗaukar nauyin layin cache.

Tebur 7. Ƙarin filayen CSR Bit

Suna	Filin Bit	Shiga	Bayani
CSR_CTL	[31:3]	RW	Ajiye
	[2]	RW	Ƙaddamar da gwajin tilastawa. Yana rubuta tutar kammala gwajin da sauran ƙididdiga masu ƙididdiga zuwa csr_stat. Bayan tilasta kammala gwajin, yanayin kayan aikin yana kama da kammala gwajin da ba tilastawa ba.
	[1]	RW	Fara aiwatar da gwaji.
	[0]	RW	Matsakaicin sake saitin gwaji mai aiki. Lokacin da ƙasa take, duk sigogin sanyi suna canzawa zuwa tsoffin ƙimar su.
CSR_CFG	[29]	RW	cr_interrupt_testmode gwaje-gwaje ya katse. Yana haifar da katsewa a ƙarshen kowane gwaji.
	[28]	RW	cr_interrupt_on_error yana aika katsewa lokacin da aka samu kuskure
			ganowa.
	[27:20]	RW	cr_test_cfg yana daidaita halayen kowane yanayin gwaji.
	[13:12]	RW	cr_chsel yana zaɓar tashar kama-da-wane.
	[10:9]	RW	cr_rsel yana saita nau'in buƙatar karantawa. Rubutun suna da
			masu bin ingantattun dabi'u:
			• 1'b00: RdLine_S
			• 2'b01: RdLine_I
			• 2'b11: Yanayin gauraye
	[8]	RW	cr_delay_en yana ba da damar shigar da jinkiri tsakanin buƙatun.
	[6:5]	RW	Yana saita yanayin gwaji,cr_multiCL-len. Ingantattun ƙimomi sune 0,1, da 3.
	[4:2]	RW	cr_mode, yana daidaita yanayin gwaji. Wadannan dabi'u suna aiki:
			• 3'b000: LPBK1
			• 3'b001: Karanta
			• 3'b010: Rubuta
			• 3'b011: TRPUT
*ci gaba…*

Suna	Filin Bit	Shiga	Bayani
			Don ƙarin bayani game da yanayin gwaji, koma zuwa Hanyoyin Gwaji batu a kasa.
	[1]	RW	c_cont yana zaɓar jujjuyawar gwaji ko ƙarewar gwaji. • Lokacin 1'b0, gwajin ya ƙare. Yana sabunta matsayin CSR lokacin An kai adadin CSR_NUM_LINES. • Lokacin 1'b1, gwajin yana jujjuya zuwa adireshin farawa bayan ya kai adadin CSR_NUM_LINES. A yanayin juyawa, gwajin yana ƙarewa kawai akan kuskure.
	[0]	RW	cr_wrthru_en yana canzawa tsakanin WrLine_I da nau'ikan buƙatun Wrline_M. • 1'b0: WrLine_M • 1'b1: WrLine_I
CSR_INACT_THRESHOLD	[31:0]	RW	Iyakar rashin aiki. Yana gano tsawon rumfuna yayin gwajin gwaji. Yana ƙididdige adadin zagayawa marasa aiki a jere. Idan rashin aiki ya ƙidaya > CSR_INACT_THRESHOLD, ba a aika da buƙatu ba, babu amsa karɓa, kuma an saita siginar inact_timeout. Rubutun 1 zuwa CSR_CTL[1] yana kunna wannan ma'aunin.
CSR_INTERRUPT0	[23:16]	RW	Lamba ta Katsewa na na'urar.
CSR_INTERRUPT0	[15:0]	RW	apic_id shine APIC OD don na'urar.
DSM_MATSAYI	[511:256]	RO	Kuskuren Juji Yanayin Gwaji.
	[255:224]	RO	Ƙarshen Sama.
	[223:192]	RO	Fara Sama.
	[191:160]	RO	Adadin Rubutu.
	[159:128]	RO	Yawan Karatu.
	[127:64]	RO	Adadin agogo.
	[63:32]	RO	Gwajin rajistar kuskure.
	[31:16]	RO	Kwatanta da musanya ma'aunin nasara.
	[15:1]	RO	ID na musamman don kowane hali na DSM rubuta.
	[0]	RO	Tutar kammala gwajin gwaji.

Hanyoyin Gwaji
CSR_CFG[4:2] yana saita yanayin gwaji. Akwai gwaje-gwaje huɗu masu zuwa:

LPBK1: Wannan gwajin kwafin ƙwaƙwalwar ajiya ne. AF tana kwafin CSR_NUM_LINES daga tushen buffer zuwa buffer manufa. Bayan an gama gwadawa, software ɗin tana kwatanta tushen tushe da maɓalli.
Karanta: Wannan gwajin yana jaddada hanyar karantawa kuma yana auna karanta bandwidth ko latency. AF yana karanta CSR_NUM_LINES yana farawa daga CSR_SRC_ADDR. Wannan shine kawai gwajin bandwidth ko latency. Ba ya tabbatar da karanta bayanan.
Rubuta: Wannan gwajin yana jaddada hanyar rubutawa kuma yana auna rubuta bandwidth ko latency. AF yana karanta CSR_NUM_LINES yana farawa daga CSR_SRC_ADDR. Wannan shine kawai gwajin bandwidth ko latency. Ba ya tabbatar da bayanan da aka rubuta.
TRPUT: Wannan gwajin ya haɗa karantawa da rubutawa. Yana karanta CSR_NUM_LINES yana farawa daga wurin CSR_SRC_ADDR kuma yana rubuta CSR_NUM_LINES zuwa CSR_SRC_ADDR. Hakanan yana auna karantawa da rubuta bandwidth. Wannan gwajin baya duba bayanan. Karatu da rubutu ba su da abin dogaro

Tebur mai zuwa yana nuna bayanan CSR_CFG don gwaje-gwaje huɗu. Wannan tebur yana saita kuma CSR_NUM_LINES, =14. Kuna iya canza adadin layukan cache ta hanyar sabunta rajistar CSR_NUM_LINES.

Tebur 8. Yanayin Gwaji

FPGA Diagnostics: fpgadiag
Amfanin fpgadiag ya ƙunshi gwaje-gwaje da yawa don tantancewa, gwaji, da rahoto kan kayan aikin FPGA. Yi amfani da fpgadiag mai amfani don gudanar da duk hanyoyin gwaji. Don ƙarin bayani game da amfani da fpgadiag utility, koma zuwa fpgadiag sashen a Bude Programmable Acceleration Engine (OPAE) Tools Guide.

Yanayin NLB0 Hello_FPGA Gudun Gwajin

Software yana fara Ƙwaƙwalwar Matsayin Na'ura (DSM) zuwa sifili.
Software yana rubuta adireshin DSM BASE zuwa AFU. CSR Rubuta(DSM_BASE_H), CSRRubuta(DSM_BASE_L)
Software yana shirya tushe da buffer ƙwaƙwalwar ajiya. Wannan shiri takamaiman gwaji ne.
Software yana rubuta CSR_CTL[2:0] = 0x1. Wannan rubutun yana kawo gwajin daga sake saiti kuma zuwa yanayin daidaitawa. Tsarin yana iya ci gaba kawai lokacin CSR_CTL[0]=1 & CSR_CTL[1]=1.

Software yana daidaita sigogin gwaji, kamar src, destaddress, csr_cfg, layukan lamba, da sauransu.
Software na CSR yana rubuta CSR_CTL[2:0] = 0x3. AF ta fara aiwatar da kisa.
Kammala gwaji:
- Hardware yana cika lokacin da gwajin ya ƙare ko gano kuskure. Bayan kammalawa, AF hardware yana ɗaukaka DSM_STATUS. Zaɓen software DSM_STATUS[31:0]==1 don gano kammala gwajin.
- Software na iya tilasta kammala gwajin ta rubuta CSR ya rubuta CSR_CTL[2:0]=0x7. Hardware AF yana sabunta DSM_STATUS.

Tarihin Bita na Daftarin aiki don Sashin Ayyukan Haɓaka Ayyukan Haɓakawa (AFU) Jagorar Mai Amfani

Sigar Takardu	Intel Acceleration Sigar Tari	Canje-canje
2019.08.05	2.0 (ana goyan bayan Intel Quartus Prime Pro Edition 18.1.2) da 1.2 (an goyan baya tare da Intel Quartus Prime Pro Edition 17.1.1)	Ƙara tallafi don dandamali na Intel FPGA PAC D5005 a cikin sakin na yanzu.
2018.12.04	1.2 (ana goyan bayan Intel Quartus® Prime Pro Edition 17.1.1)	Sakin kulawa.
2018.08.06	1.1 (ana goyan bayan Intel Quartus Prime Pro Edition 17.1.1) da 1.0 (an goyan baya tare da Intel Quartus Prime Pro Edition 17.0.0)	An sabunta wurin lambar tushe don NLBsampda AFU Farashin NLB SampAyyukan Accelerator (AF) sashe.
2018.04.11	1.0 (ana goyan bayan Intel Quartus Prime Pro Edition 17.0.0)	Sakin farko.

Takardu / Albarkatu

intel Native Loopback Accelerator Accelerator Accelerator Unit (AFU) [pdf] Jagorar mai amfani
Unitungiyar Loopback antsal Asibara Arie AFU, 'yan ƙasa Loopback, Tasuwar Hasara Asion AFU, mai aiki naúrar ku

Magana

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