Software na Muhalli mai aiki
Jagorar Mai Amfani
Game da wannan Takardun
Wannan takaddar tana bayyana yadda ake kwaikwaya azamanample Accelerator Aiki Unit (AFU) ta amfani da Intel
Wurin Haɓaka Ayyukan Accelerator (AFU) muhallin kwaikwayo (ASE). Koma zuwa sashin Ayyukan Accelerator Aiki na Intel (AFU) Jagorar Mai amfani (ASE) don cikakkun bayanai kan iyawar ASE da gine-gine na ciki.
Sashin Accelerator Accelerator Aiki na Intel (AFU) Mahalli na Simulation (ASE) kayan aikin haɗin gwiwa ne na kayan aiki da software don kowane Intel FPGA Programmable® Acceleration Card (Intel FPGA PAC). Wannan yanayin haɗin gwiwar software a halin yanzu yana goyan bayan Intel FPGA PACs masu zuwa: 10 GX FPGA
- Katin Haɗawa na Intel FPGA D5005
- Katin Haɗawar Intel Programmable tare da Intel Arria®
ASE tana ba da samfurin ma'amala don ka'idar Core Cache Interface (CCI-P) da ƙirar ƙwaƙwalwar ajiya don ƙwaƙwalwar gida mai haɗe da FPGA.
ASE kuma tana tabbatar da Rukunin Ayyukan Accelerator (AFU) ga bin ka'idoji da APIs masu zuwa: - Ƙayyadaddun ƙa'idar CCI-P
- Avalon
Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwaƙwalwa (Avalon-MM). - The Buɗe Programmable Acceleration Engine (OPAE)®
Tebur 1. Tarin Haɗawa don Intel Xeon® CPU tare da ƙamus na FPGAs
| Lokaci | Gajarta | Bayani |
| Intel Acceleration Stack don Intel Xeon® CPU tare da FPGAs | Hanzarta Tari | Tarin software, firmware da kayan aikin da ke ba da ingantaccen haɗin kai tsakanin Intel FPGA da na'ura mai sarrafa Intel Xeon. |
| Katin Haɗawa Mai Shirye-shiryen Intel FPGA (Intel FPGA PAC) | Farashin Intel FPGA PAC | PCIe * FPGA totur katin. Ya ƙunshi Manajan Interface na FPGA (FIM) wanda ke haɗa nau'i-nau'i tare da na'ura mai sarrafa Intel Xeon akan bas ɗin PCIe. |
| Intel Xeon Scalable Platform tare da Integrated FPGA | Haɗin FPGA Platform | Intel Xeon da dandamali na FPGA tare da Intel Xeon da FPGA a cikin fakiti ɗaya da raba madaidaicin ma'aunin ƙwaƙwalwar ajiya ta hanyar Ultra Path Interconnect (UPI). |
Bayanai masu alaƙa
Intel Accelerator Aiki Unit (AFU) Simulations Environment (ASE) Jagorar mai amfani
Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aikin FPGA da samfuran semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.
*Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.
ISO 9001: 2015 Rajista
Abubuwan Bukatun Tsarin
Anan akwai buƙatun tsarin don Sashin Aiki na Accelerator na Intel (AFU) Mahalli (ASE):
- Tsarin aiki na Linux 64-bit. Wannan sakin ya inganta tsarin aiki masu zuwa:
- Don Intel FPGA PAC D5005: - RHEL 7.6 tare da Kernel 3.10.0-957
- Don Intel PAC tare da Intel Arria 10 GX FPGA: - RHEL 7.6 tare da Kernel 3.10.0-957
- Ubuntu 18.04 tare da Kernel 4.15
- Ɗaya daga cikin na'urorin kwaikwayo masu zuwa:
- 64-bit Synopsys* VCS-MX-2016.06-SP2-1 RTL Simulator
- 64-bit Mentor Graphics* Modelsim SE Simulator (Sigar 10.5c)
- 64-bit Mentor Graphics QuestaSim Simulator (Sigar 10.5c) - C mai tarawa: GCC 4.7.0 ko sama
- CMake: sigar 2.8.12 ko sama
- GNU C Library: sigar 2.17 ko sama
- Python 2.7
- Intel Quartus® Prime Pro Edition software version 19.2 (1)
Kafa Muhalli
Dole ne ku saita yanayin simintin ku kuma shigar da software na OPAE kafin gudanar da ASE.
- Saita masu canjin yanayi masu zuwa don software na simintin ku:
• Don VCS:
$ fitarwa VCS_HOME=
PATH na fitarwa=$VCS_HOME/bin:$PATH
Tsarin adireshin shigarwa na VCS shine kamar haka:
Tabbatar cewa tsarin ku yana da ingantaccen lasisin VCS.
• Don Modelsim SE/QuestaSim:
$ fitarwa MTI_HOME=
$ fitarwa PATH=$MTI_HOME/linux_x86_64/:$MTI_HOME/bin/:$PATH
Tsarin jagorar shigarwa na Modelsim/Questa shine kamar haka:
Tabbatar cewa tsarin ku yana da ingantaccen lasisin Modelsim SE/QuestaSim.
• Don Intel Quartus Prime Pro Edition:
$ fitarwa QUARTUS_HOME=
Tsarin jagorar shigarwa na Intel Quartus Prime shine kamar haka:
Ƙara canjin yanayi don duba lasisin Modelsim:
$ fitarwa MGLS_LICENSE_FILE= - fitarwa:
$ fitarwa LM_LICENSE_FILE= - Cire tarihin lokacin aiki file, kuma shigar da ɗakunan karatu na OPAE, binaries, sun haɗa da files, da ASE dakunan karatu kamar yadda aka bayyana a cikin sashe: Shigar da Kunshin Software na OPAE a cikin jagorar mai amfani da sauri ta Intel Acceleration Stack don Intel FPGA PAC.
Dole ne a saita yanayin ku daidai don daidaitawa da gina AFU. Musamman, dole ne ka shigar da Kit ɗin Haɓaka Software na OPAE (SDK) da kyau. Rubutun OPAE SDK dole ne su kasance akan PATH kuma sun haɗa da files da dakunan karatu waɗanda dole ne su kasance ga mai tarawa C. Bugu da kari, dole ne ku tabbatar da cewa an saita canjin yanayi na OPAE_PLATFORM_ROOT. Koma zuwa Shigar da Kunshin Software na OPAE don ƙarin bayani.
Don tabbatar da cewa an shigar da OPAE SDK da ASE yadda ya kamata, a cikin harsashi, tabbatar da cewa PATH ɗin ku ta ƙunshi afu_sim_setup. Afu_sim_setup yakamata ya kasance a cikin /usr/bin directory ko a ciki idan kun gina OPAE daga tushe files.
Bayanai masu alaƙa
- Intel Accelerator Aiki Unit (AFU) Simulations Environment (ASE) Jagorar mai amfani
- Shigar da Kunshin Software na OPAE
Don Intel PAC tare da Intel Arria 10 GX FPGA. - Shigar da Kunshin Software na OPAE Don Intel FPGA PAC D5005.
Yin kwaikwayon hello_afu a cikin Yanayin-Server
Sannu_afu example shine samfurin AFU mai sauƙi wanda ke nuna farkon CCI-P dubawa. RTL tana biyan mafi ƙarancin buƙatun AFU, yana mai da martani ga I/O mai taswirar ƙwaƙwalwar ajiya don dawo da taken fasalin na'urar da UUID na AFU.
Hoto 1. hello_afu Directory Tree
Lura:
Wannan daftarin aiki yana amfaniample> don koma ga tsohonample design directory, kamar hello_afu a cikin hoton da ke sama.
Software yana nuna ƙananan buƙatun don haɗawa zuwa FPGA ta amfani da OPAE. RTL tana nuna ƙananan buƙatun don gamsar da direban OPAE da hello_afu tsohonampda software.
filelist.txt yana ƙayyade files don kwaikwaiyo da kira na RTL.
Don samun nasarar daidaitawa da gina AFU sampDon haka, dole ne a saita mahallin ku daidai, kamar yadda aka bayyana a Saitin Muhalli.
Bayanai masu alaƙa
- Intel Accelerator Aiki Unit (AFU) Simulations Environment (ASE) Jagorar mai amfani
- Kafa Muhalli a shafi na 5
Haɓaka AFUs tare da OPAE SDK
A cikin Rukunin Ayyukan Accelerator (AFU) Jagorar Mai Haɓakawa
4.1. Kwaikwayo a cikin Client-Server Yanayin
Mai zuwa example kwarara yana gabatar da ainihin rubutun ASE. Kuna iya kwaikwayi duk examples tare da ASE, sai dai eth_e2e_e10 da eth_e2e_e40.
Simulation yana buƙatar matakan software guda biyu: tsari ɗaya don simulation na RTL da tsari na biyu don gudanar da software da aka haɗa. Don gina muhallin kwaikwayo na RTL, gudanar da waɗannan a cikin $ OPAE_PLATFORM_ROOT/hw/samples/hello_afu:
$ afu_sim_setup –source hw/rtl/filelist.txt build_sim
Wannan umarnin yana gina yanayin ASE a cikin kundin littafin gini_sim.
Don ginawa da gudanar da na'urar kwaikwayo:
$ cd gina_sim
$ yi
$ yi sim
Na'urar kwaikwayo tana buga saƙo cewa ya shirya don kwaikwayo. Hakanan yana buga saƙo yana motsa ku don saita canjin yanayin ASE_WORKDIR.
Bude wani harsashi don kwaikwayar software. Dole ne ku tabbatar da saita canjin yanayi OPAE_PLATFORM_ROOT.
Don ginawa da gudanar da software a cikin sabon harsashi:
$ cd $ OPAE_PLATFORM_ROOT
$ fitarwa ASE_WORKDIR=$ OPAE_PLATFORM_ROOT/hw/samples/hello_afu/build_sim/aiki
$ cd $ OPAE_PLATFORM_ROOT/hw/samples/hello_afu/sw
$ yi tsabta
$ yi USER_ASE=1
$ ./hello_afu
Lura:
Sunan takamaiman na ASE_WORKDIR na iya bambanta. Yi amfani da sunan hanyar da gaggawar na'urar kwaikwayo ta bayar.
Software da na'urar kwaikwayo suna gudana, ma'amalar log, da fita.
4.1.1. Log ɗin kwaikwayo Files
Littafin jagorar aikin kwaikwayo yana adana tsarin waveform, ma'amaloli na CCI-P, da log ɗin simulation files.
Kammala matakai masu zuwa zuwa view database na waveform:
- Canja zuwa directory ɗin da kuka aiwatar da umarnin yin sim a ciki.
- Nau'in:
$ yi taguwar ruwa
Umurnin yin kalaman yana kiran tsarin kalaman viewer.
4.1.2. Bayanin Zane
Masu biyowa file da kundayen adireshi suna bayyana simintin AFU:
- $ OPAE_PLATFORM_ROOT/hw/samples/ampda >>/hw/rtl/filelist.txt yana ƙayyade tushen RTL.
- <AFU example> shine example directory kamar yadda aka nuna a cikin hello_afu Directory Tree Figure.
- filelist.txt ya lissafa SystemVerilog, VHDL, da AFU JavaScript Object Notation (.json) file.
- AFU .json yana bayyana musaya da AFU ke buƙata. Hakanan ya haɗa da UUID don gano AFU da zarar an sauke shi zuwa FPGA.
- hw/rtl/hello_afu.json ya bayyana ccip_std_afu a matsayin babban matakin dubawa ta hanyar saita afu-top-interface zuwa ccip_std_afu. ccip_std_afu shine tushen haɗin CCI-P wanda ya haɗa da agogo, sake saiti, da tsarin CCI-P TX da RX. Ƙarin ci gaba exampmu ayyana wasu zaɓuɓɓukan dubawa.
- json file ya bayyana AFU UUID. Rubutun OPAE yana haifar da UUID. RTL tana loda UUID daga afu_json_info.vh.
- sw/Makefile yana haifar da afu_json_info.h. Software yana loda UUID daga afu_json_info.h.
4.1.3. Shirya matsala Kwamfutar Abokin Ciniki-Server
Idan umarnin afu_sim_setup ya gaza, tabbatar da cewa:
- afu_sim_setup yana kan PATH ɗin ku. afu_sim_setup yakamata ya kasance cikin /usr/bin ko a ciki idan kun gina OPAE daga tushe files.
- Kuna da nau'in Python 2.7 ko sama da aka shigar.
Idan ba za ku iya ginawa da aiwatar da na'urar kwaikwayo ba, da alama ba ku shigar da kayan aikin kwaikwayo na RTL da kyau ba.
Lokacin da kuke ƙoƙarin ginawa da sarrafa software, idan kun ga saƙon "Kuskuren ƙidaya AFCs", kun tsallake saitin USE_ASE=1 akan layin umarni. Software yana neman na'urar FPGA ta zahiri. Don murmurewa, maimaita matakan daga yin umarni mai tsabta.
AFU Examples
Tebur 2.
AFU Examples
Kowane AFU example ya haɗa da cikakken README file, Bayar da bayanin aiki da bayanin kula akan yadda ake kwaikwayi zane. Don cikakken fahimtar tsarin simintin, sakeview README file a cikin kowane AFU example.
| AFU | Bayani | |
| hello_mem_afu | hello_mem_afu yana nuna AFU wanda ke gina injin jiha mai sauƙi don samun damar ƙwaƙwalwar ajiya. Na'urar jihar tana da ikon yin amfani da alamu da yawa zuwa ƙwaƙwalwar ajiyar gida kai tsaye haɗe zuwa fil ɗin FPGA, kamar DDR4 DIMMs. Wannan ƙwaƙwalwar ajiya ta bambanta da ƙwaƙwalwar ajiyar da aka samu akan CCI-P. Mai watsa shiri yana sarrafa hello_mem_afu mai kula da injin jihar ta amfani da buƙatun I/O (MMIO) mai taswirar ƙwaƙwalwar ajiya don sarrafawa da rijistar matsayi (CSRs). | |
| hello_intr_afu | hello_intr_afu yana nuna fasalin katse aikace-aikacen a cikin ASE. | |
| DMA da f1.1 (2) _ | dma_afu yana nuna Tushen Gine-gine na DMA don mai masaukin baki zuwa FPGA, FPGA don ɗaukar nauyi, da FPGA zuwa canja wurin ƙwaƙwalwar ajiya na FPGA. Lokacin yin kwaikwayon wannan AFU, girman buffer da ake amfani da shi don canja wurin DMA ƙarami ne don kiyaye lokacin simintin daidai. Don ƙarin bayani, koma zuwa DMA Accelerator Functional Unit (AFU) Jagorar mai amfani. | |
| nlb_mode_O | nlb_mode_O tsarin CCI-P ne wanda ke nuna gwajin kwafin ƙwaƙwalwar ajiya. $0PAE_PLATFORM_ROOT/ sw/opae — lambar ƙira/ sauƙi>/sample/hello_fpga . c ya hada da nlb_mode_0. | |
| $ sh regress.sh -a -r rtl_sim -s <vcslmodelsimlquesta> [-i ) -b |
||
| streaming_dma | streaming_dma yana nuna yadda ake canja wurin bayanai tsakanin ƙwaƙwalwar ajiyar mai watsa shiri da tashar jiragen ruwa na FPGA. Don ƙarin bayani, koma zuwa Sashen Ayyukan Accelerator Aiki na DMA mai yawo (AFU) Jagorar mai amfani. | |
| hello_afu | hello_a fu mai sauƙi ne AFU wanda ke nuna babban haɗin CCI-P. RTL tana biyan mafi ƙarancin buƙatun AFU, amsawa ga MMIO karanta don mayar da fasalin fasalin na'urar da UUID na AFU. | |
Bayanai masu alaƙa
- DMA Accelerator Aiki Unit (AFU) Jagorar mai amfani
Don bayani kan yadda ake haɗawa da aiwatar da dma_afu akan Intel PAC ɗinku tare da Intel Arria 10 GX FPGA. - Sashen Aiki Mai Saurin DMA Mai Yawo (AFU) Jagorar Mai Amfani
Don bayani kan yadda ake haɗawa da aiwatar da streaming_dma_afu akan Intel PAC ɗinku tare da Intel Arria 10 GX FPGA. - Jagorar Mai Amfani na Aikin Sashen Aikin DMA: Intel FPGA Mai Shirye-shiryen Hanzarta Katin D5005
Don bayani kan yadda ake haɗawa da aiwatar da dma_afu akan Intel FPGA PAC D5005. - Jagorar Mai Amfani na Aikin Sashe na Ayyukan DMA Mai Yawo: Katin Haɗawa Mai Shirye FPGA D5005
Don bayani kan yadda ake haɗawa da aiwatar da dma_afu akan Intel FPGA PAC D5005.
Shirya matsala
Idan kuskuren mai zuwa ya bayyana yayin simintin, gyara shi ta bin matakan da ke ƙasa.
Saƙon kuskure
# [SIM] Misalin ASE yana yiwuwa har yanzu yana gudana a cikin kundin adireshi na yanzu!
# [SIM] Duba PID 28816
# [SIM] Simulation zai fita… kuna iya amfani da SIGKILL don kashe tsarin simintin.
# [SIM] Hakanan duba idan .ase_ready.pid file an cire kafin a ci gaba. Magani
- Buga kashe ase_simv don kashe tsarin simintin aljan kuma cire kowane ɗan lokaci files bar baya ta hanyar gazawar tsarin siminti ko kullewa.
- Share .ase_ready.pid file, samu a cikin $ASE_WORKDIR directory.
Rukunin Rubutun Jagorar Mai Amfani da Sauri na ASE
| Intel Acceleration Stack Version | Jagorar Mai Amfani |
| 2.0 | Intel Accelerator Functional Unit (AFU) Simulations Environment (ASE) Jagoran Fara Mai Sauri |
| 1. | Intel Accelerator Functional Unit (AFU) Simulations Environment (ASE) Jagoran Fara Mai Sauri |
| 1. | Intel Accelerator Functional Unit (AFU) Simulations Environment (ASE) Jagoran Fara Mai Sauri |
| 1.0 | Intel Accelerator Functional Unit (AFU) Simulations Environment (ASE) Jagoran Fara Mai Sauri |
Tarihin Bita na Takardu don ASE Jagorar Mai Amfani mai Sauri
| Sigar Takardu | Intel Acceleration Stack Version | Canje-canje |
| 2020.03.06 | 1.2.1 da 2.0.1 | An sabunta masu zuwa: • Bukatun tsarin |
| 2019.08.05 | 2.0 | • An sabunta sigar Intel Quartus Prime Pro a cikin Bukatun Tsari. • An ƙara hello_afu a cikin AFU Examples. • Cire bayanai game da simuli a yanayin koma baya. • Ƙara sabon sashe: ASE Taskokin Jagorar Mai Amfani da Sauri. |
| 2018.12.04 | 1. | Ƙara goyon bayan Ubuntu. |
| 2018.08.06 | 1. | An sabunta buƙatun tsarin, tsarin kundin adireshi, da madaidaitan filesunaye. |
| 2018.04.10 | 1.0 | Sakin farko. |
683200 | 2020.03.06
Aika da martani
Takardu / Albarkatu
 |
intel Accelerator Aiki Naúrar Kwaikwayo Muhalli Software [pdf] Jagorar mai amfani Naúrar Aiki mai Haɗawa, Software na Muhalli na Kwaikwayi, Mai Haɓakawa Naúrar Kwaikwaiyo, Software, Mai Haɓakawa Ayyukan Na'urar Kwaikwaiyo Software. |
