I-Microsemi In-Circuit FPGA Debug

Ulwazi Lomkhiqizo

Imininingwane

• Uhlobo Lwedivayisi: I-Microsemi SmartFusion2 SoC FPGA
• Idethi yokukhishwa: Meyi 2014
• Amandla Okususa iphutha: Ukulungisa iphutha kwe-FPGA ku-Circuit, Isihlaziyi Somqondo Esishumekiwe
• Ubukhulu Imvamisa yokuthwebula idatha: Kufika ku-100MHz

Abstract
Ama-FPGA ayizici ezinamandla zokuklama ezinhlelweni ezishumekiwe ezine-advan yedizayini eminingitages, kodwa lawa madivayisi angaba nemiklamo eyinkimbinkimbi enezinkinga zedizayini eyinkimbinkimbi edinga ukulungiswa. Ukulandelela izinkinga zedizayini ezinjengamaphutha ezincazelo, izinkinga zokusebenzisana kwesistimu, namaphutha esikhathi sesistimu kungaba inselele. Ukufakwa kwamakhono okususa iphutha kumjikelezo ku-FPGA kungathuthukisa ngokumangazayo ukulungisa iphutha lehadiwe, futhi kugweme amahora amaningi okukhungatheka. Leli phepha lichaza izindlela ezimbalwa ezahlukahlukene zokulungisa iphutha ku-FPGAs, lihlonza ukuhwebelana okubalulekile, kanye ne-ex.ample design, eqondiswe kudivayisi ye-Microsemi SmartFusion®2 SoC FPGA, izobonisa ukuthi amakhono amasha angasetshenziswa kanjani ukusheshisa ukulungisa iphutha nokuhlola.

Isingeniso

Ama-FPGA ayizici zokuklama ezigcwele yonke indawo futhi ezinamandla futhi manje atholakala cishe kuwo wonke amasistimu ashumekiwe. Ngomthamo okhulayo, ukufakwa kwamabhulokhi asebenzayo aku-chip ayinkimbinkimbi kanye nokuxhumana okuthuthukisiwe kwe-serial lawa madivayisi angase futhi abe nezinkinga zedizayini eziyinkimbinkimbi ezidinga ukulungiswa. Ukulandelela izindaba ezinjengamaphutha encazelo yokusebenza (ku-FPGA noma ileveli yesistimu), izinkinga zokusebenzisana kwesistimu, izinkinga zesistimu yesikhathi, nezinkinga zokuthembeka kwesignali phakathi kwama-IC (njengomsindo, i-crosstalk, noma ukucabangela) konke kuba nzima kakhulu uma kusetshenziswa ama-FPGA athuthukile. Ukulingisa ngokuqinisekile kuwusizo olukhulu ekuhlonzeni izinkinga eziningi zedizayini, kodwa ukusebenzisana okuningi komhlaba wangempela ngeke kuvele kuze kube yilapho umklamo ususetshenziswa kuhadiwe. Amasu amaningana ahlukene okulungisa izinkinga zedizayini eyinkimbinkimbi athuthukisiwe ukuze kube lula inqubo. Ukuqonda ngokucophelela ngayinye yalezi zindlela eziyinhloko, kuhlanganise ne-advan ehlukahlukenetages ne disadvantages, ilusizo lapho ucubungula ukuthi iyiphi inqubo noma inhlanganisela yamasu afanele umklamo othile.
Umuntu wakudalaampi-le FPGA design, ehloselwe idivayisi ye-Microsemi SmartFusion2 SoC FPGA, ingasetshenziswa ukukhombisa ezinye ze-advantages ne disadvantagamasu alawa maqhinga ajwayelekile kanye namandla amasha kakhulu okususa iphutha eseketheni. Lesi isibampI-le izobonisa ukuthi lawa masu ahlukahlukene angasetshenziswa kanjani ukusheshisa ukuhlonza nokuqedwa kwezinkinga zehadiwe phakathi nokulungisa iphutha lehadiwe.

Kungani i-FPGA Ilungisa iphutha Iyingxenye Ebalulekile Yokuklanywa Nokuthuthukiswa Kwesistimu?
Ama-FPGA anezinhlobo ezimbili zokusetshenziswa eziyinhloko eziwahlukanisa kwezinye izakhi zomklamo. Ama-FPGA angasetshenziswa emkhiqizweni wokukhiqiza noma angasetshenziswa njengenqola yokuthuthukisa ukuze afakazele noma afanekisele umqondo womklamo wokukhiqiza. Uma isetshenziswa njengemoto yokukhiqiza, ama-FPGA angaba umgomo ovumelana nezimo kakhulu kunezimoto zokukhiqiza ezisekelwe ku-ASIC noma ze-CPU. Lokhu kubaluleke kakhulu ekwakhiweni okusha, okungakasetshenziswa kuhadiwe okwamanje. Imiklamo enezinketho ezahlukene zezakhiwo ingadalwa kalula futhi ihlolwe ukuze kubonakale umklamo ofanele. Ama-FPGA anama-on-chip processors (SoC FPGAs) akwenza kube nokwenzeka futhi ukuhwebelana ngokucubungula okusekelwe ku-CPU ngemisebenzi yokusheshisa esekelwe kwihadiwe esekelwe ku-FPGA. Lezi advantagama-es anganciphisa kakhulu isikhathi esidingekayo sokuklama, ukuqinisekiswa, ukuhlola, nokuhlaziya ukwehluleka kokuthuthukiswa komkhiqizo omusha.
Uma isetshenziselwa ukwenza i-prototyping umklamo, mhlawumbe ukukhiqiza i-ASIC, ukuguquguquka kwe-FPGA kuyinzuzo eyinhloko. Inkundla yezingxenyekazi zekhompuyutha yangempela, ngisho naleyo engasebenzi ngesivinini esigcwele, yenza kube lula kakhulu ukuthola amamethrikhi anemininingwane okusebenza kwesistimu, idatha yokuhlaziywa komthamo kanye nemiphumela yobufakazi bomqondo wezakhiwo. Ukusekelwa kwe-FPGA kokusetshenziswa okuqinile kwamabhasi ajwayelekile embonini (njenge-PCIe®, i-Gigabit Ethernet, i-XAUI, i-USB, i-CAN, nezinye) kwenza ukuhlola okuhlotshaniswa nalezi zindawo kube lula. Imindeni emisha kakhulu yama-FPGA anama-on-chip ARM processors (SoC FPGAs), yenza kube lula ukwenza i-prototype ukuqaliswa ngamaphrosesa ashumekiwe ukuze. Ikhodi yokucubungula eyake yathuthukiswa ingathuthwa ku-prototype kanye nekhodi entsha edalwe ngokuhambisana nomzamo wokuklama ihadiwe.

Le nhlanganisela yephrosesa evamile enamabhasi okusebenza ajwayelekile yenza kube nokwenzeka ukusebenzisa i-ecosystem enkulu yamakhodi atholakalayo emitapo yolwazi, abashayeli, ama-API asebenzayo, Amasistimu Okusebenza Esikhathi Sangempela, kanye Nezinhlelo Zokusebenza ezigcwele ukuze wakhe umfanekiso osebenzayo ngokushesha okukhulu. Ukwengeza, uma umklamo usuqinisiwe, i-prototype ye-FPGA ingasetshenziswa ukuthwebula amasethi okuhlola okulingisa abanzi (kokubili ukuvuselela kanye nempendulo) abonisa idatha yesistimu yangempela. Lawa masethi wedatha angabaluleka ekudaleni ukulingisa kokugcina kwe-ASIC noma okunye ukuqaliswa kokukhiqiza. I-advantagUkusetshenziswa kwe-FPGA njengesibonelo sokuklama kunganciphisa kakhulu isikhathi sokuklama, ukuqinisekiswa, ukuhlola, nokuhlaziya ukwehluleka ukuze kusetshenziswe umkhiqizo wokugcina.
Kuwo womabili lawa mamodeli ajwayelekile okusetshenziswa kwe-FPGA ukuguquguquka kwe-FPGA njengento ehlosiwe yokuklama kuyi-advan ebalulekile.tage. Lokhu kusho ukuthi izinguquko eziningi zedizayini nokuphindaphinda kuzoba yinto evamile, futhi ngaleyo ndlela ikhono lokususa amaphutha edizayini ngokushesha lingabaluleka ekunikeni amandla izinketho eziningi zokuklama ngangokunokwenzeka. Ngaphandle kwekhono elisebenzayo lokususa iphutha iningi le-advantagUkuvumelana nezimo komklamo we-FPGA kuzoncishiswa isikhathi esengeziwe sokususa iphutha esidingekayo. Ngenhlanhla, ama-FPGA angaphinda anikeze izici zehadiwe ezengeziwe ezenza kube lula ukulungisa iphutha ngesikhathi sangempela. Ngaphambi kokubheka lawa makhono, ake siqale sibheke izinhlobo ezivame kakhulu zezinkinga idizayini ye-FPGA okungenzeka ibhekane nazo ukuze sibe nesizinda esifanele sokuhlola ukusebenza kahle kanye nokuhwebelana okuhlobene kwamathuluzi ahlukahlukene okususa amaphutha.

Izinkinga Ezivamile Lapho Ulungisa Imiklamo ye-FPGA

Ngokuhambisana namandla anwetshiwe alethwa ama-FPGA esimanje, ukukhuphuka okuyinkimbinkimbi okuhlobene kwenza kube nzima kakhulu ukudala imiklamo engenamaphutha. Eqinisweni, kulinganiselwa ukuthi ukulungisa iphutha kungathatha ngaphezu kuka-50% womjikelezo womklamo oshumekiwe wesistimu. Njengoba izingcindezi zesikhathi ziye emakethe ziqhubeka nokuminyanisa umjikelezo wokuthuthukiswa, ukulungisa amaphutha kwehadiwe yesistimu yokuqala kwehliselwa emcabangweni ongasemuva—okuvame kakhulu kucatshangwa ukuthi lokho kuqinisekisa (ngokwako okuyiphesenti elikhulutage yohlelo lokuthuthukisa), izobamba zonke iziphazamisi ngaphambi kokulethwa kwesistimu yokuqala. Ake sibheke nje izinhlobo ezimbalwa ezivamile zezinkinga zesistimu ukuze siqonde kangcono izinselelo umklamo ojwayelekile ozobhekana nazo ngesikhathi sokulethwa kwesistimu yokuqala.

Amaphutha encazelo yokusebenza angaba nzima ngokuphindwe kabili ukutholakala njengoba umklami engazange aqonde imfuneko ethile, ngakho iphutha linganakwa ngisho nalapho ubheka ngokucophelela imininingwane yomklamo. Isibample yephutha elivamile lencazelo yokusebenza kungaba lapho ukuguqulwa komshini wesimo kungagcini kusesimweni esifanele. Amaphutha angaphinda avele kuzixhumi ezibonakalayo zesistimu njengenkinga yokusebenzisana. Ukubambezeleka kwesixhumi esibonakalayo, isiboneloampi-le, ingase icaciswe ngokungalungile okuholela ekuchichimeni kwebhafa okungalindelekile noma esimweni sokugeleza kancane.
Izinkinga zezinga lesistimu yesikhathi zingomunye umthombo ovame kakhulu wamaphutha omklamo. Imicimbi ye-Asynchronous, ikakhulukazi, iwumthombo ovamile wamaphutha lapho ukuvumelanisa noma ukunqamula imiphumela yesizinda sesikhathi ingacatshangwa ngokucophelela. Uma isebenza ngesivinini lezi zinhlobo zamaphutha zingaba yinkinga kakhulu futhi zingase zibonakale ngokungavamile, mhlawumbe kuphela lapho amaphethini edatha athile eziveza. Ukwephulwa kwesikhathi esiningi okuvamile kuwela kulesi sigaba futhi kuvame ukuba nzima kakhulu, uma kungenzeki ukukulingisa.

Ukwephulwa kwesikhathi kungase futhi kube umphumela wokwethembeka kwesignali ephansi phakathi kwamasekhethi ahlanganisiwe, ikakhulukazi kumasistimu anamareyili amaningi wamandla wesekethe ngayinye. Ukuthembeka kwesignali ephansi kungaholela emsindweni wesignali, i-crosstalk, izibonisi, ukulayisha ngokweqile kanye nezindaba ze-Electro-Magnetic Interference (EMI) ezivame ukuvela njengokwephulwa kwesikhathi. Izinkinga zokuphakelwa kwamandla, njengesikhashana (ikakhulukazi phakathi nokuqaliswa kwesistimu noma ukuvala), ukuhluka komthwalo kanye nezingcindezi zokuphela kwamandla kungase kubangele amaphutha angaqondakali, ngokuvamile angalandelelwa kalula abuyele emthonjeni wokuphakelwa kwamandla. Ngisho nalapho umklamo ulungile ngokuphelele izinkinga zokwenziwa kwebhodi zingase zibangele amaphutha. Amalunga e-solder anephutha nezixhumi ezinamathiselwe ngokungafanele, ngokwesiboneloampi-le, ingaba umthombo wamaphutha futhi ingase incike ezingeni lokushisa noma indawo yebhodi. Ukusetshenziswa kwamasu okupakisha e-FPGA athuthukisiwe kungenza kube nzima ukuhlola amasiginali ebhodini lesekethe eliphrintiwe ukuze, ngakho-ke ukuthola nje ukufinyelela kusiginali oyifunayo kuvame ukuba yinkinga. Ngokuvamile izinkinga eziningi zedizayini azidali iphutha elisheshayo futhi kufanele zinyakaze kumklamo kuze kube yilapho iphutha liziveza. Ukulandelela iphutha lokuqala emuva kumbangela ngokuvamile kungaba umsebenzi okhungathekisayo, onzima futhi odla isikhathi.

OkwesiboneloampNokho, okungalungile kancane kuthebula lokuhumusha kungase kungaholeli ephutheni kuze kube imijikelezo eminingi kamuva. Amanye amathuluzi esizoxoxa ngawo kamuva kuleli phepha, asebenzisa izingxenyekazi zekhompuyutha ezizinikele zokususa iphutha, aqondiswe ngokukhethekile ekwenzeni lokhu 'kuzingelwa kweziphazamisi' kusheshe futhi kube lula. Ngaphambi kokungena emininingwaneni yalawa mathuluzi, ake siqale sibheke ukulingisa kwesu lokususa iphutha elisuselwa kwisoftware ukuze siqonde kangcono i-advan.tages ne disadvantagukusebenzisa ukulingisa ukulungisa iphutha.

Ukusetshenziswa Kokulingisa Ukulungisa iphutha
Ngokuvamile ekulingiseni kwedizayini, zonke izingxenye zempilo yangempela ngaphakathi nangaphandle komklamo zimodela ngokwezibalo njengezinqubo zesofthiwe ezisebenza ngokulandelana ku-CPU evamile. Ukusebenzisa inhlobonhlobo yezivuseleli ekwakhiweni nasekuhloleni umphumela olindelekile ngokuqhathaniswa nokuphuma kwemiklamo elungisiwe, kuyindlela elula yokubamba amaphutha edizayini asobala kakhulu. Iwindi elibonisa ukugijima kokulingisa okujwayelekile linikezwe kuMfanekiso 1 ngezansi. I-advan ecaciletagI-e yamavesi okulingisa ukulungisa iphutha okususelwa kuhadiwe, ukuthi ukulingisa kungenziwa kusofthiwe—awukho umklamo wangempela osuselwe kuhadiwe nebhentshi lokuhlola elidingekayo. Ukulingisa kungabamba ngokushesha amaphutha amaningi edizayini, ikakhulukazi lawo ahlotshaniswa nokucaciswa okungalungile, ukungaqondi kahle kwezidingo zokusebenzelana, amaphutha okusebenza, nezinye izinhlobo eziningi zamaphutha 'abina' atholwa kalula ngama-vector alula avuselelayo.

Ukulingisa kuphumelela ikakhulukazi uma inhlanganisela ebanzi yokuvuselela itholakala kumklami futhi imiphumela yaziwa kahle. Kulezi zimo, ukulingisa kungenza uhlolo olucishe luphelele lwedizayini. Ngeshwa, imiklamo eminingi ayinakho ukufinyelela okulula kumasudi okuhlola abanzi futhi inqubo yokuwadala ingadla isikhathi esiningi. Ukudala isuti yokuhlola ehlanganisa u-100% womklamo cishe akunakwenzeka ngemiklamo emikhulu esekelwe ku-FPGA futhi izindlela ezinqamulelayo kufanele zisetshenziswe ukuzama ukumboza izici ezibalulekile zomklamo. Obunye ubunzima ngokulingisa, ukuthi akukona ukuqaliswa 'komhlaba wangempela' futhi akukwazi ukubamba imicimbi engavumelani, ukusebenzisana kwesistimu yesivinini, noma ukwephulwa kwesikhathi. Okokugcina, inqubo yokulingisa ingahamba kancane kakhulu futhi uma ukuphindaphinda okuningi kuyadingeka ukulingisa ngokushesha kuba kudla isikhathi esiningi, futhi ngokuvamile ingxenye ebiza kakhulu yenqubo yokuthuthukisa.

Njengenye indlela (noma mhlawumbe kushiwo kangcono, njengesengezo ekulingiseni) Abaklami be-FPGA bathole ukuthi bangakwazi ukwengeza ihadiwe yokususa iphutha kumklamo we-FPGA ukuze babheke futhi balawule amasignali abalulekile ngaphakathi kwedivayisi. Lawa masu athuthukiswa ekuqaleni njengezindlela ze-ad-hoc, kodwa kancane kancane athuthuke aba isu elijwayelekile lokususa iphutha lehadiwe. Lokhu kusetshenziswa kwamandla e-in-circuit debug kunikeza i-advan ebalulekiletage yemiklamo esekwe ku-FPGA futhi isigaba esilandelayo sizohlola amasu amathathu ajwayelekile kanye ne-advan yawo ehlukahlukenetages ne disadvantages.

Izindlela Ezijwayelekile Zokulungisa Isiphazamiso Ezingaphakathi Kwesekethe zama-FPGA
Amasu ajwayeleke kakhulu okusebenzisa amakhono okususa iphutha kumjikelezo kuma-FPGA asebenzisa isihlaziyi se-logic esishumekiwe, okokusebenza kokuhlola kwangaphandle, noma ihadiwe ye-signal probe ezinikele eshumekwe ngaphakathi kwendwangu ye-FPGA. I-analyzer eshumekiwe ye-logic ngokuvamile isetshenziswa kusetshenziswa indwangu ye-FPGA futhi ifakwa ekwakhiweni. I-JTAG imbobo isetshenziselwa ukufinyelela i-analyzer futhi idatha ethathwe ingaboniswa ku-PC. Uma kusetshenziswa okokusebenza kokuhlola kwangaphandle, idizayini ye-FPGA ngaphansi kokuhlolwa iyashintshwa ukuze amasiginali akhethiwe we-FPGA adluliselwe kumaphini okukhipha. Lezi zikhonkwane zingabe sezibhekwa ngemishini yokuhlola yangaphandle. Lapho kusetshenziswa ihadiwe yokuhlola isignali ezinikele, ukukhethwa okubanzi kwamasignali angaphakathi kungafundwa ngesikhathi sangempela. Okunye ukusetshenziswa kophenyo kungasetshenziswa ngisho ukubhala ukuze kubhaliswe noma izindawo zememori zithuthukise amakhono okulungisa iphutha. Ake sibheke kabanzi nge-advantages ne disadvantages ngayinye yalezi zindlela bese ubheka i-example design ukubona ukuthi lezi zindlela ezihlukene zingaba nomthelela kanjani esikhathini sokulungisa iphutha.

In-Circuit FPGA Debug-Embedded Logic Analyzer
Umqondo wokuhlaziya ingqondo eshumekiwe ubuwumphumela oqondile wamakhono okulungisa amaphutha e-ad-hoc endaweni abaklami abawasebenzise lapho ama-FPGA eqala ukusetshenziswa. Abahlaziyi bengqondo abashumekiwe bangeze amakhono amasha futhi basusa imfuneko yokuthi umklami azenzele esabo isihlaziyi. Ama-FPGA amaningi anikeza lawa makhono futhi abantu besithathu banikeza abahlaziyi abajwayelekile (Identify®, evela ku-Synopsys, i-ex eyodwa edumile.ample) ekwazi ukuxhumana kalula ngamathuluzi ezinga eliphezulu ukuze kuthuthukiswe ukukhiqiza.

Umsebenzi wokuhlaziya okunengqondo ushuthekwa ekwakhiweni, kusetshenziswa indwangu ye-FPGA kanye namabhulokhi enkumbulo ashumekiwe njengama-trace buffers, njengoba kubonisiwe kuMfanekiso 2. Izinsiza zokucupha ziyadalwa ukuze ukusebenzisana kwesignali okuyinkimbinkimbi kukhethwe futhi kuthathwe kalula. Ukufinyelela kusihlaziyi sokulawula nokudluliswa kwedatha ngokuvamile kwenziwa nge-J ejwayelekileTAG port ukwenza lula izidingo zesixhumi esibonakalayo. Idatha ethwetshuliwe ingaboniswa ku-PC kusetshenziswa okuvamile viewing isoftware futhi ivamise ukulingisa okuphumayo kwe-waveform simulator enengqondo viewisitayela.

I-advantagInhloso yale ndlela ukuthi awekho amaphinikhodi e-FPGA I/O engeziwe asetshenziswayo, i-J ejwayelekile kuphelaTAG izimpawu. I-IP cores yokuhlaziya ingqondo eshumekiwe ngokuvamile ayibizi futhi kwezinye izimo ingaba inketho ekuhlanganiseni okukhona kwe-FPGA, noma amathuluzi okulingisa. Kwezinye izimo, isihlaziyi se-logic esishumekiwe singaphinda sinikeze okuphumayo okwengeziwe kuma-I/O angasetshenzisiwe, uma kulula kakhulu. Enye ye-disadvantagNgokuphathelene nale ndlela ukuthi inani elikhulu lezinsiza ze-FPGA liyadingeka. Ikakhulukazi, uma kusetshenziswa amabhafa okulandelela lokhu kuzonciphisa inani lezinkumbulo ezitholakalayo. Uma i-buffer ebanzi idingeka lokhu futhi kuzoba ukuhwebelana ngokumelene nokujula kwenkumbulo (njengoba ukusetshenziswa kwenkumbulo ebanzi kubangela ukujula kwenkumbulo okungashoni)—ububi obukhulu.tage uma usebenzisa amadivaysi amancane. Mhlawumbe i-drawback enkulu kunazo zonke kule nqubo ukuthi ngaso sonke isikhathi lapho ukulungiswa kokubekwa kwe-probe kwenziwa, kuyadingeka ukuthi kuhlanganiswe futhi kuhlelwe kabusha umklamo. Uma usebenzisa idivayisi enkulu le nqubo ingathatha isikhathi esibalulekile. Ngenxa yendlela ama-probe wesignali abekwe ngayo ekwakhiweni kungase kube nzima ukuhlobanisa ubudlelwano besikhathi sesiginali. Ukwengeza, ukubambezeleka phakathi kwama-probe wesiginali akuhambisani futhi ngaleyo ndlela ubudlelwano besikhathi kunzima ukuqhathanisa. Lobu ubunzima obuthile lapho uqhathanisa amasignali asynchronous noma amasignali asuka ezizindeni zesikhathi ezahlukene.

I-In-Circuit FPGA Debug – Izinto Zokuhlola Zangaphandle
Ukusetshenziswa kwekhodi yokususa iphutha engaphakathi kwesekhethi ngokuhambisana nempahla yokuhlola yangaphandle kwaba intuthuko engokwemvelo lapho isihlaziyi somqondo sangaphandle sase sitholakalela ukuhlolwa kwesistimu. Ngokwenza ikhodi elula yokususa iphutha ukuze ubone nokukhetha amasignali okuhlola angaphakathi bese uwasebenzisa ku-FPGA I/Os, njengoba kukhonjisiwe kuMfanekiso 3, bekungenzeka ukukhulisa amakhono athuthukile abahlaziyi (njengama-trace buffers amakhulu, ukulandelana kokucupha okuyinkimbinkimbi, nama-multiple viewing options) ukuze udale izindawo ezilula kodwa ezinamandla zokususa iphutha. Amakhono angaphezulu ayinkimbinkimbi e-circuit wezinketho zokucupha ezithuthukisiwe anganciphisa inani lokuphumayo elidingekayo. Okwesiboneloample, ukukhetha amakheli athile ebhasini elibanzi kungase kuvimbele uma izikhonkwane zangaphandle bezidingeka.
Ukusebenzisa ingqondo ye-FPGA yangaphakathi kunciphisa kakhulu izimfuneko ze-I/O futhi kungabheka ngisho namaphethini athile ekheli (mhlawumbe ukushaya ucingo nokulandelana kokubuyisela) ukuze kulungiswe izinkinga eziyinkimbinkimbi. Uma okusetshenziswa kubonwa okuvamile kutholakala, lokhu kungenza kube lula ijika lokufunda futhi kuthuthukise ukukhiqiza.

I-advantagInhloso yale ndlela ukuthi isebenzisa izindleko zempahla yokuhlola yangaphandle futhi ngaleyo ndlela azikho izindleko zamathuluzi ezengeziwe. Amanye ama-IP cores wesekethe yokususa iphutha ayatholakala kubakhiqizi bemishini noma abakhiqizi be-FPGA, futhi angaba yizindleko eziphansi kakhulu noma amahhala. Inani lezinsiza ze-FPGA ezidingekayo ukuze kusetshenziswe i-logic yokukhetha isignali lincane kakhulu, futhi njengoba umsebenzi wokulandela umkhondo wenziwa kusetshenziswa i-analyzer ye-logic yangaphandle, azikho izinkumbulo ze-block ezidingekayo. Njengoba indlela yokukhetha ingabizi, inani elikhulu lamashaneli ane-triggering ebanzi lingasekelwa nalo. I-logic analyzer ingasebenza kukho kokubili imodi ye-Timing kanye ne-State mode esiza ukuhlukanisa izinkinga ezithile zesikhathi.
I-disadvantagama-es ale ndlela angafaka isidingo sokuthenga isihlaziyi esinengqondo, uma singakabelwa iphrojekthi. Lokhu disadvantage kungase kube ngokwanele ukudikibalisa le ndlela ezimweni eziningi. Nokho, qaphela ukuthi ezinye izinketho zokuhlaziya ingqondo ezingabizi kakhulu seziyatholakala ezisebenzisa i-PC noma ithebhulethi ukuze ziboniswe, okwenza le nketho ingabizi kakhulu ezidingweni ezilula zokususa iphutha.
Inombolo yezikhonkwane ze-FPGA ezisetshenzisiwe ingaba enye i-didvantage futhi uma amabhasi abanzi edinga ukubhekwa, ukuhlela okubalulekile kwesakhiwo sebhodi kanye nokwengezwa kwezixhumi zokususa iphutha kuyadingeka. Lesi sidingo izikhathi eziningi kunzima ukubikezela ekuqaleni kwesigaba sokuklama kanye nokunye okuyinkimbinkimbi okungafuneki. Ngokufanayo nendlela yokuhlaziya ingqondo eshumekiwe isu lokuhlola langaphandle lidinga ukuphinda kuhlanganiswe futhi kuhlelwe kabusha umklamo, lapho kudingeka ukuhlolwa okusha ngakunye.

I-disadvan evamiletagamasu alawa maqhinga amabili—ukusetshenziswa kwezinsiza ze-on-chip (okungase futhi kube nomthelela ekusebenzeni kwesikhathi komklamo nokudala izimfuneko ezengeziwe zokulungisa iphutha) isidingo sokuhlanganisa futhi ukuhlela kabusha umklamo (okungangeza amahora noma ngisho nezinsuku ohlelweni lokususa iphutha) ukuhlela kwangaphambili okudingekayo ukuze kutholakale izimo zokuhlola ezingase zibe khona, kanye nokusetshenziswa kwe-chip eyengeziwe ye-I/O yezinsiza ngaphandle kokudala lezi zidingo. Impendulo eyodwa kwaba ukungezwa komqondo ozinikele wokususa iphutha endwangu ye-FPGA kwamanye amadivayisi. Ukulungisa iphutha kumjikelezo kusetshenziswa ama-hardware probe kwaba umphumela.

In-Circuit FPGA Debug - Hardware Probes
Ukusetshenziswa kwezingxenyekazi zekhompuyutha kwenza kube lula izindlela zokususa iphutha ezingaphakathi kwesekethe kuma-FPGA. Le nqubo isetshenziswe njengesici se-Live Probe ku-SmartFusion2®SoC FPGA kanye namadivayisi e-IGLOO®2 FPGA, yengeza imigqa yophenyo enikelwe endwangu ye-FPGA ukuze ibone okukhiphayo kwanoma iyiphi ibhithi ye-logic element. Njengoba kukhonjisiwe kumdwebo webhulokhi kuMfanekiso 4, ama-hardware probe atholakala eziteshini ezimbili ze-probe A no-B.

Imiphumela ekhethiwe yerejista (amaphuzu okucwaninga), njengaleyo etholakala ngezansi kwesibalo, ihanjiswa ngaphezu kweziteshi ezimbili zophenyo futhi uma ikhethiwe ingasetshenziswa esiteshini esingu-A noma esingu-B. Lezi zimpawu zesiteshi zesikhathi sangempela zingabe sezithunyelwa kumaphinikhodi we-Probe A kanye ne-Probe B kudivayisi. Amasiginali we-Probe A kanye ne-Probe B nawo angahanjiswa ngaphakathi kumhlaziyi we-logic oshumekiwe.

Qaphela ukuthi izici zesikhathi zamaphini okuhlola zivamile futhi zinokuchezuka okunganaki ukusuka endaweni eyodwa yokuhlola ukuya kwelinye, okwenza kube lula kakhulu ukuqhathanisa izici zesikhathi zamasiginali wesikhathi sangempela. Idatha ingathwetshulwa kufika ku-100MHz okwenza ifanele iningi lemiklamo eqondiwe.
Mhlawumbe okubaluleke kakhulu izindawo zamaphoyinti okuhlola, njengoba zingakhethiwe njengengxenye yomklamo osetshenzisiwe (zikhethwa ngezingxenyekazi zekhompuyutha ezizinikezele ngenkathi umklamo usebenza ku-FPGA), zingashintshwa ngokushesha ngokumane uthumele idatha yokukhetha kudivayisi. Akukho ukuhlanganiswa kabusha kwedizayini nokuhlela kabusha okudingekayo.
Ukwenza kube lula ukusetshenziswa kwekhono le-Live Probe nakakhulu, ithuluzi lesofthiwe yokususa iphutha liyakwazi ukufinyelela kuzo zonke izindawo zesignali yophenyo ngokususa iphutha okukhiqizwa ngokuzenzakalela. file. Njengoba kukhonjisiwe kuMfanekiso 5, igama lesiginali lingakhethwa ohlwini lwesignali futhi lisetshenziswe kushaneli oyifunayo. Lokhu kungenziwa ngisho nalapho umklamo usebenza ukuze umsebenzi wokuhlola ngaphakathi komklamo ungabi nazihibe futhi usebenze kahle kakhulu.

Ezimweni eziningi, ikhono lophenyo lwezingxenyekazi zekhompuyutha, njenge-Live Probe, lingasetshenziswa ngokuhambisana nesihlaziyi se-logic esishumekiwe esichazwe ngaphambilini kanye namasu okuhlola angaphandle.

Njengoba kuboniswe kuMdwebo 6, ikhono le-Live Probe lokukhetha amasignali 'on the fly' lenza kube nokwenzeka ukushintsha ngokushesha futhi kalula amasignali ngaphansi kokubhekwa ngaphandle kokudinga ukuhlanganisa kabusha idizayini. Isihlaziyi somqondo sangaphandle noma ububanzi bungakwazi ukubona kalula amasiginali aphenyisiwe, njengoba kuboniswe engxenyeni engenhla kwesokudla yesibalo kumaphini okukhiphayo okuhlola. Kungenjalo (noma mhlawumbe ngisho nangaphezu kwalokho) i-analyzer ye-logic yangaphakathi (ibhulokhi ye-ILA Khomba, eboniswe emfanekisweni) ingasetshenziswa ukubuka izikhonkwane zokuhlola. Izimpawu ze-probe zingathathwa yi-ILA futhi zibonwe efasiteleni le-waveform. Izindawo zokuhlola zingashintshwa ngaphandle kwesidingo sokuhlanganisa kabusha idizayini eqondiwe.
Qaphela ukuthi amandla engeziwe okucupha nokulandela angasetshenziswa ukuthuthukisa ukusebenza kophenyo, okwenza kube lula ukubona izinkinga zedizayini eziyinkimbinkimbi.

Amakhono engeziwe okulungisa iphutha lezingxenyekazi zekhompiyutha nawo ayatholakala kumadivayisi we-SmartFusion2 SoC FPGA kanye ne-IGLOO2 FPGA. Elinye lalawa makhono, elibizwa nge-Active Probe, lingakwazi ukufunda noma ukubhala ngokushintshashintshayo nangokuvumelanayo kunoma iyiphi ingxenye yerejista yezinto ezinengqondo. Inani elibhaliwe liphikelela kumjikelezo wewashi elilodwa ukuze ukusebenza okuvamile kuqhubeke, okulenza libe ithuluzi lokususa iphutha elibaluleke kakhulu. I-Active Probe inentshisekelo ethile uma kufunwa ukubonwa okusheshayo kwesignali yangaphakathi (mhlawumbe ukuze uhlole ukuthi iyasebenza noma isesimweni esifiswayo, njengesignali yokusetha kabusha), noma uma kunesidingo sokuhlola ngokushesha umsebenzi onengqondo ngokubhalela endaweni yokuphenya.
(mhlawumbe ukuqalisa ukuguqulwa komshini wombuso ngokusetha ngokushesha inani lokufaka ukuze uhlukanise inkinga yokugeleza kokulawula).

Elinye ikhono lokususa iphutha elinikezwe iMicrosemi iMemory Debug. Lesi sici sivumela umklami ukuthi afunde ngokushintshashintshayo nangokuvumelanayo noma abhalele ibhulokhi ye-SRAM yendwangu ekhethiwe ye-FPGA. Njengoba kubonisiwe kusithombe-skrini seThuluzi Lokususa iphutha (Umfanekiso 7), uma ithebhu ethi Vimbela Inkumbulo kukhethwa umsebenzisi angakhetha inkumbulo ayifunayo ukuze ayifunde, akhiphe isifinyezo sememori, aguqule amanani ememori, bese ebhala amanani abuyele kudivayisi. Lokhu kungaba wusizo ikakhulukazi ekuhloleni noma ekusetheni amabhafa edatha asetshenziswa ezimbobeni zokuxhumana ukuze kusetshenziswe iphedi yokuklwebha egxile ekubalweni noma ngisho nakwikhodi efakwe i-CPU eshumekiwe. Ukulungisa iphutha amaphutha ancike kudatha ayinkimbinkimbi kushesha kakhulu futhi kulula uma izinkumbulo zingabonwa futhi zilawuleke ngokushesha okukhulu.

Uma idizayini isilungisiwe kungase kufiseke ukucisha amakhono okulungisa ihadiwe ukuze kuvikelwe ulwazi olubucayi. Umhlaseli angasebenzisa lezi zindawo ezifanayo ukuze afunde ulwazi olubalulekile noma aguqule izilungiselelo zesistimu ezingavumela ukufinyelela okulula ezingxenyeni ezibucayi zesistimu. I-Microsemi yengeze izici zokuvumela umklami ukuthi avikele idivayisi ngemva kokuqedwa kokulungisa iphutha. Okwesiboneloampfuthi, ukufinyelela ku-Live Probe kanye ne-Active Probe kungakhiywa ukuze kukhubazwe ngokuphelele umsebenzi njengendlela yokuhlasela okungenzeka ibe khona (kuqeda ngisho namathuba omsebenzi wokuphenya odala noma yimaphi amaphethini ekunikezeni okwamanje angasetshenziswa ukuzama nokubheka idatha yophenyo ngokungaqondile). Ngaphandle kwalokho, ukufinyelela ezingxenyeni ezikhethiwe zomklamo kungavalelwa ngaphandle ukuze kuvinjelwe ukufinyelela kulezo zigaba kuphela. Lokhu kungaba lula uma ingxenye yedizayini kuphela idinga ukuvikeleka ukuze wonke umklamo usafinyeleleke ekuhlolweni kwenkambu noma ekuhlaziyweni kwamaphutha.

Ishadi lokuqhathanisa le-In-Circuit Debug
Manje ukuthi kabusha okuningiliziweview kumasu amathathu ayinhloko okulungisa iphutha lezingxenyekazi zekhompuyutha achazwe njengeshadi elifingqiwe, njengoba kukhonjisiwe kuMfanekiso 8, lenziwe elinemininingwane nge-advan ehlukahlukene.tages ne disadvantages yendlela ngayinye. Ukukhumbula ukuthi amanye amasu angasetshenziswa ngokubambisana (i-Live Probe kanye ne-Internal Logic Analyzer (ILA), njenge-Synopsys Identify, ngokwesibonelo.ample), singabona amandla abalulekile kanye nobuthakathaka besu ngalinye. Iqoqo lamakhono okulungisa iphutha lezingxenyekazi zekhompuyutha ezingaphakathi kwesifunda (i-Live Probe, i-Active Probe, ne-Memory Debug—ebizwa ngokuthi i-SmartDebug), ibuthakathaka kakhulu uma iqhathaniswa namanye amasu uma kuziwa enanini lama-probe aphelele atholakalayo (umbuthano obomvu) futhi ibuthakathaka kunengcono kakhulu (indilinga ephuzi) uma isivinini sokuthwebula sicatshangelwa (imishini yokuhlola yangaphandle ingaba ngokushesha).
Amasu asekelwe ku-ILA, njenge-Synopsys Khomba, abuthakathaka kakhulu uma eqhathaniswa namanye amasu nalapho kucatshangelwa izidingo zensiza ye-FPGA. Amasu asekelwe kumishini yokuhlola yangaphandle abuthakathaka kakhulu ngaphezu kokucatshangelwa okuningi ngezindleko, umthelela wesikhathi sokuklama, kanye nokunyakaza kokuhlola okungaphezulu (ngenxa yesidingo sokuhlanganisa kabusha umklamo) okunzima kakhulu. Mhlawumbe ikhambi elilungile liyinhlanganisela ye-SmartDebug kanye nelinye lamanye amasu, ukuze inani lamashaneli abuthakathaka e-SmartDebug lingancishiswa kanye nokushoda kokunyakaza kwephuzu lokuphenya.tages zamanye amasu ancishisiwe.

Izigaba Zesiginali
Umehluko owusizo ungenziwa phakathi kwezinye zezinhlobo ezivame kakhulu zamasignali futhi lokhu kungasiza lapho uhlela indlela yokususa iphutha. OkwesiboneloampLe, amasiginali angashintshi ngaphandle kwalapho isistimu iqala, njengokusetha kabusha isistimu, ukusetha kabusha ibhulokhi noma amarejista okuqalisa angahlukaniswa njengamasiginali amile. Lezi zinhlobo zamasignali zifinyelelwa ngokuphumelelayo ngokusebenzisa indawo ekwazi ukubona kalula kanye nokulawula isignali, ngaphandle kokudinga umjikelezo omude wokubuyisela. I-Active Probe iyindawo enhle kakhulu yokususa iphutha kumasiginali amile. Ngokufanayo, amasiginali ashintsha kaningi kodwa asamile esikhathini esiningi, angafakwa kusigaba njenge-pseudo-static futhi abuye asuswe ngempumelelo iphutha kusetshenziswa i-Active Probe. Izimpawu ezishintsha njalo, njengamasiginali wewashi, zingahlukaniswa njengeziguquguqukayo futhi azifinyeleleki kalula nge-Active Probe. I-Live Probe iyinketho engcono yokubuka lezi zimpawu.

Ikesi elilula lokususa iphutha

Manje njengoba sesinokuqonda okungcono kwezinketho ezihlukahlukene zokususa iphutha kumjikelezo, ake sibheke i-ex yedizayini elula.ample ukubona ukuthi lezi zindlela zisebenza kanjani. Umfanekiso 9, ubonisa umklamo olula we-FPGA kudivayisi ye-SmartFusion2 SoC FPGA. I-Microcontroller Subsystem (MSS) isethwe kabusha yi-CoreSF2Reset Soft IP block. Okokufaka kuleli bhulokhi Amandla Okusetha Kabusha, Ukusetha Kabusha Indwangu Yomsebenzisi, kanye Nokusetha Kabusha Kwangaphandle. Okuphumayo kungukusethwa kabusha Kwendwangu Yomsebenzisi, ukusetha kabusha kwe-MSS, nokusetha kabusha kwe-M3. Izimpawu zephutha ukuthi awukho umsebenzi kuma-I/O noma idivayisi iphuma kusimo se-POR ngempumelelo. Izinketho ezintathu ezihlukene zokususa iphutha kuleli phutha zibonisiwe emfanekisweni futhi: Ibhokisi eliluhlaza okwesibhakabhaka (elibhalwe ukuthi ETE) elendlela Yezisetshenziswa Zokuhlola Zangaphandle; ibhokisi eliluhlaza (elibhalwe ukuthi ILA) lingelendlela ye-Internal Logic Analyzer; kanye nebhokisi eliwolintshi (elibhalwe ukuthi AP) elendlela ye-Active Probe. Sizothatha ukuthi izimbangela ezingase zibe khona zephutha ukufakwa kugonywe ngokungafanele kokusetha kabusha kwe-CoreSF2Reset Soft IP block.

Manje ake sibheke inqubo yokususa iphutha yezindlela ezintathu ezichazwe ngaphambilini kumjikelezo.

Izisetshenziswa Zokuhlola Zangaphandle
Ngokusebenzisa le ndlela, kucatshangwa ukuthi imishini yokuhlola iyatholakala futhi ayisetshenziswa iphrojekthi ebaluleke kakhulu. Ukwengeza, kubalulekile ukuhlela kusenesikhathi ukuze amanye ama-FPGA I/O atholakale futhi akwazi ukuxhunywa kalula kumishini yokuhlola. Ukuba nesihloko ku-PCB ngokwesiboneloample, kungaba usizo kakhulu futhi kunciphise isikhathi esichithwa uzama ukuhlonza nokuxhuma 'kulowo okungenzeka ukuthi umsolwa' noma ukushoda okungaba khona kwamaphini ngesikhathi sokuhlola. Idizayini izodinga ukuhlanganiswa kabusha ukuze kukhethwe amasiginali esifuna ukuwaphenya. Ngethemba, ngeke 'sihlube u-anyanisi' futhi sidinga ukukhetha amasignali engeziwe ukuze siphenye kabanzi, njengoba ngokuvamile uphenyo lwethu lokuqala luphumela emibuzweni eyengeziwe. Kunoma ikuphi, inqubo yokuhlanganisa nokuhlela kabusha ingathatha isikhathi esibalulekile, futhi uma iphumela ekwephuleni kwesikhathi kuyadingeka ukuklama kabusha (sonke siyayazi indlela okungakhungathekisa ngayo ukuzama ukuxazulula izinkinga zokuvala isikhathi, ikakhulukazi, lapho wenza izinguquko zomklamo ukuze uthole iphutha lokuklama—yonke inqubo ingathatha kusukela kumaminithi kuya emahoreni)! Kubalulekile futhi ukukhumbula ukuthi uma umklamo ungenawo ama-I/O omsebenzisi wamahhala, le ndlela ayikwazi ukuqaliswa. Ngaphezu kwalokho, le ndlela iphazamisa ukwakheka—futhi iziphazamisi ezihlobene nesikhathi zingase zinyamalale noma ziphinde zivele phakathi kokuphindaphinda.

I-Internal Logic Analyzer
Ngokusebenzisa le ndlela i-ILA kumele ifakwe ekwakhiweni kusetshenziswa izinsiza zendwangu, bese idinga ukuphinda ihlanganiswe. Qaphela ukuthi uma i-ILA isivele iqinisiwe, amasiginali esifuna ukuwaphenya kungenzeka abengakasetshenziswanga, okungadinga futhi ukuphinda kuhlanganiswe. Le nqubo ibeka engcupheni ukuguqula idizayini yokuqala futhi yephule imikhawulo yesikhathi. Uma isikhathi sifinyelelwa, umklamo udinga ukuhlelwa kabusha futhi uqaliswe kabusha. Yonke le nqubo ingathatha imizuzu embalwa noma amahora uma izikhathi zokubuyisela zinde futhi kudingeka amaphasi amaningi.Le ndlela iphazamisa isakhiwo futhi ingase ibangele izinkinga ezifanayo nalezo ezichazwe ngenhla.

Ukuhlola okusebenzayo
Ukusebenzisa le ndlela Uphenyo Olusebenzayo lungakhonjwa emthonjeni wamasignali ahlukahlukene okusetha kabusha, wonke atholakala ngokuphuma kwerejista (njengoba kuvamile kunoma yimuphi umkhuba omuhle wokuklama wedijithali). Amasignali akhethwa eyodwa ngesikhathi, kumenyu ye-Active Probe eboniswe kuMfanekiso 10 ngezansi. Amanani esignali akhethiwe angafundwa futhi aboniswe efasiteleni ledatha ye-Active Probe. Noma yikuphi ukugomela okuyiphutha kukhonjwa kalula. Lokhu kuhlola kungenziwa ngokushesha ngaphandle kwesidingo sokuhlanganisa kabusha nokuhlela kabusha idivayisi futhi akuphazamisi ngokwesakhiwo noma ngokwenqubo. Yonke inqubo ithatha imizuzwana embalwa. Le ndlela ingase futhi idale ukulawuleka (ukushintsha amanani ngokuhambisanayo) okungeke kuvunyelwe ezinye izindlela ezimbili. Kule example, isignali yokusetha kabusha etholwe irejista ingase iphenywe kalula futhi itholwe ukuze igcinwe isesimweni esisebenzayo.

Ukuguqulwa kwesikhashana kwesiginali yokusetha kabusha kungafinyelelwa ngokukhohlisa irejista ngokukhipha amasignali asele.

Ikesi Lokusebenzisa Lokususa iphutha eliyinkimbinkimbi
Umklamo ongenhla wawulula kakhulu futhi uwusizo njengesingeniso ekusebenziseni amasu okuklama achazwe, kodwa i-ex eyinkimbinkimbi kakhuluampingahle ibe yimifanekiso eyengeziwe. Izikhathi eziningi isiginali yentshisekelo ayisona isignali emile njengoba yayinjalo ku-ex yethu elulaample kodwa inamandla. Isignali evamile eguquguqukayo iwashi eliphakathi nendawo, mhlawumbe elisetshenziselwa ukuhlela isikhathi ukuxhawula isixhumi esibonakalayo seserial. Umfanekiso 11 ubonisa idizayini enjalo nomsebenzisi I-Soft IP core, kulesi simo, i-serial interface yangokwezifiso exhunywe kusistimu yebhasi ye-APB. Izimpawu zamaphutha ukuthi awukho umsebenzi kusixhumi esibonakalayo somkhiqizo wangokwezifiso wabasebenzisi, nokuthi uma umphathi webhasi le-APB ekhipha umsebenzi ukuze afinyelele isixhumi esibonakalayo se-serial iba esimweni esikhethekile esibonisa ukuxhawulana okungalungile. Lezi zimo zibonakala zikhipha imbangela emile, njengesignali yokusetha kabusha engalungile, njengoba umshini wesimo sokwenziwa ubonakala ungasebenzi ngenani elilindelekile futhi ngaleyo ndlela ubangela okuhlukile. Imbangela eyinhloko kucatshangwa ukuthi ijeneretha yefrikhwensi yewashi ngaphakathi kwe-IP core yomsebenzisi.

Uma ingasebenzi ngemvamisa efanele amaphutha achaziwe angavela.

Kulesi simo cishe iqhinga elingcono lokushintsha indlela ye-Active Probe ufake i-Live Probe. Lokhu kuboniswa esithombeni esingenhla ngebhokisi le-LP elinombala osawolintshi, kusetshenziswa i-JTAG isignali yokukhetha umthombo wophenyo.

Izisetshenziswa Zokuhlola Zangaphandle
Kulokhu, indlela yokusebenza ifana kakhulu ne-ex elula echazwe ngaphambiliniample. Isignali yewashi lomsebenzisi ikhishelwa endaweni yokuhlola (ngethemba kunhlokweni) futhi kudingeka ukubuyisela okudla isikhathi. Kungase futhi kusize ukukhipha isignali yereferensi, mhlawumbe iwashi lesistimu elisetshenziselwa ukuvala i-IP yabasebenzisi njengesignali yokuqhathanisa. Sizophinde sibe ngaphansi kwesidingo sokuhlanganisa futhi sihlele kabusha ukuze yonke inqubo ithathe isikhathi esibalulekile.

I-Internal Logic Analyzer
Leli cala lifana kakhulu ne-ex elulaample. I-ILA kumele ifakwe, noma kuchazwe isignali efunekayo, bese kwenziwa umjikelezo wokuhlanganisa nokuhlela kabusha. Zonke izinkinga ezichazwe ngaphambilini zisaholela esikhathini esibalulekile somjikelezo wokulungisa iphutha. Kukhona enye inkimbinkimbi, nokho. Iwashi elishayela i-ILA lidinga ukuvumelanisa, futhi ngokufanelekile lisheshe kakhulu ngokuphathelene newashi ukuze libonwe kumsebenzisi we-Soft IP core. Uma lawa mawashi engavumelani, noma engenabo ubudlelwano besikhathi obufanele, ukuthwebula idatha ngeke kuqageleke futhi kungaba umthombo wokudideka wenqubo yokususa iphutha.
Qaphela ukuthi uma umsebenzisi Iwashi le-IP elithambile lingakhiqizwe ku-chip (mhlawumbe litholwa kusixhumi esibonakalayo sochungechunge) umklami angase adinge ukwengeza imojuli yewashi ukuze akhiqize iwashi le-ILA elisheshayo esebenzisa izinsiza ezengeziwe futhi ngokunokwenzeka nokudala ukwephulwa kwesikhathi.

I-Live Probe
Ngokusebenzisa le ndlela, i-Live Probe ingakhonjwa ngokushesha kumthombo wewashi lomsebenzisi nanoma yimuphi omunye umthombo wewashi kurejista ukuze kuxoshwe umsuka wephutha. I-Live Probe izobonisa ukuphuma kwesignali ekhethiwe ngesikhathi sangempela futhi noma ibuphi ubuhlobo besikhathi phakathi kwamasignali kulula kakhulu ukubuthola. Yonke inqubo ithatha imizuzwana embalwa.

Ezinye izici zokususa iphutha ze-Serial Interfaces
Kubalulekile futhi ukuveza ukuthi maningi amandla engeziwe okususa iphutha kumadivayisi we-SmartFusion2 SoC FPGA kanye ne-IGLOO2 FPGA angasetshenziswa kuma-serial interfaces, njengalawo asekuqaleni.ample design lapho amaphutha ayinkimbinkimbi nakakhulu. I-SERDES Debug, ngokwesiboneloample, ihlinzeka ngamakhono athile okulungisa ama-serial interfaces anesivinini esiphezulu. Ezinye zezici ze-SERDES Debug zihlanganisa ukwesekwa kokuhlolwa kwe-PMA (njengokwenziwa kwephethini ye-PRBS kanye nokuhlola i-loopback) usekelo lokulungiselelwa kokuhlolwa kwe-SERDES okuningi ngokulungiselelwa kabusha kweleveli yerejista ukuze kugwenywe ukusetshenziswa kokugeleza kwedizayini okugcwele ukwenza izinguquko zokumisa, nemibiko yombhalo ebonisa izivumelwano ezimisiwe, amarejista okucushwa kwe-SERDES, nerejista yokucushwa koLane. Lezi zici zenza i-SERDES isuse iphutha ibe lula kakhulu futhi ingasetshenziswa ngokuhambisana ne-Live Probe kanye ne-Active Probe ukuze kuthuthukiswe ukulungisa amaphutha kumasekhethi ayinkimbinkimbi.
Ithuluzi le-Memory Debug elichazwe ngaphambilini lingasetshenziswa ngokuhambisana ne-SERDES Debug ukuze kuhlolwe isivinini. Njengoba izigcinalwazi zingahlolwa ngokushesha futhi kalula futhi zishintshwe nge-Memory Debug, kuyenzeka ukuthi udale ngokushesha 'amaphakethe okuhlola' futhi ubone imiphumela ye-loopback noma yokuxhumana phakathi kwesistimu. Umklami angasebenzisa lawa makhono futhi ngaleyo ndlela anciphise isidingo 'samahhanisi okuhlola' akhethekile asebenzisa indwangu ye-FPGA eyengeziwe futhi okungase kube nomthelela ekubambeni isikhathi kwe-chip.

Isiphetho
Leli phepha lichaze ngokuningiliziwe izindlela ezimbalwa ezihlukene zokuqalisa ukusebenza kwe-in-circuit debug kuma-FPGA kanye ne-SoC FPGAs—ukusetshenziswa kwe-Integrated Logic Analyzer, ukusetshenziswa kwemishini yokuhlola yangaphandle, kanye nokusetshenziswa kwamasekhethi okuhlola azinikele ahlanganiswe nendwangu ye-FPGA. Ukwengezwa kwamasekhethi akhethekile nazinikele, njenge-Active Probe kanye ne-Live Probe ehlinzekwa yi-Microsemi ku-SmartFusion2 SoC FPGA kanye namadivayisi we-IGLOO2 FPGA, kuboniswe kusheshisa kakhulu futhi kwenza inqubo yokususa iphutha ibe lula. Ikhono lokushintsha ngokushesha ukukhethwa kwamasignali angaphakathi (ngaphandle kwesidingo sokwenza umjikelezo wokubuyisela odla isikhathi esiningi nokuhlelwa kabusha), kanye nekhono lokuphenya amasignali angaphakathi (ngaphandle kwesidingo sokusebenzisa indwangu ye-FPGA kanye nokwethula ukwephulwa kwesikhathi okungenzeka) kuboniswe njenge-advan enkulu.tages lapho kulungiswa amaphutha emiklamo ye-FPGA. Ukwengeza, ukusetshenziswa kwezindlela eziningi, ezingasebenza ndawonye ukuze kunikeze amandla okususa iphutha aphelele kwachazwa. Ekugcineni, ababili exampamacala okusetshenziswa kokususa iphutha anikezwe ukukhombisa ukuhwebelana phakathi kwezindlela ezichaziwe.

Ukuze Ufunde Kabanzi

1. IGLOO2 FPGAs
2. I-SmartFusion2 SoC FPGAs

I-Microsemi Corporation (i-Nasdaq: i-MSCC) inikeza iphothifoliyo ephelele ye-semiconductor kanye nezixazululo zesistimu yezokuxhumana, ukuvikela nokuphepha, i-aerospace kanye nezimakethe zezimboni. Imikhiqizo ihlanganisa ukusebenza okuphezulu kanye ne-radiation-hardened analog ehlanganisiwe-signal circuits, ama-FPGA, ama-SoC kanye nama-ASIC; imikhiqizo yokuphatha amandla; amadivaysi esikhathi nokuvumelanisa kanye nezixazululo zesikhathi ezinembile, ezibeka izinga lomhlaba lesikhathi; amadivaysi okucubungula izwi; izixazululo ze-RF; izingxenye ezihlukene; ubuchwepheshe bokuphepha kanye ne-anti-t ehlanjululweamper imikhiqizo; Power-over-Ethernet ICs kanye midspans; kanye nekhono lokuklama ngokwezifiso namasevisi. I-Microsemi ikomkhulu layo e-Aliso Viejo, e-Calif., futhi inabasebenzi ababalelwa ku-3,400 emhlabeni jikelele. Funda kabanzi ku www.microsemi.com.

© 2014 Microsemi Corporation. Wonke Amalungelo Agodliwe. I-Microsemi kanye nelogo ye-Microsemi yizimpawu zokuthengisa ze-Microsemi Corporation. Zonke ezinye izimpawu zokuhweba nezimpawu zesevisi ziyimpahla yabanikazi bazo.

Ikomkhulu le-Microsemi Corporate

• Eyodwa Enterprise, Aliso Viejo CA 92656 USA
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• Ngaphandle I-USA: +1 949-380-6100
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FAQ

• Q: Ingakanani imvamisa yokuthwebula idatha ephezulu yedivayisi?
  A: Idivayisi isekela ukuthwebula idatha kufika ku-100MHz, ifanele imiklamo eminingi eqondiwe.
• Q: Ingabe ngidinga ukuhlanganisa kabusha umklamo lapho ngisebenzisa ama-probe circuits ukulungisa iphutha?
  A: Cha, izindawo ze-probe point zingashintshwa ngokushesha ngaphandle kokudinga ukuhlanganiswa kabusha kwedizayini noma ukuhlela kabusha.

Amadokhumenti / Izinsiza

I-Microsemi In-Circuit FPGA Debug [pdf] Iziyalezo Ku-Circuit FPGA Debug, FPGA Debug, Debug

Izithenjwa

• Imaniwali yosebenzisayo