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intel AN 889 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example

intel-AN-889-8K-DisplayPort-Video-Format-Conversion-Design-Exampda-PRO

Game da 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example

Tsarin Juya Tsarin Bidiyo na 8K DisplayPort Example ya haɗa haɗin haɗin bidiyo na Intel DisplayPort 1.4 tare da bututun sarrafa bidiyo. Ƙirar tana ba da ƙima mai inganci, canjin sararin launi, da jujjuya ƙimar firam don rafukan bidiyo har zuwa 8K a firam 30 a sakan daya, ko 4K a firam 60 a sakan daya.
Zane-zanen software ne mai daidaitawa da kayan masarufi, yana ba da damar daidaita tsarin tsarin da sauri da sake tsarawa. Ƙirar tana hari Intel® Arria® 10 na'urorin kuma yana amfani da sabuwar 8K shirye Intel FPGA IP daga Bidiyo da Tsarin Gudanar da Hoto a cikin Intel Quartus® Prime v19.2.

Game da DisplayPort Intel FPGA IP
Don ƙirƙirar ƙirar Intel Arria 10 FPGA tare da musaya na DisplayPort, zazzage DisplayPort Intel FPGA IP. Koyaya, wannan DisplayPort IP yana aiwatar da rufaffiyar yarjejeniya ko yanke lamba don DisplayPort. Ba ya haɗa da transceivers, PLLs, ko ayyukan sake fasalin transceiver da ake buƙata don aiwatar da babban abin serial bangaren na dubawa. Intel yana ba da transceiver daban, PLL, da abubuwan haɗin IP na sake fasalin. Zaɓin, daidaitawa, da haɗa waɗannan abubuwan haɗin gwiwa don ƙirƙirar cikakkiyar mai karɓar mai karɓar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar tashar jiragen ruwa tana buƙatar ƙwararrun ilimi.
Intel yana ba da wannan ƙira ga waɗanda ba ƙwararrun transceiver ba. Editan sigar GUI don DisplayPort IP yana ba ku damar gina ƙira.
Kuna ƙirƙiri misali na IP ɗin DisplayPort (wanda zai iya zama mai karɓa kawai, mai aikawa kawai ko haɗa mai karɓa da mai aikawa) a cikin ko dai Mai tsara Platform ko Catalog na IP. Lokacin da kuka daidaita misalin DisplayPort IP, zaku iya zaɓar don samar da tsohonample zane don wannan ƙayyadaddun tsari. Haɗin mai karɓa da ƙira mai watsawa hanya ce mai sauƙi, inda fitarwa daga mai karɓa ke ciyarwa kai tsaye zuwa mai watsawa. Tsararren tsararren hanyar wucewa yana ƙirƙirar PHY mai karɓa mai cikakken aiki, mai watsawa PHY, da tubalan sake daidaitawa waɗanda ke aiwatar da duk mai ɗaukar hoto da dabaru na PLL. Kuna iya ko dai kai tsaye kwafi sassan ƙirar da suka dace, ko amfani da ƙira azaman tunani. Tsarin yana haifar da DisplayPort Intel Arria 10 FPGA IP Design Example sa'an nan kuma ƙara da yawa daga cikin files wanda aka ƙirƙira kai tsaye a cikin lissafin tarawa wanda aikin Intel Quartus Prime ke amfani dashi. Waɗannan sun haɗa da:

  • Files don ƙirƙirar misalan IP masu ma'ana don masu wucewa, PLLs da tubalan sake tsarawa.
  • Farashin HDL files don haɗa waɗannan IPs zuwa cikin babban matakin mai karɓar PHY, mai watsawa PHY, da Transceiver Reconfiguration Arbiter tubalan
  • Ƙuntataccen ƙira na Synopsys (SDC) files don saita iyakokin lokaci masu dacewa.

Fasalolin 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example

  • Shigarwa:
    • Haɗin DisplayPort 1.4 yana goyan bayan ƙuduri daga 720 × 480 har zuwa 3840 × 2160 a kowane ƙimar firam har zuwa 60fps, da ƙuduri har zuwa 7680 × 4320 a 30fps.
    • Taimako mai zafi.
    • Taimakawa duka RGB da YCbCr (4:4:4, 4:2:2 da 4:2:0) tsarin launi a
      shigarwa.
    • Software yana gano tsarin shigarwa ta atomatik kuma yana saita bututun sarrafawa yadda ya kamata.
  • Fitowa:
    • DisplayPort 1.4 connectivity zažužžukan (ta hanyar DIP sauya) don ko dai 1080p, 1080i ko 2160p ƙuduri a 60fps, ko 2160p a 30fps.
    • Taimako mai zafi.
    • DIP tana canza don saita tsarin launi da ake buƙata zuwa RGB, YCbCr 4:4:4, YCbCr 4:2:2, ko YCbCr 4:2:0.
  • Bututun sarrafa 10-bit 8K RGB guda ɗaya tare da daidaitawar software da canjin ƙimar firam:
    • 12-matsa Lanczos down-scaler.
    • 16-phase, 4-taɓa Lanczos up-scaler.
    • Buffer na firam ɗin bidiyo sau uku yana ba da jujjuya ƙimar firam.
    • Mai haɗawa tare da haɗin alpha yana ba da damar rufe alamar OSD.

Farawa tare da 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example

Bukatun Hardware da Software

Tsarin Juya Tsarin Bidiyo na 8K DisplayPort Example yana buƙatar takamaiman hardware da software.

Hardware:

  • Intel Arria 10 GX FPGA Development Kit, gami da DDR4 Hilo Daughter Card
  • Bitec DisplayPort 1.4 FMC katin diyar (bita 11)
  • DisplayPort 1.4 tushen wanda ke samar da har zuwa 3840x2160p60 ko 7680x4320p30 bidiyo
  • DisplayPort 1.4 nutse wanda ke nuna bidiyo 3840 × 2160p60
  • VESA ƙwararrun igiyoyi na DisplayPort 1.4.

Software:

  • Windows ko Linux OS
  • Intel Quartus Prime Design Suite v19.2, wanda ya haɗa da:
    • Intel Quartus Prime Pro Edition
    • Dandali Mai Zane
    • Nios® II EDS
    • Laburaren IP na Intel FPGA (gami da Bidiyo da Tsarin Gudanar da Hoto)

Zane yana aiki tare da wannan sigar Intel Quartus Prime.

Zazzagewa da Shigar da Tsarin Canjin Bidiyo na Intel 8K DisplayPort Example

Ana samun ƙirar a kan Intel Design Store.

  1. Zazzage aikin da aka adana file udx10_dp.par.
  2. Cire aikin Intel Quartus Prime daga rumbun adana bayanai:
    • a. Bude Intel Quartus Prime Pro Edition.
    • b. Danna File ➤ Bude Project.
      Bude Project taga yana buɗewa.
    • c. Kewaya zuwa kuma zaɓi udx10_dp.par file.
    • d. Danna Buɗe.
    • e. A cikin Buɗe Samfuran Samfura, saita babban fayil ɗin Destination zuwa wurin da ake so don aikin da aka fitar. Abubuwan shigarwa don samfurin ƙira file kuma sunan aikin yakamata ya zama daidai kuma ba buƙatar canza su ba.
    • f. Danna Ok.

Zane Files don Intel 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example

Tebur 1. Zane Files

File ko Sunan Jaka Bayani
ip Ya ƙunshi misalin IP files ga duk misalan Intel FPGA IP a cikin ƙira:

• IP na DisplayPort (mai watsawa da mai karɓa)

• PLL wanda ke haifar da agogo a saman matakin ƙira

• Duk IP ɗin da ya ƙunshi tsarin Platform Designer don sarrafa bututun mai.

babban_hoton Ya ƙunshi pre_compiled.sof, wanda shine shirye-shiryen allon da aka riga aka gama file don zane.
ba_acds_ip Ya ƙunshi lambar tushe don ƙarin IP a cikin wannan ƙira wanda Intel Quartus Prime bai haɗa da shi ba.
sdc Ya ƙunshi SDC file wanda ke bayyana ƙarin ƙayyadaddun ƙayyadaddun lokacin da wannan ƙirar ke buƙata. Farashin SDC fileAbubuwan da aka haɗa ta atomatik tare da misalan IP ba sa ɗaukar waɗannan ƙuntatawa.
software Ya ƙunshi lambar tushe, dakunan karatu, da gina rubutun don software da ke aiki akan na'ura mai sarrafa Nios II da aka saka don sarrafa babban aikin ƙira.
udx10_dp Babban fayil ɗin da Intel Quartus Prime ke haifar da fitarwa files don tsarin Platform Designer. Fitowar udx10_dp.sopcinfo file yana baka damar haifar da ƙaddamarwar ƙwaƙwalwar ajiya file don ƙwaƙwalwar software na Nios II. Ba buƙatar ku fara samar da cikakken tsarin Tsarin Platform Designer ba.
ba_acds_ip.ipx Wannan IPX file yana bayyana duk IP ɗin da ke cikin babban fayil ɗin non_acds_ip zuwa Platform Designer don haka ya bayyana a cikin Laburaren IP.
KARANTAME.txt Taƙaitaccen umarni don ginawa da gudanar da ƙira.
saman.qpf Aikin Intel Quartus Prime file don zane.
saman.qsf Saitunan aikin Intel Quartus Prime file don zane. Wannan file ya lissafa duka files da ake buƙata don gina ƙira, tare da ayyukan fil da adadin wasu saitunan aikin.
saman.v Babban matakin Verilog HDL file don zane.
udx10_dp.qsys Tsarin Platform Designer wanda ke ƙunshe da bututun sarrafa bidiyo, mai sarrafa Nios II, da abubuwan da ke kewaye da shi.

Haɗa Tsarin Juya Tsarin Bidiyo na 8K DisplayPort Example
Intel yana ba da shirye-shiryen allon da aka riga aka haɗa file don ƙira a cikin directory_image directory (pre_compiled.sof) don ba ku damar gudanar da ƙira ba tare da yin cikakken tari ba.
MATAKI:

  1. A cikin Intel Quartus Prime software, buɗe aikin top.qpf file. Rumbun da aka zazzage ya haifar da wannan file lokacin da ka cire zip ɗin aikin.
  2. Danna File ➤ Buɗe kuma zaɓi ip/dp_rx_tx/dp_rx_tx.ip. Editan sigar GUI na IP na DisplayPort yana buɗewa, yana nuna sigogi don misalin DisplayPort a cikin ƙira.
  3. Danna Ƙirƙirar Example Design (ba Generate ba).
  4. Lokacin da tsara ya ƙare, rufe madaidaicin editan.
  5. In File Explorer, kewaya zuwa babban fayil ɗin software kuma zazzage majigin vip_control_src.zip don samar da vip_control_src directory.
  6. A cikin tashar BASH, kewaya zuwa software/rubutu kuma gudanar da rubutun harsashi build_sw.sh.
    Rubutun ya gina software na Nios II don ƙira. Yana haifar da .elf file wanda zaka iya saukewa zuwa allon lokacin gudu, da .hex file don haɗawa cikin tsarin shirye-shiryen allo .sof file.
  7. A cikin Intel Quartus Prime software, danna Gudanarwa ➤ Fara Tari.
    • Intel Quartus Prime yana haifar da tsarin udx10_dp.qsys Platform Designer.
    • Intel Quartus Prime ya saita aikin zuwa top.qpf.

Tarin yana ƙirƙirar top.sof a cikin fitarwa_files directory lokacin da ya kammala.

Viewing da Sake Haɓaka Tsarin Tsarin Platform

  1. Danna Kayan Aiki ➤ Platform Designer.
  2. Zaɓi tsarin suna.qsys don zaɓin tsarin Tsarin Platform Designer.
  3. Danna Buɗe.
    Platform Designer yana buɗe tsarin.
  4. Review tsarin.
  5. Sake sabunta tsarin:
    • a. Danna Ƙirƙirar HDL….
    • b. A cikin Tagar Generation, kunna Share kundayen adireshi don zaɓaɓɓun maƙasudin tsara.
    • c. Danna Ƙirƙira

Haɗa Tsarin Juya Tsarin Bidiyo na 8K DisplayPort Examptare da Nios II Kayan aikin Gina Software don Eclipse
Kun saita wurin aiki na Nios II Eclipse mai ma'amala don ƙira don samar da wurin aiki wanda ke amfani da manyan fayiloli iri ɗaya waɗanda rubutun ginin ke amfani da su. Idan a baya kuna gudanar da rubutun ginin, ya kamata ku share software/vip_control da software/vip_control_bsp manyan fayiloli kafin ƙirƙirar wurin aikin Eclipse. Idan ka sake gudanar da rubutun ginin a kowane lokaci zai sake rubuta wurin aikin Eclipse.
MATAKI:

  1. Kewaya zuwa kundin adireshin software kuma cire zip ɗin vip_control_src.zip don samar da directory ɗin vip_control_src.
  2. A cikin daftarin aikin da aka shigar, ƙirƙirar sabon babban fayil kuma suna suna wurin aiki.
  3. A cikin Intel Quartus Prime software, danna Kayan aiki ➤ Nios II Kayan aikin Gina Software don Eclipse.
    • a. A cikin taga Launcher Workspace, zaɓi babban fayil ɗin sararin aiki da kuka ƙirƙira.
    • b. Danna Ok.
  4. A cikin Nios II – Eclipse taga, danna File ➤ Sabon ➤ Nios II Aikace-aikacen da BSP daga Samfura.
    Aikace-aikacen Nios II da BSP daga akwatin maganganu na Samfura ya bayyana.
    • a. A cikin Bayanin SOPC File akwatin, zaɓi udx10_dp/ udx10_dp.sopcinfo file. Nios II SBT na Eclipse ya cika sunan CPU tare da sunan mai sarrafawa daga .sopcinfo. file.
    • b. A cikin akwatin sunan Project, rubuta vip_control.
    • c. Zaɓi Ayyukan Blank daga lissafin Samfura.
    • d. Danna Gaba.
    • e. Zaɓi Ƙirƙirar sabon aikin BSP dangane da samfurin aikin aikace-aikacen tare da sunan aikin vip_control_bsp.
    • f. Kunna Yi amfani da tsoho wuri.
    • g. Danna Gama don ƙirƙirar aikace-aikacen da BSP dangane da .sopcinfo file.
      Bayan BSP ya haifar, ayyukan vip_control da vip_control_bsp suna bayyana a cikin Project Explorer tab.
  5. A cikin Windows Explorer, kwafi abubuwan da ke cikin software/vip_control_src directory zuwa sabuwar software/vip_control directory.
  6. A cikin Project Explorer shafin na Nios II – Eclipse taga, danna dama akan babban fayil vip_control_bsp kuma zaɓi Nios II> Editan BSP.
    • a. Zaɓi Babu ko ɗaya daga menu na ƙasa don sys_clk_timer.
    • b. Zaɓi cpu_timer daga menu mai saukewa don lokutaamp_lokaci.
    • c. Kunna kunna_small_c_library.
    • d. Danna Ƙirƙira.
    • e. Lokacin da tsara ya cika, danna Fita.
  7. A cikin Project Explorer shafin, danna-dama akan vip_control directory kuma danna Properties.
    1. a. A cikin Properties don vip_control taga, fadada Nios II Aikace-aikacen kaddarorin kuma danna Hannun Aikace-aikacen Nios II.
    2. b. Danna Ƙara… kusa da Ayyukan Laburare.
    3. c. A cikin taga ayyukan Library, kewaya zuwa udx10.dp\spftware \vip_control_src directory kuma zaɓi bkc_dprx.syslib directory.
    4. d. Danna Ok. Saƙo yana bayyana Canza zuwa hanyar dangi. Danna Ee.
    5. e. Maimaita matakai 7.b a shafi na 8 da 7.c a shafi na 8 don bkc_dptx.syslib da bkc_dptxll_syslib kundayen adireshi
    6. f. Danna Ok.
  8. Zaɓi Project ➤ Gina Duk don samar da file vip_control.elf a cikin software/vip_control directory.
  9. Gina mem_init file don haɗawar Intel Quartus Prime:
    1. a. Dama danna vip_control a cikin taga Project Explorer.
    2. b. Zaɓi Yi Maƙasudi ➤ Gina….
    3. c. Zaɓi mem_init_generate.
      d. Danna Gina.
      Intel Quartus Prime software yana haifar da
      udx10_dp_onchip_memory2_0_onchip_memory2_0.hex file a cikin software/vip_control/mem_init directory.
  10. Tare da zane yana gudana akan allon da aka haɗa, gudanar da shirye-shiryen vip_control.elf file wanda aka gina ta Eclipse.
    • a. Dama danna vip_control babban fayil a cikin Project Explorer shafin na Nios II -Eclipse taga.
    • b. Zaɓin Run As ➤ Nios II Hardware. Idan kuna buɗe taga tashar tashar Nios II, rufe ta kafin zazzage sabuwar software.

Kafa Intel Arria 10 GX FPGA Development Kit
Yana bayyana yadda ake saita kit don gudanar da 8K DisplayPort Video Format Conversion Design Example.

Hoto 1. Intel Arria 10 GX Development Kit tare da HiLo Daughter Card
Hoton yana nuna allon da aka cire shuɗi mai ruwan zafi don nuna matsayi na katin DDR4 Hilo. Intel yana ba da shawarar cewa kar ku gudanar da ƙira ba tare da ɗumi mai zafi a matsayi ba.

intel-AN-889-8K-DisplayPort-Video-Format-Conversion-Design-Exampku -1
MATAKI:

  1. Daidaita katin Bitec DisplayPort 1.4 FMC zuwa hukumar haɓaka ta amfani da FMC Port A.
  2. Tabbatar cewa an kashe wutar lantarki (SW1), sannan ka haɗa mai haɗa wutar lantarki.
  3. Haɗa kebul na USB zuwa kwamfutarka kuma zuwa MicroUSB Connector (J3) akan allon ci gaba.
  4. Haɗa kebul na DisplayPort 1.4 tsakanin tushen DisplayPort da tashar mai karɓa na katin Bitec DisplayPort 1.4 FMC kuma tabbatar cewa tushen yana aiki.
  5. Haɗa kebul na DisplayPort 1.4 tsakanin nunin DisplayPort da tashar watsawa ta katin Bitec DisplayPort 1.4 FMC kuma tabbatar da nuni yana aiki.
  6. Kunna allo ta amfani da SW1.

LEDs Matsayin Hukumar, Maɓallin Turawa da Sauyawan DIP
Kit ɗin Ci gaban Intel Arria 10 GX FPGA yana da LEDs matsayi guda takwas (tare da kore da jajayen emitters), maɓallan tura masu amfani guda uku da masu amfani da DIP guda takwas. Tsarin Juya Tsarin Bidiyo na 8K DisplayPort Example haskaka LEDs don nuna yanayin haɗin mai karɓar DisplayPort. Maɓallan turawa da maɓallan DIP suna ba ku damar canza saitunan ƙira.

Yanayin LED

Tebur 2. Matsayin LEDs

LED Bayani
Red LEDs
0 DDR4 EMIF daidaitawa yana ci gaba.
1 DDR4 EMIF daidaitawa ya kasa.
7:2 Ba a yi amfani da shi ba.
Green LEDs
0 Yana haskaka lokacin da aka kammala horon hanyar haɗin mai karɓa na DisplayPort cikin nasara, kuma ƙirar tana karɓar bidiyo mai tsayayye.
5:1 Ƙidaya hanyar mai karɓar tashar tashar tashar jiragen ruwa: 00001 = 1 layi

00010 = 2 hanyoyi

00100 = 4 hanyoyi

7:6 Saurin layin mai karɓar tashar tashar tashar jiragen ruwa: 00 = 1.62 Gbps

01 = 2.7 Gbps

10 = 5.4 Gbps

11 = 8.1 Gbps

Teburin ya lissafa matsayin da kowane LED ke nunawa. Kowane matsayi na LED yana da alamun ja da kore waɗanda za su iya haskaka kansu. Duk wani lemu mai haske na LED yana nufin duka alamun ja da kore suna kunne.

Maɓallan Tura masu amfani
Maɓallin tura mai amfani 0 yana sarrafa nunin tambarin Intel a saman kusurwar hannun dama na nunin fitarwa. A farawa, ƙirar tana ba da damar nunin tambarin. Danna maɓallin turawa 0 yana kunna kunna nunin tambarin. Maɓallin tura mai amfani 1 yana sarrafa yanayin ƙira. Lokacin da tushen ko nutsewa yayi zafi-toshe ƙirar ƙira zuwa ko dai:

  • Yanayin wucewa, idan ƙudurin shigarwar bai kai ko daidai da ƙudurin fitarwa ba
  • Yanayin ƙasa, idan ƙudurin shigarwa ya fi ƙudurin fitarwa girma

Duk lokacin da ka danna maɓallin tura mai amfani 1 ƙirar ƙira ta musanya zuwa yanayin sikeli na gaba (passthrough> upscale, upscale> downscale, downscale> passthrough). Maɓallin tura mai amfani 2 ba a yi amfani da shi ba.

Mai amfani DIP Sauyawa
Maɓallai na DIP suna sarrafa zaɓin bugun tashar Nios II na zaɓi da saituna don tsarin fitarwar bidiyo wanda ke gudana ta hanyar watsawa na DisplayPort.

Tebur 3. DIP Sauyawa
Teburin ya lissafa ayyukan kowane canjin DIP. Maɓallan DIP, masu lamba 1 zuwa 8 (ba 0 zuwa 7 ba), sun dace da lambobi da aka buga akan ɓangaren sauya. Don saita kowane canji zuwa ON, matsar da farar canji zuwa LCD kuma nesa da LEDs akan allo.

Sauya Aiki
1 Yana kunna tashar tashar Nios II lokacin saita zuwa ON.
2 Saita abubuwan fitarwa kowane launi:

KASHE = 8 bit

ON = 10 bit

4:3 Saita sarari launi mai fitarwa da sampling: SW4 KASHE, SW3 KASHE = RGB 4:4:4 SW4 KASHE, SW3 ON = YCbCr 4:4:4 SW4 ON, SW3 KASHE = YCbCr 4:2:2 SW4 ON, SW3 ON = YCbCr 4:2:0
6:5 Saita ƙudurin fitarwa da ƙimar firam: SW4 KASHE, SW3 KASHE = 4K60

SW4 KASHE, SW3 ON = 4K30 SW4 ON, SW3 KASHE = 1080p60 SW4 ON, SW3 ON = 1080i60

8:7 Ba a yi amfani da shi ba

Gudanar da Tsarin Juya Tsarin Bidiyo na DisplayPort Example
Dole ne ku zazzage .sof ɗin da aka haɗa file don ƙira zuwa Intel Arria 10 GX FPGA Development Kit don gudanar da ƙira.
MATAKI:

  1. A cikin Intel Quartus Prime software, danna Tools ➤ Programmer.
  2. A cikin taga Programmer, danna Auto Detect don bincika JTAG sarkar da gano na'urorin da aka haɗa.
    Idan taga pop-up ya bayyana yana tambayarka don sabunta jerin na'urorin na Programmer, danna Ee.
  3. A cikin lissafin na'urar, zaɓi jere mai lamba 10AX115S2F45.
  4. Danna Canja File…
    • Don amfani da sigar shirye-shiryen da aka riga aka haɗa file wanda Intel ya haɗa a matsayin ɓangare na zazzagewar ƙira, zaɓi master_image/pre_compiled.sof.
    • Don amfani da shirye-shiryen ku file Ƙirƙiri ta gida, zaɓi fitarwa_files/safi.
  5. Kunna Shirin/Sanya a cikin jere na 10AX115S2F45 na lissafin na'urar.
  6. Danna Fara.
    Lokacin da mai tsara shirye-shirye ya kammala, ƙirar tana gudana ta atomatik.
  7. Bude tashar Nios II don karɓar saƙon rubutu na fitarwa daga ƙira, in ba haka ba ƙirar tana kulle bayan yawancin canje-canjen canzawa (kawai idan kun saita mai amfani DIP mai amfani 1 zuwa ON).
    • a. Bude tagar tasha kuma buga nios2-terminal
    • b. Danna Shigar.

an haɗa a wurin shigarwa. Ba tare da tushe ba, abin da ake fitarwa shine allon baki tare da tambarin Intel a saman kusurwar hannun dama na allon.

Bayanin Aiki na 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example

Tsarin Platform Designer, udx10_dp.qsys, ya ƙunshi mai karɓar DisplayPort da yarjejeniya IP, bututun bidiyo na IP, da abubuwan sarrafawa na Nios II. Ƙirar ta haɗu da tsarin Platform Designer zuwa mai karɓa na DisplayPort da mai watsawa PHY dabaru (wanda ya ƙunshi masu amfani da keɓancewa) da kuma ma'anar sake fasalin transceiver a babban matakin a cikin ƙirar Verilog HDL RTL. file (safi.v). Zane ya ƙunshi hanyar sarrafa bidiyo guda ɗaya tsakanin shigarwar DisplayPort da fitarwar DisplayPort.

Hoto 2. Toshewar Hoto
Hoton yana nuna tubalan a cikin 8K DisplayPort Video Format Conversion Design Example. Jadawalin baya nuna wasu juzu'ai masu alaƙa da Nios II, Avalon-MM tsakanin na'ura mai sarrafa Nios II, da sauran abubuwan tsarin. Tsarin yana karɓar bidiyo daga tushen DisplayPort a hagu, yana aiwatar da bidiyon ta bututun bidiyo daga hagu zuwa dama kafin a fitar da bidiyon zuwa nutsewar DisplayPort a dama.intel-AN-889-8K-DisplayPort-Video-Format-Conversion-Design-Exampku -2

Mai karɓa na DisplayPort PHY da Mai karɓa na DisplayPort IP
Katin FMC na Bitec DisplayPort yana ba da buffer don siginar DisplayPort 1.4 daga tushen DisplayPort. Haɗin Mai karɓa na DisplayPort PHY da Mai karɓa na DisplayPort IP yana yanke siginar mai shigowa don ƙirƙirar rafi na bidiyo. Mai karɓar DisplayPort PHY yana ƙunshe da masu karɓa don ɓata bayanan mai shigowa kuma IP ɗin mai karɓar DisplayPort yana yanke ka'idar DisplayPort. Haɗin IP mai karɓar DisplayPort yana aiwatar da siginar DisplayPort mai shigowa ba tare da kowace software ba. Sakamakon siginar bidiyo daga Mai karɓar DisplayPort IP shine asalin fakitin yawo. Zane yana daidaita mai karɓar DisplayPort don fitowar 10-bit.

DisplayPort zuwa Kulle Video IP
Fitar da tsarin bayanan yawo da aka ƙulla ta mai karɓar DisplayPort bai dace kai tsaye tare da tsarin bayanan bidiyo da aka rufe ba wanda Mai shigar da Bidiyon IP ɗin da aka kulle yake tsammani. DisplayPort zuwa IP ɗin Bidiyo da aka kulle shine IP na al'ada don wannan ƙira. Yana jujjuya fitarwar DisplayPort zuwa tsarin bidiyo da aka rufe wanda zaku iya haɗa kai tsaye zuwa shigar da Bidiyo da aka kulle. Mai Nunin Nuni zuwa Ƙaƙwalwar Bidiyo IP na iya canza daidaitattun siginar waya kuma yana iya canza odar jirage masu launi a cikin kowane pixel. Ma'auni na DisplayPort yana ƙayyadad da oda mai launi wanda ya bambanta da umarnin bututun bidiyo na Intel. Nios II processor yana sarrafa canjin launi. Yana karanta sararin launi na yanzu don watsawa daga IP mai karɓar DisplayPort tare da ƙirar bawa ta Avalon-MM. Yana jagorantar DisplayPort zuwa IP ɗin Bidiyo mai kulle don amfani da gyaran da ya dace tare da ƙa'idar bawa ta Avalon-MM.

Shigarwar Bidiyo mai kulle
Shigar da bidiyon da aka kulle yana aiwatar da siginar mu'amalar bidiyo da aka rufe daga DisplayPort zuwa Clocked Video IP kuma yana canza shi zuwa tsarin siginar Bidiyo na Avalon-ST. Wannan tsarin siginar yana zare duk bayanan da ba a kwance a kwance da tsaye daga bidiyon yana barin bayanan hoto mai aiki kawai. IP ɗin yana ɗaukar shi azaman fakiti ɗaya kowane firam ɗin bidiyo. Hakanan yana ƙara ƙarin fakitin metadata (wanda ake nufi da fakitin sarrafawa) waɗanda ke bayyana ƙudurin kowane firam ɗin bidiyo. Rafin Bidiyo na Avalon-ST ta cikin bututun sarrafawa shine pixels huɗu a layi daya, tare da alamomi uku akan kowane pixel. Shigar da bidiyon da aka rufe yana ba da ƙetare agogo don jujjuya daga siginar siginar bidiyo mai ɗimbin ƙima daga Mai karɓar DisplayPort zuwa ƙayyadadden ƙimar agogo (300 MHz) don bututun IP na bidiyo.

Mai Rarraba Mai Ruwa
Mai tsabtace rafi yana tabbatar da cewa siginar Bidiyo na Avalon-ST da ke wucewa zuwa bututun sarrafawa ba shi da kuskure. Toshe zafi na tushen DisplayPort na iya haifar da ƙira don gabatar da cikakkun firam ɗin bayanai zuwa shigar da bidiyo da aka rufe da IP da kuma haifar da kurakurai a sakamakon rafin Bidiyo na Avalon-ST. Girman fakitin da ke ɗauke da bayanan bidiyo na kowane firam ɗin sannan bai dace da girman da fakitin sarrafawa masu alaƙa suka ruwaito ba. Mai tsabtace rafi yana gano waɗannan sharuɗɗan kuma yana ƙara ƙarin bayanai (pixels masu launin toka) zuwa ƙarshen fakitin bidiyo masu laifi don kammala firam da daidaita ƙayyadaddun ƙayyadaddun fakitin sarrafawa.

Chroma Resampler (Input)
Bayanan bidiyo da ƙirar ke karɓa a shigarwa daga DisplayPort na iya zama 4:4:4, 4:2:2, ko 4:2:0 chroma sampjagoranci. Shigarwar chroma resampler yana ɗaukar bidiyo mai shigowa ta kowane tsari kuma ya canza shi zuwa 4: 4: 4 a kowane yanayi. Don samar da ingancin gani mafi girma, chroma resampler yana amfani da mafi yawan tsadar lissafi tace algorithm. Mai sarrafa Nios II yana karanta chroma s na yanzuampTsarin ling daga Mai karɓar IP na DisplayPort ta hanyar sadarwar bawa ta Avalon-MM. Yana sadar da tsarin zuwa chroma resampler via ta Avalon-MM bawa dubawa.

Canjin Sararin Launuka (Input)
Bayanan shigar da bidiyo daga DisplayPort na iya amfani da ko dai RGB ko YCbCr sarari launi. Mai canza sararin shigar da launi yana ɗaukar bidiyo mai shigowa ta kowane tsari da ya zo kuma ya canza shi zuwa RGB a kowane hali. Mai sarrafa Nios II yana karanta sararin launi na yanzu daga mai karɓar IP na DisplayPort tare da ƙirar bawa na Avalon-MM; yana ɗora madaidaitan juzu'in juzu'i zuwa chroma resampler ta hanyar Avalon-MM bawan dubawa.

Clipper
Clipper yana zaɓar yanki mai aiki daga rafin bidiyo mai shigowa kuma yana watsar da sauran. Ikon software da ke gudana akan mai sarrafa Nios II yana bayyana yankin da za a zaɓa. Yankin ya dogara da ƙudurin bayanan da aka karɓa a tushen DisplayPort da ƙudurin fitarwa da yanayin ƙira. Mai sarrafawa yana sadar da yankin zuwa Clipper ta hanyar sadarwar bawa ta Avalon-MM.

Scaler
Ƙirar ta shafi ƙira ga bayanan bidiyo mai shigowa bisa ga ƙudurin shigarwa da aka karɓa, da ƙudurin fitarwa da kuke buƙata. Hakanan zaka iya zaɓar tsakanin hanyoyin sikeli guda uku (na sama, ƙasa da wucewa). IPs Scalar guda biyu suna ba da aikin haɓakawa: ɗayan yana aiwatar da duk wani raguwa da ake buƙata; sauran aiwatar da upscaling. Zane yana buƙatar ma'auni biyu.

  • Lokacin da ma'aunin ya aiwatar da raguwa, ba ya samar da ingantaccen bayanai akan kowane zagayowar agogo a fitowar sa. Domin misaliample, idan aiwatar da 2x downscale ratio, ingantacciyar sigina a fitarwa yana da girma kowane sauran agogon sake zagayowar yayin da ƙirar ke karɓar kowane ko da layin shigarwa mai ƙididdigewa, sannan ƙasa ga gabaɗayan layukan shigarwa masu ƙima. Wannan halayen fashewa yana da mahimmanci ga tsarin rage ƙimar bayanai a fitarwa, amma bai dace da mahaɗar IP na ƙasa ba, wanda gabaɗaya yana tsammanin ingantaccen adadin bayanai don guje wa raguwa a fitarwa. Ƙirar tana buƙatar Ƙaƙƙarfan Maɓalli tsakanin kowace ƙasa da mahaɗa. Matsakaicin Frame yana bawa mahaɗaɗɗa damar karanta bayanai akan ƙimar da yake buƙata.
  • Lokacin da ma'aunin ya aiwatar da haɓaka, yana samar da ingantaccen bayanai akan kowane zagayowar agogo, don haka mahaɗin mai zuwa ba shi da matsala. Koyaya, maiyuwa bazai karɓi sabbin bayanan shigarwa akan kowane zagayowar agogo ba. Ɗaukar girman girman 2x azaman exampHar ila yau, a kan layukan fitarwa ma masu ƙididdigewa yana karɓar sabon bugun bayanai kowane zagaye na agogo, sannan ba ya karɓar sabon bayanan shigarwa akan layukan fitarwa masu ƙima. Duk da haka, Clipper na sama na iya samar da bayanai a madaidaicin farashi idan yana amfani da babban shirin (misali yayin zuƙowa). Don haka, dole ne gabaɗaya a raba Clipper da babban sikeli ta Wurin Buffer, yana buƙatar Scaler ya zauna bayan Mai Buffer Frame a cikin bututun. Dole ne Scaler ya zauna a gaban Mai Buffer na Frame don raguwa, don haka zane yana aiwatar da ma'auni guda biyu daban-daban a kowane gefen Frame Buffer: daya don haɓaka; dayan don ragewa.

Scalers guda biyu kuma suna rage matsakaicin bandwidth DDR4 da Frame Buffer ke buƙata. Dole ne ku yi amfani da ma'auni na ƙasa koyaushe kafin Frame Buffer, rage girman ƙimar bayanai a gefen rubutu. Koyaushe yi amfani da sikeli bayan Maɓallin Maɓalli, wanda ke rage ƙimar bayanan a gefen karantawa. Kowane Scaler yana samun ƙudurin shigarwar da ake buƙata daga fakitin sarrafawa a cikin rafi na bidiyo mai shigowa, yayin da mai sarrafa Nios II tare da ƙirar bawa na Avalon-MM ya saita ƙudurin fitarwa don kowane Scaler.

Frame Buffer
Maɓallin firam ɗin yana amfani da ƙwaƙwalwar DDR4 don yin buffer sau uku wanda ke ba da damar bututun sarrafa bidiyo da hoto don yin jujjuya ƙimar firam tsakanin ƙimar firam mai shigowa da mai fita. Zane zai iya karɓar kowane ƙimar firam ɗin shigarwa, amma jimlar ƙimar pixel kada ta wuce 1 giga pixels a sakan daya. Software na Nios II yana saita ƙimar firam ɗin fitarwa zuwa ko dai 30 ko 60fps, bisa ga yanayin fitarwa da kuka zaɓa. Adadin firam ɗin fitarwa aiki ne na saitunan Fitar Bidiyo da aka kulle da agogon pixel na fitarwa. Matsi na baya wanda Fitowar Bidiyo na Clocked ya shafi bututun yana ƙayyade ƙimar abin da bangaren karantawa na Frame Buffer ke jan firam ɗin bidiyo daga DDR4.

Mixer
Mai haɗawa yana haifar da tsayayyen girman baƙar fata wanda ke shirye-shiryen Nios II processor don dacewa da girman hoton fitarwa na yanzu. Mai haɗawa yana da abubuwan shiga guda biyu. Shigarwar farko ta haɗa zuwa mai haɓakawa don ba da damar ƙira don nuna fitarwa daga bututun bidiyo na yanzu. Shigarwa ta biyu tana haɗawa da toshe janareta icon. Ƙirar kawai tana ba da damar shigarwar farko na mahaɗin lokacin da ta gano aiki, tsayayyiyar bidiyo a shigar da bidiyon da aka kulle. Sabili da haka, ƙirar tana riƙe da ingantaccen hoton fitarwa a fitarwa yayin da ake toshe zafi a shigarwar. Alfa ƙira yana haɗa shigarwar na biyu zuwa mahaɗin, an haɗa shi da janareta ta icon, akan duka bangon baya da hotunan bututun bidiyo tare da bayyananniyar 50%.

Canjin Sararin Launuka (Fitowa)
Mai sauya sararin sararin samaniya yana canza shigar da bayanan bidiyo na RGB zuwa ko dai RGB ko YCbCr sarari launi dangane da saitin lokacin aiki daga software.

Chroma Resampler (fitarwa)
Fitar da chroma resampler yana canza tsarin daga 4:4:4 zuwa ɗaya daga cikin 4:4:4, 4:2:2, ko 4:2:0. Software yana saita tsari. Fitar da chroma resampler kuma yana amfani da tsararren algorithm don cimma ingantaccen bidiyo mai inganci.

Fitowar Bidiyo mai kulle
Fitowar bidiyo da aka rufe tana canza rafin Bidiyo na Avalon-ST zuwa tsarin bidiyo da aka rufe. Fitowar bidiyo da aka rufe tana ƙara ɓoyayyen a kwance da tsaye da bayanin lokacin aiki tare ga bidiyon. Mai sarrafa Nios II yana tsara saitunan da suka dace a cikin fitowar bidiyo da aka rufe dangane da ƙudurin fitarwa da ƙimar firam ɗin da kuke buƙata. Fitowar bidiyo da aka rufe tana canza agogo, ta haye daga ƙayyadadden agogon bututun 300 MHz zuwa madaidaicin ƙimar bidiyon da aka rufe.

Bidiyo da aka kulle zuwa DisplayPort
Bangaren watsawa na DisplayPort yana karɓar bayanan da aka tsara azaman bidiyo mai rufewa. Bambance-bambance a cikin siginar waya da ayyana musaya na mashigar ruwa a cikin Platform Designer yana hana ku haɗa Fitowar Bidiyo ta Kulle kai tsaye zuwa IP mai watsa tashar DisplayPort. Bidiyon da aka kulle zuwa ɓangaren NuniPort shine ƙayyadaddun ƙayyadaddun ƙirar IP na al'ada don samar da sauƙi mai sauƙi da ake buƙata tsakanin Fitowar Bidiyo da Mai watsawa DisplayPort IP. Hakanan yana musanya odar jirage masu launi a cikin kowane pixel don lissafin ma'auni na tsara launi daban-daban waɗanda Avalon-ST Bidiyo da DisplayPort ke amfani da su.

Mai watsa IP na DisplayPort da Mai watsa tashar tashar tashar PHY
Mai watsa IP na DisplayPort da mai watsa DisplayPort PHY tare suna aiki don canza rafin bidiyo daga bidiyo mai rufewa zuwa rafi na DisplayPort mai yarda. IP mai watsawa na DisplayPort yana sarrafa ka'idar DisplayPort kuma yana ɓoye ingantattun bayanan DisplayPort, yayin da mai watsawar DisplayPort PHY ya ƙunshi masu ɗaukar hoto kuma yana ƙirƙirar fitarwa mai sauri mai sauri.

Nios II Processor da Peripherals
Tsarin Platform Designer ya ƙunshi mai sarrafa Nios II, wanda ke sarrafa mai karɓar DisplayPort da IPs masu watsawa da saitunan lokacin aiki don sarrafa bututun. Na'ura mai sarrafa Nios II tana haɗi zuwa waɗannan abubuwan haɗin gwiwa na asali:

  • Ƙwaƙwalwar ajiyar kan-chip don adana shirin da bayanansa.
  • AJTAG UART don nuna fitarwa na software (ta tashar Nios II).
  • Mai ƙidayar lokaci don samar da jinkirin matakin millisecond a wurare daban-daban a cikin software, kamar yadda ƙayyadaddun nuninPort ke buƙata na mafi ƙarancin lokutan taron.
  • LEDs don nuna matsayin tsarin.
  • Maɓallin turawa don ba da damar sauyawa tsakanin yanayin ƙima da kuma kunnawa da kashe nunin tambarin Intel.
  • DIP yana sauyawa don ba da damar sauya tsarin fitarwa da kuma kunnawa da kashe bugu na saƙonni zuwa tashar Nios II.

Abubuwan da suka faru masu zafi a kan tushen DisplayPort da kuma nutsewar wuta suna katsewa wanda ke haifar da Mai sarrafa Nios II don saita mai watsa DisplayPort da bututun daidai. Babban madauki a cikin lambar software kuma yana lura da ƙimar da ke kan maɓallan turawa da na'urorin DIP da canza saitin bututun daidai.

I²C Masu Gudanarwa
Ƙirar ta ƙunshi masu kula da I²C guda biyu (Si5338 da PS8460) don shirya saitunan uku na sauran abubuwan haɗin gwiwa akan Intel Arria 10 10 GX FPGA Development Kit. Na'urori biyu na Si5338 akan Intel Arria 10 GX FPGA Development Kit suna haɗuwa da bas ɗin I²C iri ɗaya. Na farko yana haifar da agogon tunani don DDR4 EMIF. Ta hanyar tsoho, an saita wannan agogon zuwa 100 MHz don amfani tare da 1066 MHz DDR4, amma wannan ƙirar tana gudanar da DDR4 a 1200 MHz, wanda ke buƙatar agogon tunani na 150 MHz. A farawa da Nios II processor, ta hanyar I²C mai kula da kewaye, yana canza saituna a taswirar rajista na Si5338 na farko don ƙara saurin agogon tunani na DDR4 zuwa 150MHz. Si5338 janareta na agogo na biyu yana haifar da vid_clk don kallon bidiyo mai rufewa tsakanin bututun da IP mai watsa DisplayPort. Dole ne ku daidaita saurin wannan agogon don kowane ƙudurin fitarwa daban-daban da ƙimar firam ɗin da ke goyan bayan ƙira. Kuna iya daidaita saurin a lokacin gudu lokacin da mai sarrafa Nios II ke buƙata. Katin 'yar Bitec DisplayPort 1.4 FMC yana amfani da Parade PS8460 jitter mai maimaitawa da mai ritaya. A lokacin farawa Nios II processor yana gyara saitunan tsoho na wannan bangaren don biyan buƙatun ƙira.

Bayanin Software

Tsarin Juya Tsarin Bidiyo na 8K DisplayPort ExampLe ya haɗa da IP daga Intel Video da Hoto Processing Suite da DisplayPort interface IP Duk waɗannan IPs na iya aiwatar da firam ɗin bayanai ba tare da wani ƙarin sa hannun ba lokacin saita daidai. Dole ne ku aiwatar da babban iko na waje don saita IPs don farawa da kuma lokacin da tsarin ya canza, misali mai karɓa na DisplayPort ko abubuwan da suka faru na toshe zafi ko ayyukan maɓallin mai amfani. A cikin wannan ƙira, mai sarrafa Nios II, mai sarrafa software mai sarrafa bespoke, yana ba da iko mai girma. A lokacin farawa da software:

  • Yana saita agogon ref na DDR4 zuwa 150 MHz don ba da izinin saurin 1200 MHz DDR, sannan ya sake saita ƙirar ƙwaƙwalwar ajiyar waje ta IP don sake daidaitawa akan sabon agogon tunani.
  • Yana saita mai maimaita PS8460 DisplayPort da mai ritaya.
  • Yana farawa da mai karɓar DisplayPort da musaya masu watsawa.
  • Yana fara sarrafa bututun IPs.

Lokacin da ƙaddamarwa ya cika software yana shiga ci gaba yayin madauki, dubawa, da kuma mayar da martani ga adadin abubuwan da suka faru.

Canje-canje zuwa Yanayin Sikeli
Zane yana goyan bayan nau'ikan sikelin asali guda uku; passthrough, upscale, and downscale. A cikin yanayin wucewa ƙirar ba ta yin sikeli na shigar da bidiyon, a cikin yanayi mai girma ƙira yana haɓaka shigar da bidiyon, kuma a yanayin ƙasa ƙira yana rage ma'aunin shigarwar bidiyo.
Tubalan guda huɗu a cikin bututun sarrafawa; da Clipper, da downscaler, da upscaler da Mixer ƙayyade gabatar da karshe fitarwa a kowane yanayi. Software yana sarrafa saitunan kowane toshe dangane da ƙudurin shigarwa na yanzu, ƙudurin fitarwa, da yanayin sikelin da kuka zaɓa. A mafi yawan lokuta, Clipper yana wuce shigarwar ta hanyar da ba a canza ba, kuma girman bangon Mixer girman daidai yake da na ƙarshe, sikelin sigar shigarwar bidiyo. Koyaya, idan ƙudurin bidiyon shigarwa ya fi girman abin fitarwa, ba zai yiwu a yi amfani da sikeli mai girma zuwa bidiyon shigarwa ba tare da fara yanke shi ba. Idan ƙudurin shigarwa bai kai abin da ake fitarwa ba software ba zai iya yin amfani da ƙasa ba tare da yin amfani da Layer bangon Mixer wanda ya fi girma fiye da abin shigar da bidiyon shigarwa, wanda ke ƙara baƙar fata kewaye da bidiyon fitarwa.

Table 4. Sarrafa Toshe Bututun
Wannan tebur yana lissafin aikin tubalan sarrafa bututun guda huɗu a cikin kowane ɗayan haɗuwa guda tara na yanayin sikeli, ƙudurin shigarwa da ƙudurin fitarwa.

Yanayin in > waje in = fita a cikin <fita
Wucewa Danna don girman fitarwa Babu ƙananan ma'auni Babu shirin bidiyo

Babu raguwa

Babu shirin bidiyo

Babu raguwa

ci gaba…
Yanayin in > waje in = fita a cikin <fita
  Babu babba

Babu bakin iyaka

Babu babba

Babu bakin iyaka

Babu babba

Baƙaƙen bakin iyaka zuwa girman fitarwa

Babban girman Dannawa zuwa girman fitarwa 2/3 Babu ƙananan sikelin

Ma'auni zuwa girman fitarwa Babu bakin iyaka

Dannawa zuwa girman fitarwa 2/3 Babu ƙananan sikelin

Ma'auni zuwa girman fitarwa Babu bakin iyaka

Babu shirin bidiyo

Babu raguwa

Ma'auni zuwa girman fitarwa Babu bakin iyaka

Kasashe Babu shirin bidiyo

Kasa da girman fitarwa Babu babba

Babu bakin iyaka

Babu shirin bidiyo

Kasa da girman fitarwa Babu babba

Babu bakin iyaka

Babu shirin bidiyo

Kasa da girman shigarwar 2/3 Babu babba

Baƙaƙen bakin iyaka zuwa girman fitarwa

Canja tsakanin hanyoyi ta latsa maɓallin tura mai amfani 1. Software yana lura da ƙima akan maɓallan turawa akan kowane gudu ta hanyar madauki (yana yin ɓarna software) kuma yana daidaita IPs a cikin bututun sarrafawa daidai.

Canje-canje a Input na DisplayPort
A kan kowane gudu ta hanyar madauki software ɗin tana ƙididdige matsayin shigarwar Bidiyo mai kulle, neman canje-canje a cikin kwanciyar hankali na shigar da rafin bidiyo. Software yana la'akari da bidiyon yana da ƙarfi idan:

  • Shigarwar Bidiyo da aka kulle tana ba da rahoton cewa an yi nasarar kulle bidiyon da aka rufe.
  • Ƙididdigar shigarwa da sararin launi ba su da canje-canje tun lokacin da aka yi gudu ta hanyar madauki.

Idan shigarwar ta tsaya tsayin daka amma ta rasa makulli ko kuma kaddarorin rafin bidiyo sun canza, software ɗin tana dakatar da shigar da Bidiyo da aka kulle tana aika bidiyo ta cikin bututun. Hakanan yana saita mahaɗin don dakatar da nunin abun shigar bidiyo Layer. Fitowar ta ci gaba da aiki (yana nuna baƙar allo da tambarin Intel) yayin kowane taron hotplug mai karɓa ko canje-canjen ƙuduri.
Idan shigarwar ba ta tsaya tsayin daka ba amma yanzu ta tsaya, software ɗin tana daidaita bututun don nuna sabon ƙudurin shigarwa da sarari launi, ta sake kunna fitarwa daga CVI, kuma tana saita Mixer don sake nuna layin shigar da bidiyo. Sake kunna layin mahaɗa ba kai tsaye ba saboda Ƙirar Maɓalli na iya kasancewa tana maimaita tsofaffin firam daga shigarwar da ta gabata kuma ƙirar dole ne ta share waɗannan firam ɗin. Sannan zaku iya sake kunna nuni don gujewa kyalli. Maɓallin firam ɗin yana adana adadin adadin firam ɗin da aka karanta daga DDR4, wanda mai sarrafa Nios II zai iya karantawa. Software sampKada wannan ƙirgawa lokacin da shigarwar ta tsaya tsayin daka kuma ta sake kunna Layer Mixer lokacin da ƙidayar ta ƙaru da firam huɗu, wanda ke tabbatar da ƙirar ta fitar da duk wani tsohon firam daga ma'ajiyar.

Abubuwan da ake watsawa na DisplayPort Hot-plug Events
Abubuwan da suka faru masu zafi a na'urar watsawa ta DisplayPort suna kashe katsewa a cikin software wanda ke saita tuta don faɗakar da babban madaidaicin software na canji a cikin fitarwa. Lokacin da ƙira ta gano filogi mai zafi mai watsawa, software ɗin tana karanta EDID don sabon nuni don tantance waɗanne ƙudiri da sarari masu launi. Idan ka saita DIP yana juyawa zuwa yanayin da sabon nuni ba zai iya tallafawa ba, software ɗin ta faɗi baya zuwa yanayin nuni mai ƙarancin buƙata. Sannan yana daidaita bututun mai, DisplayPort mai watsawa IP, da sashin Si5338 wanda ke samar da mai watsa vid_clk don sabon yanayin fitarwa. Lokacin da shigarwar ya ga canje-canje, Layer Mixer don bidiyon shigarwa baya nunawa kamar yadda software ke gyara saitunan bututun. Software ba ya sake kunnawa
nuni har sai bayan firam hudu lokacin da sabbin saituna suka wuce ta firam
buffer.

Canje-canje zuwa Saitunan Canjawar Mai amfani DIP
Matsayin DIP mai amfani yana jujjuya 2 zuwa 6 yana sarrafa tsarin fitarwa (ƙuduri, ƙimar firam, sarari launi da rago kowane launi) wanda aka kore ta hanyar watsawa na DisplayPort. Lokacin da software ta gano canje-canje akan waɗannan maɓallan DIP, tana gudana ta cikin jerin da ke kusan kama da filogi mai zafi mai watsawa. Baka buƙatar tambayar EDID mai watsawa saboda baya canzawa.

Tarihin Bita na AN 889: 8K NuniPort Tsarin Juya Tsarin Bidiyo Example

Tebur 5. Tarihin Bita na AN 889: 8K NuniPort Tsarin Juya Tsarin Bidiyo Example

Sigar Takardu Canje-canje
2019.05.30 Sakin farko.


Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.
*Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.

Takardu / Albarkatu

intel AN 889 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example [pdf] Jagorar mai amfani
Tsarin Juya Tsarin Bidiyo na AN 889 8K Example, AN 889, 8K DisplayPort Tsarin Juya Tsarin Bidiyo Example, Tsarin Tsarin Juyawa Example, Tsarin Juya Example

Magana

Bar sharhi

Ba za a buga adireshin imel ɗin ku ba. Ana yiwa filayen da ake buƙata alama *