Intel AN 775 e Hlahisa Lintlha tsa Pele tsa Nako ea I/O

AN 775: Ho Hlahisa Lintlha tsa Pele tsa Nako ea I/O bakeng sa Intel FPGAs

U ka hlahisa lintlha tsa pele tsa nako ea I/O bakeng sa lisebelisoa tsa Intel FPGA u sebelisa Intel® Quartus® Prime software GUI kapa litaelo tsa Tcl. Lintlha tsa pele tsa nako tsa I/O li na le thuso bakeng sa moralo oa pele oa phini le moralo oa PCB. U ka hlahisa lintlha tsa pele tsa nako bakeng sa liparamente tse latelang tse loketseng tsa nako ho lokisa moralo oa nako ea moralo ha u nahana ka litekanyetso tsa I/O le ho beoa ha phini.

Letlapa la 1. Li-Parameters tsa Nako ea I / O 

Parameter ea nako	Tlhaloso
Nako ea ho kenya (tSU) Nako ea ho kenya (tH)	tSU = phini ea ho kenya ho lieha ho ngolisa data + ngoliso ea ho kenya nako e nyane ea ho seta - phini ea ho kenya ho lieha ho ngolisoa ha oache tH = - pini ea ho kenya ho liehisa tsa data tsa ngoliso + registara ea ho kenya nako e nyane ea ho ts'oara + pini ea ho kenya ho liehisa oache ea ngoliso
clock to output delay (tCO)	tCO = + tshupanako ea tshupanako bakeng sa ngoliso ea tlhahiso e liehang + ho lieha ho tsoa hoa nako ho ea ho sephetho + rejisetara ea tlhahiso ho lieha ha pina

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel, empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso.
*Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

Ho hlahisa lintlha tsa pele tsa nako ea I/O ho kenyelletsa mehato e latelang:

• Mohato oa 1: Kopanya Flip-flop bakeng sa Sesebelisoa sa Target Intel FPGA leqepheng la 4
• Mohato oa 2: Hlalosa libaka tse tloaelehileng tsa I/O le tsa Pin leqepheng la 5
• Mohato oa 3: Hlalosa Maemo a Ts'ebetso ea Sesebelisoa leqepheng la 6
• Mohato oa 4: View I/O Nako ho Tlaleho ea Letlapa la Boitsebiso leqepheng la 6

Mohato oa 1: Kopanya Flip-flop bakeng sa Target Intel FPGA Device

Latela mehato ena ho hlalosa le ho kopanya mohopolo o fokolang oa flip-flop ho hlahisa lintlha tsa pele tsa nako ea I/O:

1. Theha morero o mocha ho Intel Quartus Prime Pro Edition software version 19.3.
2. Tobetsa Mosebetsi ➤ Sesebediswa, hlakisa sesebediswa seo o se lebisitseng ho Family le Sesebediswa se Target. Bakeng sa mohlalaample, khetha AGFA014R24 Intel Agilex™ FPGA.
3. Tobetsa File ➤ E ncha 'me u thehe Sets'oants'o sa Block / Schematic File.
4. Ho kenya likarolo ho schematic, tobetsa konopo ea Symbol Tool.
   
5. Tlas'a Lebitso, thaepa DFF, ebe o tobetsa OK. Tobetsa ho Block Editor ho kenya letšoao la DFF.
6. Pheta 4 leqepheng la 4 ho isa ho la 5 leqepheng la 5 ho kenya Input_data input pin, Clock input pin, le Output_data output pin.
7. Ho hokela lithakhisa ho DFF, tobetsa konopo ea Orthogonal Node Tool, ebe u hula mela ea terata lipakeng tsa phini le letšoao la DFF.
   
8. Ho kopanya DFF, tobetsa Tshebetso ➤ Qala ➤ Qala Tlhahlobo & Synthesis. Synthesis e hlahisa bonyane lenane la marang-rang le hlokahalang ho fumana lintlha tsa nako tsa I/O.

Mohato oa 2: Hlalosa Libaka tse tloaelehileng tsa I / O le Pin

Libaka tse ikhethileng tsa phini le maemo a I/O ao u a abetseng lithakhisa tsa sesebelisoa li ama boleng ba paramethara ea nako. Latela mehato ena ho abela phini ea I/O maemo le litšitiso tsa sebaka:

1. Tobetsa Likabelo ➤ Pin Planner.
2. Abela sebaka sa phini le litšitiso tse tloaelehileng tsa I/O ho latela moralo oa hau
   litlhaloso. Kenya Node Name, Direction, Location, le I/O Standard boleng bakeng sa liphini tse moralong ho All Pins spreadsheet. Ntle le moo, hula mabitso a li-node ka har'a sephutheloana sa Pin Planner view.

   
3. Ho hlophisa moralo, tobetsa Ho sebetsa ➤ Qala ho Kopanya. The Compiler e hlahisa tlhaiso-leseling ea nako ea I/O nakong ea pokello e felletseng.

Lintlha Tse Amanang

• Tlhaloso ea Melao-motheo ea I/O
•  Laola Sesebelisoa sa I/O Pins

Mohato oa 3: Hlalosa Maemo a Ts'ebetso ea Sesebelisoa

Latela mehato ena ho ntlafatsa lenane la linako le ho beha maemo a ts'ebetso bakeng sa tlhahlobo ea nako ka mor'a ho bokella ka botlalo:

1. Tobetsa Lisebelisoa ➤ Sehlahlobi sa Nako.
2. Fensetereng ea Task, tobetsa habeli Update Timing Netlist. Lethathamo la nako lea ntlafatsoa ka tlhaiso-leseling e felletseng ea nako e ikarabellang bakeng sa mathata ao u a etsang.
   
3. Tlas'a Beha Maemo a Ts'ebetso, khetha e 'ngoe ea mefuta e fumanehang ea nako, joalo ka Slow vid3 100C Model kapa Fast vid3 100C Model.

   

Mohato oa 4: View Nako ea I/O ho Tlaleho ea Letlapa la Boitsebiso

Hlahisa Tlaleho ea Letlapa la Boitsebiso ho Sehlahlo sa Nako ho view boleng ba paramethara ea nako.

1. Sehlahlobing sa Nako, tobetsa Litlaleho ➤ Leqephe la Boitsebiso ➤ Leqephe la Tlaleho.
2. Tobetsa OK.

   
   Litlaleho tsa Setup Times, Hold Times, le Clock to Output Times li hlaha tlas'a foldara ea Tlaleho ea Datasheet fenstereng ea Tlaleho.

3. Tobetsa tlaleho ka 'ngoe ho view litekanyetso tsa Rise and Fall parameter.
4. Bakeng sa mokhoa o bolokang nako, bolela boholo ba boleng bo felletseng

Example 1. Ho khetholla Li-Parameters tsa Nako ea I / O ho tsoa Tlalehong ea Datasheet 

Ho e latelang example Setup Times e tlaleha, nako ea hoetla e kholo ho feta nako ea ho phahama, ka hona tSU=tfall.

Ho e latelang exampLe Hold Times e tlaleha, boleng bo felletseng ba nako ea hoetla bo boholo ho feta boleng bo felletseng ba nako ea ho phahama, ka hona tH=tfall.

Ho e latelang example Clock to Output Times tlaleho, boleng bo felletseng ba nako ea hoetla bo boholo ho feta boleng bo felletseng ba nako ea ho nyoloha, ka hona tCO=tfall.

Lintlha Tse Amanang

• Thupelo ea ho Qala Nako ka Potlako
• Tataiso ea mosebelisi ea Intel Quartus Prime Pro Edition: Analyzer ea Nako
• Mokhoa oa ho Video: Kenyelletso ea Analyzer ea Nako

Moloko oa Boitsebiso oa Nako oa I/O oa Nako

U ka sebelisa sengoloa sa Tcl ho hlahisa tlhaiso-leseling ea nako ea I/O ka kapa ntle le ho sebelisa sebopeho sa software sa Intel Quartus Prime. Mokhoa o ngotsoeng o hlahisa data e thehiloeng ho I/O ea nako ea nako bakeng sa litekanyetso tsa I/O tse tšehetsoeng.

Hlokomela: Mokhoa o ngotsoeng o fumaneha feela bakeng sa sethala sa Linux*.
Latela mehato ena ho hlahisa tlhaiso-leseling ea nako ea I/O e bonts'ang litekanyetso tse ngata tsa I/O bakeng sa lisebelisoa tsa Intel Agilex, Intel Stratix® 10, le Intel Arria® 10:

1. Khoasolla polokelo ea projeke e nepahetseng ea Intel Quartus Prime file bakeng sa lelapa la sesebediswa seo o se lebisitseng:
   • Lisebelisoa tsa Intel Agilex— https://www.intel.com/content/dam/www/programmable/us/en/others/literature/an/io_timing_agilex_latest.qar
   • Lisebelisoa tsa Intel Stratix 10— https://www.intel.com/content/dam/www/programmable/us/en/others/literature/an/io_timing_stratix10.qar
   • Lisebelisoa tsa Intel Arria 10— https://www.intel.com/content/dam/www/programmable/us/en/others/literature/an/io_timing_arria10.qar
2. Ho tsosolosa polokelo ea .qar, qala software ea Intel Quartus Prime Pro Edition ebe u tobetsa Project ➤ Khutlisa Project Archived. Ntle le moo, tsamaisa mola o latelang oa taelo o lekanang ntle le ho qala GUI:
   

   quartus_sh -- tsosolosa file>

   The io_timing__e khutliselitsoe directory hona joale e na le foldara e nyane ea qdb le tse fapaneng files.

3. Ho tsamaisa sengoloa ka Intel Quartus Prime Timing Analyzer, tsamaisa taelo e latelang:
   

   quartus_sta –t .tcl

   Emela ho phethoa. Ts'ebetso ea script e kanna ea hloka lihora tse 8 kapa ho feta hobane phetoho e ngoe le e ngoe ho maemo a I/O kapa sebaka sa phini e hloka ho bokelloa hape.
4. Ho view litekanyetso tsa paramethara ea nako, bula mongolo o hlahisitsoeng files ho nako_files, ka mabitso a kang timing_tsuthtco___.txt.
   timing_tsuthtco_ _ _ .TXT.

Lintlha Tse Amanang

• Taelo Line Scripting
• ::QUARTUS:: STA Tcl Package

AN 775: Ho Hlahisa Nalane ea Phetoho ea Tokomane ea Nako ea Pele ea I/O

Tokomane Version	Intel Quartus Prime Version	Liphetoho
2019.12.08	19.3	Sehlooho se ntlafalitsoeng ho hlahisa litaba. Tšehetso e ekelitsoeng bakeng sa Intel Stratix 10 le Intel Agilex FPGAs. E kenyellelitsoe linomoro tsa mehato ho phalla. E kentse litšoantšo tsa paramethara ea nako. Lits'oants'o tse ntlafalitsoeng tsa skrini ho bonts'a mofuta oa morao-rao. Lihokelo tse ntlafalitsoeng tsa litokomane tse amanang. E sebelisitsoe litumellano tsa morao-rao tsa ho reha mabitso le setaele.
2016.10.31	16.1	Phatlalatso ea pele ea sechaba.

Litokomane / Lisebelisoa

Intel AN 775 e Hlahisa Lintlha tsa Pele tsa Nako ea I/O [pdf] Bukana ea Mosebelisi AN 775 e Hlahisa Lintlha tsa Nako tsa Pele tsa IO, AN 775, e Hlahisa Lintlha tsa Nako tsa Pele tsa IO, Lintlha tsa Pele tsa Nako tsa IO, Lintlha tsa Nako

Litšupiso

• Bukana ea Mosebelisi