intel AN 775 Tsim cov ntaub ntawv pib I/O Timing

AN 775: Tsim cov ntaub ntawv pib I/O Sijhawm rau Intel FPGAs

Koj tuaj yeem tsim cov ntaub ntawv pib I / O sijhawm rau Intel FPGA cov khoom siv siv Intel® Quartus® Prime software GUI lossis Tcl cov lus txib. Initial I / O lub sij hawm cov ntaub ntawv yog pab tau rau thaum ntxov pin npaj thiab PCB tsim. Koj tuaj yeem tsim cov ntaub ntawv lub sijhawm pib rau cov sijhawm teem sijhawm hauv qab no txhawm rau kho lub sijhawm tsim cov peev nyiaj thaum xav txog I / O cov qauv thiab kev tso tus pin.

Table 1. I/O Timing Parameters 

Lub sijhawm Parameter	Kev piav qhia
Input setup time (tSU) Input tuav lub sij hawm (tH)	tSU = input pin rau input register data ncua + input register micro setup time - input pin to input register moos ncua tH = - input tus pin rau input register cov ntaub ntawv ncua + input register micro tuav lub sij hawm + input tus pin rau input register moos ncua
Lub moos kom tso zis qeeb (tCO)	tCO = + moos ncoo kom tso zis tso npe ncua sijhawm + tso zis tso npe moos-rau-tso tawm ncua sijhawm + tso zis tso npe rau cov zis pin ncua

Intel Corporation. Txhua txoj cai. Intel, Intel logo, thiab lwm yam Intel cov cim yog cov cim lag luam ntawm Intel Corporation lossis nws cov koom haum. Intel lav kev ua tau zoo ntawm nws cov FPGA thiab cov khoom lag luam semiconductor rau cov kev qhia tshwj xeeb tam sim no raws li Intel tus qauv kev lees paub, tab sis muaj txoj cai los hloov cov khoom thiab cov kev pabcuam txhua lub sijhawm yam tsis muaj ntawv ceeb toom. Intel xav tias tsis muaj lub luag haujlwm lossis kev lav phib xaub uas tshwm sim los ntawm daim ntawv thov lossis siv cov ntaub ntawv, cov khoom lag luam, lossis cov kev pabcuam uas tau piav qhia hauv no tshwj tsis yog raws li tau pom zoo hauv kev sau ntawv los ntawm Intel. Intel cov neeg siv khoom tau qhia kom tau txais qhov tseeb version ntawm cov cuab yeej tshwj xeeb ua ntej tso siab rau cov ntaub ntawv tshaj tawm thiab ua ntej muab xaj rau cov khoom lossis cov kev pabcuam.
* Lwm lub npe thiab hom yuav raug lees paub raws li cov cuab yeej ntawm lwm tus.

Tsim cov ntaub ntawv I/O lub sijhawm pib muaj xws li cov kauj ruam hauv qab no:

• Kauj ruam 1: Synthesize Flip-flop rau Lub Hom Phiaj Intel FPGA Ntaus ntawm nplooj 4
• Kauj ruam 2: Txhais I/O Standard thiab Pin Chaw nyob rau nplooj 5
• Kauj Ruam 3: Qhia meej cov cuab yeej ua haujlwm ntawm nplooj ntawv 6
• Kauj ruam 4: View I/O Timing nyob rau hauv Datasheet Report nyob rau nplooj 6

Kauj ruam 1: Synthesize Flip-flop rau Lub Hom Phiaj Intel FPGA Ntaus

Ua raws li cov kauj ruam no los txhais thiab sib txuas qhov tsawg kawg nkaus flip-flop logic los tsim cov ntaub ntawv pib I / O sijhawm:

1. Tsim ib txoj haujlwm tshiab hauv Intel Quartus Prime Pro Edition software version 19.3.
2. Nyem Assignments ➤ Ntaus, qhia koj lub hom phiaj ntaus ntawv Tsev Neeg thiab lub hom phiaj ntaus ntawv. Rau example, xaiv AGFA014R24 Intel Agilex™ FPGA.
3. Nyem File ➤ Tshiab thiab tsim ib daim duab Block/Schematic File.
4. Txhawm rau ntxiv cov khoom sib xyaw rau cov schematic, nyem lub cim Cov cuab yeej khawm.
   
5. Hauv lub npe, ntaus DFF, thiab tom qab ntawd nyem OK. Nyem rau hauv Block Editor los ntxig rau DFF cim.
6. Rov ua dua 4 ntawm nplooj ntawv 4 txog 5 ntawm nplooj ntawv 5 ntxiv rau Input_data input pin, moos input pin, thiab Output_data output pin.
7. Txhawm rau txuas cov pins rau DFF, nyem lub pob Orthogonal Node Tool, thiab tom qab ntawd kos cov kab ntawm tus pin thiab DFF cim.
   
8. Txhawm rau tsim cov DFF, nyem Ua Haujlwm ➤ Pib ➤ Pib Kev Tshawb Fawb & Kev Sib Sau. Synthesis generates qhov tsawg kawg nkaus tsim netlist yuav tsum tau kom tau I/O sij hawm cov ntaub ntawv.

Kauj ruam 2: Txhais I/O Standard thiab Pin Chaw

Qhov chaw tus pin tshwj xeeb thiab I / O tus qauv koj muab rau tus pins ntaus ntawv cuam tshuam rau lub sijhawm ntsuas qhov tseem ceeb. Ua raws li cov kauj ruam no los muab tus pin I/O tus qauv thiab qhov chaw txwv:

1. Nyem Assignments ➤ Pin Planner.
2. Muab tus pin qhov chaw thiab I / O tus qauv txwv raws li koj tus qauv tsim
   specifications. Nkag mus rau Node Lub Npe, Kev Taw Qhia, Qhov Chaw, thiab I / O Standard qhov tseem ceeb rau tus pins hauv tus qauv tsim hauv Txhua Pins spreadsheet. Xwb, luag cov npe rau hauv Pin Planner pob view.

   
3. Txhawm rau sau cov qauv tsim, nyem Ua Haujlwm ➤ Pib muab tso ua ke. Lub Compiler tsim cov ntaub ntawv I/O lub sij hawm thaum muab tso ua ke tag nrho.

Cov ntaub ntawv ntsig txog

• I/O Standards Txhais
•  Tswj Ntaus I/O Pins

Kauj Ruam 3: Qhia meej cov cuab yeej ua haujlwm

Ua raws li cov kauj ruam no los hloov kho lub sijhawm netlist thiab teeb tsa kev ua haujlwm rau lub sijhawm tsom xam tom qab tag nrho muab tso ua ke:

1. Nyem Cov cuab yeej ➤ Timing Analyzer.
2. Hauv Task pane, muab ob npaug rau-nias Hloov Kho Lub Sijhawm Netlist. Lub sij hawm netlist hloov tshiab nrog cov ntaub ntawv sau ua ke tag nrho cov sij hawm uas suav rau tus pin txwv koj ua.
   
3. Nyob rau hauv Txheej Txheem Kev Ua Haujlwm, xaiv ib qho ntawm cov qauv siv sijhawm, xws li Slow vid3 100C Model lossis Fast vid3 100C Model.

   

Kauj ruam 4: View Lub Sijhawm I/O hauv Datasheet Report

Tsim Daim Ntawv Qhia Cov Ntaub Ntawv hauv Timing Analyzer rau view lub sij hawm parameter qhov tseem ceeb.

1. Hauv Timing Analyzer, nyem Cov Ntawv Qhia ➤ Datasheet ➤ Qhia Cov Ntaub Ntawv.
2. Nyem OK.

   
   Lub Sijhawm Teeb Meem, Tuav Sijhawm, thiab Lub Sijhawm rau Cov Ntawv Tshaj Tawm Sijhawm tshwm sim nyob rau hauv Daim Ntawv Qhia Qhia Ntawv Folder hauv Daim Ntawv Qhia pane.

3. Nyem rau txhua daim ntawv qhia rau view qhov Rise thiab Fall parameter qhov tseem ceeb.
4. Rau ib qho kev txuag lub sij hawm mus kom ze, qhia tus nqi siab tshaj plaws

Example 1. Kev Txiav Txim I/O Timing Parameters los ntawm Daim Ntawv Qhia Cov Ntaub Ntawv 

Hauv qab no example Setup Times qhia, lub caij nplooj zeeg yog ntau dua lub sij hawm sawv, yog li ntawd tSU = tfall.

Hauv qab no example Hold Times qhia, qhov tseeb ntawm lub caij nplooj zeeg lub caij nplooj zeeg yog ntau dua li tus nqi ntawm lub sijhawm nce, yog li tH = tfall.

Hauv qab no example Clock to Output Times qhia, tus nqi tag nrho ntawm lub caij nplooj zeeg lub caij nplooj zeeg yog ntau dua li tus nqi ntawm lub sijhawm nce, yog li tCO = tfall.

Cov ntaub ntawv ntsig txog

• Timing Analyzer Quick-Start Tutoria
• Intel Quartus Prime Pro Tsab Ntawv Qhia Tus Neeg Siv: Timing Analyzer
• Yuav Ua Li Cas Video: Taw Qhia Rau Timing Analyzer

Scripted I/O Timing Data Generation

Koj tuaj yeem siv Tcl tsab ntawv los tsim cov ntaub ntawv I / O sijhawm nrog lossis tsis siv Intel Quartus Prime software neeg siv interface. Txoj hauv kev sau ntawv tsim cov ntawv nyeem raws sijhawm I / O lub sijhawm cov ntaub ntawv rau kev txhawb nqa I / O cov qauv.

Nco tseg: Txoj kev sau ntawv tsuas yog muaj rau Linux * platforms.
Ua raws li cov kauj ruam no los tsim cov ntaub ntawv I/O sij hawm cuam tshuam txog ntau yam I/O cov qauv rau Intel Agilex, Intel Stratix® 10, thiab Intel Arria® 10 li:

1. Download tau qhov tsim nyog Intel Quartus Prime qhov project archive file rau koj lub hom phiaj ntaus ntawv tsev neeg:
   • Intel Agilex li- https://www.intel.com/content/dam/www/programmable/us/en/others/literature/an/io_timing_agilex_latest.qar
   • Intel Stratix 10 pab kiag li lawm— https://www.intel.com/content/dam/www/programmable/us/en/others/literature/an/io_timing_stratix10.qar
   • Intel Arria 10 cov khoom siv— https://www.intel.com/content/dam/www/programmable/us/en/others/literature/an/io_timing_arria10.qar
2. Txhawm rau rov qab .qar qhov project archive, tso tawm Intel Quartus Prime Pro Edition software thiab nyem qhov Project ➤ Restore Archived Project. Xwb, khiav cov kab lus hais hauv qab no sib npaug yam tsis tau pib GUI:
   

   quartus_sh --restore file>

   Cov io_timeing__rov qab directory tam sim no muaj cov qdb subfolder thiab ntau yam files.

3. Txhawm rau khiav cov ntawv nrog Intel Quartus Prime Timing Analyzer, khiav cov lus txib hauv qab no:
   

   quartus_sta -t .tcl

   Tos kom tiav. Kev ua tiav tsab ntawv yuav xav tau 8 teev lossis ntau dua vim tias txhua qhov kev hloov pauv ntawm I / O tus qauv lossis tus pin qhov chaw xav tau kev tsim kho dua tshiab.
4. Rau view lub sij hawm parameter qhov tseem ceeb, qhib cov ntawv generated files hauv sijhawm_files, nrog cov npe xws li timing_tsuthtco___.txt.
   timing_tsuthtco_ _ _ .txt.

Cov ntaub ntawv ntsig txog

• Command Line Scripting
• ::QUARTUS::STA Tcl Pob

AN 775: Tsim Cov Ntaub Ntawv Keeb Kwm Keeb Kwm Ntawm I/O Lub Sijhawm Ua Ntej

Cov ntaub ntawv Version	Intel Quartus Prime Version	Hloov
2019.12.08	19.3	Hloov lub npe kom muaj kev cuam tshuam cov ntsiab lus. Ntxiv kev txhawb nqa rau Intel Stratix 10 thiab Intel Agilex FPGAs. Ntxiv cov lej kauj ruam kom ntws. Ntxiv lub sijhawm parameter daim duab. Hloov kho screenshots kom muaj kev cuam tshuam qhov tseeb version. Hloov kho txuas mus rau cov ntaub ntawv ntsig txog. Siv cov khoom siv npe tshiab thiab cov qauv kev cai.
2016.10.31	16.1	Thawj zaug tso tawm.

Cov ntaub ntawv / Cov ntaub ntawv

intel AN 775 Tsim cov ntaub ntawv pib I/O Timing [ua pdf] Cov neeg siv phau ntawv qhia AN 775 Generating Initial IO Timing Data, AN 775, Generating Initial IO Timing Data, Initial IO Timing Data, Timing Data

Cov ntaub ntawv

• Cov neeg siv phau ntawv