MICROCHIP DS50003319C-13 àjọlò HDMI TX IP Itọsọna olumulo

Atagbaja Multimedia Interface (HDMI) ti Microchip's High-Definition IP ṣe atilẹyin gbigbe fidio ati data soso ohun ohun ti a sapejuwe ninu sipesifikesonu boṣewa HDMI.

HDMI nlo Gbigbe Iyatọ Iyatọ ti o dinku (TMDS) lati gbejade daradara awọn ipele idaran ti data oni-nọmba kọja awọn ijinna okun okun ti o gbooro, ni idaniloju iyara giga, tẹlentẹle, ati gbigbe ifihan agbara oni-nọmba ti o gbẹkẹle. Ọna asopọ TMDS kan ni ikanni aago kan ati awọn ikanni data mẹta. Aago piksẹli fidio ti wa ni gbigbe lori ikanni aago TMDS, eyiti o ṣe iranlọwọ lati tọju awọn ifihan agbara ni mimuuṣiṣẹpọ. Awọn data fidio ni a gbe bi awọn piksẹli 24-bit lori awọn ikanni data TMDS mẹta, nibiti ikanni data kọọkan ti jẹ apẹrẹ fun paati awọ pupa, alawọ ewe ati buluu. Awọn data ohun ti wa ni gbigbe bi awọn apo-iwe 8-bit lori alawọ ewe TMDS ati ikanni pupa.

TMDS encoder ngbanilaaye gbigbe data ni tẹlentẹle ni iyara giga, lakoko ti o dinku agbara fun kikọlu Electro-magnetic (EMI) lori awọn kebulu bàbà nipa didinku nọmba awọn iyipada (idinku kikọlu laarin awọn ikanni), ati ṣaṣeyọri iwọntunwọnsi Direct lọwọlọwọ (DC), lori awọn okun. , nipa titọju awọn nọmba ti eyi ati awọn odo lori laini fere dogba.

HDMI TX IP jẹ apẹrẹ lati lo pẹlu PolarFire® SoC ati PolarFire ẹrọ transceivers. IP naa ni ibamu pẹlu HDMI 1.4 ati HDMI 2.0, eyiti o ṣe atilẹyin fun awọn fireemu 60 fun iṣẹju kan, pẹlu iwọn bandiwidi ti o pọju ti 18 Gbps. IP naa nlo koodu koodu TMDS ti o yi data fidio 8-bit pada fun ikanni kan ati apo ohun sinu iwọntunwọnsi 10-bit DC, ati ọna gbigbe ti o dinku. Lẹhinna o tan kaakiri ni iwọn 10-bits fun ẹbun kan, fun ikanni kan. Lakoko akoko ofo fidio, awọn ami iṣakoso ti tan kaakiri. Awọn ami wọnyi jẹ ipilẹṣẹ ti o da lori hsync ati awọn ifihan agbara vsync. Lakoko akoko erekusu data, apo ohun afetigbọ ti gbejade bi awọn apo-iwe 10-bit lori ikanni pupa ati alawọ ewe.

Itọsọna olumulo

DS50003319C – 1

Lakotan

Tabili ti o tẹle n pese akopọ ti awọn abuda IP HDMI TX.

Tabili 1. HDMI TX IP Abuda

Ẹya mojuto	Itọsọna olumulo yii ṣe atilẹyin HDMI TX IP v5.2.0
Atilẹyin Awọn idile Ẹrọ	• PolarFire® SoC • PolarFire
Ti ṣe atilẹyin Sisan Irinṣẹ	Nilo Libero® SoC v11.4 tabi awọn idasilẹ nigbamii
Atilẹyin Awọn atọkun	Awọn atọkun atilẹyin nipasẹ HDMI TX IP jẹ: • AXI4-san – Eleyi mojuto atilẹyin AXI4-Stream si awọn ibudo igbewọle. Nigbati o ba tunto ni ipo yii, IP gba awọn ami ẹdun boṣewa AXI4 Stream bi awọn igbewọle. • AXI4-Lite Iṣeto ni wiwo - Core yii ṣe atilẹyin wiwo atunto AXI4-Lite fun ibeere 4Kp60. Ni ipo yii, awọn igbewọle IP ti pese lati SoftConsole. • Ilu abinibi - Nigbati o ba tunto ni ipo yii, IP gba fidio abinibi ati awọn ifihan agbara ohun bi awọn igbewọle.
Iwe-aṣẹ	HDMI TX IP ti pese pẹlu awọn aṣayan iwe-aṣẹ meji wọnyi: • Ti paroko: Pipe koodu RTL ti paroko ti pese fun mojuto. O wa fun ọfẹ pẹlu eyikeyi iwe-aṣẹ Libero, ti o fun laaye ni mojuto lati wa ni ese pẹlu SmartDesign. O le ṣe Simulation, Synthesis, Layout, ati ṣeto ohun alumọni FPGA nipa lilo suite apẹrẹ Libero. • RTL: koodu orisun RTL pipe ti wa ni titiipa iwe-aṣẹ, eyiti o nilo lati ra lọtọ.

Awọn ẹya ara ẹrọ

HDMI TX IP ni awọn ẹya wọnyi:

• Ibamu fun HDMI 2.0 ati 1.4b

• Atilẹyin ọkan tabi mẹrin aami/piksẹli fun titẹ sii aago

• Ṣe atilẹyin Awọn ipinnu to 3840 x 2160 ni 60 fps

• Atilẹyin 8, 10, 12, ati 16-bit ijinle awọ

• Ṣe atilẹyin awọn ọna kika awọ gẹgẹbi RGB, YUV 4: 2: 2, ati YUV 4: 4: 4

• Atilẹyin ohun to awọn ikanni 32

Ṣe atilẹyin Eto fifi koodu – TMDS

• Ṣe atilẹyin Ilu abinibi ati AXI4 Stream Fidio ati wiwo Data Audio

• Ṣe atilẹyin Ilu abinibi ati wiwo Iṣeto AXI4-Lite fun iyipada paramita

Awọn ilana fifi sori ẹrọ

Awọn ipilẹ IP gbọdọ wa ni fi sori ẹrọ si IP Catalog ti Libero® Sọfitiwia SoC laifọwọyi nipasẹ iṣẹ imudojuiwọn Katalogi IP ni sọfitiwia SoC Libero, tabi o ti ṣe igbasilẹ pẹlu ọwọ lati katalogi naa. Ni kete ti a ti fi ipilẹ IP sori ẹrọ ni Labero SoC sọfitiwia IP Catalog, o ti tunto, ti ipilẹṣẹ, ati lẹsẹkẹsẹ laarin SmartDesign fun ifisi ninu iṣẹ akanṣe Libero.

Itọsọna olumulo

DS50003319C – 2

Lilo awọn orisun (Beere ibeere kan)

HDMI TX IP ti wa ni imuse ni PolarFire® FPGA (MPF300T - 1FCG1152I Package).

Tabili ti o tẹle yii ṣe atokọ awọn orisun ti a lo nigbati g_PIXELS_PER_CLK = 1PXL.

Tabili 2. Lilo orisun fun 1PXL

	g_COLOR_FORMAT g_BITS_PER_COMPONENT (Bits)	g_AUX_CHANNEL_ENABLE g_4K60_SUPPORT Aṣọ		4LÚT	Aṣọ DFF	Ni wiwo 4LUT	Ni wiwo DFF	uSRAM (64×12)
RGB	8	Mu ṣiṣẹ	Pa a	787	514	108	108	9
	8	Pa a	Pa a	819	502	108	108	9
	10	Pa a	Pa a	1070	849	156	156	13
	12	Pa a	Pa a	1084	837	156	156	13
	16	Pa a	Pa a	1058	846	156	156	13
YCbCr422	8	Pa a	Pa a	696	473	96	96	8
YCbCr444	8	Pa a	Pa a	819	513	108	108	9
	10	Pa a	Pa a	1068	849	156	156	13
	12	Pa a	Pa a	1017	837	156	156	13
	16	Pa a	Pa a	1050	845	156	156	13

Tabili ti o tẹle yii ṣe atokọ awọn orisun ti a lo nigbati g_PIXELS_PER_CLK = 4PXL.

Tabili 3. Lilo orisun fun 4PXL

	g_COLOR_FORMAT g_BITS_PER_COMPONENT (Bits)	g_AUX_CHANNEL_ENABLE g_4K60_SUPPORT Aṣọ		4LÚT	Aṣọ DFF	Ni wiwo 4LUT	Ni wiwo DFF	uSRAM (64×12)
RGB	8	Pa a	Mu ṣiṣẹ	4078	2032	144	144	12
		Mu ṣiṣẹ	Pa a	1475	2269	144	144	12
		Pa a	Pa a	1393	1092	144	144	12
	10	Pa a	Pa a	2151	1635	264	264	22
	12	Pa a	Pa a	1909	1593	264	264	22
	16	Pa a	Pa a	1645	1284	264	264	22
YCbCr422	8	Pa a	Pa a	1265	922	144	144	12
YCbCr444	8	Pa a	Pa a	1119	811	144	144	12
	10	Pa a	Pa a	2000	1627	264	264	22
	12	Pa a	Pa a	1909	1585	264	264	22
	16	Pa a	Pa a	1604	1268	264	264	22

Itọsọna olumulo

DS50003319C – 3

HDMI TX IP Configurator

1. HDMI TX IP Configurator (Beere ibeere kan)

Yi apakan pese ohun loriview ti HDMI TX Configurator ni wiwo ati awọn oniwe-orisirisi irinše.

HDMI TX Configurator n pese wiwo ayaworan lati ṣeto ipilẹ HDMI TX fun awọn ibeere gbigbe fidio kan pato. Oluṣeto yii n gba olumulo laaye lati yan awọn paramita bii Bits Per Component, Ọna kika Awọ, Nọmba ti Awọn piksẹli, Ipo Ohun, Ni wiwo, Testbench, ati Iwe-aṣẹ. O ṣe pataki lati ṣatunṣe awọn eto wọnyi ni deede lati rii daju gbigbe data fidio ti o munadoko lori HDMI.

Ni wiwo ti HDMI TX Configurator ni ọpọlọpọ awọn akojọ aṣayan silẹ ati awọn aṣayan ti o jẹki awọn olumulo lati ṣe akanṣe awọn eto gbigbe HDMI. Awọn atunto bọtini ti wa ni apejuwe ninu Table 3-1.

Nọmba ti o tẹle n pese alaye kan view ti HDMI TX Configurator ni wiwo.

olusin 1-1. HDMI TX IP Configurator

Ni wiwo tun pẹlu O dara ati Fagilee awọn bọtini fun ifẹsẹmulẹ tabi asonu awọn atunto ti a ṣe.

Itọsọna olumulo

DS50003319C – 5

Hardware imuse

2. Hardware imuse (Beere ibeere kan)

HDMI Atagba (TX) oriširiši meji stages:

• Iṣẹ XOR/XNOR, eyiti o dinku nọmba awọn iyipada

• INV/NONINV kan, eyiti o dinku iyatọ (iwọntunwọnsi DC). Awọn afikun meji die-die ti wa ni afikun ni yi stage ti isẹ. Awọn data iṣakoso (hsync ati vsync) jẹ koodu si awọn bit 10 ni awọn akojọpọ mẹrin ti o ṣeeṣe lati ṣe iranlọwọ fun olugba muṣiṣẹpọ aago rẹ pẹlu aago atagba. A gbọdọ lo transceiver pẹlu HDMI TX IP lati serialize awọn 10 die-die (1 pixel mode) tabi 40 die-die (4 awọn piksẹli mode).

Oluṣeto tun ṣe afihan aṣoju ti HDMI Tx mojuto, ti a samisi HDMI_TX_0, ti o nfihan ọpọlọpọ awọn titẹ sii ati awọn asopọ iṣelọpọ ti o ni wiwo pẹlu mojuto. Awọn ipo mẹta wa fun wiwo HDMI TX ati pe a ṣe alaye bi atẹle:

Ipo kika Awọ RGB

Awọn ebute oko oju omi ti HDMI TX IP fun ẹbun kan fun aago kan nigbati ipo ohun ba ṣiṣẹ ati ọna kika Awọ jẹ RGB fun PolarFire® awọn ẹrọ ti wa ni han ni awọn wọnyi nọmba rẹ. Aṣoju wiwo ti awọn ebute oko oju omi HDMI Tx mojuto gẹgẹbi atẹle:

• Awọn ifihan agbara aago iṣakoso jẹ R_CLK_LOCK, G_CLK_LOCK, ati B_CLK_LOCK. Awọn ifihan agbara aago jẹ R_CLK_I, G_CLK_I, ati B_CLK_I.

• Awọn ikanni data pẹlu DATA_R_I, DATA_G_I, ati DATA_B_I.

• Awọn ifihan agbara data iranlọwọ jẹ AUX_DATA_R_I ati AUX_DATA_G_I.

olusin 2-1. HDMI TX IP Block aworan atọka (kika Awọ RGB)

Fun alaye diẹ sii nipa awọn ifihan agbara I/O fun ọna kika awọ RGB, wo Table 3-2.

YCbCr444 Awọ kika Ipo

Awọn ebute oko oju omi ti HDMI TX IP fun ẹbun kan fun aago kan nigbati ipo ohun ba ṣiṣẹ ati ọna kika Awọ jẹ YCbCr444 ti han ni nọmba atẹle. Aṣoju wiwo ti awọn ebute oko oju omi HDMI Tx mojuto gẹgẹbi atẹle:

• Awọn ifihan agbara iṣakoso jẹ Y_CLK_LOCK, Cb_CLK_LOCK, ati Cr_CLK_LOCK.

• Awọn ifihan agbara aago jẹ Y_CLK_I, Cb_CLK_I, ati Cr_CLK_I.

Itọsọna olumulo

DS50003319C – 6

Hardware imuse

• Awọn ikanni data pẹlu DATA_Y_I, DATA_Cb_I, ati DATA_Cr_I.

• Awọn ifihan agbara igbewọle Data Iranlọwọ jẹ AUX_DATA_Y_I ati AUX_DATA_C_I.

olusin 2-2. HDMI TX IP Àkọsílẹ aworan atọka (YCbCr444 Awọ kika)

Fun alaye diẹ ẹ sii nipa awọn ifihan agbara I/O fun kika awọ YCbCr444, wo Table 3-6. YCbCr422 Awọ kika Ipo

Awọn ebute oko oju omi ti HDMI TX IP fun ẹbun kan fun aago kan nigbati ipo ohun ba ṣiṣẹ ati ọna kika Awọ jẹ YCbCr422 ti han ni nọmba atẹle. Aṣoju wiwo ti awọn ebute oko oju omi HDMI Tx mojuto gẹgẹbi atẹle:

• Awọn ifihan agbara iṣakoso jẹ LANE1_CLK_LOCK, LANE2_CLK_LOCK, ati LANE3_CLK_LOCK. • Awọn ifihan agbara aago jẹ LANE1_CLK_I, LANE2_CLK_I, ati LANE3_CLK_I.

• Awọn ikanni data pẹlu DATA_Y_I ati DATA_C_I.

Itọsọna olumulo

DS50003319C – 7

Hardware imuse

olusin 2-3. HDMI TX IP Àkọsílẹ aworan atọka (YCbCr422 Awọ kika)

Fun alaye diẹ ẹ sii nipa awọn ifihan agbara I/O fun kika awọ YCbCr422, wo Table 3-7 Itọsọna olumulo

DS50003319C – 8

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

3. Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo (Beere ibeere kan)

Yi apakan ti jiroro awọn paramita ni HDMI TX GUI configurator ati I/O awọn ifihan agbara. 3.1 Awọn paramita iṣeto ni (Beere ibeere kan)

Tabili ti o tẹle ṣe atokọ awọn aye atunto ni HDMI TX IP.

Table 3-1. Awọn paramita iṣeto ni

Orukọ paramita	Apejuwe
Awọ kika	Awọn asọye aaye awọ. Ṣe atilẹyin awọn ọna kika awọ wọnyi: • RGB • YCbCr422 • YCbCr444
Nọmba ti die-die fun paati	Pato nọmba ti awọn die-die fun paati awọ. Ṣe atilẹyin 8, 10, 12, ati 16 die-die fun paati.
Nọmba ti awọn piksẹli	Tọkasi nọmba awọn piksẹli fun titẹ sii aago: • Pixel fun aago = 1 • Pixel fun aago = 4
4Kp60 atilẹyin	Atilẹyin fun ipinnu 4K ni awọn fireemu 60 fun iṣẹju kan: • Nigbati 1, 4Kp60 atilẹyin wa ni sise • Nigbati 0, 4Kp60 atilẹyin jẹ alaabo
Ipo Ohun	Ṣe atunto ipo gbigbe ohun. Data ohun fun R ati ikanni G: Mu ṣiṣẹ Muu ṣiṣẹ
Ni wiwo	Ilu abinibi ati ṣiṣan AXI
Testbench	Faye gba yiyan ti a testbench ayika. Ṣe atilẹyin awọn aṣayan testbench wọnyi: Olumulo • Ko si
Iwe-aṣẹ	Ni pato iru iwe-aṣẹ. Pese awọn aṣayan iwe-aṣẹ meji wọnyi: • RTL Ti paroko

3.2 Awọn ibudo (Beere ibeere kan)

Tabili ti o tẹle ṣe atokọ awọn igbewọle ati awọn ebute agbejade ti HDMI TX IP fun wiwo abinibi nigbati ipo ohun ṣiṣẹ ati ọna kika Awọ jẹ RGB.

Table 3-2. Awọn ifihan agbara titẹ sii ati Ijade

Orukọ ifihan agbara	Itọsọna	Ìbú	Apejuwe
SYS_CLK_I	Iṣawọle	1-bit	Aago eto, nigbagbogbo aago kanna bi oludari ifihan
RESET_N_I	Iṣawọle	1-bit	Asynchronous ti nṣiṣe lọwọ-kekere ifihan agbara
VIDEO_DATA_VALID_I	Iṣawọle	1-bit	Fidio data titẹ sii wulo
AUDIO_DATA_VALID_I	Iṣawọle	1-bit	Data soso ohun kikọ sii wulo
R_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni "R" lati XCVR
R_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni R lati XCVR
G_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni “G” lati XCVR
G_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni G lati XCVR
B_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni "B" lati XCVR

Itọsọna olumulo

DS50003319C – 9

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

....... tesiwaju Orukọ ifihan agbara Itọsọna Iwọn Apejuwe
B_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni B lati XCVR
H_SYNC_I	Iṣawọle	1-bit	Petele ìsiṣẹpọ polusi
V_SYNC_I	Iṣawọle	1-bit	Inaro ìsiṣẹpọ polusi
PACKET_HEADER_I	Iṣawọle	PIXELS_PER_CLK*1	Akọsori apo fun data apo-iwe ohun
DATA_R_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data "R".
DATA_G_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data “G” wọle
DATA_B_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data "B" wọle
AUX_DATA_R_I	Iṣawọle	PIXELS_PER_CLK*4	Audio soso "R" ikanni data
AUX_DATA_G_I	Iṣawọle	PIXELS_PER_CLK*4	Audio soso "G" ikanni data
TMDS_R_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “R” data
TMDS_G_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “G” data
TMDS_B_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “B” data

Tabili ti o tẹle ṣe atokọ awọn ebute oko oju omi fun wiwo ṣiṣan AXI4 pẹlu Ṣiṣẹ ohun.

Table 3-3. Awọn ebute oko oju omi ti nwọle ati ti njade fun AXI4 Stream Interface

Ibudo Orukọ Iru		Ìbú	Apejuwe
TDATA_I	Iṣawọle	3g_BITS_PER_COMPONENTg_PIXELS_PER_CLK Idawọle fidio
TVALID_I	Iṣawọle	1-bit	Fidio titẹ sii wulo
TREADY_O Ijade 1-bit			O wu ẹrú setan ifihan agbara
TUSER_I	Iṣawọle	PIXELS_PER_CLK*9 + 5	bit 0 = ajeku bit 1 = VSYNC bit 2 = HSYNC bit 3 = ajeku bit [3 + g_PIXELS_PER_CLK: 4] = Akọsori apo kekere [4 + g_PIXELS_PER_CLK] = Data iwe ohun wulo bit [(5 * g_PIXELS_PER_CLK) + 4: (1g_PIXELS_PER_CLK) + 5] = Olohun G data bit [(9 g_PIXELS_PER_CLK) + 4: (5*g_PIXELS_PER_CLK) + 5] = Olohun R data

Tabili ti o tẹle ṣe atokọ awọn igbewọle ati awọn ebute agbejade ti HDMI TX IP fun wiwo Ilu abinibi nigbati ipo ohun jẹ alaabo.

Table 3-4. Awọn ifihan agbara titẹ sii ati Ijade

Orukọ ifihan agbara	Itọsọna	Ìbú	Apejuwe
SYS_CLK_I	Iṣawọle	1-bit	Aago eto, nigbagbogbo aago kanna bi oludari ifihan
RESET_N_I	Iṣawọle	1-bit	Asynchronous lọwọ -kekere atunto ifihan agbara
VIDEO_DATA_VALID_I	Iṣawọle	1-bit	Fidio data titẹ sii wulo
R_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni "R" lati XCVR
R_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni R lati XCVR
G_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni “G” lati XCVR
G_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni G lati XCVR
B_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni "B" lati XCVR
B_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni B lati XCVR
H_SYNC_I	Iṣawọle	1-bit	Petele ìsiṣẹpọ polusi
V_SYNC_I	Iṣawọle	1-bit	Inaro ìsiṣẹpọ polusi
DATA_R_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data "R".

Itọsọna olumulo

DS50003319C – 10

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

....... tesiwaju Orukọ ifihan agbara Itọsọna Iwọn Apejuwe
DATA_G_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data “G” wọle
DATA_B_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data "B" wọle
TMDS_R_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “R” data
TMDS_G_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “G” data
TMDS_B_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “B” data

Tabili ti o tẹle ṣe atokọ awọn ebute oko oju omi fun wiwo ṣiṣan AXI4.

Table 3-5. Awọn ebute oko oju omi ti nwọle ati ti njade fun AXI4 Stream Interface

Orukọ Port	Iru	Ìbú	Apejuwe
TDATA_I_VIDEO	Iṣawọle	3g_BITS_PER_COMPONENTg_PIXELS_PER_CLK	Fi data fidio sii
TVALID_I_VIDEO	Iṣawọle	1-bit	Fidio titẹ sii wulo
TREADY_O_VIDEO	Abajade	1-bit	O wu ẹrú setan ifihan agbara
TUSER_I_VIDEO	Iṣawọle	4 die-die	bit 0 = ajeku bit 1 = VSYNC bit 2 = HSYNC bit 3 = ajeku

Tabili ti o tẹle ṣe atokọ awọn ebute oko oju omi fun ipo YCbCr444 nigbati ipo ohun ba ṣiṣẹ.

Table 3-6. Iṣagbewọle ati Ijade fun Ipo YCbCr444 ati Ipo Olohun Ti ṣiṣẹ

Orukọ ifihan agbara	Iwọn Itọsọna		Apejuwe
SYS_CLK_I	Iṣawọle	1-bit	Aago eto, nigbagbogbo aago kanna bi oludari ifihan
RESET_N_I	Iṣawọle	1-bit	Asynchronous ti nṣiṣe lọwọ-kekere ifihan agbara
VIDEO_DATA_VALID_I Igbewọle		1-bit	Fidio data titẹ sii wulo
AUDIO_DATA_VALID_I Igbewọle		1-bit	Data soso ohun kikọ sii wulo
Y_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni “Y” lati XCVR
Y_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni Y lati XCVR
Cb_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni “Cb” lati XCVR
Cb_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni Cb lati XCVR
Cr_CLK_I	Iṣawọle	1-bit	Aago TX fun ikanni “Cr” lati XCVR
Cr_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ikanni Cr lati XCVR
H_SYNC_I	Iṣawọle	1-bit	Petele ìsiṣẹpọ polusi
V_SYNC_I	Iṣawọle	1-bit	Inaro ìsiṣẹpọ polusi
PACKET_HEADER_I	Iṣawọle	PIXELS_PER_CLK*1	Akọsori apo fun data apo-iwe ohun
DATA_Y_I	Iṣawọle	PIXELS_PER_CLK*8	Tẹ data "Y".
DATA_Cb_I	Iṣawọle	PIXELS_PER_CLK*DATA_WIDTH Iṣagbewọle "Cb" data
DATA_Cr_I	Iṣawọle	PIXELS_PER_CLK*DATA_WIDTH Idawọle “Cr” data
AUX_DATA_Y_I	Iṣawọle	PIXELS_PER_CLK*4	Audio soso "Y" data ikanni
AUX_DATA_C_I	Iṣawọle	PIXELS_PER_CLK*4	Audio soso "C" data ikanni
TMDS_R_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “Cb” data
TMDS_G_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “Y” data
TMDS_B_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “Cr” data

Tabili ti o tẹle ṣe atokọ awọn ebute oko oju omi fun ipo YCbCr422 nigbati ipo ohun ba ṣiṣẹ.

Itọsọna olumulo

DS50003319C – 11

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

Table 3-7. Iṣagbewọle ati Ijade fun Ipo YCbCr422 ati Ipo Olohun Ti ṣiṣẹ

Orukọ ifihan agbara	Iwọn Itọsọna		Apejuwe
SYS_CLK_I	Iṣawọle	1-bit	Aago eto, nigbagbogbo aago kanna bi oludari ifihan
RESET_N_I	Iṣawọle	1-bit	Asynchronous Active -Low atunto ifihan agbara
VIDEO_DATA_VALID_I Igbewọle		1-bit	Fidio data titẹ sii wulo
LANE1_CLK_I	Iṣawọle	1-bit	Aago TX fun “ona lati ọna XCVE 1” ikanni lati XCVR
LANE1_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ona lati XCVE ona 1
LANE2_CLK_I	Iṣawọle	1-bit	Aago TX fun “ona lati ọna XCVE 2” ikanni lati XCVR
LANE2_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ona lati XCVE ona 2
LANE3_CLK_I	Iṣawọle	1-bit	Aago TX fun “ona lati ọna XCVE 3” ikanni lati XCVR
LANE3_CLK_LOCK	Iṣawọle	1-bit	TX_CLK_STABLE fun ona lati XCVE ona 3
H_SYNC_I	Iṣawọle	1-bit	Petele ìsiṣẹpọ polusi
V_SYNC_I	Iṣawọle	1-bit	Inaro ìsiṣẹpọ polusi
PACKET_HEADER_I	Iṣawọle	PIXELS_PER_CLK*1	Akọsori apo fun data apo-iwe ohun
DATA_Y_I	Iṣawọle	PIXELS_PER_CLK*DATA_WIDTH Idawọle "Y".
DATA_C_I	Iṣawọle	PIXELS_PER_CLK*DATA_WIDTH Iṣagbewọle "C" data
AUX_DATA_Y_I	Iṣawọle	PIXELS_PER_CLK*4	Audio soso "Y" data ikanni
AUX_DATA_C_I	Iṣawọle	PIXELS_PER_CLK*4	Audio soso "C" data ikanni
TMDS_R_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “C” data
TMDS_G_O	Abajade	PIXELS_PER_CLK*10	Awọn koodu “Y” data
TMDS_B_O	Abajade	PIXELS_PER_CLK*10	Awọn data koodu ti o ni ibatan si alaye amuṣiṣẹpọ

Itọsọna olumulo

DS50003319C – 12

Forukọsilẹ Map ati awọn apejuwe

4. Forukọsilẹ Map ati awọn apejuwe (Beere ibeere kan)

Aiṣedeede	Oruko	Bit Pos.	7	6	5	4	3	2	1	0
0x00	SCRAMBLER_IP_EN	7:0								BERE
		15:8
		23:16
		31:24
0x04	XCVR_DATA_LANE_ 0_SEL	7:0							Bẹrẹ[1:0]
		15:8
		23:16
		31:24

Itọsọna olumulo

DS50003319C – 13

Forukọsilẹ Map ati awọn apejuwe

4.1 SCRAMBLER_IP_EN (Beere ibeere kan)

Orukọ: SCRAMBLER_IP_EN

Aiṣedeede: 0x000

Tun: 0x0

Ohun-ini: Kọ-nikan

Scrambler Jeki Iṣakoso Forukọsilẹ. Iforukọsilẹ yii gbọdọ wa ni kikọ lati gba Atilẹyin 4kp60 fun HDMI TX IP

Bit 31 30 29 28 27 26 25 24

Wiwọle

Tunto

Bit 23 22 21 20 19 18 17 16

Wiwọle

Tunto

Bit 15 14 13 12 11 10 9 8

Wiwọle

Tunto

Bit 7 6 5 4 3 2 1 0

BERE

Wiwọle W Tunto 0

Bit 0 – Bẹrẹ kikọ “1” si yi bit initiates Scrambler data gbigbe ti wa ni sise. HDMI 2.0 n gba fọọmu ti scrambling ti a mọ si fifi koodu 8b/10b. Eto fifi koodu yii jẹ lilo lati atagba data lori wiwo HDMI ni igbẹkẹle ati daradara.

Itọsọna olumulo

DS50003319C – 14

Forukọsilẹ Map ati awọn apejuwe

4.2 XCVR_DATA_LANE_0_SEL (Beere ibeere kan)

Orukọ: XCVR_DATA_LANE_0_SEL

Aiṣedeede: 0x004

Tun: 0x1

Ohun-ini: Kọ-nikan

Iforukọsilẹ XCVR_DATA_LANE_0_SEL yan iwulo data lati gbe lọ si XCVR lati HDMI TX IP fun gbigba aago fun HD ni kikun, 4kp30, 4kp60.

Bit 31 30 29 28 27 26 25 24

Wiwọle

Tunto

Bit 23 22 21 20 19 18 17 16

Wiwọle

Tunto

Bit 15 14 13 12 11 10 9 8

Wiwọle

Tunto

Bit 7 6 5 4 3 2 1 0

Bẹrẹ[1:0]

Wọle si WW Tunto 0

Bits 1:0 – START[1:0] Kikọ “10” si awọn die-die yii bẹrẹ 4KP60 ti ṣiṣẹ ati pe oṣuwọn data XCVR ni a fun ni bi FFFFF_00000.

Itọsọna olumulo

DS50003319C – 15

Testbench Simulation

5. Testbench Simulation (Beere ibeere kan)

A pese Testbench lati ṣayẹwo iṣẹ ṣiṣe ti HDMI TX mojuto. Testbench ṣiṣẹ nikan ni wiwo abinibi pẹlu piksẹli 1 fun aago kan ati ipo ohun afetigbọ.

Tabili ti o tẹle ṣe atokọ awọn aye ti o tunto ni ibamu si ohun elo naa.

Table 5-1. Paramita iṣeto ni Testbench

Oruko	Awọn paramita aiyipada
Ọna awọ (g_COLOR_FORMAT)	RGB
Awọn die-die fun paati (g_BITS_PER_COMPONENT)	8
Nọmba awọn piksẹli (g_PIXELS_PER_CLK)	1
Atilẹyin 4Kp60 (g_4K60_SUPPORT)	0
Ipo ohun (g_AUX_CHANNEL_ENABLE)	1 (Ṣiṣe)
Ni wiwo (G_FORMAT)	0 (Paarẹ)

Lati ṣe afarawe mojuto nipa lilo testbench, ṣe awọn igbesẹ wọnyi:

1. Ni awọn Design Flow window, faagun Ṣẹda Design.

2. Tẹ-ọtun Ṣẹda SmartDesign Testbench, ati lẹhinna tẹ Ṣiṣe, bi o ṣe han ninu nọmba atẹle. olusin 5-1. Ṣiṣẹda SmartDesign Testbench

3. Tẹ orukọ sii fun SmartDesign testbench, ati ki o si tẹ O dara.

olusin 5-2. Loruko SmartDesign Testbench

SmartDesign testbench ti ṣẹda, ati kanfasi kan han si ọtun ti PAN Flow Design.

Itọsọna olumulo

DS50003319C – 16

Testbench Simulation

4. Lilö kiri si Libero® SoC Catalog, yan View > Windows > Katalogi IP, ati lẹhinna faagun Fidio Solusan. Tẹ HDMI TX IP lẹẹmeji (v5.2.0), ati lẹhinna tẹ O DARA.

5. Ni awọn Parameter Configurator window, yan awọn ti a beere Nọmba ti Pixels iye, bi o han ni awọn wọnyi nọmba rẹ.

olusin 5-3. Iṣeto ni Paramita

6. Yan gbogbo awọn ebute oko oju omi, tẹ-ọtun ko si yan Igbega si Ipele oke.

7. Lori awọn SmartDesign bọtini iboju, tẹ ina paati.

8. Lori awọn Stimulus Hierarchy taabu, ọtun-tẹ HDMI_TX_TB testbench file, ati ki o si tẹ Simulate Pre-Synth Design> Ṣii Interactively.

Awọn awoṣeSim® ọpa ṣii pẹlu testbench, bi o ṣe han ninu nọmba atẹle. olusin 5-4. Ọpa ModelSim pẹlu HDMI TX Testbench File

Pataki: Ti o ba ti kikopa ti wa ni Idilọwọ nitori awọn run akoko iye to pato ninu awọn DO file, lo awọn run -gbogbo pipaṣẹ lati pari kikopa.

Itọsọna olumulo

DS50003319C – 17

Testbench Simulation

5.1 Awọn aworan atọka akoko (Beere ibeere kan)

Aworan akoko atẹle fun HDMI TX IP ṣe afihan data fidio ati awọn akoko data iṣakoso fun 1 pixel fun aago kan.

olusin 5-5. HDMI TX IP Aago aworan atọka ti Data Fidio fun 1 Pixel Per Aago

Aworan atọka atẹle n fihan awọn akojọpọ mẹrin ti data iṣakoso.

olusin 5-6. HDMI TX IP Aago Aworan ti Data Iṣakoso fun 1 Pixel Per Aago

Itọsọna olumulo

DS50003319C – 18

Eto Integration

6. Eto Integration (Beere ibeere kan)

Yi apakan fihan biample design apejuwe.

Tabili ti o tẹle ṣe atokọ awọn atunto ti PF XCVR, PF TX PLL, ati PF CCC.

Table 6-1. PF XCVR, PF TX PLL, ati PF CCC Awọn atunto

Ipinnu		Bit Iwọn PF XCVR iṣeto ni			PF TX PLL iṣeto ni		PF CCC iṣeto ni
Ipinnu		Data TX Oṣuwọn	Aago TX Pipin Okunfa	TX PCS Aṣọ Ìbú	Ti o fẹ Aago Bit ti o wu jade	Itọkasi Aago Igbohunsafẹfẹ	Iṣawọle Igbohunsafẹfẹ	Abajade Igbohunsafẹfẹ
1PXL (1080p60) 8		1485	4	10	5940	148.5	NA	NA
1PXL (1080p30) 10		925	4	10	3700	148.5	92.5	74
	12	1113.75	4	10	4455	148.5	111.375	74.25
	16	1485	4	10	5940	148.5	148.5	74.25
4PXL (1080p60) 10		1860	4	40	7440	148.5	46.5	37.2
	12	2229	4	40	8916	148.5	55.725	37.15
	16	2970	2	40	5940	148.5	74.25	37.125
4PXL (4kp30)	8	2970	2	40	5940	148.5	NA	NA
	10	3712.5	2	40	7425	148.5	92.812	74.25
	12	4455	1	40	4455	148.5	111.375	74.25
	16	5940	1	40	5940	148.5	148.5	74.25
4PXL (4Kp60)	8	5940	1	40	5940	148.5	NA	NA

HDMI TX Sample Design, nigba ti tunto ni g_BITS_PER_COMPONENT = 8-bit ati

g_PIXELS_PER_CLK = 1 PXL mode, ti wa ni han ninu awọn nọmba wọnyi.

olusin 6-1. HDMI TX Sample Apẹrẹ

HDMI_TX_C0_0

PF_INIT_MONITOR_C0_0

FABRIC_POR_N

PCIE_INIT_DONE

USRAM_INIT_DONE

SRAM_INIT_DONE

DEVICE_INIT_DONE

XCVR_INIT_DONE

USRAM_INIT_FROM_SNVM_DONE

USRAM_INIT_FROM_UPROM_DONE

USRAM_INIT_FROM_SPI_DONE

SRAM_INIT_FROM_SNVM_DONE

SRAM_INIT_FROM_UPROM_DONE

SRAM_INIT_FROM_SPI_DONE

AUTOCALIB_DONE

PF_INIT_MONITOR_C0

CORERESET_PF_C0_0

CLK

EXT_RST_N

BANK_x_VDDI_STATUS

BANK_y_VDDI_STATUS

PLL_POWERDOWN_B

PLL_LOCK

FABRIC_RESET_N

SS_BUSY

INIT_DONE

FF_US_RESTORE

FPGA_POR_N

CORERESET_PF_C0

Ifihan_Aṣakoso_C0_0

FRAME_END_O

H_SYNC_O

RESETN_I

V_SYNC_O

SYS_CLK_I

V_ACTIVE_O

AGBARA_I

DATA_TRIGGER_O

H_RES_O[15:0]

V_RES_O[15:0]

Ifihan_Aṣakoso_C0

Àpẹẹrẹ_generator_verilog_pattern_0

DATA_VALID_O

SYS_CLK_I

FRAME_END_O

RESET_N_I

LINE_END_O

DATA_EN_I

RED_O[7:0]

FRAME_END_I

GREEN_O[7:0]

PATTERN_SEL_I[2:0]

BLUE_O[7:0]

BAYER_O[7:0]

Igbeyewo_Pattern_Cenerator_C1

PF_XCVR_REF_CLK_C0_0

RESET_N_I

SYS_CLK_I

VIDEO_DATA_VALID_I

R_CLK_I

R_CLK_LOCK

G_CLK_I

G_CLK_LOCK

TMDS_R_O[9:0]

B_CLK_I

TMDS_G_O[9:0]

B_CLK_LOCK

TMDS_B_O[9:0]

V_SYNC_I

XCVR_LANE_0_DATA_O[9:0]

H_SYNC_I

DATA_R_I[7:0]

DATA_G_I[7:0]

DATA_B_I[7:0]

HDMI_TX_C0

PF_TX_PLL_C0_0

PF_XCVR_ERM_C0_0

PADs_OUT

LANE3_TXD_N

CLKS_FROM_TXPLL_0

LANE3_TXD_P

LANE0_IN

LANE2_TXD_N

LANE0_PCS_ARST_N

LANE2_TXD_P

LANE0_PMA_ARST_N

LANE1_TXD_N

LANE0_TX_DATA[9:0]

LANE1_TXD_P

LANE1_IN

LANE0_TXD_N

LANE1_PCS_ARST_N

LANE0_TXD_P

LANE1_PMA_ARST_N

LANE0_OUT

LANE1_TX_DATA[9:0]

LANE0_TX_CLK_R

LANE2_IN

LANE0_TX_CLK_STABLE

LANE2_PCS_ARST_N

LANE1_OUT

LANE2_PMA_ARST_N

LANE1_TX_CLK_R

LANE2_TX_DATA[9:0]

LANE1_TX_CLK_STABLE

LANE3_IN

LANE2_OUT

LANE3_PCS_ARST_N

LANE2_TX_CLK_R

LANE3_PMA_ARST_N

LANE2_TX_CLK_STABLE

LANE3_TX_DATA[9:0] LANE3_OUTLANE3_TX_CLK_R

LANE3_TX_CLK_STABLE

PF_XCVR_ERM_C0

LANE3_TXD_N LANE3_TXD_P LANE2_TXD_N LANE2_TXD_P LANE1_TXD_N LANE1_TXD_P LANE0_TXD_N LANE0_TXD_P

PATTERN_SEL_I[2:0] REF_CLK_PAD_P REF_CLK_PAD_N

REF_CLK_PAD_P

REF_CLK_PAD_NREF_CLK

REF_CLKPLL_LOCKCLKS_TO_XCVR

PF_XCVR_REF_CLK_C0

PF_TX_PLL_C0

Fun Example, ni awọn atunto 8-bit, awọn paati wọnyi jẹ apakan ti apẹrẹ: • PF_XCVR_ERM (PF_XCVR_ERM_C0_0) ti tunto fun oṣuwọn data ti 1485 Mbps ni ipo PMA fun TX nikan, pẹlu iwọn data tunto bi 10 bit fun ipo 1pxl ati Aago itọkasi 148.5 MHz, da lori awọn eto tabili iṣaaju

• Iṣẹjade LANE0_TX_CLK_R ti PF_XCVR_ERM_C0_0 jẹ ipilẹṣẹ bi aago 148.5 MHz, ti o da lori awọn eto tabili ti iṣaaju

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ati PF_INIT_MONITOR_C0) ti wa ni idari nipasẹ LANE0_TX_CLK_R, ti o jẹ 148.5 MHz.

• R_CLK_I, G_CLK_I, ati B_CLK_I ti wa ni idari nipasẹ LANE3_TX_CLK_R, LANE2_TX_CLK_R, ati LANE1_TX_CLK_R, lẹsẹsẹ.

Itọsọna olumulo

DS50003319C – 19

Eto Integration

Sample Integration fun, g_BITS_PER_COMPONENT = 8 ati g_PIXELS_PER_CLK = 4. Fun Eksample, ni awọn atunto 8-bit, awọn paati wọnyi jẹ apakan ti apẹrẹ: • PF_XCVR_ERM (PF_XCVR_ERM_C0_0) ti tunto fun oṣuwọn data ti 2970 Mbps ni ipo PMA fun

TX nikan, pẹlu iwọn data ti a tunto bi 40-bit fun ipo 1pxl ati aago itọkasi 148.5 MHz ti o da lori awọn eto tabili iṣaaju.

• Iṣẹjade LANE0_TX_CLK_R ti PF_XCVR_ERM_C0_0 jẹ ipilẹṣẹ bi aago 74.25 MHz, ti o da lori awọn eto tabili ti iṣaaju

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ati PF_INIT_MONITOR_C0) ti wa ni idari nipasẹ LANE0_TX_CLK_R, ti o jẹ 148.5 MHz.

• R_CLK_I, G_CLK_I, ati B_CLK_I ti wa ni idari nipasẹ LANE3_TX_CLK_R, LANE2_TX_CLK_R, ati LANE1_TX_CLK_R, lẹsẹsẹ.

HDMI TX Sample Design, nigba ti tunto ni g_BITS_PER_COMPONENT = 12 Bit ati g_PIXELS_PER_CLK = 1 PXL mode, han ninu awọn wọnyi olusin.

olusin 6-2. HDMI TX Sample Apẹrẹ

PF_XCVR_ERM_C0_0

PATTERN_SEL_I[2:0]

REF_CLK_PAD_P REF_CLK_PAD_N

PF_CCC_C1_0

REF_CLK_0 OUT0_FABCLK_0PLL_LOCK_0

PF_CCC_C1

PF_INIT_MONITOR_C0_0

CORERESET_PF_C0_0

CLK

EXT_RST_N

BANK_x_VDDI_STATUS

BANK_y_VDDI_STATUS

PLL_POWERDOWN_B

PLL_LOCK

FABRIC_RESET_N

SS_BUSY

INIT_DONE

FF_US_RESTORE

FPGA_POR_N

CORERESET_PF_C0

Ifihan_Aṣakoso_C0_0

FRAME_END_O

H_SYNC_O

RESETN_I

V_SYNC_O

SYS_CLK_I

V_ACTIVE_O

AGBARA_I

DATA_TRIGGER_O

H_RES_O[15:0]

V_RES_O[15:0]

Ifihan_Aṣakoso_C0

Àpẹẹrẹ_generator_verilog_pattern_0

DATA_VALID_O

SYS_CLK_I

FRAME_END_O

RESET_N_I

LINE_END_O

DATA_EN_I

RED_O[7:0]

FRAME_END_I

GREEN_O[7:0]

PATTERN_SEL_I[2:0]

BLUE_O[7:0]

BAYER_O[7:0]

Igbeyewo_Pattern_Cenerator_C0

PF_XCVR_REF_CLK_C0_0

REF_CLK_PAD_P

REF_CLK_PAD_NREF_CLK

PF_XCVR_REF_CLK_C0

HDMI_TX_0

RESET_N_I

SYS_CLK_I

VIDEO_DATA_VALID_I

R_CLK_I

R_CLK_LOCK

G_CLK_I

G_CLK_LOCK

TMDS_R_O[9:0]

B_CLK_I

TMDS_G_O[9:0]

B_CLK_LOCK

TMDS_B_O[9:0]

V_SYNC_I

XCVR_LANE_0_DATA_O[9:0]

H_SYNC_I

DATA_R_I[11:0]

DATA_R_I[11:4]

DATA_G_I[11:0]

DATA_G_I[11:4]

DATA_B_I[11:0]

DATA_B_I[11:4]

HDMI_TX_C0

PF_TX_PLL_C0_0

PADs_OUT

CLKS_FROM_TXPLL_0

LANE3_TXD_N

LANE0_IN

LANE3_TXD_P

LANE0_PCS_ARST_N

LANE2_TXD_N

LANE0_PMA_ARST_N

LANE2_TXD_P

LANE0_TX_DATA[9:0]

LANE1_TXD_N

LANE1_IN

LANE1_TXD_P

LANE1_PCS_ARST_N

LANE0_TXD_N

LANE1_PMA_ARST_N

LANE0_TXD_P

LANE1_TX_DATA[9:0]

LANE0_OUT

LANE2_IN

LANE1_OUT

LANE2_PCS_ARST_N

LANE1_TX_CLK_R

LANE2_PMA_ARST_N

LANE1_TX_CLK_STABLE

LANE2_TX_DATA[9:0] LANE2_OUTLANE3_IN

LANE2_TX_CLK_R

LANE3_PCS_ARST_N

LANE2_TX_CLK_STABLE

LANE3_PMA_ARST_N

LANE3_OUT

LANE3_TX_DATA[9:0]

LANE3_TX_CLK_R

LANE3_TX_CLK_STABLE

PF_XCVR_ERM_C0

LANE3_TXD_N LANE3_TXD_P LANE2_TXD_N LANE2_TXD_P LANE1_TXD_N LANE1_TXD_P LANE0_TXD_N LANE0_TXD_P

FABRIC_POR_N

PCIE_INIT_DONE

USRAM_INIT_DONE

SRAM_INIT_DONE

DEVICE_INIT_DONE

XCVR_INIT_DONE

USRAM_INIT_FROM_SNVM_DONE

USRAM_INIT_FROM_UPROM_DONE

USRAM_INIT_FROM_SPI_DONE

SRAM_INIT_FROM_SNVM_DONE

SRAM_INIT_FROM_UPROM_DONE

SRAM_INIT_FROM_SPI_DONE

AUTOCALIB_DONE

REF_CLKPLL_LOCKCLKS_TO_XCVR

PF_INIT_MONITOR_C0

PF_TX_PLL_C0

Sample Integration fun, g_BITS_PER_COMPONENT> 8 ati g_PIXELS_PER_CLK = 1. Fun Eksample, ni awọn atunto 12-bit, awọn paati atẹle jẹ apakan ti apẹrẹ:

• PF_XCVR_ERM (PF_XCVR_ERM_C0_0) ti tunto fun oṣuwọn data ti 111.375 Mbps ni ipo PMA fun TX nikan, pẹlu iwọn data ti a tunto bi 10 bit fun ipo 1pxl ati aago itọkasi 1113.75 Mbps, da lori aago itọkasi. Table 6-1 eto

• Iṣẹjade LANE1_TX_CLK_R ti PF_XCVR_ERM_C0_0 jẹ ipilẹṣẹ bi aago 111.375 MHz, da lori Table 6-1 eto

• R_CLK_I, G_CLK_I, ati B_CLK_I ti wa ni idari nipasẹ LANE3_TX_CLK_R, LANE2_TX_CLK_R, ati LANE1_TX_CLK_R, lẹsẹsẹ.

• PF_CCC_C0 n ṣe agbejade aago kan ti a npè ni OUT0_FABCLK_0, pẹlu igbohunsafẹfẹ ti 74.25 MHz, nigbati aago titẹ sii jẹ 111.375 MHz, eyiti LANE1_TX_CLK_R n ṣakoso

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ati PF_INIT_MONITOR_C0) ni ṣiṣe nipasẹ OUT0_FABCLK_0, eyiti o jẹ 74.25 MHz

Sample Integration fun, g_BITS_PER_COMPONENT> 8 ati g_PIXELS_PER_CLK = 4. Fun Eksample, ni awọn atunto 12-bit, awọn paati atẹle jẹ apakan ti apẹrẹ:

• PF_XCVR_ERM (PF_XCVR_ERM_C0_0) ti tunto fun oṣuwọn data ti 4455 Mbps ni ipo PMA fun TX nikan, pẹlu iwọn data ti a tunto bi 40 bit fun ipo 4pxl ati aago itọkasi 111.375 MHz, da lori Table 6-1 eto

• Iṣẹjade LANE1_TX_CLK_R ti PF_XCVR_ERM_C0_0 jẹ ipilẹṣẹ bi aago 111.375 MHz, da lori Table 6-1 eto

Itọsọna olumulo

DS50003319C – 20

Eto Integration

• R_CLK_I, G_CLK_I, ati B_CLK_I ti wa ni idari nipasẹ LANE3_TX_CLK_R, LANE2_TX_CLK_R, ati LANE1_TX_CLK_R, lẹsẹsẹ.

• PF_CCC_C0 n ṣe agbejade aago kan ti a npè ni OUT0_FABCLK_0, pẹlu igbohunsafẹfẹ ti 74.25 MHz, nigbati aago titẹ sii jẹ 111.375 MHz, eyiti LANE1_TX_CLK_R n ṣakoso

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ati PF_INIT_MONITOR_C0) ni ṣiṣe nipasẹ OUT0_FABCLK_0, eyiti o jẹ 74.25 MHz

Itọsọna olumulo

DS50003319C – 21

Àtúnyẹwò History

7. Àtúnyẹwò History (Beere ibeere kan)

Itan atunyẹwo ṣe apejuwe awọn iyipada ti a ṣe imuse ninu iwe-ipamọ naa. Awọn iyipada ti wa ni atokọ nipasẹ atunyẹwo, bẹrẹ pẹlu atẹjade lọwọlọwọ julọ.

Table 7-1. Àtúnyẹwò History

Àtúnyẹwò	Ọjọ	Apejuwe
C	05/2024	Atẹle ni atokọ ti awọn ayipada ninu atunyẹwo C ti iwe naa: • Imudojuiwọn Ọrọ Iṣaaju apakan • Awọn tabili iṣamulo awọn orisun kuro fun piksẹli kan ati awọn piksẹli mẹrin ati fi kun Tabili 2 ati Tabili 3 in 1. Awọn oluşewadi iṣamulo apakan • Imudojuiwọn Table 3-1 ninu awọn 3.1. Awọn paramita iṣeto ni apakan Fi kun Table 3-6 ati Table 3-7 ninu awọn 3.2. Awọn ibudo apakan Fi kun 6. System Integration apakan
B		09/2022 Atẹle ni atokọ ti awọn ayipada ninu atunyẹwo B ti iwe naa: • Imudojuiwọn akoonu ti Awọn ẹya ara ẹrọ ati Ọrọ Iṣaaju Fi kun olusin 2-2 fun alaabo Audio Ipo Fi kun Table 3-4 ati Table 3-5 • imudojuiwọn awọn Table 3-2 ati Table 3-3 • Imudojuiwọn Table 3-1 • Imudojuiwọn 1. Awọn oluşewadi iṣamulo • Imudojuiwọn olusin 1-1 • Imudojuiwọn olusin 5-3
A		04/2022 Atẹle ni atokọ ti awọn ayipada ninu atunyẹwo A ti iwe naa: • Iwe naa ti lọsi si awoṣe Microchip • Nọmba iwe ti ni imudojuiwọn si DS50003319 lati 50200863
2.0	—	Awọn atẹle jẹ akopọ ti awọn ayipada ti a ṣe ninu atunyẹwo yii. • Awọn ẹya Fikun-un ati Awọn apakan Awọn idile ti a ṣe atilẹyin
1.0		08/2021 Atunyẹwo akọkọ

Itọsọna olumulo

DS50003319C – 22

Microchip FPGA Support

Ẹgbẹ awọn ọja Microchip FPGA ṣe atilẹyin awọn ọja rẹ pẹlu ọpọlọpọ awọn iṣẹ atilẹyin, pẹlu Iṣẹ alabara, Ile-iṣẹ Atilẹyin Imọ-ẹrọ Onibara, a webojula, ati ni agbaye tita ifiweranṣẹ. A daba awọn alabara lati ṣabẹwo si awọn orisun ori ayelujara Microchip ṣaaju kikan si atilẹyin nitori o ṣee ṣe pupọ pe awọn ibeere wọn ti ni idahun tẹlẹ.

Kan si Technical Support Center nipasẹ awọn webojula ni www.microchip.com/support. Darukọ nọmba Apakan Ẹrọ FPGA, yan ẹka ọran ti o yẹ, ati apẹrẹ ikojọpọ files lakoko ṣiṣẹda ọran atilẹyin imọ-ẹrọ.

Kan si Iṣẹ Onibara fun atilẹyin ọja ti kii ṣe imọ-ẹrọ, gẹgẹbi idiyele ọja, awọn iṣagbega ọja, alaye imudojuiwọn, ipo aṣẹ, ati aṣẹ.

• Lati North America, pe 800.262.1060

• Lati iyoku agbaye, pe 650.318.4460

• Faksi, lati ibikibi ni agbaye, 650.318.8044

Microchip Alaye

Microchip naa Webojula

Microchip pese atilẹyin ori ayelujara nipasẹ wa webojula ni www.microchip.com/. Eyi webojula ti wa ni lo lati ṣe files ati alaye awọn iṣọrọ wa si awọn onibara. Diẹ ninu akoonu ti o wa pẹlu:

• Ọja Support - Awọn iwe data ati errata, awọn akọsilẹ ohun elo ati sample eto, oniru oro, olumulo ká itọsọna ati hardware support awọn iwe aṣẹ, titun software tu ati ki o gbepamo software

• Gbogbogbo Technical Support - Awọn ibeere ti a beere nigbagbogbo (Awọn FAQ), awọn ibeere atilẹyin imọ-ẹrọ, awọn ẹgbẹ ijiroro lori ayelujara, atokọ awọn ọmọ ẹgbẹ eto alabaṣepọ apẹrẹ Microchip

• Iṣowo ti Microchip - Aṣayan ọja ati awọn itọsọna aṣẹ, awọn idasilẹ atẹjade Microchip tuntun, atokọ ti awọn apejọ ati awọn iṣẹlẹ, awọn atokọ ti awọn ọfiisi tita Microchip, awọn olupin kaakiri ati awọn aṣoju ile-iṣẹ

Ọja Change iwifunni Service

Iṣẹ ifitonileti iyipada ọja Microchip ṣe iranlọwọ lati jẹ ki awọn alabara wa lọwọlọwọ lori awọn ọja Microchip. Awọn alabapin yoo gba ifitonileti imeeli nigbakugba ti awọn ayipada ba wa, awọn imudojuiwọn, awọn atunyẹwo tabi errata ti o ni ibatan si ẹbi ọja kan tabi ohun elo idagbasoke ti iwulo.

Lati forukọsilẹ, lọ si www.microchip.com/pcn ki o si tẹle awọn ilana ìforúkọsílẹ. Onibara Support

Awọn olumulo ti awọn ọja Microchip le gba iranlọwọ nipasẹ awọn ikanni pupọ: • Olupin tabi Aṣoju

• Agbegbe Tita Office

• Onimọ-ẹrọ Awọn Solusan (ESE)

• Oluranlowo lati tun nkan se

Awọn onibara yẹ ki o kan si olupin wọn, aṣoju tabi ESE fun atilẹyin. Awọn ọfiisi tita agbegbe tun wa lati ṣe iranlọwọ fun awọn alabara. Atokọ ti awọn ọfiisi tita ati awọn ipo wa ninu iwe yii.

Imọ support wa nipasẹ awọn webojula ni: www.microchip.com/support Ẹya Idaabobo koodu Awọn ẹrọ Microchip

Ṣe akiyesi awọn alaye atẹle ti ẹya aabo koodu lori awọn ọja Microchip:

Itọsọna olumulo

DS50003319C – 23

• Awọn ọja Microchip pade awọn pato ti o wa ninu iwe data Microchip pato wọn.

• Microchip gbagbọ pe ẹbi ti awọn ọja wa ni aabo nigba lilo ni ọna ti a pinnu, laarin awọn pato iṣẹ, ati labẹ awọn ipo deede.

• Awọn iye Microchip ati ibinu ṣe aabo awọn ẹtọ ohun-ini ọgbọn rẹ. Awọn igbiyanju lati irufin awọn ẹya aabo koodu ti ọja Microchip jẹ eewọ muna ati pe o le rú Ofin Aṣẹ-lori Ẹgbẹrun Ọdun Digital.

Bẹni Microchip tabi olupese semikondokito miiran le ṣe iṣeduro aabo koodu rẹ. Idaabobo koodu ko tumọ si pe a n ṣe iṣeduro ọja naa jẹ “aibikita”. Idaabobo koodu ti wa ni idagbasoke nigbagbogbo. Microchip ti pinnu lati ni ilọsiwaju nigbagbogbo awọn ẹya aabo koodu ti awọn ọja wa.

Ofin Akiyesi

Atẹjade yii ati alaye ti o wa ninu rẹ le ṣee lo pẹlu awọn ọja Microchip nikan, pẹlu lati ṣe apẹrẹ, idanwo, ati ṣepọ awọn ọja Microchip pẹlu ohun elo rẹ. Lilo alaye yii ni ọna miiran ti o lodi si awọn ofin wọnyi. Alaye nipa awọn ohun elo ẹrọ ti pese fun irọrun rẹ nikan ati pe o le rọpo nipasẹ awọn imudojuiwọn. O jẹ ojuṣe rẹ lati rii daju pe ohun elo rẹ ni ibamu pẹlu awọn pato rẹ. Kan si ọfiisi tita Microchip agbegbe rẹ fun atilẹyin afikun tabi, gba atilẹyin afikun ni www.microchip.com/en-us/support/design-help/ client-support-services.

ALAYE YI NI MICROCHIP “BI O SE WA”. MICROCHIP KO SE Aṣoju TABI ATILẸYIN ỌJA TI IRU KANKAN BOYA KIAKIA TABI TỌRỌ, KỌ TABI ẹnu, Ilana tabi Bibẹkọkọ, ti o jọmọ ALAYE NAA SUGBON KO NI LOPIN SI KANKAN, LATI IKILỌ ỌRỌ, ÀTI IFỌRỌWỌRỌ FUN IDI PATAKI, TABI ATILẸYIN ỌJA TO JEmọ MAJEMU, Didara, TABI Iṣe Rẹ.

LAISI iṣẹlẹ ti yoo ṣe oniduro fun eyikeyi aiṣedeede, PATAKI, ijiya, ijamba, tabi ipadanu, bibajẹ, iye owo, tabi inawo ti eyikeyi iru ohunkohun ti o jọmọ si awọn alaye tabi ti o ti gba, ti o ba ti lo, Ti a gbaniyanju nipa Seese TABI awọn bibajẹ ni o wa tẹlẹ. SI AWỌN NIPA NIPA NIPA TI OFIN, LAPAPA LAPAPO MICROCHIP LORI Gbogbo awọn ẹtọ ni eyikeyi ọna ti o jọmọ ALAYE TABI LILO RE KO NI JU OPO ỌWỌ, TI O BA KAN, PE O TI ṢAN NIPA TODAJU SIROMỌ.

Lilo awọn ẹrọ Microchip ni atilẹyin igbesi aye ati/tabi awọn ohun elo aabo jẹ patapata ni ewu olura, ati pe olura gba lati daabobo, ṣe idalẹbi ati dimu Microchip ti ko lewu lati eyikeyi ati gbogbo awọn bibajẹ, awọn ẹtọ, awọn ipele, tabi awọn inawo ti o waye lati iru lilo. Ko si awọn iwe-aṣẹ ti a gbe lọ, laisọtọ tabi bibẹẹkọ, labẹ eyikeyi awọn ẹtọ ohun-ini imọ Microchip ayafi bibẹẹkọ ti sọ.

Awọn aami-išowo

Orukọ Microchip ati aami, aami Microchip, Adaptec, AVR, AVR logo, AVR Freaks, BestTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXSty MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, logo PIC32, PolarFire, Prochip Designer, QTouch, SAM-BA, Segenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, ati XMEGA jẹ aami-išowo ti a forukọsilẹ ti Microchip Technology Incorporated ni AMẸRIKA ati awọn orilẹ-ede miiran.

AgileSwitch, ClockWorks, Ile-iṣẹ Awọn Solusan Iṣakoso ti a fi sinu, EtherSynch, Flashtec, Iṣakoso Iyara Hyper, fifuye HyperLight, Libero, motorBench, mTouch, Powermite 3, Edge Precision, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, TimeCesium, TimeHub, TimePictra, TimeProvider, ati ZL jẹ aami-išowo ti a forukọsilẹ ti Microchip Technology Incorporated ni AMẸRIKA

Imukuro Bọtini nitosi, AKS, Analog-fun-The-Digital Age, Eyikeyi Kapasito, AnyIn, AnyOut, Yipada Augmented, BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPImicnanet, dsPICDEMnet.

Itọsọna olumulo

DS50003319C – 24

Ibamu apapọ, DAM, ECAN, Espresso T1S, EtherGREEN, EyeOpen, GridTime, IdealBridge, IGAT, In-Circuit Serial Programming, ICSP, INICnet, Ti o jọra oye, IntelliMOS, Inter-Chip Asopọmọra, JitterBlocker, Knob-on-Linkplay, Marsplay. maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB aami ifọwọsi, MPLIB, MPLINK, mSiC, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, Power MOS IV, Power MOS 7, PowerSmart, PureSilicon , QMatrix, GIDI yinyin, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total ìfaradà , Akoko igbẹkẹle, TSHARC, Turing, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, ati ZENA jẹ aami-iṣowo ti Microchip Technology Incorporated ni AMẸRIKA ati awọn orilẹ-ede miiran.

SQTP jẹ aami iṣẹ ti Microchip Technology Incorporated ni AMẸRIKA

Aami Adaptec, Igbohunsafẹfẹ lori Ibeere, Imọ-ẹrọ Ibi ipamọ Silicon, ati Symmcom jẹ aami-išowo ti a forukọsilẹ ti Microchip Technology Inc. ni awọn orilẹ-ede miiran.

GestIC jẹ aami-iṣowo ti a forukọsilẹ ti Microchip Technology Germany II GmbH & Co.KG, oniranlọwọ ti Microchip Technology Inc., ni awọn orilẹ-ede miiran.

Didara Management System

Fun alaye nipa Awọn ọna iṣakoso Didara Microchip, jọwọ ṣabẹwo www.microchip.com/quality.

Itọsọna olumulo

DS50003319C – 25

Ni agbaye Titaja ati Service

AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE

Ile-iṣẹ Ile-iṣẹ

2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tẹli: 480-792-7200

Faksi: 480-792-7277

Oluranlowo lati tun nkan se:

www.microchip.com/support Web Adirẹsi:

www.microchip.com

Atlanta

Duluth, GA

Tẹli: 678-957-9614

Faksi: 678-957-1455

Austin, TX

Tẹli: 512-257-3370

Boston

Westborough, MA

Tẹli: 774-760-0087

Faksi: 774-760-0088

Chicago

Itasca, IL

Tẹli: 630-285-0071

Faksi: 630-285-0075

Dallas

Addison, TX

Tẹli: 972-818-7423

Faksi: 972-818-2924

Detroit

Novi, MI

Tẹli: 248-848-4000

Houston, TX

Tẹli: 281-894-5983

Indianapolis

Noblesville, INU

Tẹli: 317-773-8323

Faksi: 317-773-5453

Tẹli: 317-536-2380

Los Angeles

Mission Viejo, CA

Tẹli: 949-462-9523

Faksi: 949-462-9608

Tẹli: 951-273-7800

Raleigh, NC

Tẹli: 919-844-7510

Niu Yoki, NY

Tẹli: 631-435-6000

San Jose, CA

Tẹli: 408-735-9110

Tẹli: 408-436-4270

Canada – Toronto

Tẹli: 905-695-1980

Faksi: 905-695-2078

Australia – Sydney Tẹli: 61-2-9868-6733 Ilu China - Ilu Beijing

Tẹli: 86-10-8569-7000 China – Chengdu

Tẹli: 86-28-8665-5511 China – Chongqing Tẹli: 86-23-8980-9588 China – Dongguan Tẹli: 86-769-8702-9880 China – Guangzhou Tẹli: 86-20-8755-8029 China – Hangzhou Tẹli: 86-571-8792-8115 China – Hong Kong SAR Tẹli: 852-2943-5100 China – Nanjing

Tẹli: 86-25-8473-2460 China – Qingdao

Tẹli: 86-532-8502-7355 China – Shanghai

Tẹli: 86-21-3326-8000 China - Shenyang Tẹli: 86-24-2334-2829 China – Shenzhen Tẹli: 86-755-8864-2200 China – Suzhou

Tẹli: 86-186-6233-1526 China – Wuhan

Tẹli: 86-27-5980-5300 China – Xian

Tẹli: 86-29-8833-7252 China – Xiamen

Tẹli: 86-592-2388138 China – Zhuhai

Tẹli: 86-756-3210040

India – Bangalore

Tẹli: 91-80-3090-4444

India – New Delhi

Tẹli: 91-11-4160-8631

India - Pune

Tẹli: 91-20-4121-0141

Japan - Osaka

Tẹli: 81-6-6152-7160

Japan – Tokyo

Tẹli: 81-3-6880-3770

Koria – Daegu

Tẹli: 82-53-744-4301

Korea – Seoul

Tẹli: 82-2-554-7200

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Malaysia - Penang

Tẹli: 60-4-227-8870

Philippines – Manila

Tẹli: 63-2-634-9065

Singapore

Tẹli: 65-6334-8870

Taiwan – Hsin Chu

Tẹli: 886-3-577-8366

Taiwan – Kaohsiung

Tẹli: 886-7-213-7830

Taiwan – Taipei

Tẹli: 886-2-2508-8600

Thailand - Bangkok

Tẹli: 66-2-694-1351

Vietnam - Ho Chi Minh

Tẹli: 84-28-5448-2100

Itọsọna olumulo

Austria – Wels

Tẹli: 43-7242-2244-39

Faksi: 43-7242-2244-393

Denmark – Copenhagen

Tẹli: 45-4485-5910

Faksi: 45-4485-2829

Finland – Espoo

Tẹli: 358-9-4520-820

Faranse - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Jẹmánì – Garching

Tẹli: 49-8931-9700

Jẹmánì – Haan

Tẹli: 49-2129-3766400

Jẹmánì – Heilbronn

Tẹli: 49-7131-72400

Jẹmánì – Karlsruhe

Tẹli: 49-721-625370

Jẹmánì – München

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Jẹmánì – Rosenheim

Tẹli: 49-8031-354-560

Israeli - Hod Hasharon

Tẹli: 972-9-775-5100

Italy – Milan

Tẹli: 39-0331-742611

Faksi: 39-0331-466781

Italy – Padova

Tẹli: 39-049-7625286

Netherlands - Drunen

Tẹli: 31-416-690399

Faksi: 31-416-690340

Norway – Trondheim

Tẹli: 47-72884388

Poland - Warsaw

Tẹli: 48-22-3325737

Romania - Bucharest

Tel: 40-21-407-87-50

Spain – Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Sweden – Gothenberg

Tel: 46-31-704-60-40

Sweden – Dubai

Tẹli: 46-8-5090-4654

UK – Wokingham

Tẹli: 44-118-921-5800

Faksi: 44-118-921-5820

DS50003319C – 26

Awọn iwe aṣẹ / Awọn orisun

MICROCHIP DS50003319C-13 Àjọlò HDMI TX IP [pdf] Itọsọna olumulo
DS50003319C - 13, DS50003319C - 2, DS50003319C - 3, DS50003319C-13 Ethernet HDMI TX IP, DS50003319C-13, Ethernet HDMI TX IP, HDMI TX IP, IP

Awọn itọkasi

Itọsọna olumulo

DS50003319C-13 Àjọlò HDMI TX IP

HDMI TX IP Itọsọna olumulo

Lakotan

Awọn ẹya ara ẹrọ

Awọn ilana fifi sori ẹrọ

Itọsọna olumulo

Lilo awọn orisun (Beere ibeere kan)

Tabili 3. Lilo orisun fun 4PXL

Itọsọna olumulo

HDMI TX IP Configurator

olusin 1-1. HDMI TX IP Configurator

Hardware imuse

Ipo kika Awọ RGB

Hardware imuse

Hardware imuse

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

Table 3-3. Awọn ebute oko oju omi ti nwọle ati ti njade fun AXI4 Stream Interface

Table 3-4. Awọn ifihan agbara titẹ sii ati Ijade

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

Table 3-5. Awọn ebute oko oju omi ti nwọle ati ti njade fun AXI4 Stream Interface

Table 3-6. Iṣagbewọle ati Ijade fun Ipo YCbCr444 ati Ipo Olohun Ti ṣiṣẹ

Awọn paramita HDMI TX ati Awọn ifihan agbara wiwo

Forukọsilẹ Map ati awọn apejuwe

Forukọsilẹ Map ati awọn apejuwe

4.1 SCRAMBLER_IP_EN (Beere ibeere kan)

Lati ṣe afarawe mojuto nipa lilo testbench, ṣe awọn igbesẹ wọnyi:

Testbench Simulation

Eto Integration

Eto Integration

Eto Integration

Àtúnyẹwò History

Table 7-1. Àtúnyẹwò History

Microchip FPGA Support

Microchip Alaye

Microchip naa Webojula

Ọja Change iwifunni Service

Ofin Akiyesi

Awọn aami-išowo

Awọn iwe aṣẹ / Awọn orisun

Awọn itọkasi

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