MICROCHIP DS50003319C-13 Efaneti HDMI TX IP User Guide

Microchip's High-Definition Multimedia Interface (HDMI) transmitter IP imathandizira kutumiza deta yapaketi yamakanema ndi ma audio yomwe ikufotokozedwa mumtundu wa HDMI.

HDMI imagwiritsa ntchito Transition Minimized Differential Signaling (TMDS) kuti ifalitse bwino kuchuluka kwa data ya digito kudutsa mtunda wotalikirapo wa chingwe, kuwonetsetsa kuti ma siginecha a digito athamanga kwambiri, odalirika komanso odalirika. Ulalo wa TMDS uli ndi njira imodzi ya wotchi ndi ma data atatu. Wotchi ya pixel ya kanema imatumizidwa pa tchanelo cha wotchi ya TMDS, yomwe imathandiza kuti ma signature azilumikizana. Deta ya kanema imatengedwa ngati ma pixel a 24-bit pamayendedwe atatu a data a TMDS, pomwe njira iliyonse ya data imayikidwa kuti ikhale yofiira, yobiriwira, ndi buluu. Deta yomvera imatengedwa ngati mapaketi a 8-bit panjira ya TMDS yobiriwira ndi yofiira.

TMDS encoder imalola kutumiza deta ya serial pa liwiro lalikulu, ndikuchepetsa kuthekera kwa Electro-magnetic Interference (EMI) pazingwe zamkuwa pochepetsa kuchuluka kwa kusintha (kuchepetsa kusokoneza pakati pa njira), ndikukwaniritsa bwino kwa Direct Current (DC), pamawaya. , posunga chiwerengero cha amodzi ndi ziro pamzere pafupifupi ofanana.

HDMI TX IP idapangidwa kuti izigwiritsidwa ntchito limodzi ndi PolarFire® Ma transceivers a chipangizo cha SoC ndi PolarFire. IP imagwirizana ndi HDMI 1.4 ndi HDMI 2.0, yomwe imathandizira mpaka mafelemu 60 pa sekondi imodzi, yokhala ndi bandwidth yayikulu ya 18 Gbps. IP imagwiritsa ntchito encoder ya TMDS yomwe imasintha mavidiyo a 8-bit pa tchanelo chilichonse ndi paketi yomvera kukhala 10-bit DC-balanced, ndikusintha mocheperako. Kenako imafalitsidwa mosalekeza pamlingo wa 10-bits pa pixel, panjira. Munthawi yotseka makanema, ma tokeni owongolera amatumizidwa. Zizindikiro izi zimapangidwa kutengera hsync ndi vsync siginecha. Panthawi yachilumba cha data, paketi yomvera imafalitsidwa ngati mapaketi a 10-bit panjira yofiira ndi yobiriwira.

Wogwiritsa Ntchito

DS50003319C - 1

Chidule

Gome lotsatirali likupereka chidule cha mawonekedwe a HDMI TX IP.

Table 1. HDMI TX IP Makhalidwe

Core Version	Bukuli limathandizira HDMI TX IP v5.2.0
Zothandizidwa Chipangizo Mabanja	• PolarFire® SoC • PolarFire
Kuyenda kwa Chida Chothandizira	Imafunika Libero® SoC v11.4 kapena kutulutsidwa pambuyo pake
Zothandizidwa Zolumikizirana	Mawonekedwe othandizidwa ndi HDMI TX IP ndi awa: • AXI4-Stream - Pachimake ichi chimathandizira AXI4-Stream kumadoko olowera. Ikakonzedwa motere, IP imatenga ma siginecha odandaula a AXI4 Stream ngati zolowetsa. • AXI4-Lite Configuration Interface - Core iyi imathandizira mawonekedwe a AXI4-Lite pazofunikira za 4Kp60. Munjira iyi, zolowetsa za IP zimaperekedwa kuchokera ku SoftConsole. • Mbadwa - Ikakonzedwa mwanjira iyi, IP imatenga makanema apakanema ndi ma audio ngati zolowetsa.
Kupereka chilolezo	HDMI TX IP imaperekedwa ndi njira ziwiri zotsatirazi: • Zosungidwa: Khodi ya RTL yosungidwa yonse imaperekedwa pachimake. Imapezeka kwaulere ndi layisensi iliyonse ya Libero, zomwe zimapangitsa kuti mazikowo akhazikitsidwe ndi SmartDesign. Mutha kupanga Simulation, Synthesis, Layout, ndikukonzekera silicon ya FPGA pogwiritsa ntchito Libero design suite. • Mtengo RTL: Khodi yathunthu ya RTL ndi laisensi yotsekedwa, yomwe iyenera kugulidwa padera.

Mawonekedwe

HDMI TX IP ili ndi izi:

• Yogwirizana ndi HDMI 2.0 ndi 1.4b

• Imathandizira chizindikiro chimodzi kapena zinayi / pixel pa wotchi iliyonse

• Imathandizira Resolutions mpaka 3840 x 2160 pa 60 fps

• Imathandizira kuya kwa mtundu wa 8, 10, 12, ndi 16-bit

• Imathandizira mitundu yamitundu monga RGB, YUV 4:2:2, ndi YUV 4:4:4

• Imathandizira zomvera mpaka mayendedwe 32

• Imathandizira Encoding Scheme - TMDS

• Imathandizira Native ndi AXI4 Stream Video ndi Audio Data mawonekedwe

• Imathandizira mawonekedwe a Native ndi AXI4-Lite Configuration kuti asinthe mawonekedwe

Malangizo oyika

IP core iyenera kukhazikitsidwa ku IP Catalogue ya Libero® Pulogalamu ya SoC yokha kudzera mu pulogalamu ya IP Catalog mu pulogalamu ya Libero SoC, kapena imatsitsidwa pamanja pamndandanda. IP core ikakhazikitsidwa mu Libero SoC pulogalamu ya IP Catalog, imakonzedwa, kupangidwa, ndikukhazikitsidwa mkati mwa SmartDesign kuti iphatikizidwe mu projekiti ya Libero.

Wogwiritsa Ntchito

DS50003319C - 2

Kugwiritsa Ntchito Zida (Funsani Funso)

HDMI TX IP ikugwiritsidwa ntchito mu PolarFire® FPGA (MPF300T – 1FCG1152I Phukusi).

Gome ili m'munsili likuwonetsa zomwe zimagwiritsidwa ntchito g_PIXELS_PER_CLK = 1PXL.

Table 2. Kugwiritsa Ntchito Zothandizira kwa 1PXL

	g_COLOR_FORMAT g_BITS_PER_COMPONENT (Bits)	g_AUX_CHANNEL_ENABLE g_4K60_SUPPORT Nsalu		4LUTU	Nsalu DFF	Chithunzi cha 4LUT	Chiyankhulo cha DFF	SRAM (64×12)
RGB	8	Yambitsani	Letsani	787	514	108	108	9
	8	Letsani	Letsani	819	502	108	108	9
	10	Letsani	Letsani	1070	849	156	156	13
	12	Letsani	Letsani	1084	837	156	156	13
	16	Letsani	Letsani	1058	846	156	156	13
YCbCr422	8	Letsani	Letsani	696	473	96	96	8
YCbCr444	8	Letsani	Letsani	819	513	108	108	9
	10	Letsani	Letsani	1068	849	156	156	13
	12	Letsani	Letsani	1017	837	156	156	13
	16	Letsani	Letsani	1050	845	156	156	13

Gome ili m'munsili likuwonetsa zomwe zimagwiritsidwa ntchito g_PIXELS_PER_CLK = 4PXL.

Table 3. Kugwiritsa Ntchito Zothandizira kwa 4PXL

	g_COLOR_FORMAT g_BITS_PER_COMPONENT (Bits)	g_AUX_CHANNEL_ENABLE g_4K60_SUPPORT Nsalu		4LUTU	Nsalu DFF	Chithunzi cha 4LUT	Chiyankhulo cha DFF	SRAM (64×12)
RGB	8	Letsani	Yambitsani	4078	2032	144	144	12
		Yambitsani	Letsani	1475	2269	144	144	12
		Letsani	Letsani	1393	1092	144	144	12
	10	Letsani	Letsani	2151	1635	264	264	22
	12	Letsani	Letsani	1909	1593	264	264	22
	16	Letsani	Letsani	1645	1284	264	264	22
YCbCr422	8	Letsani	Letsani	1265	922	144	144	12
YCbCr444	8	Letsani	Letsani	1119	811	144	144	12
	10	Letsani	Letsani	2000	1627	264	264	22
	12	Letsani	Letsani	1909	1585	264	264	22
	16	Letsani	Letsani	1604	1268	264	264	22

Wogwiritsa Ntchito

DS50003319C - 3

HDMI TX IP Configurator

1. HDMI TX IP Configurator (Funsani Funso)

Chigawo ichi chimapereka chowonjezeraview ya HDMI TX Configurator mawonekedwe ndi zigawo zake zosiyanasiyana.

HDMI TX Configurator imapereka mawonekedwe owonetsera kuti akhazikitse pachimake cha HDMI TX pazofunikira zenizeni zotumizira makanema. Zosinthazi zimalola wogwiritsa ntchito kusankha magawo monga Bits Per Component, Mtundu Wamtundu, Nambala ya Pixels, Audio Mode, Interface, Testbench, ndi License. Ndikofunikira kusintha makondawa moyenera kuti muwonetsetse kufalikira kwamavidiyo pa HDMI.

Mawonekedwe a HDMI TX Configurator ali ndi mindandanda yotsitsa yosiyanasiyana ndi zosankha zomwe zimathandiza ogwiritsa ntchito kusintha makonda a HDMI. Zosintha zazikulu zikufotokozedwa mu Gulu 3-1.

Chithunzi chotsatirachi chikupereka mwatsatanetsatane view mawonekedwe a HDMI TX Configurator.

Chithunzi 1-1. HDMI TX IP Configurator

Mawonekedwewa amaphatikizanso mabatani a OK ndi Cancel kuti atsimikizire kapena kutaya masinthidwe opangidwa.

Wogwiritsa Ntchito

DS50003319C - 5

Kukhazikitsa kwa Hardware

2. Kukhazikitsa kwa Hardware (Funsani Funso)

HDMI Transmitter (TX) imakhala ndi magawo awiritages:

• Ntchito ya XOR/XNOR, yomwe imachepetsa chiwerengero cha kusintha

• INV/NONINV, yomwe imachepetsa kusiyana (DC balance). Zigawo ziwiri zowonjezera zikuwonjezedwa pa stage ntchito. Dongosolo lowongolera (hsync ndi vsync) limasungidwa ku ma bits 10 pazophatikizira zinayi kuti zithandizire wolandila kulunzanitsa wotchi yake ndi wotchi yotumizira. Transceiver iyenera kugwiritsidwa ntchito limodzi ndi HDMI TX IP kusanja ma bits 10 (1 pixel mode) kapena 40 bits (4 pixel mode).

Wosinthayo amawonetsanso choyimira cha HDMI Tx pachimake, cholembedwa HDMI_TX_0, kuwonetsa zolumikizira zosiyanasiyana zomwe zimalumikizidwa ndi pachimake. Pali mitundu itatu ya mawonekedwe a HDMI TX ndipo amafotokozedwa motere:

RGB Mtundu Format Mode

Madoko a HDMI TX IP a pixel imodzi pa wotchi iliyonse pomwe nyimboyo yayatsidwa ndipo mtundu wamtundu ndi RGB wa PolarFire.® zipangizo zikuwonetsedwa mu chithunzi chotsatirachi. Chiwonetsero chowonekera cha madoko a HDMI Tx motere:

• Mawotchi owongolera ndi R_CLK_LOCK, G_CLK_LOCK, ndi B_CLK_LOCK. Zizindikiro za Wotchi ndi R_CLK_I, G_CLK_I, ndi B_CLK_I.

• Machanelo a data kuphatikiza DATA_R_I, DATA_G_I, ndi DATA_B_I.

• Zizindikiro Zothandizira ndi AUX_DATA_R_I ndi AUX_DATA_G_I.

Chithunzi 2-1. HDMI TX IP Block Diagram (RGB Color Format)

Kuti mumve zambiri za zizindikiro za I/O za mtundu wa RGB, onani Gulu 3-2.

YCbCr444 Mtundu Format Mode

Madoko a HDMI TX IP a pixel imodzi pa wotchi iliyonse pomwe mawu amawu atsegulidwa ndipo mtundu wamtundu ndi YCbCr444 ukuwonetsedwa pachithunzi chotsatira. Chiwonetsero chowonekera cha madoko a HDMI Tx motere:

• Zizindikiro zowongolera ndi Y_CLK_LOCK, Cb_CLK_LOCK, ndi Cr_CLK_LOCK.

• Zizindikiro za wotchi ndi Y_CLK_I, Cb_CLK_I, ndi Cr_CLK_I.

Wogwiritsa Ntchito

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Kukhazikitsa kwa Hardware

• Machanelo a data kuphatikiza DATA_Y_I, DATA_Cb_I, ndi DATA_Cr_I.

• Zizindikiro zowonjezera za Data ndi AUX_DATA_Y_I ndi AUX_DATA_C_I.

Chithunzi 2-2. Chithunzi cha HDMI TX IP Block (YCbCr444 Colour Format)

Kuti mumve zambiri za ma I/O amtundu wa YCbCr444 mtundu, onani Gulu 3-6. YCbCr422 Mtundu Format Mode

Madoko a HDMI TX IP a pixel imodzi pa wotchi iliyonse pomwe mawu amawu atsegulidwa ndipo mtundu wamtundu ndi YCbCr422 ukuwonetsedwa pachithunzi chotsatira. Chiwonetsero chowonekera cha madoko a HDMI Tx motere:

• Makanema owongolera ndi LANE1_CLK_LOCK, LANE2_CLK_LOCK, ndi LANE3_CLK_LOCK. • Mawotchi amawu ndi LANE1_CLK_I, LANE2_CLK_I, ndi LANE3_CLK_I.

• Machanelo a data kuphatikiza DATA_Y_I ndi DATA_C_I.

Wogwiritsa Ntchito

DS50003319C - 7

Kukhazikitsa kwa Hardware

Chithunzi 2-3. Chithunzi cha HDMI TX IP Block (YCbCr422 Colour Format)

Kuti mumve zambiri za ma I/O amtundu wa YCbCr422 mtundu, onani Gulu 3-7 Wogwiritsa Ntchito

DS50003319C - 8

HDMI TX Parameters ndi Interface Signals

3. HDMI TX Parameters ndi Interface Signals (Funsani Funso)

Gawoli likukambirana za magawo mu HDMI TX GUI configurator ndi zizindikiro za I / O. 3.1 Zosintha Zosintha (Funsani Funso)

Gome lotsatirali likulemba magawo osinthika mu HDMI TX IP.

Gulu 3-1. Zosintha Zosintha

Dzina la Parameter	Kufotokozera
Mtundu wamtundu	Imatanthauzira malo amtundu. Imathandizira mitundu iyi: • RGB • YCbCr422 • YCbCr444
Chiwerengero cha ma bits pa gawo	Imatchula kuchuluka kwa ma bits pamtundu uliwonse. Imathandizira 8, 10, 12, ndi 16 bits pagawo lililonse.
Nambala ya Mapikiselo	Ikuwonetsa kuchuluka kwa ma pixel pa wotchi iliyonse: • Pixel pa wotchi iliyonse = 1 • Pixel pa wotchi iliyonse = 4
4Kp60 Thandizo	Kuthandizira kusamvana kwa 4K pamafelemu 60 pamphindikati: • Pamene thandizo la 1, 4Kp60 layatsidwa • Chithandizo cha 0, 4Kp60 chikayimitsidwa
Mawonekedwe Amtundu	Imakonza njira yotumizira mawu. Zambiri zomvera pa tchanelo cha R ndi G: • Yambitsani • Zimitsani
Chiyankhulo	Native ndi AXI mtsinje
Testbench	Amalola kusankha malo testbench. Imathandizira njira zotsatirazi za testbench: • Wogwiritsa ntchito • Palibe
Chilolezo	Imatchula mtundu wa chilolezo. Amapereka njira ziwiri zalayisensi zotsatirazi: • RTL • Zobisika

3.2 Madoko (Funsani Funso)

Gome lotsatirali likulemba madoko olowera ndi otuluka a HDMI TX IP ya mawonekedwe a Native pomwe Audio mode yayatsidwa ndipo mtundu wamtundu ndi RGB.

Gulu 3-2. Zolowetsa ndi Zotulutsa

Dzina la Signal	Mayendedwe	M'lifupi	Kufotokozera
SYS_CLK_I	Zolowetsa	1-bit	Wotchi yamakina, nthawi zambiri imakhala yofanana ndi wowongolera
RESET_N_I	Zolowetsa	1-bit	Asynchronous active-low reset signal
VIDEO_DATA_VALID_I	Zolowetsa	1-bit	Zolemba zamakanema zolondola
AUDIO_DATA_VALID_I	Zolowetsa	1-bit	Zolemba za paketi zomvera ndizovomerezeka
R_CLK_I	Zolowetsa	1-bit	TX wotchi ya "R" kuchokera ku XCVR
R_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya kanema wa R kuchokera ku XCVR
G_CLK_I	Zolowetsa	1-bit	TX wotchi ya "G" kuchokera ku XCVR
G_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo cha G kuchokera ku XCVR
B_CLK_I	Zolowetsa	1-bit	TX wotchi ya "B" kuchokera ku XCVR

Wogwiritsa Ntchito

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HDMI TX Parameters ndi Interface Signals

………..ikupitilira Kufotokozera Kwamawonekedwe a Dzina la Signal
B_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo B kuchokera ku XCVR
H_SYNC_I	Zolowetsa	1-bit	Chopingasa kulunzanitsa kugunda
V_SYNC_I	Zolowetsa	1-bit	Kugunda kwa vertical sync
PACKET_HEADER_I	Zolowetsa	PIXELS_PER_CLK*1	Paketi mutu wa data paketi yomvera
DATA_R_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "R" data
DATA_G_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "G" data
DATA_B_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "B" data
AUX_DATA_R_I	Zolowetsa	PIXELS_PER_CLK*4	Audio paketi "R" njira deta
AUX_DATA_G_I	Zolowetsa	PIXELS_PER_CLK*4	Paketi yomvera "G" data yanjira
TMDS_R_O	Zotulutsa	PIXELS_PER_CLK*10	Deta ya "R" yosungidwa
TMDS_G_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa za "G".
TMDS_B_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa "B" data

Gome lotsatirali likulemba madoko a mawonekedwe a AXI4 Stream okhala ndi Audio Enable.

Gulu 3-3. Zolowetsa ndi Zotulutsa za AXI4 Stream Interface

Port Name Type		M'lifupi	Kufotokozera
TDATA_I	Zolowetsa	3g_BITS_PER_COMPONENTg_PIXELS_PER_CLK Lowetsani data ya kanema
TVALID_I	Zolowetsa	1-bit	Kanema wolowetsa ndi wovomerezeka
TREADY_O Zotulutsa 1-bit			Chizindikiro chokonzekera kapolo wotuluka
TUSER_I	Zolowetsa	PIXELS_PER_CLK*9 + 5	pang'ono 0 = osagwiritsidwa ntchito pang'ono 1 = VSYNC pang'ono 2 = HSYNC pang'ono 3 = osagwiritsidwa ntchito pang'ono [3 + g_PIXELS_PER_CLK: 4] = Paketi yamutu yamutu [4 + g_PIXELS_PER_CLK] = Zomvera zomvera ndizovomerezeka pang'ono [(5 * g_PIXELS_PER_CLK) + 4: (1g_PIXELS_PER_CLK) + 5] = data ya Audio G pang'ono [(9 g_PIXELS_PER_CLK) + 4: (5*g_PIXELS_PER_CLK) + 5] = Zomvera R

Gome lotsatirali likulemba madoko olowera ndi otuluka a HDMI TX IP ya mawonekedwe a Native pomwe Audio mode yazimitsidwa.

Gulu 3-4. Zolowetsa ndi Zotulutsa

Dzina la Signal	Mayendedwe	M'lifupi	Kufotokozera
SYS_CLK_I	Zolowetsa	1-bit	Wotchi yamakina, nthawi zambiri imakhala yofanana ndi wowongolera
RESET_N_I	Zolowetsa	1-bit	Asynchronous yogwira - otsika bwererani chizindikiro
VIDEO_DATA_VALID_I	Zolowetsa	1-bit	Zolemba zamakanema zolondola
R_CLK_I	Zolowetsa	1-bit	TX wotchi ya "R" kuchokera ku XCVR
R_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya kanema wa R kuchokera ku XCVR
G_CLK_I	Zolowetsa	1-bit	TX wotchi ya "G" kuchokera ku XCVR
G_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo cha G kuchokera ku XCVR
B_CLK_I	Zolowetsa	1-bit	TX wotchi ya "B" kuchokera ku XCVR
B_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo B kuchokera ku XCVR
H_SYNC_I	Zolowetsa	1-bit	Chopingasa kulunzanitsa kugunda
V_SYNC_I	Zolowetsa	1-bit	Kugunda kwa vertical sync
DATA_R_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "R" data

Wogwiritsa Ntchito

DS50003319C - 10

HDMI TX Parameters ndi Interface Signals

………..ikupitilira Kufotokozera Kwamawonekedwe a Dzina la Signal
DATA_G_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "G" data
DATA_B_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "B" data
TMDS_R_O	Zotulutsa	PIXELS_PER_CLK*10	Deta ya "R" yosungidwa
TMDS_G_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa za "G".
TMDS_B_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa "B" data

Gome lotsatirali limatchula madoko a mawonekedwe a AXI4 Stream.

Gulu 3-5. Zolowetsa ndi Zotulutsa za AXI4 Stream Interface

Dzina la Port	Mtundu	M'lifupi	Kufotokozera
TDATA_I_VIDEO	Zolowetsa	3g_BITS_PER_COMPONENTg_PIXELS_PER_CLK	Lowetsani data yamavidiyo
TVALID_I_VIDEO	Zolowetsa	1-bit	Kanema wolowetsa ndi wovomerezeka
TREADY_O_VIDEO	Zotulutsa	1-bit	Chizindikiro chokonzekera kapolo wotuluka
TUSER_I_VIDEO	Zolowetsa	4 biti	pang'ono 0 = osagwiritsidwa ntchito pang'ono 1 = VSYNC pang'ono 2 = HSYNC pang'ono 3 = osagwiritsidwa ntchito

Gome lotsatirali likulemba madoko amtundu wa YCbCr444 pomwe audio imayatsidwa.

Gulu 3-6. Kulowetsa ndi Kutulutsa kwa YCbCr444 Mode ndi Audio Mode Yayatsidwa

Dzina la Signal	Kukula kwamayendedwe		Kufotokozera
SYS_CLK_I	Zolowetsa	1-bit	Wotchi yamakina, nthawi zambiri imakhala yofanana ndi wowongolera
RESET_N_I	Zolowetsa	1-bit	Asynchronous active-low reset signal
VIDEO_DATA_VALID_I Zolemba		1-bit	Zolemba zamakanema zolondola
Zolemba za AUDIO_DATA_VALID_I		1-bit	Zolemba za paketi zomvera ndizovomerezeka
Y_CLK_I	Zolowetsa	1-bit	TX wotchi ya "Y" kuchokera ku XCVR
Y_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo cha Y kuchokera ku XCVR
Cb_CLK_I	Zolowetsa	1-bit	TX wotchi ya "Cb" kuchokera ku XCVR
Cb_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo cha Cb kuchokera ku XCVR
Cr_CLK_I	Zolowetsa	1-bit	TX wotchi ya "Cr" kuchokera ku XCVR
Cr_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE ya tchanelo cha Cr kuchokera ku XCVR
H_SYNC_I	Zolowetsa	1-bit	Chopingasa kulunzanitsa kugunda
V_SYNC_I	Zolowetsa	1-bit	Kugunda kwa vertical sync
PACKET_HEADER_I	Zolowetsa	PIXELS_PER_CLK*1	Paketi mutu wa data paketi yomvera
DATA_Y_I	Zolowetsa	PIXELS_PER_CLK*8	Lowetsani "Y" data
DATA_Cb_I	Zolowetsa	PIXELS_PER_CLK*DATA_WIDTH Lowetsani data ya "Cb".
DATA_Cr_I	Zolowetsa	PIXELS_PER_CLK*DATA_WIDTH Lowetsani data ya "Cr".
AUX_DATA_Y_I	Zolowetsa	PIXELS_PER_CLK*4	Audio paketi "Y" tchanelo data
AUX_DATA_C_I	Zolowetsa	PIXELS_PER_CLK*4	Audio paketi "C" njira deta
TMDS_R_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa za "Cb".
TMDS_G_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa za "Y".
TMDS_B_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa za "Cr".

Gome lotsatirali likulemba madoko amtundu wa YCbCr422 pomwe audio imayatsidwa.

Wogwiritsa Ntchito

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HDMI TX Parameters ndi Interface Signals

Gulu 3-7. Kulowetsa ndi Kutulutsa kwa YCbCr422 Mode ndi Audio Mode Yayatsidwa

Dzina la Signal	Kukula kwamayendedwe		Kufotokozera
SYS_CLK_I	Zolowetsa	1-bit	Wotchi yamakina, nthawi zambiri imakhala yofanana ndi wowongolera
RESET_N_I	Zolowetsa	1-bit	Asynchronous Active -Chizindikiro chochepa chokhazikitsanso
VIDEO_DATA_VALID_I Zolemba		1-bit	Zolemba zamakanema zolondola
LANE1_CLK_I	Zolowetsa	1-bit	TX wotchi ya "njira yochokera ku XCVE lane 1" kuchokera ku XCVR
LANE1_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE panjira yochokera ku XCVE lane 1
LANE2_CLK_I	Zolowetsa	1-bit	TX wotchi ya "njira yochokera ku XCVE lane 2" kuchokera ku XCVR
LANE2_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE panjira yochokera ku XCVE lane 2
LANE3_CLK_I	Zolowetsa	1-bit	TX wotchi ya "njira yochokera ku XCVE lane 3" kuchokera ku XCVR
LANE3_CLK_LOCK	Zolowetsa	1-bit	TX_CLK_STABLE panjira yochokera ku XCVE lane 3
H_SYNC_I	Zolowetsa	1-bit	Chopingasa kulunzanitsa kugunda
V_SYNC_I	Zolowetsa	1-bit	Kugunda kwa vertical sync
PACKET_HEADER_I	Zolowetsa	PIXELS_PER_CLK*1	Paketi mutu wa data paketi yomvera
DATA_Y_I	Zolowetsa	PIXELS_PER_CLK*DATA_WIDTH Lowetsani data ya "Y".
DATA_C_I	Zolowetsa	PIXELS_PER_CLK*DATA_WIDTH Lowetsani data ya "C".
AUX_DATA_Y_I	Zolowetsa	PIXELS_PER_CLK*4	Audio paketi "Y" tchanelo data
AUX_DATA_C_I	Zolowetsa	PIXELS_PER_CLK*4	Audio paketi "C" njira deta
TMDS_R_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa "C" data
TMDS_G_O	Zotulutsa	PIXELS_PER_CLK*10	Zosungidwa za "Y".
TMDS_B_O	Zotulutsa	PIXELS_PER_CLK*10	Data yosungidwa yokhudzana ndi chidziwitso cha kulunzanitsa

Wogwiritsa Ntchito

DS50003319C - 12

Lembani Mapu ndi Mafotokozedwe

4. Lembani Mapu ndi Mafotokozedwe (Funsani Funso)

Offset	Dzina	Pang Pos.	7	6	5	4	3	2	1	0
0x00 pa	SCRAMBLER_IP_EN	7:0								YAMBA
		15:8
		23:16
		31:24
0x04 pa	XCVR_DATA_LANE_ 0_SEL	7:0							START[1:0]
		15:8
		23:16
		31:24

Wogwiritsa Ntchito

DS50003319C - 13

Lembani Mapu ndi Mafotokozedwe

4.1 SCRAMBLER_IP_EN (Funsani Funso)

Dzina: SCRAMBLER_IP_EN

Zokwanira: 0x000

sinthani: 0x0

Katundu: Zolemba zokha

Scrambler Yambitsani Kulembetsa Kulembetsa. Regista iyi iyenera kulembedwa kuti mupeze 4kp60 Support ya HDMI TX IP

Zithunzi 31 30 29 28 27 26 25 24

Kufikira

Bwezerani

Zithunzi 23 22 21 20 19 18 17 16

Kufikira

Bwezerani

Zithunzi 15 14 13 12 11 10 9 8

Kufikira

Bwezerani

Zithunzi 7 6 5 4 3 2 1 0

YAMBA

Access W Reset 0

Bit 0 - Yambani Kulemba "1" kuti izi ziyambitse kutumiza kwa data kwa Scrambler ndikoyambitsidwa. HDMI 2.0 imagwiritsa ntchito njira yopukusa yomwe imadziwika kuti 8b/10b encoding. Dongosolo la encoding iyi limagwiritsidwa ntchito kutumiza deta pa HDMI mawonekedwe modalirika komanso moyenera.

Wogwiritsa Ntchito

DS50003319C - 14

Lembani Mapu ndi Mafotokozedwe

4.2 XCVR_DATA_LANE_0_SEL (Funsani Funso)

Dzina: XCVR_DATA_LANE_0_SEL

Zokwanira: 0x004

sinthani: 0x1

Katundu: Zolemba zokha

XCVR_DATA_LANE_0_SEL register imasankha zomwe zikufunika kusamutsa kupita ku XCVR kuchokera ku HDMI TX IP kuti mupeze wotchi ya Full HD, 4kp30, 4kp60.

Zithunzi 31 30 29 28 27 26 25 24

Kufikira

Bwezerani

Zithunzi 23 22 21 20 19 18 17 16

Kufikira

Bwezerani

Zithunzi 15 14 13 12 11 10 9 8

Kufikira

Bwezerani

Zithunzi 7 6 5 4 3 2 1 0

START[1:0]

Pezani WW Reset 0 1

Bits 1:0 - START[1:0] Kulemba "10" pazigawo izi kuyambitsa 4KP60 ndikoyatsidwa ndipo kuchuluka kwa data kwa XCVR kumaperekedwa ngati FFFFF_00000.

Wogwiritsa Ntchito

DS50003319C - 15

Testbench Simulation

5. Testbench Simulation (Funsani Funso)

Testbench imaperekedwa kuti iwonetse magwiridwe antchito a HDMI TX pachimake. Testbench imagwira ntchito m'mawonekedwe achibadwidwe okhala ndi pixel 1 pa wotchi iliyonse komanso mawonekedwe amawu.

Gome lotsatirali likulemba magawo omwe amakonzedwa molingana ndi pulogalamuyo.

Gulu 5-1. Testbench Configuration Parameter

Dzina	Zosintha Zosasintha
Mtundu (g_COLOR_FORMAT)	RGB
Bits pachigawo chilichonse (g_BITS_PER_COMPONENT)	8
Nambala ya Ma Pixel (g_PIXELS_PER_CLK)	1
Thandizo la 4Kp60 (g_4K60_SUPPORT)	0
Mawonekedwe Omvera (g_AUX_CHANNEL_ENABLE)	1 (Yambitsani)
Chiyankhulo (G_FORMAT)	0 (Chotsani)

Kuti muyesere pachimake pogwiritsa ntchito testbench, chitani izi:

1. Muwindo la Design Flow, onjezerani Pangani Mapangidwe.

2. Dinani kumanja Pangani SmartDesign Testbench, ndiyeno dinani Thamangani, monga momwe chithunzichi chikusonyezera. Chithunzi 5-1. Kupanga SmartDesign Testbench

3. Lowetsani dzina la SmartDesign testbench, ndiyeno dinani OK.

Chithunzi 5-2. Kutchula SmartDesign Testbench

SmartDesign testbench idapangidwa, ndipo chinsalu chikuwoneka kumanja kwa gawo la Design Flow.

Wogwiritsa Ntchito

DS50003319C - 16

Testbench Simulation

4. Yendetsani ku Libero® SoC Catalog, sankhani View > Mawindo > IP Catalog, ndiyeno kukulitsa Mayankho Video. Dinani kawiri HDMI TX IP (v5.2.0), ndiyeno dinani Chabwino.

5. Muwindo la Parameter Configurator, sankhani Nambala yofunikira ya Pixels mtengo, monga momwe tawonetsera mu chithunzi chotsatira.

Chithunzi 5-3. Kukonzekera kwa Parameter

6. Sankhani madoko onse, dinani kumanja ndikusankha Limbikitsani ku Mlingo Wapamwamba.

7. Pazida za SmartDesign, dinani Generate Component.

8. Pa Stimulus Hierarchy tabu, dinani kumanja HDMI_TX_TB testbench file, ndiyeno dinani Sanzirani Pre-Synth Design > Open Interactively.

The ModelSim® chida chimatsegula ndi testbench, monga momwe chithunzi chotsatirachi chikusonyezera. Chithunzi 5-4. Chida cha ModelSim chokhala ndi HDMI TX Testbench File

Zofunika: Ngati kayeseleledwe wasokonezedwa chifukwa kuthamanga nthawi malire otchulidwa mu DO file, gwiritsani ntchito kuthamanga - onse lamula kuti amalize kayeseleledwe.

Wogwiritsa Ntchito

DS50003319C - 17

Testbench Simulation

5.1 Zithunzi za Nthawi (Funsani Funso)

Chithunzi chotsatira cha nthawi ya HDMI TX IP chikuwonetsa data ya kanema ndikuwongolera nthawi ya pixel imodzi pa wotchi iliyonse.

Chithunzi 5-5. HDMI TX IP Timing Diagram of Video Data ya 1 Pixel Per Clock

Chithunzi chotsatira chikuwonetsa zophatikizira zinayi za data yowongolera.

Chithunzi 5-6. HDMI TX IP Timing Diagram of Control Data ya 1 Pixel Per Clock

Wogwiritsa Ntchito

DS50003319C - 18

Kuphatikiza System

6. Kuphatikiza System (Funsani Funso)

Gawo ili likuwonetsa ngatiampndi kufotokozera kwapangidwe.

Gome lotsatirali likuwonetsa masanjidwe a PF XCVR, PF TX PLL, ndi PF CCC.

Gulu 6-1. PF XCVR, PF TX PLL, ndi PF CCC Configurations

Kusamvana		Kusintha kwa Bit Width PF XCVR			Kusintha kwa PF TX PLL		Kusintha kwa PF CCC
Kusamvana		Zithunzi za TX Mtengo	TX Clock Gawo Factor	TX PCS Nsalu M'lifupi	Zofunidwa Zotulutsa Bit Clock	Buku Koloko pafupipafupi	Zolowetsa pafupipafupi	Zotulutsa pafupipafupi
1PXL (1080p60) 8		1485	4	10	5940	148.5	NA	NA
1PXL (1080p30) 10		925	4	10	3700	148.5	92.5	74
	12	1113.75	4	10	4455	148.5	111.375	74.25
	16	1485	4	10	5940	148.5	148.5	74.25
4PXL (1080p60) 10		1860	4	40	7440	148.5	46.5	37.2
	12	2229	4	40	8916	148.5	55.725	37.15
	16	2970	2	40	5940	148.5	74.25	37.125
4PXL (4kp30)	8	2970	2	40	5940	148.5	NA	NA
	10	3712.5	2	40	7425	148.5	92.812	74.25
	12	4455	1	40	4455	148.5	111.375	74.25
	16	5940	1	40	5940	148.5	148.5	74.25
4PXL (4Kp60)	8	5940	1	40	5940	148.5	NA	NA

HDMI TX Sample Design, ikakonzedwa mu g_BITS_PER_COMPONENT = 8-bit ndi

g_PIXELS_PER_CLK = 1 PXL mode, ikuwonetsedwa pachithunzi chotsatira.

Chithunzi 6-1. HDMI TX Sampndi Design

HDMI_TX_C0_0

PF_INIT_MONITOR_C0_0

FABRIC_POR_N

PCIE_INIT_DONE

USRAM_INIT_DONE

SRAM_INIT_DONE

DEVICE_INIT_DONE

XCVR_INIT_DONE

USRAM_INIT_FROM_SNVM_DONE

USRAM_INIT_FROM_UPROM_DONE

USRAM_INIT_FROM_SPI_DONE

SRAM_INIT_FROM_SNVM_DONE

SRAM_INIT_FROM_UPROM_DONE

SRAM_INIT_FROM_SPI_DONE

AUTOCALIB_WACHITA

PF_INIT_MONITOR_C0

CORARESET_PF_C0_0

Mtengo CLK

EXT_RST_N

BANK_x_VDDI_STATUS

BANK_y_VDDI_STATUS

PLL_POWERDOWN_B

PLL_LOCK

FABRIC_RESET_N

SS_BUSY

INIT_DALIDWA

FF_US_RESTORE

FPGA_POR_N

CORARESET_PF_C0

Display_Controller_C0_0

FRAME_END_O

H_SYNC_O

RESETN_I

V_SYNC_O

SYS_CLK_I

V_ACTIVE_O

THANDIZA_I

DATA_TRIGGER_O

H_RES_O[15:0]

V_RES_O[15:0]

Display_Controller_C0

pattern_generator_verilog_pattern_0

DATA_VALID_O

SYS_CLK_I

FRAME_END_O

RESET_N_I

LINE_END_O

DATA_EN_I

RED_O[7:0]

FRAME_END_I

GREEN_O[7:0]

PATTERN_SEL_I[2:0]

BLUU_O[7:0]

BAYER_O[7:0]

Test_Pattern_Jenereta_C1

PF_XCVR_REF_CLK_C0_0

RESET_N_I

SYS_CLK_I

VIDEO_DATA_VALID_I

R_CLK_I

R_CLK_LOCK

G_CLK_I

G_CLK_LOCK

TMDS_R_O[9:0]

B_CLK_I

TMDS_G_O[9:0]

B_CLK_LOCK

TMDS_B_O[9:0]

V_SYNC_I

XCVR_LANE_0_DATA_O[9:0]

H_SYNC_I

DATA_R_I[7:0]

DATA_G_I[7:0]

DATA_B_I[7:0]

HDMI_TX_C0

PF_TX_PLL_C0_0

PF_XCVR_ERM_C0_0

PADs_OUT

LANE3_TXD_N

CLKS_FROM_TXPLL_0

LANE3_TXD_P

LANE0_IN

LANE2_TXD_N

LANE0_PCS_ARST_N

LANE2_TXD_P

LANE0_PMA_ARST_N

LANE1_TXD_N

LANE0_TX_DATA[9:0]

LANE1_TXD_P

LANE1_IN

LANE0_TXD_N

LANE1_PCS_ARST_N

LANE0_TXD_P

LANE1_PMA_ARST_N

LANE0_OUT

LANE1_TX_DATA[9:0]

LANE0_TX_CLK_R

LANE2_IN

LANE0_TX_CLK_STABLE

LANE2_PCS_ARST_N

LANE1_OUT

LANE2_PMA_ARST_N

LANE1_TX_CLK_R

LANE2_TX_DATA[9:0]

LANE1_TX_CLK_STABLE

LANE3_IN

LANE2_OUT

LANE3_PCS_ARST_N

LANE2_TX_CLK_R

LANE3_PMA_ARST_N

LANE2_TX_CLK_STABLE

LANE3_TX_DATA[9:0] LANE3_OUTLANE3_TX_CLK_R

LANE3_TX_CLK_STABLE

PF_XCVR_ERM_C0

LANE3_TXD_N LANE3_TXD_P LANE2_TXD_N LANE2_TXD_P LANE1_TXD_N LANE1_TXD_P LANE0_TXD_N LANE0_TXD_P

PATTERN_SEL_I[2:0] REF_CLK_PAD_P REF_CLK_PAD_N

REF_CLK_PAD_P

REF_CLK_PAD_NREF_CLK

REF_CLKPLL_LOCKCLKS_TO_XCVR

PF_XCVR_REF_CLK_C0

PF_TX_PLL_C0

Za Eksample, mu masinthidwe a 8-bit, zigawo zotsatirazi ndi gawo la kapangidwe kake: • PF_XCVR_ERM (PF_XCVR_ERM_C0_0) yasinthidwa kuti ikhale 1485 Mbps mu PMA mode ya TX yokha, ndipo makulidwe a data amasinthidwa kukhala 10 bit pa 1pxl mode ndi Wotchi ya 148.5 MHz, kutengera makonzedwe a tebulo am'mbuyomu

• LANE0_TX_CLK_R yotulutsa PF_XCVR_ERM_C0_0 imapangidwa ngati wotchi ya 148.5 MHz, kutengera zochunira zam'mbuyo zam'mbuyo

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ndi PF_INIT_MONITOR_C0) amayendetsedwa ndi LANE0_TX_CLK_R, yomwe ili 148.5 MHz

• R_CLK_I, G_CLK_I, ndi B_CLK_I amayendetsedwa ndi LANE3_TX_CLK_R, LANE2_TX_CLK_R, ndi LANE1_TX_CLK_R, motsatana

Wogwiritsa Ntchito

DS50003319C - 19

Kuphatikiza System

Sampkuphatikiza kwa, g_BITS_PER_COMPONENT = 8 ndi g_PIXELS_PER_CLK = 4. Kwa Example, mu masinthidwe a 8-bit, zigawo zotsatirazi ndi gawo la kapangidwe kake: • PF_XCVR_ERM (PF_XCVR_ERM_C0_0) yasinthidwa kuti ikhale 2970 Mbps mu PMA mode ya

TX yokha, yokhala ndi makulidwe a data omwe adasinthidwa kukhala 40-bit pamayendedwe a 1pxl ndi wotchi yachidziwitso ya 148.5 MHz kutengera zosintha zam'mbuyomu.

• LANE0_TX_CLK_R yotulutsa PF_XCVR_ERM_C0_0 imapangidwa ngati wotchi ya 74.25 MHz, kutengera zochunira zam'mbuyo zam'mbuyo

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ndi PF_INIT_MONITOR_C0) amayendetsedwa ndi LANE0_TX_CLK_R, yomwe ili 148.5 MHz

• R_CLK_I, G_CLK_I, ndi B_CLK_I amayendetsedwa ndi LANE3_TX_CLK_R, LANE2_TX_CLK_R, ndi LANE1_TX_CLK_R, motsatana

HDMI TX Sample Design, ikakonzedwa mu g_BITS_PER_COMPONENT = 12 Bit ndi g_PIXELS_PER_CLK = 1 PXL mode, yowonetsedwa pachithunzi chotsatira.

Chithunzi 6-2. HDMI TX Sampndi Design

PF_XCVR_ERM_C0_0

PATTERN_SEL_I[2:0]

REF_CLK_PAD_P REF_CLK_PAD_N

PF_CCC_C1_0

REF_CLK_0 OUT0_FABCLK_0PLL_LOCK_0

PF_CCC_C1

PF_INIT_MONITOR_C0_0

CORARESET_PF_C0_0

Mtengo CLK

EXT_RST_N

BANK_x_VDDI_STATUS

BANK_y_VDDI_STATUS

PLL_POWERDOWN_B

PLL_LOCK

FABRIC_RESET_N

SS_BUSY

INIT_DALIDWA

FF_US_RESTORE

FPGA_POR_N

CORARESET_PF_C0

Display_Controller_C0_0

FRAME_END_O

H_SYNC_O

RESETN_I

V_SYNC_O

SYS_CLK_I

V_ACTIVE_O

THANDIZA_I

DATA_TRIGGER_O

H_RES_O[15:0]

V_RES_O[15:0]

Display_Controller_C0

pattern_generator_verilog_pattern_0

DATA_VALID_O

SYS_CLK_I

FRAME_END_O

RESET_N_I

LINE_END_O

DATA_EN_I

RED_O[7:0]

FRAME_END_I

GREEN_O[7:0]

PATTERN_SEL_I[2:0]

BLUU_O[7:0]

BAYER_O[7:0]

Test_Pattern_Jenereta_C0

PF_XCVR_REF_CLK_C0_0

REF_CLK_PAD_P

REF_CLK_PAD_NREF_CLK

PF_XCVR_REF_CLK_C0

HDMI_TX_0

RESET_N_I

SYS_CLK_I

VIDEO_DATA_VALID_I

R_CLK_I

R_CLK_LOCK

G_CLK_I

G_CLK_LOCK

TMDS_R_O[9:0]

B_CLK_I

TMDS_G_O[9:0]

B_CLK_LOCK

TMDS_B_O[9:0]

V_SYNC_I

XCVR_LANE_0_DATA_O[9:0]

H_SYNC_I

DATA_R_I[11:0]

DATA_R_I[11:4]

DATA_G_I[11:0]

DATA_G_I[11:4]

DATA_B_I[11:0]

DATA_B_I[11:4]

HDMI_TX_C0

PF_TX_PLL_C0_0

PADs_OUT

CLKS_FROM_TXPLL_0

LANE3_TXD_N

LANE0_IN

LANE3_TXD_P

LANE0_PCS_ARST_N

LANE2_TXD_N

LANE0_PMA_ARST_N

LANE2_TXD_P

LANE0_TX_DATA[9:0]

LANE1_TXD_N

LANE1_IN

LANE1_TXD_P

LANE1_PCS_ARST_N

LANE0_TXD_N

LANE1_PMA_ARST_N

LANE0_TXD_P

LANE1_TX_DATA[9:0]

LANE0_OUT

LANE2_IN

LANE1_OUT

LANE2_PCS_ARST_N

LANE1_TX_CLK_R

LANE2_PMA_ARST_N

LANE1_TX_CLK_STABLE

LANE2_TX_DATA[9:0] LANE2_OUTLANE3_IN

LANE2_TX_CLK_R

LANE3_PCS_ARST_N

LANE2_TX_CLK_STABLE

LANE3_PMA_ARST_N

LANE3_OUT

LANE3_TX_DATA[9:0]

LANE3_TX_CLK_R

LANE3_TX_CLK_STABLE

PF_XCVR_ERM_C0

LANE3_TXD_N LANE3_TXD_P LANE2_TXD_N LANE2_TXD_P LANE1_TXD_N LANE1_TXD_P LANE0_TXD_N LANE0_TXD_P

FABRIC_POR_N

PCIE_INIT_DONE

USRAM_INIT_DONE

SRAM_INIT_DONE

DEVICE_INIT_DONE

XCVR_INIT_DONE

USRAM_INIT_FROM_SNVM_DONE

USRAM_INIT_FROM_UPROM_DONE

USRAM_INIT_FROM_SPI_DONE

SRAM_INIT_FROM_SNVM_DONE

SRAM_INIT_FROM_UPROM_DONE

SRAM_INIT_FROM_SPI_DONE

AUTOCALIB_WACHITA

REF_CLKPLL_LOCKCLKS_TO_XCVR

PF_INIT_MONITOR_C0

PF_TX_PLL_C0

Sampkuphatikiza kwa, g_BITS_PER_COMPONENT > 8 ndi g_PIXELS_PER_CLK = 1. Kwa Example, mu 12-bit kasinthidwe, zigawo zotsatirazi ndi gawo la mapangidwe:

• PF_XCVR_ERM (PF_XCVR_ERM_C0_0) yasinthidwa kuti ikhale 111.375 Mbps mu PMA mode ya TX yokha, ndipo makulidwe a data asinthidwa kukhala 10 bit pa 1pxl mode ndi 1113.75 Mbps wotchi, kutengera Gulu 6-1 zoikamo

• LANE1_TX_CLK_R yotulutsa PF_XCVR_ERM_C0_0 imapangidwa ngati wotchi ya 111.375 MHz, kutengera Gulu 6-1 zoikamo

• R_CLK_I, G_CLK_I, ndi B_CLK_I amayendetsedwa ndi LANE3_TX_CLK_R, LANE2_TX_CLK_R, ndi LANE1_TX_CLK_R, motsatana

• PF_CCC_C0 imapanga wotchi yotchedwa OUT0_FABCLK_0, yokhala ndi ma frequency a 74.25 MHz, pomwe wotchi yolowera ndi 111.375 MHz, yomwe imayendetsedwa ndi LANE1_TX_CLK_R

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ndi PF_INIT_MONITOR_C0) imayendetsedwa ndi OUT0_FABCLK_0, yomwe ili 74.25 MHz

Sampkuphatikiza kwa, g_BITS_PER_COMPONENT > 8 ndi g_PIXELS_PER_CLK = 4. Kwa Example, mu 12-bit kasinthidwe, zigawo zotsatirazi ndi gawo la mapangidwe:

• PF_XCVR_ERM (PF_XCVR_ERM_C0_0) yasinthidwa kuti ikhale 4455 Mbps mu PMA mode ya TX yokha, ndipo makulidwe a data asinthidwa kukhala 40 bit for 4pxl mode ndi 111.375 MHz, kutengera Gulu 6-1 zoikamo

• LANE1_TX_CLK_R yotulutsa PF_XCVR_ERM_C0_0 imapangidwa ngati wotchi ya 111.375 MHz, kutengera Gulu 6-1 zoikamo

Wogwiritsa Ntchito

DS50003319C - 20

Kuphatikiza System

• R_CLK_I, G_CLK_I, ndi B_CLK_I amayendetsedwa ndi LANE3_TX_CLK_R, LANE2_TX_CLK_R, ndi LANE1_TX_CLK_R, motsatana

• PF_CCC_C0 imapanga wotchi yotchedwa OUT0_FABCLK_0, yokhala ndi ma frequency a 74.25 MHz, pomwe wotchi yolowera ndi 111.375 MHz, yomwe imayendetsedwa ndi LANE1_TX_CLK_R

• SYS_CLK_I (HDMI_TX_C0, Display_Controller_C0, pattern_generator_C0, CORERESET_PF_C0, ndi PF_INIT_MONITOR_C0) imayendetsedwa ndi OUT0_FABCLK_0, yomwe ili 74.25 MHz

Wogwiritsa Ntchito

DS50003319C - 21

Mbiri Yobwereza

7. Mbiri Yobwereza (Funsani Funso)

Mbiri yokonzanso ikufotokoza zosintha zomwe zidakhazikitsidwa muzolemba. Zosinthazo zandandalikidwa ndi kubwereza, kuyambira ndi zofalitsa zamakono.

Gulu 7-1. Mbiri Yobwereza

Kubwereza	Tsiku	Kufotokozera
C	05/2024	Zotsatirazi ndi mndandanda wa zosintha pakukonzanso C kwa chikalatacho: • Zasinthidwa Mawu Oyamba gawo • Kuchotsa matebulo ogwiritsira ntchito zinthu za pixel imodzi ndi ma pixel anayi ndikuwonjezedwa Table 2 ndi Table 3 in 1. Kugwiritsa Ntchito Zida gawo • Zasinthidwa Gulu 3-1 mu 3.1. Zosintha Zosintha gawo • Wowonjezera Gulu 3-6 ndi Gulu 3-7 mu 3.2. Madoko gawo • Wowonjezera 6. Kuphatikiza kwadongosolo gawo
B		09/2022 Zotsatirazi ndi mndandanda wazosintha pakukonzanso B kwa chikalatacho: • Kusinthidwa zomwe zili mu Features ndi Mawu Oyamba • Wowonjezera Chithunzi 2-2 kwa olumala Audio Mode • Wowonjezera Gulu 3-4 ndi Gulu 3-5 • Kusinthidwa Gulu 3-2 ndi Gulu 3-3 • Zasinthidwa Gulu 3-1 • Zasinthidwa 1. Kugwiritsa Ntchito Zida • Zasinthidwa Chithunzi 1-1 • Zasinthidwa Chithunzi 5-3
A		04/2022 Zotsatirazi ndi mndandanda wa zosintha pakukonzanso A kwa chikalatacho: • Chikalatacho chinasamutsidwa kupita ku template ya Microchip • Nambala ya chikalatacho idasinthidwa kukhala DS50003319 kuchokera pa 50200863
2.0	—	M'munsimu ndi chidule cha zosintha zomwe zasinthidwa. • Magawo Owonjezera ndi Mabanja Othandizira
1.0		08/2021 Kukonzanso koyamba

Wogwiritsa Ntchito

DS50003319C - 22

Thandizo la Microchip FPGA

Gulu lazinthu za Microchip FPGA limathandizira zogulitsa zake ndi ntchito zosiyanasiyana zothandizira, kuphatikiza Makasitomala, Customer Technical Support Center, a webmalo, ndi maofesi ogulitsa padziko lonse lapansi. Makasitomala akulangizidwa kuti aziyendera zapaintaneti za Microchip asanakumane ndi chithandizo chifukwa ndizotheka kuti mafunso awo ayankhidwa kale.

Lumikizanani ndi Technical Support Center kudzera pa website pa www.microchip.com/support. Tchulani nambala ya Gawo la Chipangizo cha FPGA, sankhani gulu loyenera, ndikuyika mapangidwe files popanga chithandizo chaukadaulo.

Lumikizanani ndi Makasitomala kuti muthandizidwe ndi zinthu zomwe si zaukadaulo, monga mitengo yazinthu, kukweza kwazinthu, zambiri zosintha, mawonekedwe oyitanitsa, ndi chilolezo.

• Kuchokera ku North America, imbani 800.262.1060

• Kuchokera kudziko lonse lapansi, imbani 650.318.4460

• Fakisi, kulikonse padziko lapansi, 650.318.8044

Zambiri za Microchip

The Microchip Webmalo

Microchip imapereka chithandizo cha intaneti kudzera pa athu website pa www.microchip.com/. Izi webtsamba limagwiritsidwa ntchito kupanga files ndi zambiri kupezeka mosavuta kwa makasitomala. Zina mwazinthu zomwe zilipo ndi izi:

• Product Support - Mapepala a data ndi zolakwika, zolemba zamagwiritsidwe ntchito ndi sampmapulogalamu, zida zamapangidwe, maupangiri a ogwiritsa ntchito ndi zikalata zothandizira pa Hardware, kutulutsa kwaposachedwa kwa mapulogalamu ndi mapulogalamu osungidwa zakale

• General Technical Support - Mafunso Ofunsidwa Kawirikawiri (FAQs), zopempha zothandizira luso, magulu okambirana pa intaneti, mndandanda wa mamembala a pulogalamu ya Microchip

• Bizinesi ya Microchip - Zosankha zotsatsa ndikuyitanitsa, zofalitsa zaposachedwa za Microchip, mindandanda yamasemina ndi zochitika, mindandanda yamaofesi ogulitsa a Microchip, ogawa ndi oyimira fakitale.

Ntchito Yodziwitsa Kusintha Kwazinthu

Ntchito yodziwitsa zakusintha kwazinthu za Microchip imathandizira makasitomala kuti azitha kudziwa zinthu za Microchip. Olembetsa adzalandira zidziwitso za imelo nthawi iliyonse pakakhala zosintha, zosintha, zosintha kapena zolakwika zokhudzana ndi banja linalake kapena chida chachitukuko.

Kuti mulembetse, pitani ku www.microchip.com/pcn ndikutsatira malangizo olembetsera. Thandizo la Makasitomala

Ogwiritsa ntchito mankhwala a Microchip atha kulandira thandizo kudzera munjira zingapo: • Wogawa kapena Woyimilira

• Ofesi Yogulitsa Malo

• Embedded Solutions Engineer (ESE)

• Othandizira ukadaulo

Makasitomala akuyenera kulumikizana ndi omwe amawagawa, oyimilira kapena ESE kuti awathandize. Maofesi ogulitsa am'deralo amapezekanso kuti athandize makasitomala. Mndandanda wamaofesi ogulitsa ndi malo uli m'chikalatachi.

Thandizo laukadaulo likupezeka kudzera mu webtsamba pa: www.microchip.com/support Chitetezo cha Microchip Devices Code

Zindikirani tsatanetsatane wotsatira wa chitetezo cha code pazinthu za Microchip:

Wogwiritsa Ntchito

DS50003319C - 23

• Zogulitsa za Microchip zimakwaniritsa zomwe zili mu Microchip Data Sheet yawo.

• Microchip imakhulupirira kuti zinthu zomwe zili m'gulu lake zimakhala zotetezeka zikagwiritsidwa ntchito m'njira yoyenera, mkati mwazomwe zimapangidwira, komanso pansi pamikhalidwe yabwinobwino.

• Miyezo ya Microchip ndikuteteza mwamphamvu ufulu wake waukadaulo. Kuyesa kuphwanya malamulo otetezedwa ndi zinthu za Microchip ndikoletsedwa ndipo zitha kuphwanya Digital Millennium Copyright Act.

• Palibe Microchip kapena wopanga semiconductor wina aliyense amene angatsimikizire chitetezo cha code yake. Kutetezedwa kwa ma code sikutanthauza kuti tikutsimikizira kuti chinthucho ndi "chosasweka". Chitetezo cha code chikusintha nthawi zonse. Microchip yadzipereka mosalekeza kuwongolera mawonekedwe achitetezo azinthu zathu.

Chidziwitso chazamalamulo

Bukuli ndi zambiri zomwe zili pano zitha kugwiritsidwa ntchito ndi zinthu za Microchip zokha, kuphatikiza kupanga, kuyesa, ndi kuphatikiza zinthu za Microchip ndi pulogalamu yanu. Kugwiritsa ntchito chidziwitsochi mwanjira ina iliyonse kumaphwanya mawuwa. Zambiri zokhudzana ndi kugwiritsa ntchito zida zimaperekedwa kuti zitheke ndipo zitha kulowedwa m'malo ndi zosintha. Ndi udindo wanu kuwonetsetsa kuti pulogalamu yanu ikugwirizana ndi zomwe mukufuna. Lumikizanani ndi ofesi yogulitsa za Microchip kwanuko kuti muthandizidwe zina kapena, pezani thandizo lina pa www.microchip.com/en-us/support/design-help/ client-support-services.

ZIMENEZI AMAPEREKA NDI MICROCHIP "MONGA ILI". MICROCHIP SIIPEREKERA ZINTHU KAPENA ZIZINDIKIRO ZA MTIMA ULIWONSE KAYA KUTANTHAUZIRA KAPENA KUTANTHAWIRIKA, KULEMBEDWA KAPENA MWAMWAMBA, MALAMULO KAPENA ZINTHU ZINA, ZOKHUDZANA NDI CHIZINDIKIRO KUPHATIKIZAPO KOMA ZOSAKHALA PA CHENJEZO KILICHONSE, KUTENGA ZIPANGIZO, KUTENGA CHIZINDIKIRO, KUCHITIKA, NTCHITO, NTCHITO. PA CHOLINGA ENA, KAPENA ZINTHU ZOKHUDZA ZOKHUDZANA NDI MKHALIDWE WAKE, UKHALIDWE, KAPENA NTCHITO YAKE.

PAMENE MICROCHIP IDZAKHALA NDI NTCHITO PA CHIZINDIKIRO CHILICHONSE, CHAPADERA, CHILANGO, ZOCHITIKA, KAPENA ZOTSATIRA ZOTSATIRA, KUonongeka, mtengo, KAPENA NTCHITO ZONSE ZOMWE ZILI ZOKHUDZA CHIdziwitso KAPENA NTCHITO YAKE, KOMA CHIFUKWA CHIFUKWA CHOCHITIKA, ZOCHITIKA KAPENA ZOWONONGWA NDI ZOONERA. KUBWERA KWABWINO KWAMBIRI ZOLOLEZEDWA NDI MALAMULO, NDONDOMEKO YONSE YA MICROCHIP PA ZINSINSI ZONSE MU NJIRA ILIYONSE YOKHUDZANA NDI CHIdziwitso KAPENA KUKGWIRITSA NTCHITO CHOSAPYOTSA KUCHULUKA KWA ZOLIMBIKITSA, NGATI KULIPO, ZIMENE MULIPITSA CHIFUKWA CHIFUKWA CHIFUKWA CHIYANI.

Kugwiritsa ntchito zipangizo za Microchip pa chithandizo cha moyo ndi / kapena ntchito za chitetezo ndizoopsa kwa wogula, ndipo wogula akuvomera kuteteza, kubwezera ndi kusunga Microchip yopanda vuto lililonse ku zowonongeka, zodandaula, masuti, kapena ndalama zomwe zimachokera ku ntchito yotere. Palibe zilolezo zomwe zimaperekedwa, mobisa kapena mwanjira ina, pansi pa ufulu wazinthu zaukadaulo za Microchip pokhapokha zitanenedwa.

Zizindikiro

Dzina la Microchip ndi logo, logo ya Microchip, Adaptec, AVR, logo ya AVR, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetri , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, ndi XMEGA ndi zizindikiro zolembetsedwa za Microchip Technology Incorporated ku USA ndi mayiko ena.

AgileSwitch, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, TimeCesium, TimeHub, TimePictra, TimeProvider, ndi ZL ndi zizindikilo zolembetsedwa za Microchip Technology Incorporated ku USA.

Kuponderezedwa Kwachinsinsi, AKS, Analog-for-the-Digital Age, AnyCapacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, dsPICDEM.net,

Wogwiritsa Ntchito

DS50003319C - 24

Avereji yofananira, DAM, ECAN, Espresso T1S, EtherGREEN, EyeOpen, GridTime, IdealBridge, IGaT, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, IntelliMOS, Inter-Chip Connectivity, JitterBlocker, Knob-on-Dinks, Knob-on-Link maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mSiC, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, Power MOS IV, Power MOS 7, PowerSmart, PureSimart , QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance , Nthawi Yodalirika, TSHARC, Turing, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, ndi ZENA ndi zizindikiro za Microchip Technology Incorporated ku USA ndi mayiko ena.

SQTP ndi chizindikiro cha ntchito cha Microchip Technology Incorporated ku USA

Chizindikiro cha Adaptec, Frequency on Demand, Silicon Storage Technology, ndi Symmcom ndi zizindikilo zolembetsedwa za Microchip Technology Inc. m'maiko ena.

GestIC ndi chizindikiro cholembetsedwa cha Microchip Technology Germany II GmbH & Co. KG, kampani ya Microchip Technology Inc., m'maiko ena.

Quality Management System

Kuti mudziwe zambiri za Microchip's Quality Management Systems, chonde pitani www.microchip.com/quality.

Wogwiritsa Ntchito

DS50003319C - 25

Zogulitsa Padziko Lonse ndi Ntchito

AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE

Ofesi Yakampani

2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200

Fax: 480-792-7277

Othandizira ukadaulo:

www.microchip.com/support Web Adilesi:

www.microchip.com

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Austin, TX

Tel: 512-257-3370

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

Detroit

Novi, MI

Tel: 248-848-4000

Houston, TX

Tel: 281-894-5983

Indianapolis

Noblesville, PA

Tel: 317-773-8323

Fax: 317-773-5453

Tel: 317-536-2380

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

Tel: 951-273-7800

Raleigh, NC

Tel: 919-844-7510

New York, NY

Tel: 631-435-6000

San Jose, CA

Tel: 408-735-9110

Tel: 408-436-4270

Canada - Toronto

Tel: 905-695-1980

Fax: 905-695-2078

Australia - Sydney Tel: 61-2-9868-6733 China - Beijing

Tel: 86-10-8569-7000 China - Chengdu

Tel: 86-28-8665-5511 China - Chongqing Tel: 86-23-8980-9588 China - Dongguan Tel: 86-769-8702-9880 China - Guangzhou Tel: 86-20-8755-8029 China - Hangzhou Tel: 86-571-8792-8115 China - Hong Kong SAR Tel: 852-2943-5100 China - Nanjing

Tel: 86-25-8473-2460 China - Qingdao

Tel: 86-532-8502-7355 China - Shanghai

Tel: 86-21-3326-8000 China - Shenyang Tel: 86-24-2334-2829 China - Shenzhen Tel: 86-755-8864-2200 China - Suzhou

Tel: 86-186-6233-1526 China - Wuhan

Tel: 86-27-5980-5300 China - Xian

Tel: 86-29-8833-7252 China - Xiamen

Tel: 86-592-2388138 China - Zhuhai

Tel: 86-756-3210040

India - Bangalore

Tel: 91-80-3090-4444

India - New Delhi

Tel: 91-11-4160-8631

India - Pune

Tel: 91-20-4121-0141

Japan - Osaka

Tel: 81-6-6152-7160

Japan - Tokyo

Tel: 81-3-6880-3770

Korea - Daegu

Tel: 82-53-744-4301

Korea - Seoul

Tel: 82-2-554-7200

Malaysia - Kuala Lumpur Tel: 60-3-7651-7906

Malaysia - Penang

Tel: 60-4-227-8870

Philippines - Manila

Tel: 63-2-634-9065

Singapore

Tel: 65-6334-8870

Taiwan - Hsin Chu

Tel: 886-3-577-8366

Taiwan - Kaohsiung

Tel: 886-7-213-7830

Taiwan - Taipei

Tel: 886-2-2508-8600

Thailand - Bangkok

Tel: 66-2-694-1351

Vietnam - Ho Chi Minh

Tel: 84-28-5448-2100

Wogwiritsa Ntchito

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4485-5910

Fax: 45-4485-2829

Finland - Espoo

Tel: 358-9-4520-820

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Germany - Kujambula

Tel: 49-8931-9700

Germany - Haan

Tel: 49-2129-3766400

Germany - Heilbronn

Tel: 49-7131-72400

Germany - Karlsruhe

Tel: 49-721-625370

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Germany - Rosenheim

Tel: 49-8031-354-560

Israeli - Hod Hasharoni

Tel: 972-9-775-5100

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Italy - Padova

Tel: 39-049-7625286

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Norway - Trondheim

Tel: 47-72884388

Poland - Warsaw

Tel: 48-22-3325737

Romania-Bucharest

Tel: 40-21-407-87-50

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Sweden - Gothenberg

Tel: 46-31-704-60-40

Sweden - Stockholm

Tel: 46-8-5090-4654

UK - Wokingham

Tel: 44-118-921-5800

Fax: 44-118-921-5820

DS50003319C - 26

Zolemba / Zothandizira

MICROCHIP DS50003319C-13 Efaneti HDMI TX IP [pdf] Buku Logwiritsa Ntchito
DS50003319C - 13, DS50003319C - 2, DS50003319C - 3, DS50003319C-13 Efaneti HDMI TX IP, DS50003319C-13, Efaneti HDMI TX IP, HDMI TX IP, IP

Maumboni

Buku Logwiritsa Ntchito

DS50003319C-13 Efaneti HDMI TX IP

HDMI TX IP User Guide

Chidule

Mawonekedwe

Malangizo oyika

Wogwiritsa Ntchito

Kugwiritsa Ntchito Zida (Funsani Funso)

Table 3. Kugwiritsa Ntchito Zothandizira kwa 4PXL

Wogwiritsa Ntchito

HDMI TX IP Configurator

Chithunzi 1-1. HDMI TX IP Configurator

Kukhazikitsa kwa Hardware

RGB Mtundu Format Mode

Kukhazikitsa kwa Hardware

Kukhazikitsa kwa Hardware

HDMI TX Parameters ndi Interface Signals

Gulu 3-3. Zolowetsa ndi Zotulutsa za AXI4 Stream Interface

Gulu 3-4. Zolowetsa ndi Zotulutsa

HDMI TX Parameters ndi Interface Signals

Gulu 3-5. Zolowetsa ndi Zotulutsa za AXI4 Stream Interface

Gulu 3-6. Kulowetsa ndi Kutulutsa kwa YCbCr444 Mode ndi Audio Mode Yayatsidwa

HDMI TX Parameters ndi Interface Signals

Lembani Mapu ndi Mafotokozedwe

Lembani Mapu ndi Mafotokozedwe

4.1 SCRAMBLER_IP_EN (Funsani Funso)

Kuti muyesere pachimake pogwiritsa ntchito testbench, chitani izi:

Testbench Simulation

Kuphatikiza System

Kuphatikiza System

Kuphatikiza System

Mbiri Yobwereza

Gulu 7-1. Mbiri Yobwereza

Thandizo la Microchip FPGA

Zambiri za Microchip

The Microchip Webmalo

Ntchito Yodziwitsa Kusintha Kwazinthu

Chidziwitso chazamalamulo

Zizindikiro

Zolemba / Zothandizira

Maumboni

Zolemba Zogwirizana

Siyani ndemanga

Letsani yankho